Gallium arsenide single crystal substrate and method for producing same

Abstract

Provided is a gallium arsenide single crystal substrate having a circular main surface, the average value of the dislocation density of the main surface being 5 cm-2 to 100 cm-2, and the average value of the dislocation density of the main surface being 5 cm-2 or more and 100 cm-2 or less, in imaginary lattices formed by overlying squares having one side of 2 mm on the main surface so that the squares are arranged at most without overlapping each other, the average value of the dislocation density of the main surface being 5 cm-2 or more and the average value of the dislocation density of the main surface being 100 cm-2 or less. The ratio of the number of the squares in which no dislocation is present in the squares to the total number of the squares constituting the lattice is 97.0% to 99.5%, the gallium arsenide single crystal substrate contains silicon, and the concentration of the silicon is 1.0 * 1018 cm-3 to 5.0 * 1019 cm-3. The carrier concentration of the gallium arsenide single crystal substrate is 1.0 * 10 < 18 > cm <-3 > or more and 4.0 * 10 < 18 > cm <-3 > or less.

Description

Technical Field

[0001] The present invention relates to a gallium arsenide single crystal substrate and a method for manufacturing the same. Background Art

[0002] International Publication No. 2006 / 106644 (Patent Document 1) discloses a gallium arsenide single crystal ingot doped with silicon (Si) applied to a gallium arsenide single crystal substrate (hereinafter, also referred to as "GaAs single crystal substrate"). The average value of the dislocation density of the GaAs single crystal ingot is 50 cm -2 Hereinafter, when the carrier concentration of the part with a curing rate of 0.1 is set as C0.1 and the carrier concentration of the part with a curing rate of 0.8 is set as C0.8, the relationship of C0.8 / C0.1 < 2.0 is satisfied. Further, Patent Document 1 discloses that the carrier concentration of the above GaAs single crystal ingot is 1.0×10 17 cm -3 or more and 1.0×10 19 cm -3 or less. International Publication No. 2021 / 251349 (Patent Document 2) discloses a GaAs single crystal ingot. The average value of the dislocation density of the GaAs single crystal ingot is 500 cm -2 or less, the atomic concentration of Si is 2.0×10 17 cm -3 or more and 1.5×10 19 cm -3 or less, and the carrier concentration is 5.5×10 17 cm -3 or less.

[0003] Japanese Patent Application Laid-Open No. 2011-148693 (Patent Document 3) and Japanese Patent Application Laid-Open No. 2011-148694 (Patent Document 4) both disclose an n-type GaAs single crystal substrate doped with Si. The average values of the dislocation density of the GaAs single crystal substrates are 40 to 100 cm -2 and 15 to 30 cm -2 respectively, the atomic concentrations of Si are 5.0×10 16 cm -3 or more and 5.0×10 17 cm -3 or less and 5.0×10 16 cm -3 or more and 5.0×10 17 cm -3The following Japanese Patent Application Laid-Open No. 2011-527280 (Patent Document 5) and Non-Patent Document 1 below disclose a measurement method in which blocks of a specified size are formed on a main surface, and the dislocation density is obtained by counting the dislocations present in the mass blocks.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: International Publication No. 2006 / 106644;

[0007] Patent Document 2: International Publication No. 2021 / 251349;

[0008] Patent Document 3: Japanese Patent Application Laid-Open No. 2011-148693;

[0009] Patent Document 4: Japanese Patent Application Laid-Open No. 2011-148694;

[0010] Patent Document 5: Japanese Patent Application Laid-Open No. 2011-527280.

[0011] Non-Patent Documents

[0012] Non-Patent Document 1: Sasabe et al., "VGF Method Low-Dislocation Density GaAs Wafers Suitable for Semiconductor Laser Mass Production", Hitachi Cable, No. 20, August 2001, pp. 33-36. Summary of the Invention

[0013] The gallium arsenide single crystal substrate of the present invention is a gallium arsenide single crystal substrate having a main surface with a circular shape. The average value of the dislocation density on the main surface is 5 cm -2 or more and 100 cm -2 or less. In a hypothetical lattice formed by arranging squares with a side length of 2 mm on the main surface in a non-overlapping manner as much as possible, the ratio of the number of squares in which no dislocations are present in the squares to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less. The diameter of the gallium arsenide single crystal substrate is 70 mm or more. The gallium arsenide single crystal substrate contains silicon. The atomic concentration of the silicon is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less. The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 or more and 4.0×10 18 cm -3 or less.

[0014] The manufacturing method of the gallium arsenide single crystal substrate of the present invention is a method for manufacturing a gallium arsenide single crystal substrate having a circular main surface. The above manufacturing method includes: a step of obtaining a gallium arsenide single crystal by crystal growth using a gallium arsenide single crystal growth apparatus; and a step of obtaining the above gallium arsenide single crystal substrate by processing the above gallium arsenide single crystal. The above gallium arsenide single crystal growth apparatus has a crucible, a crucible holder for holding the above crucible, and a heating element for heating the above crucible. The above crucible includes a cylindrical seed crystal accommodating portion, a diameter-expanded portion connected to the above seed crystal accommodating portion, and a straight tube portion connected to the above diameter-expanded portion. The above seed crystal accommodating portion has a hollow portion that is open on one side connected to the above diameter-expanded portion and has a bottom wall formed on the side opposite to the above diameter-expanded portion. The above diameter-expanded portion has a frustum of a cone shape that expands in diameter upward along the axial direction of the above crucible, and the small-diameter side of the above diameter-expanded portion is connected to the above seed crystal accommodating portion. The above straight tube portion has a hollow cylindrical shape and is connected to the large-diameter side of the above diameter-expanded portion. The above crucible holder holds the above diameter-expanded portion without contacting the above straight tube portion. When the inner diameter of the above straight tube portion is represented as D1 and the outer diameter of the above crucible holder is represented as D2, the above D1 and D2 satisfy the relationship of 1.0 < D2 / D1 < 1.5, and the units of the above D1 and the above D2 are mm. Description of the Drawings

[0015] Figure 1 It is an explanatory diagram showing the etch pits that appear on the main surface of the gallium arsenide single crystal substrate of the present embodiment by etching using molten potassium hydroxide.

[0016] Figure 2 It is for explaining in order to obtain Figure 1 The case of setting a hypothetical grid that covers the main surface of the gallium arsenide single crystal substrate shown in the figure in such a way that squares with a side length of 2 mm are arranged without overlapping as many as possible to calculate the dislocation density on the main surface.

[0017] Figure 3 It is a flowchart showing an example of the manufacturing method of the gallium arsenide single crystal substrate of the present embodiment.

[0018] Figure 4 It relates to the manufacturing method of the gallium arsenide single crystal substrate of the present embodiment and is an explanatory diagram showing the step of obtaining a gallium arsenide single crystal using a single crystal growth apparatus. Detailed Description of the Invention

[0019] [Problems to be Solved by the Invention]

[0020] Generally speaking, for a GaAs single crystal substrate with a smaller average value of the dislocation density on the main surface, the yield rate of manufacturing semiconductor devices using the above substrate (hereinafter, also referred to as "element yield rate") is higher. However, according to the research of the present inventors, it is found that even when comparing GaAs single crystal substrates with an equally small average value of the dislocation density on the main surface, there are differences in the element yield rate. It is also found that when the dislocation density on the main surface is zero or extremely small, since the GaAs single crystal ingot and the GaAs single crystal substrate are prone to cracking during processing, the element yield rate does not necessarily increase. That is, even when developing a GaAs single crystal substrate with a smaller average value of the dislocation density on the main surface, it cannot be said that the element yield rate will definitely increase. Therefore, there is room for improvement in the GaAs single crystal substrates of the above Patent Documents 1 to 4 in terms of improving the element yield rate. In addition, the average value of the dislocation density of the GaAs single crystal substrate in the above Non-Patent Document 1 is not calculated for the entire main surface, and it cannot be said that the element yield rate will definitely increase. Furthermore, the average value of the dislocation density on the main surface of the GaAs single crystal substrate in the above Patent Document 5 is inherently large.

[0021] In view of the above situation, an object of the present invention is to provide a gallium arsenide single crystal substrate capable of improving the element yield rate and a manufacturing method thereof.

[0022] [Effects of the present invention]

[0023] According to the present invention, it is possible to provide a gallium arsenide single crystal substrate capable of improving the element yield rate and a manufacturing method thereof.

[0024] [Outline of the embodiment]

[0025] First, the outline of the embodiment of the present invention will be described. To solve the above problems, the present inventors have repeatedly conducted in-depth research. The present inventors have found that first, a GaAs single crystal substrate is divided into regions of a size corresponding to elements for constituting a semiconductor device, and when evaluating the dislocation density for each of the above regions, the substrate with a larger number of regions having a dislocation density of zero has a higher element yield rate. Furthermore, the present inventors have also found that, as described above, compared with a GaAs single crystal substrate having a small but non-zero dislocation density on the entire main surface, a GaAs single crystal substrate having a dislocation density of zero on the entire main surface has fewer cracks during processing, thereby improving the element yield rate. Based on these insights, the present inventors have grown a GaAs single crystal having a small average value of the dislocation density while controlling the thermal distribution in the crystal to be uniform. As a result, it has been found that the above-mentioned element yield rate can be significantly improved in the GaAs single crystal substrate obtained from the above GaAs single crystal, thereby completing the present invention.

[0026] Next, embodiments of the present invention will be listed and described.

[0027] [1] The gallium arsenide single crystal substrate according to an embodiment of the present invention is a gallium arsenide single crystal substrate having a circular main surface. The average value of the dislocation density of the main surface is 5 cm -2 or more and 100 cm -2 or less. In a hypothetical lattice formed by arranging squares with a side length of 2 mm on the main surface in a non-overlapping manner as much as possible, the ratio of the number of squares without dislocations in the squares to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less. The diameter of the gallium arsenide single crystal substrate is 70 mm or more. The gallium arsenide single crystal substrate contains silicon. The atomic concentration of the silicon is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less. The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 or more and 4.0×10 18 cm -3 or less. The gallium arsenide single crystal substrate having such characteristics can improve the device yield.

[0028] [2] The crystal plane of the main surface is preferably the {100} plane of the gallium arsenide single crystal or a plane having a deviation angle greater than 0° and 3° or less from the {100} plane of the gallium arsenide single crystal. The dislocations preferably are included in slip lines, and the slip lines exist along at least one direction selected from four directions equivalent to the [01-1] direction of the gallium arsenide single crystal from the outer periphery of the main surface toward the inside. Thereby, the device yield can be improved in the gallium arsenide single crystal substrate including the slip lines.

[0029] [3] And [4] The diameter of the gallium arsenide single crystal substrate is preferably 70 mm or more and 210 mm or less. Thereby, the device yield can be improved in a so-called large-diameter gallium arsenide single crystal substrate having a diameter of 70 mm or more and 210 mm or less.

[0030] [5] The gallium arsenide single crystal substrate preferably contains boron and the atomic concentration of the boron is 1.0×10 18 cm -3 or more and 1.0×10 19 cm -3 or less. Thereby, a gallium arsenide single crystal substrate with fewer dislocations can be provided.

[0031] [6]A method for manufacturing a gallium arsenide single crystal substrate according to an embodiment of the present invention is a method for manufacturing a gallium arsenide single crystal substrate having a circular main surface. The above manufacturing method includes: a step of obtaining a gallium arsenide single crystal by crystal growth using a gallium arsenide single crystal growth apparatus; and a step of obtaining the above gallium arsenide single crystal substrate by processing the above gallium arsenide single crystal. The above gallium arsenide single crystal growth apparatus has a crucible, a crucible holding table for holding the above crucible, and a heating element for heating the above crucible. The above crucible includes a cylindrical seed crystal accommodating portion, a diameter-expanded portion connected to the above seed crystal accommodating portion, and a straight tube portion connected to the above diameter-expanded portion. The above seed crystal accommodating portion has a hollow portion that is open on one side connected to the above diameter-expanded portion and has a bottom wall formed on the side opposite to the above diameter-expanded portion. The above diameter-expanded portion has a frustum of a cone shape that expands in diameter upward along the axial direction of the above crucible, and the small-diameter side of the above diameter-expanded portion is connected to the above seed crystal accommodating portion. The above straight tube portion has a hollow cylindrical shape and is connected to the large-diameter side of the above diameter-expanded portion. The above crucible holding table holds the above diameter-expanded portion without contacting the above straight tube portion. When the inner diameter of the above straight tube portion is represented as D1 and the outer diameter of the above crucible holding table is represented as D2, the above D1 and D2 satisfy the relationship of 1.0 < D2 / D1 < 1.5, and the units of the above D1 and the above D2 are mm. By the method for manufacturing a gallium arsenide single crystal substrate having such characteristics, a gallium arsenide single crystal substrate with improved device yield can be obtained.

[0032] [7]The step of obtaining the above gallium arsenide single crystal preferably includes: a step of accommodating a seed crystal in the above seed crystal accommodating portion and accommodating bulk gallium arsenide together with silicon in the above diameter-expanded portion and the above straight tube portion; a step of melting a part of the above seed crystal and the above gallium arsenide into a gallium arsenide melt by heating the above crucible with the above heating element and simultaneously bringing the above gallium arsenide melt into contact with the remaining part of the above seed crystal; and a step of growing the above gallium arsenide single crystal from the above gallium arsenide melt on the remaining part of the above seed crystal. The above step of crystal growth preferably: while controlling the value obtained by second-order differentiating the temperature at the interface between the above gallium arsenide single crystal and the above gallium arsenide melt with respect to the axial position of the above crucible at the above interface to be 0.003 °C / mm 2 or more and 0.012 °C / mm or less, and implementing while. The positive direction of the above position is preferably the direction from the lower side to the upper side of the above crucible along the above axial direction. The silicon concentration of the above gallium arsenide single crystal substrate is preferably 1.0×10 2 18 cm -3 or more and 5.0×10 19 cm -3 or less. Thereby, a gallium arsenide single crystal substrate with further improved device yield can be obtained.

[0033] [Details of the embodiment]

[0034] Hereinafter, an embodiment of the present invention (hereinafter, also referred to as "this embodiment") will be described in more detail, but the present invention is not limited thereto. Sometimes, the description will be made with reference to the accompanying Figure 1 drawings. In this specification and the drawings, the same or corresponding elements are denoted by the same reference numerals, and the same description thereof will not be repeated. In addition, in the drawings, in order to facilitate understanding of each component, the scale is appropriately adjusted for representation, and the scale of each component shown in the drawings is not necessarily the same as that of the actual component.

[0035] In this specification, a notation in the form of "A to B" means the upper and lower limits of the range (i.e., A or more and B or less). When no unit is described for A and only a unit is described for B, the unit of A is the same as that of B. Further, in this specification, when a compound or the like is represented by a chemical formula, when the atomic ratio is not particularly limited, it is regarded as including all the conventionally known atomic ratios, and it is not necessary to be limited only to the atomic ratio within the stoichiometric range.

[0036] In this specification, the "main surface" of a gallium arsenide single crystal substrate means both of the two circular surfaces of the substrate. In a gallium arsenide single crystal substrate, when at least one of these two surfaces satisfies the scope of the claims of the present invention, it belongs to the scope of the present invention. Sometimes, an epitaxial film is disposed on the "main surface" of the gallium arsenide single crystal substrate. In addition, in this specification, the "surface" used in the term "in-plane" means the "main surface". Further, when the diameter of the gallium arsenide single crystal substrate is denoted as "70 mm", it means that the diameter is about 70 mm (about 70 to 76.5 mm), or it means 3 inches. When the diameter is denoted as "100 mm", it means that the diameter is about 100 mm (about 95 to 105 mm), or it means 4 inches. When the diameter is denoted as "150 mm", it means that the diameter is about 150 mm (about 145 to 155 mm), or it means 6 inches. When the diameter is denoted as "210 mm", it means that the diameter is about 210 mm (about 195 to 210 mm), or it means 8 inches. The above diameter can be measured by using a conventionally known outer diameter measuring instrument such as a vernier caliper.

[0037] In this specification, the "element yield" is the yield obtained by multiplying the processing yield by the performance yield. The above-mentioned processing yield represents the ratio of wafers for forming vertical cavity surface emitting lasers (VCSELs) that can be obtained from a gallium arsenide single crystal substrate without cracking, defects, etc. during processing. The above-mentioned performance yield represents the ratio of VCSELs obtained from the above-mentioned wafers that can meet the required specified performance. The above-mentioned "element yield" can be expressed as a percentage. The "processing yield" can be expressed by the ratio of the above-mentioned substrate without cracking, defects, etc. in a series of processes from the epitaxial growth process for forming a light emitting layer, etc. on the gallium arsenide single crystal substrate to the process for forming a VCSEL-forming wafer. The "performance yield" is to conduct an accelerated aging test based on burn-in on the VCSELs obtained from the above-mentioned wafers, and judge the quality according to the degree of aging after the test, and can be expressed by the ratio of its qualified products.

[0038] In the crystallographic descriptions in this specification, [] is used to represent a single crystal orientation, < > is used to represent a crystal orientation family, () is used to represent a single crystal plane, and {} is used to represent a crystal plane family. In addition, a negative crystallographic index is usually expressed by marking a "- (bar)" above the number, but when marking it in this specification, a negative sign is marked before the number.

[0039] [Gallium arsenide single crystal substrate]

[0040] The gallium arsenide single crystal substrate (GaAs single crystal substrate) of this embodiment is a GaAs single crystal substrate having a main surface with a circular shape. The average value of the dislocation density of the above-mentioned main surface is 5 cm -2 or more and 100 cm -2 or less. In a hypothetical lattice formed by arranging squares with a side length of 2 mm on the above-mentioned main surface in the most non-overlapping manner, the ratio of the number of the above-mentioned squares without dislocations in the above-mentioned squares to the total number of the above-mentioned squares constituting the lattice is 97.0% or more and 99.5% or less. The diameter of the above-mentioned GaAs single crystal substrate is 70 mm or more. The above-mentioned GaAs single crystal substrate contains silicon. The concentration of the above-mentioned silicon is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less. The carrier concentration of the above-mentioned GaAs single crystal substrate is 1.0×10 18 cm -3 or more and 4.0×10 18 cm -3 or less. A GaAs single crystal substrate having such characteristics can improve the element yield.

[0041] The reasons for inferring that the above GaAs single crystal substrate can improve the device yield are as follows. That is, the above GaAs single crystal substrate is composed of a gallium arsenide single crystal (hereinafter, also referred to as "GaAs single crystal"). This gallium arsenide single crystal is manufactured using a gallium arsenide single crystal growth apparatus (hereinafter, also referred to as "GaAs single crystal growth apparatus") having a specified crucible holding table based on the method described in the item of [Manufacturing method of gallium arsenide single crystal substrate] described later. That is, this gallium arsenide single crystal is manufactured by strictly controlling the temperature at the interface position between the GaAs single crystal and the gallium arsenide molten liquid (hereinafter, also referred to as "GaAs molten liquid") using the above single crystal growth apparatus. Thus, it is possible to grow the above GaAs single crystal while maintaining the interface shape formed by the uniform thermal distribution in the crystal, and therefore, the generation of dislocations due to thermal strain can be suppressed in the ingot of the above GaAs single crystal. The ingot of the above GaAs single crystal can also obtain the effect of reducing the dislocation density brought about by the doping of silicon. In addition, since a special manufacturing method that makes the entire main surface dislocation-free is not adopted, the above GaAs single crystal substrate can also avoid cracks, defects, etc. from occurring when processing the GaAs single crystal to obtain the above GaAs single crystal substrate. Based on the above description, it is considered that the GaAs single crystal substrate of the present embodiment can improve the device yield based on the manufacturing method described later.

[0042] <Main surface>

[0043] The GaAs single crystal substrate of the present embodiment has a circular main surface as described above. In the present specification, the "circular shape" indicating the shape of this main surface includes not only a geometrically circular shape but also a shape in which the main surface does not form a geometrically circular shape by forming at least any one of a notch, an orientation flat (hereinafter, also referred to as "OF"), or an index flat (hereinafter, also referred to as "IF") on the outer periphery of the above main surface. Here, the "shape in the case where the main surface does not form a geometrically circular shape" refers to the shape in which the length of the line segment extending from an arbitrary point on the outer periphery of the main surface to the center of the above main surface becomes shorter among the line segments extending from an arbitrary point on the above notch, OF, and IF to the center of the main surface. Furthermore, the "shape in the case where the main surface does not form a geometrically circular shape" also includes a shape in which the lengths of all the line segments extending from an arbitrary point on the outer periphery of the main surface to the center of the above main surface are not necessarily the same due to the shape of the GaAs single crystal as the raw material of the GaAs single crystal substrate. In this case, regarding the center of the main surface, it refers to the position of the center of gravity. Regarding the diameter of the GaAs single crystal substrate, it refers to the length of the longest line segment among the line segments extending from an arbitrary point on the outer periphery of the GaAs single crystal substrate through the center of the above main surface to another point on the above outer periphery.

[0044] The surface roughness of the main surface is preferably 0.3 nm or less in terms of the surface roughness Sa specified in JIS B 0681-2:2018. Thereby, the main surface becomes a mirror surface, and thus it can contribute to the improvement of device characteristics. The surface roughness Sa of the main surface is more preferably 0.2 nm or less, and even more preferably 0.1 nm or less. For the surface roughness Sa of the main surface, it can be measured by using the intermittent contact mode of a conventionally known atomic force microscope (for example, trade name: "Dimension 3000", manufactured by Bruker Corporation). More specifically, it can be measured by the following method: A 512×512 pixel size used to calculate the surface roughness Sa of the main surface using the atomic force microscope is corresponded to an arbitrary square area of 0.2 μm in length × 0.2 μm in width on the main surface. Thereby, the surface roughness Sa of this area can be obtained.

[0045] Here, the surface roughness Sa does not have to be 0.3 nm or less in all the above regions measured on the main surface, as long as the surface roughness Sa measured in at least one of the multiple regions set on the main surface of the GaAs single crystal substrate is 0.3 nm or less. As the region on the main surface for measuring the surface roughness Sa, for example, a total of 5 regions centered on the center of the above GaAs single crystal substrate and the centers of any 4 points on the circumference 5 mm from the outer edge to the inside of the above GaAs single crystal substrate can be selected.

[0046] (Dislocation density)

[0047] The average value of the dislocation density of the main surface is 5 cm -2 or more and 100 cm -2 or less. Furthermore, in the imaginary lattice formed by arranging squares with a side length of 2 mm on the main surface in the most non-overlapping manner, the ratio of the number of squares without dislocations in the squares to the total number of squares constituting the lattice (hereinafter, also referred to as "dislocation-free ratio") is 97.0% or more and 99.5% or less. From another perspective, the probability that there are no dislocations in the squares constituting the lattice is 97.0% or more and 99.5% or less. Specifically, the average value of the dislocation density of the main surface and the dislocation-free ratio are obtained by the following method: After etching the main surface using molten potassium hydroxide, the corrosion pits (hereinafter, also referred to as "etch pits") appearing on the main surface are counted. That is, the average value of the number of etch pits of the GaAs single crystal substrate in this embodiment is 5 cm -2 or more and 100 cm -2Hereinafter, further, the ratio of the number of the above-mentioned squares in which no etching pits exist within the above-mentioned square to the total number of the above-mentioned squares constituting the above-mentioned lattice is 97.0% or more and 99.5% or less. Although an etching pit is not synonymous with a dislocation academically, it can be regarded as equivalent to a dislocation in the technical field of the present invention.

[0048] (Calculation method of the number of etching pits)

[0049] Figure 1 It is an explanatory diagram showing etching pits that appear on the main surface of the gallium arsenide single crystal substrate of the present embodiment by etching using molten potassium hydroxide. Figure 2 It is to explain in order to obtain Figure 1 The case of a hypothetical lattice in which squares with a side length of 2 mm are arranged on the main surface of the gallium arsenide single crystal substrate shown in the figure in the most non-overlapping manner to cover the surface. Hereinafter, with reference to Figure 1 and Figure 2 , a specific calculation method of the number of etching pits will be described.

[0050] First, the main surface of the GaAs single crystal substrate is immersed in molten potassium hydroxide at 500 °C for 10 minutes. Then, the above-mentioned GaAs single crystal substrate is taken out from the above-mentioned molten potassium hydroxide. As for the method of immersing the above-mentioned GaAs single crystal substrate, a conventionally well-known method can be used. Thereby, a GaAs single crystal substrate in which dislocations existing on the main surface appear as etching pits is obtained. For example, as Figure 1 shown, a GaAs single crystal substrate 1 in the following form can be obtained: a form in which a plurality of dislocations t exist connected as etching pits from the outer periphery of the main surface 11 toward the inside. A bundle of dislocations t composed of the plurality of dislocations t that appear in the GaAs single crystal substrate 1 is hereinafter referred to as a slip line S. In addition, Figure 1 The crystal plane of the main surface 11 of the GaAs single crystal substrate 1 shown in the figure is the {100} plane.

[0051] Next, as Figure 2As shown, a hypothetical lattice G is set on the main surface 11 of the GaAs single crystal substrate 1, which is formed by arranging squares with a side length of 2 mm in the most non-overlapping manner to cover the surface. Further, for each square constituting the hypothetical lattice G, it is observed using a known optical microscope (for example, trade name: "ECLIPSE (registered trademark) LV150N", manufactured by Nikon Corporation), and thereby the number of etch pits appearing in one field of view of the above optical microscope is counted. In this case, regarding the observation using the above optical microscope, it is carried out at a magnification of 50 times. Thus, one field of view of the above optical microscope becomes a size of 2 mm × 2 mm, corresponding to the size of the above square. Therefore, the number of etch pits in each field of view can be obtained as the number of dislocations in each square constituting the hypothetical lattice G. In addition, as the number of etch pits, only those with an area of 100 μm 2 or more are counted.

[0052] Finally, the etch pits counted for each square constituting the hypothetical lattice G are respectively converted to the number per 1 cm 2 . Thus, the dislocation density of each square is calculated. Then, by dividing the sum of the above dislocation densities by the number of the above squares, the average value of the dislocation density of the above main surface is obtained. Further, by finding the ratio of the number of the above squares in which no dislocations exist within the above squares to the total number of squares constituting the hypothetical lattice G, the above dislocation-free rate is calculated. In this specification, "covering the main surface with squares in the most non-overlapping manner" means that when the squares are arranged on the main surface 11 in a non-overlapping manner, when the squares overlap with the outer periphery and the outside of the main surface 11, the square is excluded as an element constituting the hypothetical lattice G. This is because the region near the outer periphery including the outer periphery of the main surface 11 of the GaAs single crystal substrate 1 has a large variation in the number of dislocations in each substrate, and is generally a region that is not used as a material for semiconductor devices.

[0053] The average value of the dislocation density of the above main surface is preferably 10 cm -2 or more and 90 cm -2 or less, more preferably 15 cm -2 or more and 80 cm -2 or less. Further, the above dislocation-free rate is preferably 97.0% or more and 99.4% or less, more preferably 97.5% or more and 99.4% or less. Thus, a GaAs single crystal substrate with a further improved device yield can be provided.

[0054] Here, as Figure 1The form in which a plurality of dislocations t present on the main surface 11 of the GaAs single crystal substrate 1 shown are connected as etch pits is called a slip line S. The slip line S is a crystal defect introduced by thermal stress during single crystal manufacturing. The slip line S is a bundle of a plurality of dislocations t, which is caused by the slip of atoms along the (111) plane of the GaAs single crystal. Therefore, when the crystal plane of the main surface 11 is the {100} plane of the GaAs single crystal, the slip line S tends to exist along any one of four directions equivalent to the [01-1] direction of the above GaAs single crystal. In particular, in the GaAs single crystal substrate 1 shown as Figure 1 the slip line S exists in all directions among the four directions equivalent to the [01-1] direction of the above GaAs single crystal, from the outer periphery of the main surface 11 toward the inside.

[0055] In the above GaAs single crystal substrate, the crystal plane of the above main surface is preferably the {100} plane of the GaAs single crystal. In this case, the above dislocations are preferably included in the slip line. The above slip line exists from the outer periphery of the above main surface toward the inside along at least one direction selected from the four directions equivalent to the [01-1] direction of the above gallium arsenide single crystal. Thereby, the device yield can be improved in the GaAs single crystal substrate including the slip line.

[0056] Alternatively, the crystal plane of the above main surface is preferably a plane having a deviation angle greater than 0° and 3° or less from the {100} plane of the gallium arsenide single crystal. In this case, as the deviation direction of the plane having the above deviation angle, the

[011] direction is preferable. When the plane having the above deviation angle includes a slip line, the slip line also shows a form in which it exists from the outer periphery of the above main surface toward the inside along at least one direction selected from the four directions equivalent to the [01-1] direction of the above GaAs single crystal.

[0057] In addition, in the present invention, the crystal plane of the above main surface has an accuracy error of ±0.5°. For example, the case where the main surface is the "{100} plane" of the GaAs single crystal means that the above main surface may be exactly the {100} plane, and the above main surface may have a deviation angle of -0.5 to +0.5° from the {100} plane. The deviation angle of the main surface of the GaAs single crystal substrate from the {100} plane can be measured by using a conventionally known crystal orientation measuring device (for example, trade name (model): "2991G2", manufactured by Rigaku Corporation). The four directions equivalent to the [01-1] direction of the GaAs single crystal refer to the [01-1] direction, [0-1-1] direction, [0-11] direction, and

[011] direction of the GaAs single crystal.

[0058] <Diameter>

[0059] The diameter of the above-mentioned GaAs single crystal substrate is 70 mm or more. In particular, the diameter of the above-mentioned GaAs single crystal substrate is preferably 70 mm or more and 210 mm or less. Specifically, the GaAs single crystal substrate with a diameter of 70 mm or more and 210 mm or less is preferably 70 mm, 100 mm, 150 mm or 210 mm in diameter. In other words, it is preferably 3 inches, 4 inches, 6 inches or 8 inches in diameter. Thus, the device yield can be improved in a large-diameter GaAs single crystal substrate with a diameter of 70 mm or more and 210 mm or less. Here, regarding the diameter of the GaAs single crystal substrate, even if the main surface has a shape that is not a geometrically circular shape due to the influence of OF, IF, etc., it is obtained based on the circular shape before the formation of the above-mentioned OF, IF, etc. In addition, as described above, the diameter of the GaAs single crystal substrate can be measured by using a conventionally well-known outer diameter measuring instrument such as a vernier caliper.

[0060] <Dopant>

[0061] The GaAs single crystal substrate of this embodiment contains silicon (Si). The atomic concentration of the above-mentioned Si is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less. The atomic concentration of the above-mentioned Si is preferably 1.4×10 18 cm -3 or more and 2.0×10 19 cm -3 or less, and more preferably 1.8×10 18 cm -3 or more and 1.0×10 19 cm -3 or less. Thus, the above-mentioned GaAs single crystal substrate can be given the characteristics of n-type (electron-donating type) as the conductivity type, and at the same time, the effect of reducing the dislocation density can be obtained.

[0062] The above-mentioned GaAs single crystal substrate preferably contains boron (B). In this case, the atomic concentration of the above-mentioned B is preferably 1.0×10 18 cm -3 or more and 1.0×10 19 cm -3 or less. The atomic concentration of the above-mentioned B is more preferably 2.0×10 18 cm -3 or more and 8.0×10 18 cm -3As described below, it is possible to reduce the dislocations in the above-mentioned GaAs single crystal substrate. The atomic concentrations of Si and B in the GaAs single crystal substrate can both be measured by using Glow Discharge Mass Spectrometry (GDMS). When the GaAs single crystal substrate is obtained by the manufacturing method of the GaAs single crystal substrate described below, the above-mentioned B can be generated by the reaction of silicon added to gallium arsenide as a raw material with boron oxide functioning as a sealing material. Thus, the above-mentioned B can be included in the GaAs single crystal substrate.

[0063] <Carrier concentration>

[0064] The carrier concentration of the above-mentioned GaAs single crystal substrate is 1.0×10 18 cm -3 or more and 4.0×10 18 cm -3 or less. The above-mentioned carrier concentration is preferably 1.2×10 18 cm -3 or more and 3.8×10 18 cm -3 or less, and more preferably 1.4×10 18 cm -3 or more and 3.6×10 18 cm -3 or less. Thus, the above-mentioned GaAs single crystal substrate is given the characteristics of an n-type (electron-donating type) conductivity type. The carrier concentration of the above-mentioned GaAs single crystal substrate can be obtained by applying the Van der Pauw method at a room temperature of 25°C to a rectangular slice cleaved from the vicinity of the center of the main surface with a {011} plane. The dimensions of this rectangular slice are, for example, 20 mm in length × 20 mm in width × 1 mm in thickness.

[0065] [Manufacturing method of gallium arsenide single crystal substrate]

[0066] The manufacturing method of the gallium arsenide single crystal substrate (GaAs single crystal substrate) according to this embodiment can be, for example, the manufacturing method of the GaAs single crystal substrate having a circular main surface as described above. That is, the above manufacturing method is a manufacturing method of a GaAs single crystal substrate having a circular main surface, including: a step of obtaining a GaAs single crystal by crystal growth using a gallium arsenide single crystal growth apparatus (GaAs single crystal growth apparatus); and a step of obtaining the above GaAs single crystal substrate by processing the above GaAs single crystal. The above GaAs single crystal growth apparatus has a crucible, a crucible holding table for holding the above crucible, and a heating element for heating the above crucible. The above crucible includes a cylindrical seed crystal accommodating portion, a diameter-expanding portion connected to the above seed crystal accommodating portion, and a straight tube portion connected to the above diameter-expanding portion. The above seed crystal accommodating portion has a hollow portion that is open on the side connected to the above diameter-expanding portion and has a bottom wall formed on the side opposite to the above diameter-expanding portion. The above diameter-expanding portion has a frustum of a cone shape that expands in diameter upward along the axial direction of the above crucible, and the small-diameter side of the above diameter-expanding portion is connected to the above seed crystal accommodating portion. The above straight tube portion has a hollow cylindrical shape and is connected to the large-diameter side of the above diameter-expanding portion. The above crucible holding table holds the above diameter-expanding portion without contacting the above straight tube portion. When the inner diameter of the above straight tube portion is represented as D1 and the outer diameter of the above crucible holding table is represented as D2, the above D1 and D2 satisfy the relationship of 1.0 < D2 / D1 < 1.5, and the units of the above D1 and D2 are mm. By the manufacturing method of the GaAs single crystal substrate having such characteristics, a GaAs single crystal substrate with an improved device yield can be obtained.

[0067] Specifically, the above manufacturing method preferably has, for example, Figure 3 the steps shown in the flowchart. Figure 3 is a flowchart showing an example of the manufacturing method of the gallium arsenide single crystal substrate according to this embodiment. According to Figure 3, the manufacturing method of the above GaAs single crystal substrate can include the following steps: a step S10 (the first step: preparation step) of preparing a GaAs single crystal growth apparatus, a seed crystal, and a bulk gallium arsenide; a step S20 (the second step: obtaining a GaAs single crystal step) of obtaining a GaAs single crystal by crystal growth using the GaAs single crystal growth apparatus; and a step S30 (the third step: obtaining a GaAs single crystal substrate step) of obtaining a GaAs single crystal substrate by processing the GaAs single crystal. Further, the step S20 of obtaining a GaAs single crystal can include the following steps: a step (raw material loading step S21) of accommodating the seed crystal in the seed crystal accommodating portion and accommodating the bulk gallium arsenide together with silicon in the diameter expansion portion and the straight cylinder portion; a step (raw material melting step S22) of melting a part of the above seed crystal and the above gallium arsenide into a gallium arsenide melt (GaAs melt) by heating the crucible with a heating element, and at the same time bringing the GaAs melt into contact with the remaining part of the seed crystal; and a step (GaAs single crystal growth step S23) of growing a GaAs single crystal from the GaAs melt on the remaining part of the seed crystal.

[0068] In particular, the step of crystal growth (GaAs single crystal growth step S23) is preferably carried out while controlling the temperature at the interface between the GaAs single crystal and the GaAs melt so that the value obtained by second-order differentiation of the axial position of the crucible at the above interface becomes 0.003 °C / mm 2 or more and 0.012 °C / mm 2 or less, and carried out while. The positive direction of the above position is the direction from the lower part to the upper part of the crucible along the above axis. Thus, a GaAs single crystal substrate with a further improved device yield can be obtained. The silicon concentration of the above GaAs single crystal substrate is preferably 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less.

[0069] Regarding a GaAs single crystal growth apparatus for growing a GaAs single crystal that is a raw material for a GaAs single crystal substrate, the present inventors focused on the structure of the crucible holding table that constitutes the above-described apparatus. Specifically, the present inventors configured the above-described crucible holding table to hold the enlarged diameter portion of the crucible without contacting the straight tube portion of the crucible, and a predetermined relationship is satisfied between the outer diameter of the above-described crucible holding table and the inner diameter of the straight tube portion of the above-described crucible (the inner diameter D1 of the straight tube portion and the outer diameter D2 of the crucible holding table have a relationship of 1.0 < D2 / D1 < 1.5). Thereby, heat dissipation from the inside to the outside of the crucible is prevented, and the temperature at the interface position between the GaAs single crystal and the GaAs molten liquid growing in the crucible is strictly controlled. As a result, the thermal distribution in the GaAs single crystal can be made uniform, and the generation of dislocations due to thermal strain can be suppressed. In summary, the present inventors conceived of achieving a GaAs single crystal with an extremely low dislocation density by combining the effect of reducing the dislocation density brought about by silicon doping, and manufacturing a GaAs single crystal substrate that can improve the yield of components.

[0070] Hereinafter, by referring to Figure 4 the outline of the above-described GaAs single crystal growth apparatus and each process included in the above-described manufacturing method will be described separately. Figure 4 The manufacturing method of the gallium arsenide single crystal substrate according to the present embodiment is an explanatory diagram for explaining the process of obtaining a gallium arsenide single crystal using a single crystal growth apparatus. The manufacturing method of the GaAs single crystal substrate according to the present embodiment can employ, for example, Figure 4 the GaAs single crystal growth apparatus 10 shown. The GaAs single crystal growth apparatus 10 includes a crucible 5, a crucible holding table 6 that holds the crucible 5, and a heating element 7 that heats the crucible 5. The GaAs single crystal growth apparatus 10 can grow a single crystal by the vertical boat method using the crucible. Hereinafter, the vertical boat method is simply referred to as the VB method. The VB method includes the vertical Bridgman method and the vertical temperature gradient solidification method.

[0071] <GaAs Single Crystal Growth Apparatus>

[0072] (Crucible)

[0073] As Figure 4As shown, in the GaAs single crystal growth apparatus 10, the crucible 5 includes a cylindrical seed crystal accommodation portion 51, a diameter-expanding portion 52 connected to the seed crystal accommodation portion 51, and a straight tube portion 53 connected to the diameter-expanding portion 52. The seed crystal accommodation portion 51 is cylindrical, having a hollow portion that is open on the side connected to the diameter-expanding portion 52 and has a bottom wall formed on the side opposite to the diameter-expanding portion 52. The seed crystal accommodation portion 51 can accommodate the seed crystal 8a in the above-mentioned hollow portion and hold it. The diameter-expanding portion 52 has a frustum shape that expands upward along the axial direction of the crucible 5, with the small-diameter side of the diameter-expanding portion 52 connected to the seed crystal accommodation portion 51. The straight tube portion 53 has a hollow cylindrical shape and is connected to the large-diameter side of the diameter-expanding portion 52. The diameter-expanding portion 52 and the straight tube portion 53 have the function of holding the massive gallium arsenide (specifically, polycrystalline gallium arsenide) inside them. Furthermore, the diameter-expanding portion 52 and the straight tube portion 53 have the function of growing the GaAs single crystal 81 as a crystal solid by solidifying the GaAs melt 82 in the molten state of the above-mentioned gallium arsenide. As the crucible 5, various materials that can withstand the temperature of the GaAs melt 82 can be used. For example, pyrolytic boron nitride (pBN) can be used as the material of the crucible 5. The inner diameter D1 of the straight tube portion 53 also depends on the diameter of the GaAs single crystal to be manufactured, and is, for example, 70 mm or more and 215 mm or less.

[0074] (Crucible holding table)

[0075] The GaAs single crystal growth apparatus 10 has a crucible holding table 6 for holding the crucible 5. The crucible holding table 6 has a cylindrical appearance. In particular, the crucible holding table 6 holds the diameter-expanding portion 52 without contacting the straight tube portion 53. As the material of the crucible holding table 6, for example, quartz, alumina, or silicon carbide can be used. The outer diameter D2 of the crucible holding table 6 also depends on the diameter of the GaAs single crystal to be manufactured, and is, for example, 72 mm or more and 320 mm or less.

[0076] In the GaAs single crystal growth apparatus 10, the crucible 5 and the crucible holding table 6 have the following relationship. That is, when the inner diameter of the straight tube portion 53 of the crucible 5 is represented as D1 and the outer diameter of the crucible holding table 6 is represented as D2, D1 and D2 satisfy the relationship of 1.0 < D2 / D1 < 1.5. Here, the units of D1 and D2 are mm. D1 and D2 preferably satisfy the relationship of 1.05 ≤ D2 / D1 ≤ 1.3. As described above, D1 is preferably 70 mm or more and 215 mm or less, and D2 is preferably 72 mm or more and 320 mm or less. Thus, in the so-called large-diameter gallium arsenide single crystal substrate having a diameter of 70 mm or more and 210 mm or less, the device yield can be improved.

[0077] (Heating element)

[0078] The GaAs single crystal growth apparatus 10 has a heating element 7 that heats the crucible 5. The heating element 7 is composed of two parts. These two parts are respectively arranged so as to surround the outer periphery of the crucible 5. Each of the heating elements 7 is divided into a plurality of parts in a direction perpendicular to the axis of the crucible. Thus, each of the heating elements 7 is configured in multiple segments. The output power of each of the heating elements 7 and each part can be independently controlled. Thereby, the temperature at the interface between the GaAs single crystal 81 and the GaAs molten liquid 82 can be strictly controlled. The heating element 7 can adopt, for example, a known electric heater.

[0079] The GaAs single crystal growth apparatus 10 can have a thermocouple 75 that can measure the temperature of the crucible 5 heated by the heating element 7. A plurality of thermocouples 75 are arranged outside the crucible 5 and along the axial direction. In particular, it is preferable to arrange at least a plurality of thermocouples 75 outside the crucible 5 and axially near the height corresponding to the interface between the GaAs single crystal 81 and the GaAs molten liquid 82 in the crucible 5. Based on the temperatures measured by the thermocouples 75 respectively, the temperature at each part of the GaAs single crystal 81 growing in the crucible 5 can be estimated, and at the same time, the value obtained by performing a second-order differentiation of the temperature at the above interface with respect to the axial position of the crucible 5 at the above interface (hereinafter, also referred to as "second-order differential value") can be obtained. In the present embodiment, as described in the crystal growth process described later, the above second-order differential value is controlled to 0.003 °C / mm 2 Above and 0.012 °C / mm 2 Below. The thermocouple 75 can adopt, for example, a known temperature monitor. In addition, the above second-order differential value can be expressed as "d 2 T / dz 2 ". The above T represents the temperature at the interface (unit: °C), and the above z represents the position in the axial direction of the crucible 5 (unit: mm). The positive direction of the above z is as Figure 4 shown, which refers to the direction from the lower part to the upper part of the crucible 5 along the axial direction of the crucible 5. Figure 4 The direction of r shown represents the radial direction of the crucible 5.

[0080] <Each process included in the method for manufacturing a GaAs single crystal substrate>

[0081] (First process: Preparation process S10)

[0082] As Figure 3As shown, in the method for manufacturing a GaAs single crystal substrate according to this embodiment, first, a preparation step S10 is performed as the first step. In the preparation step S10, a GaAs single crystal growth apparatus 10 for manufacturing a GaAs single crystal as the raw material of the above-mentioned GaAs single crystal substrate, a seed crystal 8a, and bulk gallium arsenide are respectively prepared. The seed crystal 8a is composed of a GaAs single crystal. The seed crystal 8a and the bulk gallium arsenide can be prepared by a conventionally known method, or can be prepared by obtaining commercially available seed crystals and bulk gallium arsenide.

[0083] (Second step: Step S20 of obtaining a GaAs single crystal)

[0084] Next, in the method for manufacturing a GaAs single crystal substrate according to this embodiment, a step S20 of obtaining a GaAs single crystal by crystal growth using a GaAs single crystal growth apparatus is performed. The step S20 of obtaining a GaAs single crystal includes the following steps: a raw material loading step S21, a raw material melting step S22, and a GaAs single crystal growth step S23. The step S20 of obtaining a GaAs single crystal performs these steps in this order.

[0085] 1) Raw material loading step S21

[0086] The raw material loading step S21 is a step of accommodating the seed crystal in the seed crystal accommodating portion and accommodating the bulk gallium arsenide together with silicon in the diameter-expanded portion and the straight tube portion. The raw material loading step S21 includes a seed crystal loading step, a gallium arsenide loading step, and a sealant arranging step. As Figure 4 shown, in the seed crystal loading step, a seed crystal 8a made of GaAs is loaded into the hollow portion of the seed crystal accommodating portion 51 of the crucible 5. A method for loading the seed crystal 8a into the seed crystal accommodating portion 51 can use a conventionally known method. In the gallium arsenide loading step, in the diameter-expanded portion 52 and the straight tube portion 53 of the crucible 5, a plurality of bulk materials made of polycrystalline GaAs are loaded and stacked as the bulk gallium arsenide. Further, in the gallium arsenide loading step, in the GaAs single crystal substrate obtained by this manufacturing method, the concentration of silicon is made 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less, and a specified amount of silicon is added to the diameter-expanded portion 52 and the straight tube portion 53 of the crucible 5. In the sealant arranging step, a sealant conventionally known in the VB method (for example, a solid sealant composed of B2O3 (boron oxide)) is arranged on the above-mentioned bulk material.

[0087] 2) Raw material melting step S22

[0088] The raw material melting process S22 is a process of melting a part of the seed crystal 8a and a lump made of polycrystalline GaAs into a GaAs molten liquid 82 by heating the crucible 5 with the heating element 7, and at the same time bringing the GaAs molten liquid 82 into contact with the remaining part of the seed crystal 8a. In this process, in order to obtain the GaAs single crystal 81, the seed crystal 8a is brought into contact with the GaAs molten liquid 82. Thus, in the next process of this manufacturing method, the GaAs single crystal 81 can grow on the remaining part of the seed crystal 8a. Specifically, the crucible 5 internally provided with the seed crystal 8a, the lump made of GaAs polycrystal, and the solid sealant in the raw material melting process S22 is supported by the crucible holding table 6. Then, an electric current is supplied to the heating element 7, and the crucible 5 is heated. As a result, the solid sealant melts to become a liquid sealant (the illustration is omitted in Figure 4 ), and at the same time the above-mentioned lump melts to become the GaAs molten liquid 82. Next, a part of the seed crystal 8a also melts, and at the interface, the remaining part of the seed crystal 8a comes into contact with the GaAs molten liquid 82.

[0089] 3) GaAs single crystal growth process S23

[0090] The GaAs single crystal growth process S23 is a process of growing the GaAs single crystal 81 from the GaAs molten liquid 82 on the remaining part of the seed crystal 8a. The GaAs single crystal growth process S23 can form a temperature gradient in the crucible 5 where the temperature on the seed crystal 8a side becomes lower and the temperature on the GaAs molten liquid 82 side becomes higher by, for example, slowly lowering the crucible 5 along its axis downward (toward the seed crystal accommodation part 51 side) relative to the heating element 7. As a result, the GaAs molten liquid 82 in contact with the seed crystal 8a solidifies, and the GaAs single crystal 81 continuously grows from the GaAs molten liquid 82 on the remaining part of the seed crystal 8a. The speed of lowering the crucible 5 along its axis downward is not particularly limited and can be set to, for example, 1 to 5 mm / hour.

[0091] Here, the crucible holding table 6 holds the enlarged diameter part 52 without contacting the straight cylinder part 53 of the crucible 5. In the GaAs single crystal growth apparatus 10, regarding the crucible 5 and the crucible holding table 6, when the inner diameter of the straight cylinder part 53 is represented as D1 and the outer diameter of the crucible holding table 6 is represented as D2, D1 and D2 satisfy the relationship of 1.0 < D2 / D1 < 1.5. The units of D1 and D2 are mm. Thus, in the GaAs single crystal growth process S23, the second derivative value obtained by second-order differentiating the temperature at the interface between the GaAs single crystal 81 and the GaAs molten liquid 82 with respect to the axial position of the crucible 5 at the above interface becomes 0.003 °C / mm 2 or more and 0.012 °C / mm 2It is controlled in the following manner. The positive direction of the axial position of the crucible 5 is the direction from the lower part to the upper part of the crucible 5 along the above-mentioned axis. When the above second-order differential value is less than 0.003 °C / mm 2 Since the dislocation-free rate becomes extremely high, the processing yield may deteriorate due to cracking, defects, etc. during the processing of the GaAs single crystal substrate. When the above second-order differential value is greater than 0.012 °C / mm 2 There is a possibility that the suppression of the generation of dislocations due to thermal strain becomes insufficient. Regarding the above second-order differential value, it is preferably controlled as an absolute value to be 0.003 °C / mm 2 or more and 0.012 °C / mm 2 or less. The above second-order differential value is preferably controlled to be 0.004 °C / mm 2 or more and 0.008 °C / mm 2 or less, and is also preferably controlled to be -0.008 °C / mm 2 or more and -0.004 °C / mm 2 or less. According to the above description, in the GaAs single crystal growth process S23, it is possible to control the thermal distribution in the GaAs single crystal 81 to be uniform while growing the GaAs single crystal 81. Thereby, the generation of dislocations due to thermal strain in the GaAs single crystal 81 can be suppressed.

[0092] When the above D2 / D1 is 1.0 or less, there is a tendency that heat dissipation from the inside of the crucible 5 to the outside cannot be sufficiently suppressed. Therefore, it may not be possible to sufficiently suppress the generation of dislocations due to thermal strain in the GaAs single crystal 81. When the above D2 / D1 is 1.5 or more, although the generation of dislocations due to thermal strain in the GaAs single crystal 81 can be sufficiently suppressed, there is a possibility that the output power of the heating element 7 increases and the economic rationality is poor.

[0093] In the GaAs single crystal growth process S23, the crucible 5 is continuously lowered along its axis relative to the heating element 7. Thereby, the interface between the GaAs single crystal 81 and the GaAs melt 82 can be raised toward the liquid sealant side, and the GaAs melt 82 can be solidified. Thereby, the GaAs single crystal 81 can grow crystal upward along the axis of the crucible 5. The crystal growth of the GaAs single crystal 81 continues until the solidification of the GaAs melt 82 remaining in the straight cylindrical portion 53 of the crucible 5 is completed. According to the above description, an ingot of the GaAs single crystal 81 can be obtained.

[0094] (Third process: Process S30 for obtaining a GaAs single crystal substrate)

[0095] Next, in the method for manufacturing a GaAs single crystal substrate of the present embodiment, a process S30 of obtaining a GaAs single crystal substrate by processing a GaAs single crystal is implemented. The process S30 of obtaining a GaAs single crystal substrate includes the following processes: a cutting process, an outer periphery grinding process, and a polishing process, and a GaAs single crystal substrate can be obtained by sequentially implementing these processes.

[0096] The cutting process is a process of slicing the ingot composed of a GaAs single crystal taken out from the crucible 5 into wafers having a predetermined thickness in order to obtain a GaAs single crystal substrate. Further, the outer periphery grinding process is a process of obtaining a GaAs single crystal substrate having a circular main surface by grinding the outer periphery of the wafer. As the cutting process and the outer periphery grinding process, conventionally known cutting methods and outer periphery grinding methods can be used. Further, the polishing process is a process of mirror-finishing the main surface. As the polishing process, conventionally known polishing methods can be used. By the polishing process, the main surface can have a surface roughness Sa of 0.3 nm or less as specified in JIS B 0681-2:2018, for example.

[0097] <Effect>

[0098] By implementing the above-described respective processes, a GaAs single crystal substrate having a circular main surface can be manufactured. In the method for manufacturing a GaAs single crystal substrate of the present embodiment, particularly in the second process, the GaAs single crystal 81 can be grown in such a manner that the thermal distribution in the GaAs single crystal 81 becomes uniform. Thereby, an extremely low dislocation GaAs single crystal can be manufactured in combination with the effect of reducing the dislocation density brought about by silicon doping. From the above description, the present invention can obtain a GaAs single crystal substrate capable of improving the element yield.

[0099] Examples

[0100] Hereinafter, examples are given to describe the present invention in further detail, but the present invention is not limited thereto. In the present example, the inventors used a GaAs single crystal growth apparatus as shown in Figure 4 to grow a GaAs single crystal by the vertical Bridgman method with the <100> direction as the growth direction. Further, a GaAs single crystal substrate having a main surface plane orientation of the {100} plane was obtained from the ingot of the GaAs single crystal. In the following description, Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, and Samples 41 to 44 are examples, and Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143 are comparative examples.

[0101] [Manufacture of GaAs Single Crystal Substrate]

[0102] First, GaAs single crystal substrates of Specimens 11 to 14 and Specimens 111 to 113 with a diameter of 76 mm are fabricated through the following key points.

[0103] <Specimen 11>

[0104] (First process: Preparation process S10)

[0105] The GaAs single crystal growth apparatus 10 as Figure 4 shown, the seed crystal 8a made of GaAs single crystal, and the bulk made of GaAs polycrystal are respectively prepared by known methods. Here, the relationship between the straight tube portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 and the crucible holder 6 is as follows. That is, when D1 represents the inner diameter of the straight tube portion 53 of the crucible 5 and D2 represents the outer diameter of the crucible holder 6, D2 / D1 is made 1.05. Further, the inner diameter D1 of the straight tube portion 53 of the crucible 5 is 82 mm. The outer diameter D2 of the crucible holder 6 is 86.1 mm.

[0106] (Second process: Process S20 for obtaining GaAs single crystal)

[0107] 1) Raw material loading process S21

[0108] The seed crystal 8a is loaded into the hollow portion of the seed crystal accommodating portion 51 of the crucible 5 included in the GaAs single crystal growth apparatus 10 by using a conventionally known method. Further, a plurality of bulk materials made of polycrystalline GaAs are loaded and stacked in the enlarged diameter portion 52 and the straight tube portion 53 of the crucible 5. Silicon (Si) is also added in a trace amount. Further, a sealant made of B2O3 is disposed on the above-mentioned bulk material.

[0109] 2) Raw material melting process S22

[0110] An electric current is supplied to the heating element 7 to heat the crucible 5, thereby making the above-mentioned sealant a liquid sealant and making the polycrystalline GaAs loaded in the enlarged diameter portion 52 and the straight tube portion 53 into a GaAs melt 82. Further, by controlling the heating element 7 for heating the seed crystal accommodating portion 51, a part of the seed crystal 8a in the cavity of the seed crystal accommodating portion 51 is also melted. Thereby, the remaining part of the seed crystal 8a is brought into contact with the GaAs melt 82.

[0111] 3) GaAs single crystal growth process S23

[0112] The output power of the heating element 7 that controls the heating crucible 5 is adjusted, and at the same time, the crucible 5 is slowly lowered downward along its axis (toward the seed crystal accommodation portion 51) relative to the heating element 7. As a result, a temperature gradient is formed in the crucible 5 where the temperature on the side of the seed crystal 8a is lower and the temperature on the side of the GaAs melt 82 is higher. Thus, on the remaining part of the seed crystal 8a, GaAs single crystal 81 is continuously grown from the GaAs melt 82. At this time, the second derivative value obtained by performing a second-order differentiation of the temperature at the interface between the GaAs single crystal 81 and the GaAs melt 82 in the axial position of the crucible 5 is 0.011 °C / mm 2 and it is controlled in such a manner. In addition, the speed at which the crucible 5 is lowered downward along its axis is 2 mm / hour.

[0113] Next, the output power of the heating element 7 that controls the heating crucible 5 is adjusted, and at the same time, the crucible 5 is lowered downward along its axis relative to the heating element 7. As a result, the GaAs melt 82 solidifies, and the GaAs single crystal 81 grows upward along the axis of the crucible 5. Then, the crystal growth of the GaAs single crystal 81 is continued until the solidification of the GaAs melt 82 remaining in the straight cylinder portion 53 of the crucible 5 is completed, thereby obtaining an ingot of the GaAs single crystal 81.

[0114] (Third process: Process S30 for obtaining a GaAs single crystal substrate)

[0115] Using a conventionally known cutting method and peripheral grinding method, a wafer with a predetermined thickness is obtained from the ingot of the GaAs single crystal 81 taken out from the crucible 5. Then, a GaAs single crystal substrate having a circular main surface is obtained from the above wafer. Furthermore, the main surface of the above GaAs single crystal substrate is polished by a conventionally known method to make it mirror-like. Based on the above description, a GaAs single crystal substrate with a diameter of 76 mm is obtained as Specimen 11. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the result is 0.15 nm.

[0116] <Specimens 12 to 14, and Specimens 111 to 113>

[0117] In the preparation process S10, the inner diameter D1 of the straight cylinder portion 53 of the crucible 5 provided in the GaAs single crystal growth apparatus 10 is set to 82 mm, and the outer diameter D2 of the crucible holder 6 is changed respectively in such a manner that D2 / D1 becomes the value shown in Table 1. And in the GaAs single crystal growth process S23, the output power of the heating element 7 is controlled in such a manner that the above second derivative value becomes the value shown in Table 1. Except for this, GaAs single crystal substrates of Specimens 12 to 14 and Specimens 111 to 113 are obtained respectively by the same points as those of Specimen 11. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the results are all 0.15 nm.

[0118] Next, GaAs single crystal substrates of Specimens 21 to 24 and Specimens 121 to 123 with a diameter of 100 mm were produced according to the following key points.

[0119] <Specimen 21>

[0120] In the preparation process S10, the inner diameter D1 of the straight cylindrical portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 was changed to 106 mm, the outer diameter D2 of the crucible holder 6 was changed to 111.3 mm, and in the GaAs single crystal growth process S23, the output power of the heating element 7 was controlled such that the second-order differential value became 0.012 °C / mm. 2 In addition, a GaAs single crystal substrate of Specimen 21 was obtained according to the same key points as those of Specimen 11. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa was determined by the above measurement method, and the result was 0.15 nm.

[0121] <Specimens 22 to 24 and Specimens 121 to 123>

[0122] In the preparation process S10, the inner diameter D1 of the straight cylindrical portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 was set to 106 mm, and the outer diameter D2 of the crucible holder 6 was changed respectively such that D2 / D1 became the values shown in Table 2. In the GaAs single crystal growth process S23, the output power of the heating element 7 was controlled such that the second-order differential value became the values shown in Table 2. In addition, GaAs single crystal substrates of Specimens 22 to 24 and Specimens 121 to 123 were obtained according to the same key points as those of Specimen 21. For the main surface of the above GaAs single crystal substrates, the surface roughness Sa was determined by the above measurement method, and the results were all 0.15 nm.

[0123] Next, GaAs single crystal substrates of Specimens 31 to 34 and Specimens 131 to 134 with a diameter of 150 mm were produced according to the following key points.

[0124] <Specimen 31>

[0125] In the preparation process S10, the inner diameter D1 of the straight cylindrical portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 was changed to 156 mm, the outer diameter D2 of the crucible holder 6 was changed to 163.8 mm, and in the GaAs single crystal growth process S23, the output power of the heating element 7 was controlled such that the second-order differential value became 0.010 °C / mm 2The output power of the heating element 7 is controlled in the same manner as described above. In addition, a GaAs single crystal substrate of Sample 31 is obtained by the same key points as those of Sample 11. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the result is 0.15 nm.

[0126] <Samples 32 to 34, and Samples 131 to 133>

[0127] In the preparation step S10, the inner diameter D1 of the straight cylindrical portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 is set to 156 mm, and the outer diameter D2 of the crucible holding stage 6 is changed in such a manner that D2 / D1 becomes the value shown in Table 3. Further, in the GaAs single crystal growth step S23, the output power of the heating element 7 is controlled in such a manner that the second-order differential value becomes the value shown in Table 3. In addition, GaAs single crystal substrates of Samples 32 to 34, and Samples 131 to 133 are obtained by the same key points as those of Sample 31. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the result is 0.15 nm for all of them.

[0128] <Sample 134>

[0129] In the raw material loading step S21, the amount of Si added in trace amounts is reduced, and in the GaAs single crystal growth step S23, the output power of the heating element 7 is controlled in such a manner that the second-order differential value becomes the value shown in Table 3. In addition, a GaAs single crystal substrate of Sample 134 is obtained by the same key points as those of Sample 34. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the result is 0.15 nm.

[0130] Next, GaAs single crystal substrates of Samples 41 to 44 and Samples 141 to 143 having a diameter of 200 mm are produced by the following key points.

[0131] <Sample 41>

[0132] In the preparation step S10, the inner diameter D1 of the straight cylindrical portion 53 of the crucible 5 included in the GaAs single crystal growth apparatus 10 is changed to 206 mm, the outer diameter D2 of the crucible holding stage 6 is changed to 216.3 mm, and in the GaAs single crystal growth step S23, the output power of the heating element 7 is controlled in such a manner that the second-order differential value becomes 0.012 °C / mm 2 In this way, and in addition, a GaAs single crystal substrate of Sample 41 is obtained by the same key points as those of Sample 11. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa is obtained by the above measurement method, and the result is 0.15 nm.

[0133] <Samples 42 to 44, and Samples 141 to 143>

[0134] In the preparation process S10, the inner diameter D1 of the straight tube portion 53 of the crucible 5 of the GaAs single crystal growth apparatus 10 was set to 206 mm, and the outer diameter D2 of the crucible holding table 6 was changed respectively so that D2 / D1 became the value shown in Table 4. In the GaAs single crystal growth process S23, the output power of the heating element 7 was controlled so that the second derivative value became the value shown in Table 4. Except for this, GaAs single crystal substrates of Samples 42 to 44 and Samples 141 to 143 were obtained respectively by the same key points as those of Sample 41. For the main surface of the above GaAs single crystal substrate, the surface roughness Sa was obtained by the above measurement method, and the results were all 0.15 nm.

[0135] <Characteristic evaluation>

[0136] For the GaAs single crystal substrates of the above Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, Samples 41 to 44, Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143, by implementing the above measurement method or calculation method, the average values of the atomic concentration of silicon, the carrier concentration, the atomic concentration of boron, the dislocation density, and the dislocation-free rate in each sample were obtained. The results are shown in Tables 1 to 4.

[0137] <Element yield>

[0138] Using the GaAs single crystal substrates of the above Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, Samples 41 to 44, Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143, VCSELs were fabricated according to the method disclosed in Japanese Patent Laid-Open No. 2008-283137. In this case, the element yield (%) was obtained by multiplying the processing yield by the performance yield. The above processing yield represents the ratio of the GaAs single crystal substrate that can obtain a VCSEL formation wafer including a plurality of VCSEL parts without cracking or defect during processing. The above performance yield represents the ratio of the VCSELs obtained from the above wafer that can meet the required specified performance. Here, regarding the "performance yield", it was evaluated by the following accelerated aging test. In addition, the "VCSEL part" refers to the element parts on the above wafer that can function as a VCSEL by dividing and assembling the above VCSEL formation wafer. Regarding the size of the above VCSEL part, it was made into a VCSEL with a size of 500 μm in length × 500 μm in width during division.

[0139] First, before performing the accelerated aging test, for each VCSEL section in the above-mentioned VCSEL-forming wafer fabricated in each sample, an initial characteristic evaluation is carried out in the on-wafer state on the wafer. In the initial characteristic evaluation, a VCSEL section with an optical output power of 4 mW or more at a working current of 9 mA is regarded as a qualified product. Furthermore, for a VCSEL section with an optical output power less than 4 mW at a working current of 9 mA, this part within the above-mentioned wafer is marked as a non-qualified product. Next, by dicing the above-mentioned wafer, all are made into chips. Then, 40 qualified products (i.e., unmarked chips) are randomly selected from the above-mentioned chips, and VCSELs are obtained through assembly. Furthermore, for the above-mentioned VCSELs, a 100-hour power-on test is carried out at an ambient temperature of 80 °C and an applied current of 18 mA, thereby performing the accelerated aging test. Then, each VCSEL is restored to room temperature, and the optical output power at a working current of 9 mA is evaluated. In the above evaluation, a VCSEL with a reduction in optical output within 10% of that before the accelerated aging test (i.e., an optical output power of 3.6 mW or more) is regarded as a qualified product, and the ratio of the number of qualified products to the above 40 is used as the performance yield. The results are shown in Tables 1 to 4.

[0140] [Table 1]

[0141]

[0142] [Table 2]

[0143]

[0144] [Table 3]

[0145]

[0146] [Table 4]

[0147]

[0148] [Consideration]

[0149] In the GaAs single crystal substrates of Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, and Samples 41 to 44, the average value of the dislocation density on the main surface is 5 cm -2 or more and 100 cm -2 or less, and the dislocation-free rate is 97.0% or more and 99.5% or less. Furthermore, the atomic concentration of silicon is 1.0 × 10 18 cm -3 or more and 5.0 × 10 19 cm -3 or more and the carrier concentration is 1.0 × 10 18 cm -3 or more and 4.0 × 1018 cm -3 cm or less. Further, the device yield in these GaAs single crystal substrates is 85% or more. In contrast, in the GaAs single crystal substrates of Samples 111 to 113, Samples 121 to 123, Samples 131 to 134, and Samples 141 to 143, at least one of the average value of the dislocation density on the surface, the dislocation-free ratio, the atomic concentration of silicon, or the carrier concentration does not satisfy the above ranges. In this case, the device yield in these GaAs single crystal substrates is less than 85%. In addition, the dislocation-free ratio of the GaAs single crystal substrates of Samples 113, 123, 133, and 143 is 100%. However, the device yield of the GaAs single crystal substrates of Samples 113, 123, 133, and 143 deteriorates compared to the GaAs single crystal substrates of Samples 11 to 14, Samples 21 to 24, Samples 31 to 34, and Samples 41 to 44 due to cracks, defects, etc. generated when obtaining the VCSEL formation wafers.

[0150] The embodiments and examples of the present invention have been described as above, but appropriate combinations of the configurations of the above-described embodiments and examples have also been planned from the beginning.

[0151] The embodiments and examples disclosed this time should be considered as examples in all respects and not as limitations. The scope of the present invention is shown not by the above-described embodiments and examples but by the scope of the claims, and is intended to include meanings equivalent to the scope of the claims and all modifications within the scope.

[0152] Description of Reference Numerals

[0153] 1: Gallium arsenide single crystal substrate (GaAs single crystal substrate); 11: Main surface; t: Dislocation; G: Hypothetical lattice; S: Slip line; 10: GaAs single crystal growth apparatus; 5: Crucible; 51: Seed crystal accommodation part; 52: Diameter expansion part; 53: Straight tube part; 6: Crucible holding table; 7: Heating element; 75: Thermocouple; 8a: Seed crystal; 81: Gallium arsenide single crystal (GaAs single crystal); 82: Gallium arsenide melt (GaAs melt); D1: Inner diameter of the straight tube part; D2: Outer diameter of the crucible holding table; z: Direction along the axial direction of the crucible from below to above the crucible; r: Radial direction of the crucible; S10: Preparation process; S20: Process of obtaining a GaAs single crystal; S21: Raw material loading process; S22: Raw material melting process; S23: GaAs single crystal growth process; S30: Process of obtaining a GaAs single crystal substrate.

Claims

1. A gallium arsenide single crystal substrate having a circular main surface, The average value of the dislocation density of the main surface is 5 cm -2 or more and 100 cm -2 or less, In a hypothetical lattice formed by arranging squares with a side length of 2 mm on the main surface in the most non - overlapping manner, the ratio of the number of squares without dislocations in the squares to the total number of squares constituting the lattice is 97.0% or more and 99.5% or less, The diameter of the gallium arsenide single crystal substrate is 70 mm or more, The gallium arsenide single crystal substrate contains silicon, The atomic concentration of the silicon is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less, The carrier concentration of the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 or more and 4.0×10 18 cm -3 or less.

2. The gallium arsenide single crystal substrate according to claim 1, wherein, The crystal plane of the main surface is a {100} plane of the gallium arsenide single crystal or a plane having an off angle of greater than 0° and less than 3° from the {100} plane of the gallium arsenide single crystal, The dislocation is contained in a slip line, The slip line exists from the outer periphery of the main surface toward the inside along at least one direction selected from four directions equivalent to the [01-1] direction of the gallium arsenide single crystal.

3. The gallium arsenide single crystal substrate according to claim 1, wherein, The diameter of the gallium arsenide single crystal substrate is greater than or equal to 70 mm and less than or equal to 210 mm.

4. The gallium arsenide single crystal substrate according to claim 2, wherein, The diameter of the gallium arsenide single crystal substrate is greater than or equal to 70 mm and less than or equal to 210 mm.

5. The gallium arsenide single crystal substrate according to any one of claims 1 - 4, wherein, The gallium arsenide single crystal substrate contains boron, The atomic concentration of boron is 1.0×10 18 cm -3 or more and 1.0×10 19 cm -3 or less.

6. A method for manufacturing a gallium arsenide single crystal substrate having a circular main surface, The manufacturing method includes: A process of obtaining a gallium arsenide single crystal by growing a crystal using a gallium arsenide single crystal growth apparatus; as well as a step of obtaining the gallium arsenide single crystal substrate by processing the gallium arsenide single crystal, The gallium arsenide single crystal growth device comprises a crucible, a crucible holding table for holding the crucible, and a heating element for heating the crucible. The crucible includes a cylindrical seed crystal accommodating portion, an enlarged diameter portion connected to the seed crystal accommodating portion, and a straight cylindrical portion connected to the enlarged diameter portion. The seed crystal accommodating portion has a hollow portion which is open on one side connected to the enlarged diameter portion and has a bottom wall formed on a side opposite to the enlarged diameter portion. The expanded diameter portion has a truncated cone shape that expands upward in the axial direction of the crucible, and the small diameter side of the expanded diameter portion is connected to the seed crystal accommodating portion. The straight tube portion has a hollow cylindrical shape and is connected to the large diameter side of the enlarged diameter portion. The crucible holding table holds the enlarged diameter portion without contacting the straight tube portion. When the inner diameter of the straight tube portion is represented as D1 and the outer diameter of the crucible holding table is represented as D2, D1 and D2 satisfy 1.

0. <D2 / D1<1.5的关系,并且所述D1和所述D2的单位为mm。 7. The manufacturing method of the gallium arsenide single crystal substrate according to claim 6, wherein, The process of obtaining the gallium arsenide single crystal comprises: The step of accommodating a seed crystal in the seed crystal accommodating portion and accommodating bulk gallium arsenide and silicon in the enlarged diameter portion and the straight tube portion; A step of heating the crucible with the heating element to melt a portion of the seed crystal and the gallium arsenide into a gallium arsenide melt, while bringing the gallium arsenide melt into contact with the remaining portion of the seed crystal; and a step of growing the gallium arsenide single crystal from the gallium arsenide melt on the remaining portion of the seed crystal, while controlling such that a value obtained by second-order differentiating the temperature at the interface between the gallium arsenide single crystal and the gallium arsenide melt with respect to the axial position of the crucible at the interface becomes 0.003 °C / mm 2 or more and 0.012 °C / mm 2 or less, while performing the crystal growth process The positive direction of the position is the direction from the bottom of the crucible to the top along the axial direction, The concentration of silicon in the gallium arsenide single crystal substrate is 1.0×10 18 cm -3 or more and 5.0×10 19 cm -3 or less.

Images