Memory management method and device, electronic equipment and computer readable medium

Abstract

The application discloses a memory management method and device, a storage system and a computer readable medium, and relates to the technical field of mobile terminals. The method comprises the following steps: determining a pre-erasing parameter in the case that the current application scenario of the host belongs to a specified scenario, wherein the specified scenario is used to represent that the data amount corresponding to the data to be written is greater than a specified threshold; and interacting with the memory through a pre-erasing command to exchange the pre-erasing parameter, wherein the pre-erasing parameter comprises at least one of the maximum pre-erasing capacity supported by the memory, the current remaining pre-erasing capacity of the memory and the current configured pre-erasing capacity of the host. Therefore, in the case that the host faces a scenario in which there is a large amount of data to be written, the pre-erasing parameter can be determined, and the memory can be interacted with through the pre-erasing instruction, so as to serve the subsequent pre-erasing operation.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of mobile terminals, and more particularly, to a memory management method and device, a storage system and a computer readable medium. BACKGROUND

[0002] Currently, in flash memory, especially in NAND type flash memory, a pre-erase operation is usually required to be performed. Generally, when the current block is full of data and switches to a new block, the new block is first erased and then data is written. SUMMARY

[0003] The present application provides a memory management method and device, a storage system and a computer readable medium to improve the above-mentioned defects.

[0004] In a first aspect, the present application provides a memory management method applied to a host of a storage system, wherein the storage system further comprises a memory, the host is connected with the memory, and the method comprises: determining a pre-erase parameter in a case where a current application scenario of the host belongs to a specified scenario, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold; and interacting the pre-erase parameter between the host and the memory through a pre-erase command, wherein the pre-erase parameter comprises at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory and a current configured pre-erase capacity of the host.

[0005] In a second aspect, the present application further provides a memory management device applied to a host of a storage system, wherein the storage system further comprises a memory, the host is connected with the memory, and the device comprises a determination unit and an interaction unit. The determination unit is configured to determine a pre-erase parameter in a case where a current application scenario of the host belongs to a specified scenario, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold. The interaction unit is configured to interact the pre-erase parameter between the host and the memory through a pre-erase command, wherein the pre-erase parameter comprises at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory and a current configured pre-erase capacity of the host.

[0006] In a third aspect, the present application further provides a storage system comprising a host, a memory, wherein the host is connected with the memory, and the host is configured to execute the above-mentioned method.

[0007] In a fourth aspect, the present application further provides a computer readable medium, wherein the readable storage medium stores a program code executable by a processor, and the program code, when executed by the processor, causes the processor to execute the above-mentioned method.

[0008] The memory management method, device, storage system and computer readable medium provided by the application, in the case that the current application scenario of the host belongs to a specified scenario, a pre-erase parameter is determined, wherein the specified scenario is used to represent that the data amount corresponding to the to-be-written data is greater than a specified threshold; the pre-erase parameter is interacted with the storage through a pre-erase command, wherein the pre-erase parameter includes at least one of the maximum pre-erase capacity supported by the storage, the current remaining pre-erase capacity of the storage and the pre-erase capacity currently configured by the host. Therefore, in the case that the host faces a scenario that there is a large amount of to-be-written data, the pre-erase parameter can be determined, and the pre-erase instruction is interacted with the storage, so as to serve the subsequent pre-erase operation.

[0009] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present application. The objects and other advantages of the present application will be realized and attained by means of the instrumentalities particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0011] Figure 1 A schematic diagram of the storage system provided by the embodiment of the present application is shown;

[0012] Figure 2 A method flowchart of the memory management method provided by an embodiment of the present application is shown;

[0013] Figure 3 An interaction schematic diagram of the host and the storage of the storage system provided by the embodiment of the present application is shown;

[0014] Figure 4 A method flowchart of the memory management method provided by another embodiment of the present application is shown;

[0015] Figure 5 An architecture schematic diagram of the pre-erase command provided by an embodiment of the present application is shown;

[0016] Figure 6 A method flowchart of the memory management method provided by still another embodiment of the present application is shown;

[0017] Figure 7 An architecture schematic diagram of the mode field provided by an embodiment of the present application is shown;

[0018] Figure 8 A diagram showing a value of a mode field provided by an embodiment of the present application is shown;

[0019] Figure 9 A method flow chart of a memory management method provided by another embodiment of the present application is shown;

[0020] Figure 10 A diagram showing an operation code provided by an embodiment of the present application is shown;

[0021] Figure 11 A diagram showing a bit value of a pre-erase parameter provided by an embodiment of the present application is shown;

[0022] Figure 12 A method flow chart of a memory management method provided by still another embodiment of the present application is shown;

[0023] Figure 13 A diagram showing an identification of a pre-erase parameter provided by an embodiment of the present application is shown;

[0024] Figure 14 A method flow chart of a memory management method provided by still another embodiment of the present application is shown;

[0025] Figure 15 A diagram showing a first designated bit provided by an embodiment of the present application is shown;

[0026] Figure 16 A diagram showing a first designated bit provided by another embodiment of the present application is shown;

[0027] Figure 17 A diagram showing a second designated bit provided by an embodiment of the present application is shown;

[0028] Figure 18 A module block diagram of a memory management apparatus provided by an embodiment of the present application is shown;

[0029] Figure 19 A storage unit for saving or carrying program codes for implementing the method according to the embodiments of the present application is shown. DETAILED DESCRIPTION

[0030] In order to better understand the present application by those skilled in the art, the following will be combined with the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely. Obviously, the described embodiments are only part of the embodiments of the present application, not all embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0031] It should be noted that: similar signs and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, the terms "first", "second" and the like are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0032] Currently, in flash memory, especially NAND type flash memory, it is usually necessary to perform a pre-erase operation. Generally, in a host system using universal flash storage (UFS) as a storage device, the firmware of the UFS manages the medium (NAND flash) in units of virtual blocks (VB). When the UFS device switches to a new block after the current block is full, the new block is first erased (on the order of milliseconds), and then data is written (programmed). At the same time, due to the characteristics of Nand Flash, the block medium that has performed the erase operation has poor stability and cannot be used for data writing after a long time. Therefore, the memory device usually does not erase a large number of blocks in advance.

[0033] Pre-erase operation refers to that when a write operation is performed on a flash memory, if the currently selected block has been written full and cannot write new data, an idle block needs to be selected for writing, wherein the idle block refers to that the data on the block is invalid data, which can be erased and then used for writing new data. Therefore, the selected idle block needs to perform 1 erase operation to be used for writing new data. This process is usually managed and performed by a controller. In a NAND type flash memory, data can only be erased in a block (Block) unit. This results in an operation process called "Erase-Write". The purpose of the pre-erase operation is to perform an erase operation on the selected idle block in advance before performing an actual write operation, to avoid the write delay caused by the erase operation when writing data encounters block switching, thereby speeding up the write speed of the memory.

[0034] Due to the characteristics of the Nand Flash, the UFS device cannot write for a millisecond level time under the condition of large write pressure. Therefore, pre-erasing a part of the block can reduce the time of the UFS in block switching, which can obviously improve the write performance of the device and reduce the maximum delay caused by the erase action in the block switching process.

[0035] The current pre-erase scheme is usually:

[0036] (1) The storage device autonomously performs pre-erase when it is idle. This scheme is that the storage device erases a certain number of blocks according to the set pre-erase capacity threshold when it is idle, and when switching to write a new block, the pre-erased block is preferentially selected. Usually, the capacity threshold is adjustable and will decrease as the idle blocks of the device decrease. At the same time, when selecting a pre-erased block, the earlier pre-erased block is preferentially selected because these blocks are more likely to have a risk of medium stability.

[0037] (2) Re-erase to ensure the stability of the pre-erased block. This scheme is to re-erase the block with poor stability under the premise of the device autonomous pre-erase scheme to ensure the stability of use. Since the pre-erased block is automatically supplemented by the storage device when it is idle, it is impossible to predict how long the host will use these blocks, so there may be a problem that the host has not written for a long time, the stability of the pre-erased block gradually deteriorates, and the block cannot be written. In this scenario, the device detects the block with poor stability and needs to perform an additional erase. However, the service life of the storage medium is limited, and the additional erase will affect the service life of the medium.

[0038] (3) Host informs device to do garbage collection (GC) and erase on a certain region. This scheme is that the host informs the device to do garbage collection and erase on a certain region. The host defines a region (such as several blocks) for the device through a command. After the device receives the command, it will arrange the valid data in the region and erase the region for wear leveling and performance optimization. Since the UFS device does not expose the specific physical region usage to the host, this scheme has limited relevance to the present scheme.

[0039] However, the inventors found in research that the current pre-erase scheme usually has the following disadvantages:

[0040] (1) Relatively fixed pre-erase capacity threshold: In the current device autonomous pre-erase scheme, the pre-erase capacity is determined by the device itself, and the pre-erase is performed to the set threshold when idle. To get greater performance benefits, the threshold should be as large as possible; but considering stability and the case of too few free blocks, the threshold cannot be too large. Therefore, the device will choose a threshold that balances the benefits and risks. This threshold may change during the device's life cycle, but it is fixed for a period of time and cannot adapt to changes in host write actions. It is more ideal to expand the threshold when the host writes frequently, and reduce the threshold or not do pre-erase when the host writes for a long time.

[0041] (2) Stability risk of pre-erase blocks: Since the device cannot know the host's write actions in the existing scheme, and the pre-erase threshold is relatively fixed, there will always be a part of pre-erase blocks in the device. When the host does not write for a period of time, the pre-erased blocks are prone to stability risks. Due to this reason, the existing scheme needs an additional stability check mechanism for pre-erase blocks, and the pre-erase blocks with poor stability are erased again, which actually wastes the number of erasures.

[0042] Therefore, in order to overcome the above-mentioned defects, the embodiments of the present application provide a memory management method which can pre-erase in combination with the current scene.

[0043] It should be noted that the memory management method provided by the embodiments of the present application is applied to a system composed of a host using a flash memory, such as Figure 1 As shown in the figure, the storage system 10 includes a host 100 and a memory 200, and the host 100 is connected with the memory 200. Exemplarily, the host 100 can be an electronic device, which can be a smartphone, a tablet computer, an e-book, etc. capable of running an application program. In the embodiments of the present application, the host 100 is a smartphone. The memory 200 can be the flash memory described above, for example, the memory 200 is UFS.

[0044] It can be understood that the memory 200 can be a built-in memory of the host 100, that is, the memory 200 can be integrated into the mainboard of the host 100, used as the ROM of the mobile phone, for storing the operating system, application programs and user data. In addition, the memory 200 can be an external memory of the host 100, that is, a peripheral of the host 100, for example, taking the memory 200 as a UFS, the host 100 is connected with the memory 200 through a USB interface, of course, the UFS storage device can also be designed as a plug-in storage card form, similar to the traditional SD card or microSD card. In this way, the user can insert the UFS storage device into the USB interface of the mobile phone, and perform data transmission and access through the USB interface. In the embodiments of the present application, whether the memory 200 is an external memory or a built-in memory of the host 100 is not limited, and the host is used to execute the embodiments described below.

[0045] Please refer to Figure 2 The method is applied to the above-mentioned host, and for the convenience of description, the following embodiments are described by taking the memory as a UFS, of course, the memory can also be of other types, which are not limited, and the method comprises S201 to S202.

[0046] S201: In the case that the current application scenario of the host belongs to a specified scenario, a pre-erasing parameter is determined, wherein the specified scenario is used to represent that the data amount of the to-be-written data is greater than a specified threshold.

[0047] It can be understood that the specified scenario refers to a scenario in which there can be a large amount of to-be-written data, and if the current application scenario of the host belongs to the specified scenario, it means that the host is currently in a scenario in which a large amount of write data will exist, that is, a high-pressure write scenario. Exemplarily, whether the current application scenario of the host belongs to the specified scenario can be determined in the following manner. Therefore, the specified threshold can be a reference value, which is used to distinguish different scenarios between the execution of the automatic pre-erasing method of the present application and the non-execution of the method, and the specific value of the specified threshold is not limited.

[0048] As an implementation manner, whether the current application scenario of the host belongs to the specified scenario can be that a target application program currently running in the host is determined; if the target application program belongs to a preset application list, it is determined that the current application scenario of the host belongs to the specified scenario, and the current pre-erasing capacity is determined based on the target application program.

[0049] Specifically, taking the host as a smart phone as an example, the running application can be an application running in the foreground and / or background of the smart phone. In the embodiments of the present application, the running application can be an active application, which can refer to an application running in the foreground in the current time period and currently running in the foreground or background, or an application writing data to the memory in the current time period, or an application currently running in the foreground, or an application currently reading and / or writing data.

[0050] In the embodiments of the present application, the active application refers to an application currently running in the foreground of the electronic device, that is, the implementation of determining the application running on the host determines the application currently running in the foreground of the host, that is, the application currently running in the foreground of the electronic device.

[0051] For example, the preset application list can be an application with a large number of sequential write operations, for example, when a certain game application performs an installation package installation operation or a version update operation, there are a large number of sequential write operations. The large number of sequential write operations refer to continuously performing write operations in a preset time period and the amount of data written is greater than a preset data amount. It can be understood that the applications in the application list can be manually added, or determined by the host according to whether there are a large number of sequential write operations for each application in the statistical period, which is not limited here.

[0052] Therefore, the preset application list can be regarded as a whitelist of applications with high pressure write. After the host determines the running application, the running application is taken as a target application, and it is determined whether the target application is in the preset application list. If it is in the preset application list, it is determined that the APP in the white list with high pressure write is currently working, so that it is determined that the application scenario of the host currently belongs to the specified scenario, so that the host can trigger the memory to perform the pre-erase operation. The precondition of performing the pre-erase operation is to determine the pre-erase parameter and interact the pre-erase parameter with the memory.

[0053] As another implementation, the implementation of determining whether the application scenario of the host currently belongs to the specified scenario can be to determine the application to be updated of the host currently; if the number of the application to be updated currently is greater than a specified number, it is determined that the application scenario of the host currently belongs to the specified scenario, and the current pre-erase capacity is determined based on the application to be updated. That is, if the number of the application to be updated of the host currently is too large, that is, in the scenario that a large number of APPs need to be updated, it can be determined that the application scenario of the electronic device currently belongs to the high pressure write scenario.

[0054] As yet another implementation, the implementation of whether the current application scenario of the host belongs to the specified scenario can be: determining the application program to be updated currently of the host; determining the target object to be downloaded or copied currently of the host; if the capacity of the target object is greater than a specified capacity, determining that the current application scenario of the host belongs to the specified scenario, and determining the current pre-erase capacity based on the target object. The capacity of the target object can also be understood as the size of the storage space occupied by the target object, that is, the size of the target object. The target object can be a file or an application program, and the capacity of the target object can refer to the size of the application program or the size of the file. It can be understood that the target object is a current to-be-downloaded object, and can also be a current to-be-copied object. Therefore, the current to-be-downloaded target object greater than the specified capacity can be regarded as that the host is in a large-capacity APP or a large-capacity file download scenario. Similarly, the current to-be-copied target object greater than the specified capacity can be regarded as that the host is in a large-capacity APP or a large-capacity file copy scenario.

[0055] As yet another implementation, the implementation of whether the current application scenario of the host belongs to the specified scenario can be: determining the application program to be updated currently of the host; determining the target object to be downloaded or copied currently of the host; if the capacity of the target object is greater than a specified capacity, determining that the current application scenario of the host belongs to the specified scenario, and determining the current pre-erase capacity based on the target object. The capacity of the target object can also be understood as the size of the storage space occupied by the target object, that is, the size of the target object. The target object can be a file or an application program, and the capacity of the target object can refer to the size of the application program or the size of the file. It can be understood that the target object is a current to-be-downloaded object, and can also be a current to-be-copied object. Therefore, the current to-be-downloaded target object greater than the specified capacity can be regarded as that the host is in a large-capacity APP or a large-capacity file download scenario. Similarly, the current to-be-copied target object greater than the specified capacity can be regarded as that the host is in a large-capacity APP or a large-capacity file copy scenario.

[0056] S202: Interact with the storage through a pre-erase command to obtain a pre-erase parameter, wherein the pre-erase parameter includes at least one of a maximum pre-erase capacity supported by the storage, a current remaining pre-erase capacity of the storage, and a pre-erase capacity currently configured by the host.

[0057] It should be noted that the host needs to use the pre-erase parameter in the case of performing the pre-erase operation on the memory, and the pre-erase parameter can include at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory, and a current configured pre-erase capacity of the host. Specifically, the maximum pre-erase capacity supported by the memory can refer to the maximum capacity of the pre-erase that can be managed by the memory at the same time. Since the memory (such as UFS) usually performs the erase operation in "blocks", the maximum pre-erase capacity supported by the memory can refer to the maximum number of pre-erase virtual blocks that can be managed by the memory at the same time. The current remaining pre-erase capacity of the memory refers to the number of virtual blocks that have been pre-erased and currently exist in the memory, and the current required pre-erase capacity refers to the size of the storage space currently requested by the host for pre-erase. As an implementation manner, the current required pre-erase capacity can be determined based on the current application scenario, that is, the data amount of the data to be written corresponding to the current application scenario can be determined based on the current application program, and the pre-erase capacity matched with the data amount is determined as the current pre-erase capacity.

[0058] In the embodiments of the present application, the pre-erase parameter can include the maximum pre-erase capacity supported by the memory, the current remaining pre-erase capacity of the memory, and the current configured pre-erase capacity of the host. The manner in which the host controls the memory to perform the pre-erase operation can refer to Figure 3 . As Figure 3 indicated, the host sends a first interaction command to the memory, and the first interaction command instructs the memory to return the maximum pre-erase capacity supported by the memory device, that is, the host queries the maximum pre-erase capacity supported by the memory device, and the memory device returns the maximum pre-erase capacity supported by the memory device after receiving the command. Then, the host sets the capacity required to be pre-erased by the memory device. Specifically, the host can determine the current required pre-erase capacity, for example, the current required pre-erase capacity can be determined based on the current application scenario, and of course, the current required pre-erase capacity can be set based on other reference conditions, which is not limited, and it also needs to ensure that the current required pre-erase capacity does not exceed the maximum pre-erase capacity supported by the memory device. Then, the host sets the capacity required to be erased by the memory through a second interaction command, that is, the host sends the current required pre-erase capacity to the memory through the second interaction command, and the memory device judges whether the memory can meet the pre-erase requirement of the host and whether the capacity required for pre-erase can be met after receiving the command. If yes, it replies success, otherwise, it replies failure. The judgment of whether the memory can meet the pre-erase requirement of the host can refer to whether the memory currently meets the execution condition of the pre-erase operation, and the specified condition can include that the memory is in normal working condition, wherein the normal working condition of the memory refers to that the memory is not abnormal, and the abnormality, also referred to as the medium abnormality, refers to that the memory has been locked and cannot perform the "write" operation any more.

[0059] In addition, the implementation of the memory determining whether the capacity of the pre-erase can be met can be that the memory determines whether the free blocks are sufficient and whether the pre-erase capacity currently configured by the host exceeds the maximum pre-erase capacity supported by the memory. Specifically, the pre-erase operation of the memory refers to the pre-erase operation on the free blocks of the memory. It can be understood that when the storage device writes data, the data is written into the free blocks, where the free blocks refer to the areas not used by valid data, which are usually part of the memory waiting for the writing of new data. Before the data is written into the free blocks, the pre-erase operation needs to be performed on the free blocks. Therefore, after the memory learns that the pre-erase capacity currently required by the host is determined, the memory needs to determine whether the number of the current free blocks can meet the requirement of the pre-erase capacity currently required. In addition, although the host ensures that the pre-erase capacity currently required is set to not exceed the maximum pre-erase capacity supported by the memory when determining the pre-erase capacity currently required, in some cases, the host can send an abnormal value to the memory. Therefore, the memory needs to determine whether the pre-erase capacity currently required exceeds the maximum pre-erase capacity supported by the memory. If at least one of the following conditions is met, it is determined that the capacity of the pre-erase cannot be met: the pre-erase capacity currently required exceeds the maximum pre-erase capacity supported by the memory and the number of the current free blocks cannot meet the requirement of the pre-erase capacity currently required.

[0060] Next, the memory can determine when to perform the pre-erase operation. The memory can perform the pre-erase operation immediately after receiving the command, or can perform the pre-erase operation in an idle state. The time point of the pre-erase operation is determined by the storage device algorithm. The idle state can refer to that the memory does not receive the command sent by the host within a specified time period, that is, the memory is determined to enter the idle state when it is determined that the command sent by the host is not received within the specified time period (for example, 10 ms). Alternatively, the host can actively issue a command to enter a low-power state, that is, the host actively issues a command to enter a low-power state when no new command is generated within a specified time period (for example, 5 ms), so that the memory performs an operation beneficial to reducing the power consumption of the memory. In this scenario, the memory can also be considered to be in an idle state.

[0061] In addition, the host can also query the current pre-erase capacity of the storage device through a third interaction instruction, so that the host can know the current remaining pre-erase capacity of the memory before performing the write operation, and thus can know whether the pre-erase capacity required by the host has been completed by the memory. After receiving the command, the storage device returns how much the current pre-erase capacity is left.

[0062] As an implementation, the first interaction command, the second interaction command and the third interaction command can be named as a pre-erase command, that is, the host and the memory can interact with each other through the pre-erase command, and the content of the pre-erase command is different in the case of requesting or sending different data. It can be understood that the first interaction command, the second interaction command and the third interaction command can refer to different parameters or contents transmitted in the pre-erase command, and can not be represented as different commands. The pre-erase command can be an existing command in the protocol of the memory, or a command defined additionally, which is not limited.

[0063] Therefore, in the case that the current application scenario of the host belongs to a specified scenario, the pre-erase parameter is determined, wherein the specified scenario is used to represent that the data amount corresponding to the to-be-written data is greater than a specified threshold; and the pre-erase parameter is interacted with the memory through a pre-erase command, wherein the pre-erase parameter includes at least one of the maximum pre-erase capacity supported by the memory, the current remaining pre-erase capacity of the memory and the current configured pre-erase capacity of the host. Therefore, in the case that the host faces a scenario in which there is a large amount of to-be-written data, the pre-erase parameter can be determined, and the pre-erase instruction is interacted with the memory, so as to serve the subsequent pre-erase operation.

[0064] The different construction modes of the pre-erase command will be described below.

[0065] Please refer to Figure 4 The method is applied to the host described above, and the pre-erase command in the method can be defined based on part of the fields of a known command of the memory protocol, and the pre-erase parameter corresponding to the pre-erase function can be defined in the reserved field and / or the extension field of the known command. Specifically, the method includes S401 to S403.

[0066] S401: In the case that the current application scenario of the host belongs to a specified scenario, a pre-erase parameter is determined, wherein the specified scenario is used to represent that the data amount corresponding to the to-be-written data is greater than a specified threshold.

[0067] S402: A pre-erase command is constructed based on a specified field of a first command, wherein the first command includes a command supported by the protocol of the memory, and the specified field includes at least one of a reserved field and an extension field.

[0068] It can be understood that the first command can be a command supported by a protocol of the memory. In the embodiments of the present application, the memory can be a universal flash storage (UFS), and the protocol of the memory can be a UFS protocol. The commands supported by the UFS protocol can include a data transfer command, a management command, a status command, an extension command, an error detection and repair command, a self-check command, a device identification command and a transaction management command. The data transfer command includes a read data command (READ), a write data command (WRITE), a READ BUFFER command for reading data from a cache and a WRITE BUFFER command for writing data to the cache. The management command includes a SYNCHRONIZE CACHE command for ensuring that all cached data at the device end is written to the non-volatile storage, an UNMAP command for erasing a command, deleting data in a specified area of the device and a FORMAT UNIT command, a START STOP UNIT command for changing the power state of the device. The status command includes a REPORT LUN command for obtaining the status of a logical unit (LUN), a MODE SENSE command for querying certain characteristics or functions of the device and a MODE SELECT command for setting certain characteristics or functions of the device. The extension command includes a UFS QUERY command for querying various information of the device. The error detection and repair command includes a REQUEST SENSE command for checking the status of the device and a CLEAR CONDITION command for clearing the error condition. The self-check command includes a SEND DIAGNOSTIC command for performing self-detection of the device. The device identification command includes an INQUIRY command for obtaining basic information of the device and a READ CAPACITY command for reading capacity information of the device.

[0069] It can be understood that in the embodiments of the present application, the reserved field and / or the extension field of the command supported by the protocol of the memory are used to construct the pre-erase command, that is, by setting the reserved field and / or the extension field, the command can be used as the pre-erase command. Therefore, among all the commands supported by the protocol of the memory, the command having at least one of the reserved field and the extension field can be the first command.

[0070] It should be noted that the extension field in the command is to support the flexibility and extensibility of the protocol, allowing new functions or features to be added in future versions of the standard without affecting the existing command format and functions. The extension field is usually used to support new functions or features, and can add new command parameters or control information in the update of the protocol standard, that is, by adding an extension field to the existing command, the introduction of new functions can ensure the compatibility of existing devices. For example, the MODE SELECT command has an extension field, which is used to set the characteristics of the device, and the extension field contained therein is used to deliver additional characteristic data or identifiers. Through the extension field, the device can support more features. The extension field is usually located in the additional header segment (Extended Header Segment, EHS) of the UFS command structure, and can be flexibly configured as needed.

[0071] The reserved field in the command, also known as the reserved field, is reserved for future expansion of the protocol. This field has no specific use defined in the current protocol version and is usually marked as reserved in the command format. That is, the existence of the reserved field ensures that future protocol extensions can not break the existing command format. When the protocol is updated, the new version can use these reserved fields without the need to redefine the entire command structure. The reserved field provides space for new functions, parameters or configurations that may be added in the future. They provide a reserved location for the introduction of new standards, avoiding destructive modifications to existing devices and systems. Still taking the MODE SELECT command as an example, the MODE SELECT command has reserved fields, which are usually not involved in the current command processing, and the values of the reserved fields are usually set to zero and the contents of these fields are ignored when parsing the command.

[0072] As can be seen, whether it is a reserved field or an extension field, both belong to the current unused field, the extension field can be regarded as a "to-be-used" field, which will be defined and used to support new features in the future, and the reserved field can be regarded as a "blank" field, which has no meaning at present and is not processed by the device, and the value is usually zero. Therefore, the setting or definition of the reserved field or the extension field will not affect the existing functions of the command. Therefore, this way of constructing the pre-erase command does not need to add additional customized commands, and the extension field or the reserved field exists in the existing command, reducing additional command interaction to achieve the purpose of pre-erase, preventing a large impact on the real-time performance of other commands.

[0073] As an implementation, assuming the specified field is an extension field, an implementation of constructing a pre-erase command can be that, by setting a value in the extension field of the first command which is not assigned a function to a target identifier corresponding to the pre-erase function, the first command is configured as a pre-erase command, wherein the data area corresponding to the extension field is used to store the pre-erase parameter. As mentioned above, there are some values in the extension field which are not assigned a function, i.e. the aforementioned to-be-used field. By setting the value, the first command can be enabled to have the pre-erase function. Specifically, by setting a value in the extension field of the first command which is not assigned a function to a target identifier corresponding to the pre-erase function, the target identifier can represent that the first command has the pre-erase function. After the memory or the host recognizes the first command with the target identifier, it is determined that the first command is a pre-erase command, and thus the pre-erase parameter is obtained from the data area corresponding to the extension field.

[0074] Exemplarily, the extension field is an EHS field, which can generally include an EHS Type and an EHS Data. The EHS Type specifies the data type or category of the EHS field. The EHS Data is used to store device-related data. In the embodiments of the present application, whether the type of the first command is a pre-erase command can be set through the EHS field of the first command, and the EHS Data is used to store the pre-erase parameter. Specifically, a value in the EHS Type which is not assigned a function (i.e. an unused value) is selected as a target identifier corresponding to the pre-erase function.

[0075] As an implementation, the value which is not assigned a function belongs to a specified value range of the EHS field, which can be 02H to 7FH or 80H to FFH. It can be understood that the range of 02H to 7FH includes 02H, 7FH and the values between 02H and 7FH, i.e. 02H, 03H, 04H, 05H,..., 7EH, 7FH. Similarly, the range of 80H to FFH includes 80H, FFH and the values between 80H and FFH, i.e. 80H, 81H, 82H, 83H,..., FEH, FFH.

[0076] In the embodiments of the present application, exemplarily, the value which is not assigned a function is 80H of the EHS field, and of course it can also be other unused values in the range, which are not limited herein. Then, the 80H is set as an identifier of the pre-erase function, i.e. a target identifier corresponding to the pre-erase function. After the host and the memory obtain the first command with the target identifier, in the case that the target identifier exists in the first command, it is known that the first command has the pre-erase function, and then the pre-erase parameter is obtained from the EHS Data area.

[0077] In other words, the value of the unassigned function in the extended field of the first command can be set to the target identifier corresponding to the pre-erasure function, and the data area of ​​the extended field is defined to store the pre-erasure parameters. After this setting, the first command can be used by the host or memory as a pre-erasure command. In the embodiments of this application, the first command can be a command supported by the UFS protocol that includes an EHS field, such as a Write or Read command. Of course, it can also be other commands, and there is no limitation on this.

[0078] like Figure 5 As shown, Figure 5 The diagram illustrates the architecture of the pre-erase command obtained by setting the EHS field, specifically... Figure 5 The content highlighted in bold can be seen as the setting for this EHS field. It can be seen that in EHSType, an unused value 80H is selected, describing it as the identifier for the Pre-Erase function, i.e., the aforementioned target identifier. Furthermore, the EHS Data area defines three parameters, such as... Figure 5 The three parameters highlighted in bold are PreEraseSetCap, PreEraseCurCap, and PreEraseMaxCapt. These three parameters characterize the pre-erasure parameters used in the embodiments of this application, and their meanings are shown in Table 1.

[0079] Table 1

[0080]

[0081] In other words, PreEraseSetCap is the pre-erase capacity currently configured by the host, PreEraseCurCap is the remaining pre-erase capacity of the memory, and PreEraseMaxCap is the maximum pre-erase capacity supported by the memory. PreEraseSetCap can be the total amount of memory the host expects to pre-erase, or it can be the amount of memory the host expects to continue erasing, i.e., an increment.

[0082] As one implementation, PreEraseSetCap can be the total amount of memory the host expects to pre-erase. The specific example in Table 2 illustrates PreEraseSetCap. Assume PreEraseMaxCap is 10, representing a maximum pre-erase capacity of 10GB supported by the memory.

[0083] Table 2

[0084]

[0085]

[0086] It should be noted that X in the above description represents that PreEraseCurCap is an arbitrary value, but always satisfies "less than or equal to PreEraseMaxCap".

[0087] As another implementation, the PreEraseSetCap can also be an increase amount, that is, a further increased pre-erase capacity on the basis of the existing pre-erase capacity. Please refer to Table 3, which illustrates the PreEraseSetCap through an example of Table 3. Similarly, it is assumed that PreEraseMaxCap is 10, which represents that the maximum pre-erase capacity supported by the memory is 10 GB.

[0088] Table 3

[0089]

[0090]

[0091] S403: Interact with the memory through a pre-erase command to exchange a pre-erase parameter.

[0092] It should be noted that the contents not described in detail in the above steps can refer to the foregoing embodiments and will not be described here again.

[0093] Therefore, by setting the corresponding pre-erase parameter in the data area corresponding to the extension field, the pre-erase command constructed based on the extension field or the reserved field of the first command can be used to deliver the pre-erase parameter. And the pre-erase command constructed based on the command supported by the memory protocol makes it impossible to cause the function loss of the command, reduces the additional command interaction to achieve the purpose of pre-erase, and prevents a great impact on the real-time performance of other commands.

[0094] Please refer to Figure 6 The method is applied to the host described above, and the pre-erase command in the method can be set based on the modification of the known command of the memory protocol, that is, the known command is used to switch between the original function and the pre-erase function to complete the delivery of the pre-erase parameter. Specifically, the method comprises S601 to S604.

[0095] S601: In the case where the current application scenario of the host belongs to a specified scenario, determine a pre-erase parameter, wherein the specified scenario is used to represent that the data amount corresponding to the data to be written is greater than a specified threshold.

[0096] S602: set a mode field in a second command, the second command belonging to a command supported by a protocol of the memory.

[0097] With Figure 4 Different from the corresponding embodiment, in the embodiment of the present application, the mode of constructing the pre-erase command is to modify the second command, i.e., the command supported by the protocol of the memory, to give it a new function, which belongs to constructing a command outside the command supported by the protocol of the memory, but the architecture of the command can be the architecture of the command supported by the protocol of the memory, that is, on the basis of a known command (i.e., the command supported by the protocol of the memory), the mode field is added to make it have different modes, i.e., the pre-erase mode and the original mode, which is the initial function of the second command.

[0098] It can be understood that the second command also belongs to the command supported by the protocol of the memory, and the implementation of the command supported by the protocol of the memory can refer to the foregoing content, which will not be described here.

[0099] S603: set the mode field of the second command to a specified value, and configure the second command as a pre-erase command, the specified value being used to represent that the current function of the second command is a pre-erase function.

[0100] As an implementation, the value set to the mode field can be used to set whether the second command is used as a pre-erase command or used as the original second command, that is, assuming that the second command has a pre-erase function and other functions, the pre-erase function includes delivering a pre-erase parameter, and the other functions can include an initial function, which can be the default function of the second command, for example, the second command is a Write Buffer command, and the initial function is to write data into the cache. Therefore, by setting the value of the mode field, the second command can be switched between the pre-erase function and the initial function.

[0101] In the embodiment of the present application, it can be set that when the mode field is set to a specified value, the second command is used as a pre-erase command, i.e., the specified value can represent that the current function of the second command is a pre-erase function, and when the mode field is not the specified value, the second command executes the initial function or other functions.

[0102] As an implementation, the implementation of setting the mode field in the second command can be that the first bit to the second bit of a specified byte in the second command is set as the mode field, that is, a certain number of bits of a byte in the second command is selected as the mode field. For example, assuming that the second command is a Write Buffer command or a Read Buffer command, a certain number of bits can be selected in the command to be set as the mode field, for example, the specified byte is byte1, the first bit is bit0, and the second bit is bit4, that is, bit0-bit4 of byte1 in the Write Buffer command or the Read Buffer command is selected to be set as the mode field.

[0103] It can be understood that, assuming that the memory is a UFS memory, in the UFS protocol, a byte represents a byte of a command, different bytes form a command in a certain order, and each byte is responsible for representing a different part or parameter of the command, and each byte plays a specific role in the command structure. For example, in the Write Buffer command, byte1 is used to control or specify some operation parameters. As shown in Figure 7 , bit0-bit4 of byte1 of the command is defined as the mode field (Mode). As shown in Figure 8 , which shows the value of Mode and the meaning it represents, it can be seen that the specified value can be 0x1D, that is, Figure 8 , the content highlighted by bold, that is, 1D corresponds to the pre-erase function, so by setting the mode field of the second command and setting the mode field to the specified value, the second command is configured as a pre-erase command. Of course, the specified value can also be other values besides 1D, which is not limited here.

[0104] S604: Interact with the pre-erase parameter between the pre-erase command and the memory.

[0105] It should be noted that the contents not described in detail in the above steps can refer to the foregoing embodiments, which will not be described here.

[0106] Therefore, by reconstructing the known command, the mode can be switched to switch between the pre-erase function and other functions, so that the host and the memory can interact with the pre-erase parameter through the command.

[0107] Please refer to Figure 9 , the method is applied to the host described above, and the method can be based on the known operation code of the memory protocol to set a new operation code as a pre-erase command corresponding to the pre-erase function. Specifically, the method includes S901-S903.

[0108] S901: In a case where the current application scenario of the host belongs to a specified scenario, determine a pre-erase parameter, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold.

[0109] S902: Obtain a pre-erase command by newly defining an operation code in an interface protocol command set of the memory.

[0110] It can be understood that an operation code (Opcode) is a part of a computer instruction set, which represents the encoding of a specific operation. During the program execution process of a computer, the operation code specifies the operation type that needs to be performed by the CPU, and it is a part of the instruction, which is usually used to identify the function of the instruction. Generally, the operation code belongs to a part of the command set of the interface protocol. In any communication protocol or bus protocol, the operation code is an instruction used to specify a specific operation to be performed.

[0111] Since the host and the memory interact through the interface protocol command set, thereby realizing the operations such as reading, writing, and erasing of data, a new operation code is defined in the interface protocol command set, which is used as a dedicated operation code of the pre-erase function and as a pre-erase command, thereby realizing the interactive operation of the pre-erase parameter between the host and the memory.

[0112] As an implementation manner, the memory is a UFS memory, and the interface protocol command set is a UFS SCSI Command Set. Specifically, the SCSI Command Set (SCSI command set) refers to a set of standard commands defined in the Small Computer System Interface (SCSI) protocol. These commands are used to communicate with storage devices (such as hard disks, SSDs, UFS storage devices) to perform various operations (such as reading, writing, formatting, erasing, etc.). The UFS SCSI Command Set is the SCSI command set used by the UFS storage device.

[0113] In the embodiments of the present application, a new Opcode can be defined in the UFS SCSI Command Set as the pre-erase command. As shown in Figure 10 , the newly defined operation code is PRE_ERASE, and the Opcode value and Commandsupport corresponding to the operation code are not shown in the figure, and the specific content is not limited herein, wherein the ellipsis represents other operation codes shown.

[0114] As shown in Figure 11As shown, three pre-erase variables are defined in the data area, PreEraseSetCap corresponds to the 0th byte, PreEraseCurCap corresponds to the 1st byte, and PreEraseMaxCap corresponds to the 2nd byte. Assuming that the opcode is composed of an opcode, a parameter type, and a capacity value, the pre-erase command formed by the opcode can be [opcode name, parameter type, capacity], for example, PRE ERASE 1, 20; which indicates that the parameter of the interaction is the pre-erase capacity currently configured by the host, and the specific capacity is 20 GB.

[0115] S903: Interact with the memory through the pre-erase command to exchange the pre-erase parameter.

[0116] It should be noted that the contents not described in detail in the above steps can be referred to the foregoing embodiments, which will not be described here.

[0117] Therefore, by defining a new Opcode in the UFS SCSI Command Set, when the host or the memory device wants to transmit a value, the value is provided by the variable in the corresponding position. This enables the host and the memory to exchange the pre-erase parameter based on the opcode.

[0118] Please refer to Figure 12 The method is applied to the above-mentioned host, and the method can be based on a known request of the memory protocol to define a new attribute, so that the request containing the attribute can be used as a pre-erase command. Specifically, the method includes S1201 to S1203.

[0119] S1201: In a case where the current application scenario of the host belongs to a specified scenario, determine a pre-erase parameter, wherein the specified scenario is used to represent that the data amount corresponding to the data to be written is greater than a specified threshold.

[0120] S1202: Obtain a pre-erase command by defining a target attribute parameter in a parameter set of a specified request.

[0121] Taking the memory as UFS for example, in the UFS protocol, the parameter set (Attributes) is used to transmit detailed configuration parameters of a specific command or request, so that the request often carries a parameter set when sending a request. Therefore, defining a target attribute parameter in the parameter set can enable the host and the memory to exchange the pre-erase parameter through the target attribute parameter, that is, the target attribute parameter is used to transmit the pre-erase parameter. Therefore, the specified request carrying the target attribute parameter can be regarded as a pre-erase command, that is, the pre-erase command can be issued through the specified request.

[0122] In the embodiments of the present application, the specified request is a query request or a task management request. Through the request, the target attribute parameter can be read or written, so as to realize the interaction of the pre-erase parameter. That is, the target attribute parameter is added in the parameter set corresponding to the specified request, and the target attribute parameter is written into the memory or read from the memory through the read parameter request or the write parameter request under the specified request. Therefore, by setting different parameter identifiers corresponding to different pre-erase parameters, the writing or reading of different pre-erase parameters can be realized.

[0123] Exemplarily, assuming that the memory is a UFS memory, the specified request can be a query request Query Request or a task management request Task Management Request. In the UFS protocol, the Query Request is used to query the device state, characteristics or information of the device, and the Task Management Request is used to manage, control or terminate the task being performed on the device. Whether it is a query request or a task management request, there is a parameter set Attributes corresponding to the request. Then, the target attribute parameter is defined in the parameter set. In the embodiments of the present application, the target attribute parameter can be three, which are the aforementioned PreEraseSetCap, PreEraseCurCap and PreEraseMaxCap. Therefore, by reading the corresponding parameter through the specified request, the corresponding content can be obtained. For example, the PreEraseMaxCap is queried in the memory, so as to obtain the maximum pre-erase capacity supported by the memory.

[0124] As Figure 13As shown, it shows the identification corresponding to the target attribute parameter, so when the host or storage device wants to transfer the value, the Read Attributes and Write Attributes in the Query request are used to complete the transfer of the parameter. It should be noted that the Query request can be understood as a request type defined by the UFS protocol, and the request has a plurality of more detailed requests under it, and the Read Attributes and Write Attributes are specific implementations of the Query request. The Read Attributes and Write Attributes are both implemented through the Query request, and are respectively used for reading and modifying the attributes of the device. Therefore, after the above three attribute parameters are defined in the Attributes, the reading and writing of the attribute parameters can be completed through the Read Attributes and Write Attributes, that is, the interactive operation of the pre-erase parameter is realized. Therefore, the Read Attributes and Write Attributes request, and the corresponding parameter identification are the identification corresponding to the pre-erase parameter, which is regarded as a pre-erase command.

[0125] S1203: Interact with the storage through the pre-erase command to exchange the pre-erase parameter.

[0126] It should be noted that the contents not described in detail in the above steps can refer to the foregoing embodiments, and will not be described here.

[0127] Therefore, the pre-erase command is issued through the Query Request or other requests such as the Task Management Request. For example, three new attributes are defined by using the Attributes access method in the Query command. When the host or storage device wants to transfer the value, the Read Attributes and Write Attributes in the Query command are used to complete the transfer of the parameter.

[0128] Please refer to Figure 14 The method is applied to the above host, and the method can determine whether the storage supports the pre-erase function before determining the specific pre-erase parameter. Specifically, since the purpose of pre-erase is to further improve the write performance of the storage device in the high-pressure write scenario, the pre-erase function will be started when the host enables the WriteBooster, and the function is only applicable to the SLC block of the WriteBooster, that is, the object of the pre-erase is the SLC block. Therefore, if the WriteBooster of the storage device is disabled, the pre-erase function should also be disabled. Specifically, the method includes S1401 to S1402.

[0129] S1401: If the memory supports the pre-erase function, determine the pre-erase parameter in the case that the current application scenario of the host belongs to a specified scenario.

[0130] As mentioned above, in the case that the WriteBooster is disabled, the pre-erase function is also disabled, therefore, for the memory, there is a case that the pre-erase function is disabled, so in order to ensure the smoothness of the pre-erase operation, it is necessary to determine whether the memory supports the pre-erase function.

[0131] As an implementation manner, the manner in which the host determines whether the memory supports the pre-erase function can at least include the following two manners:

[0132] The host and the memory can agree to select a certain bit in a certain field in the UFS protocol to represent whether the pre-erase function of the memory is disabled, that is, whether the memory supports the pre-erase function.

[0133] The first manner is to obtain the value of a first specified bit in an extended feature support field of a device descriptor in the protocol of the memory, the first specified bit is used to mark the pre-erase function; if the value of the first specified bit is a first specified value, it is determined that the memory supports the pre-erase function, otherwise, it is determined that the memory does not support the pre-erase function.

[0134] Exemplarily, as shown in the following table, Figure 15 the memory is a universal flash memory, the device descriptor is DeviceDescriptor, the extended feature support field is dExtendedUFSFeaturesSupport, and the first specified bit can be a reserved bit corresponding to the extended feature support field. It should be noted that the reserved bit refers to a bit that is not currently assigned a function, and can also be understood as a value that is not used, which usually refers to a bit reserved for future expansion or compatibility in the UFS protocol. As an implementation manner, as shown in the following table, Figure 15 the reserved bit (Reserved) corresponding to the extended feature support field can be bit20 to bit31, that is, the first specified bit belongs to the range of bit20 to bit31. It can be understood that the range of bit20 to bit31 includes bit20, bit31, and the bits between bit20 and bit31.

[0135] In the embodiments of the present application, as shown in the following table, Figure 16The first designated bit is Bit

[22] as shown, but it can also be other unused bits in the range, which is not limited here. In the UFS protocol, the Device Descriptor is a structure containing basic information of the device. It describes various characteristics and capabilities of the UFS device, helping the host to understand the important information such as the capabilities, version, and supported functions of the device. The dExtendedUFSFeaturesSupport is a field in the Device Descriptor, indicating the extended functions supported by the UFS device. Therefore, a bit is selected from the field representing the supported extended functions of the memory to represent whether the memory supports the pre-erase function, which can be used as the content extension of the extended feature support field.

[0136] For example Figure 15 As shown in the first embodiment, Bit

[22] is used as the first designated bit, i.e., Bit

[22] is used as the flag of whether the memory device supports the pre-erase function. The first designated value is set to 1. If Bit

[22] is 1, it indicates that the memory device supports the pre-erase function. If Bit

[22] is not 1, e.g., 0, it indicates that the memory device does not support the pre-erase function.

[0137] In the second way, the value of the second designated bit of the write acceleration support field of the device descriptor in the protocol of the memory is obtained. The second designated bit is used to mark the pre-erase function. If the value of the second designated bit is a second designated value, it is determined that the memory supports the pre-erase function. Otherwise, it is determined that the memory does not support the pre-erase function.

[0138] Exemplarily, as shown in the second embodiment, Figure 17 The memory is a universal flash memory, the device descriptor is DeviceDescriptor, and the write acceleration support field is wExtendedWriteBoosterSupport. The second designated bit can be an unused value in the field, i.e., the second designated bit is a reserved bit corresponding to the write acceleration support field.

[0139] As an implementation, the reserved bits corresponding to the write acceleration support field can be bit3 to bit15, that is, the second specified bit belongs to the range of bit3 to bit15. It can be understood that the range of bit3 to bit15 includes bit3, bit15, and the bits between bit3 and bit15. In the embodiment of the application, the second specified bit is Bit[3], and of course it can also be other unused bits in the range, which is not limited here. In the UFS protocol, wExtendedWriteBoosterSupport is a field in the Device Descriptor, which is used to indicate whether the device supports the Extended Write Booster function. That is, it is used to inform the host device whether it supports the extended write accelerator function.

[0140] It should be noted that any value in the value range provided by the application can be used without being assigned a function. Taking the second specified bit as an example, in the wExtendedWriteBoosterSupport field, bits 0-2 have been used, and bits 3-15 are reserved bits, so the newly added bit for marking the pre-erase function uses the first reserved bit (that is, bit3). If bit3 is also used, then bit4, bit5 and subsequent bits are sequentially taken until bit15. Therefore, within this range, the second specified bit can be selected as the marking bit of the pre-erase function based on the use of each bit, for example, the first unused reserved bit is selected as the second specified bit, which is not limited.

[0141] It can be understood that for the memory, the idle block generally has two modes of SLC and TLC, and even QLC, PLC, which are taken as examples here. When 1 idle block is used as SLC, the capacity is only one third of TLC, so when the idle block is set as SLC block, the write speed is fast but the capacity is small, and when the idle block is set as TLC block, the write speed is relatively slow but the capacity is 3 times that of SLC block. Therefore, writebooster is that the memory has a certain number of SLC idle blocks to deal with the burst write of the host, so that the write performance is good. Then, the data is moved from SLC to TLC when idle, so that the user does not perceive the slow. The object of pre-erase is SLC block, so pre-erase can be regarded as an enhanced use of writebooster. Therefore, by selecting a bit in the wExtendedWriteBoosterSupport field to indicate whether the memory supports the pre-erase function, the pre-erase function can be used in conjunction with the WriteBooster Feature.

[0142] As can be known from the foregoing description, the pre-erase function can be regarded as an enhanced function of the write booster, and thus the pre-erase function is usually associated with the Write Booster function. Therefore, by using Bit[3] of the wExtendedWriteBoosterSupport field as a discrimination bit for supporting the pre-erase function, the host can determine whether the device supports the Write Booster and the pre-erase function by querying the wExtendedWriteBoosterSupport field.

[0143] For example Figure 17 As shown in the Device Descriptor, Bit[3] is used as the second specified bit, that is, Bit[3] is used as a flag for indicating whether the memory device supports the pre-erase function. The second specified value is set to 1. If Bit[3] is 1, it indicates that the memory device supports the pre-erase function. If Bit[3] is not 1, for example, 0, it indicates that the memory device does not support the pre-erase function. Therefore, by selecting one unused bit, for example, Bit[3], in the wExtendedWriteBoosterSupport of the Device Descriptor as a discrimination bit for indicating whether the pre-erase function is supported, the embodiments of the present application and the Write Booster Feature can be used in combination, and whether the pre-erase function is supported can be marked in the form of a sub-function.

[0144] S1402: Interact with the memory through a pre-erase command to exchange pre-erase parameters.

[0145] It should be noted that the contents not described in detail in the above steps can refer to the foregoing embodiments, and will not be described here again.

[0146] Therefore, by selecting one bit in the dExtendedUFSFeaturesSupport field or the wExtendedWriteBoosterSupport field of the Device Descriptor as a discrimination bit for supporting the pre-erase function, and by agreeing on the value of the discrimination bit to determine whether the memory supports the pre-erase function, the memory whether supports the pre-erase function can be determined on the basis of the UFS protocol.

[0147] Please refer to Figure 18 which shows a structure block diagram of a memory management apparatus 1700 provided by an embodiment of the present application. The apparatus can include a determination unit and an interaction unit.

[0148] The determining unit 1701 is configured to determine a pre-erase parameter in a case where a current application scenario of the host belongs to a specified scenario, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold.

[0149] The interacting unit 1702 is configured to interact with the memory through a pre-erase command, and the pre-erase parameter includes at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory, and a pre-erase capacity currently configured by the host.

[0150] Further, the memory management apparatus further includes a constructing unit configured to construct a pre-erase command based on a specified field of the first command, wherein the first command includes a command supported by a protocol of the memory, and the specified field includes at least one of a reserved field and an extension field.

[0151] Further, the constructing unit is further configured to set a value of the extension field of the first command to a target identifier corresponding to the pre-erase function, and configure the first command as the pre-erase command, wherein a data area corresponding to the extension field is used to store the pre-erase parameter.

[0152] Further, the memory is a universal flash memory, the extension field is an EHS field, and the value of the unassigned function is 80H of the EHS field.

[0153] Further, the constructing unit is further configured to set a mode field in a second command, wherein the second command belongs to a command supported by the protocol of the memory; set the mode field of the second command to a specified value, and configure the second command as the pre-erase command, wherein the specified value is used to represent that a current function of the second command is the pre-erase function.

[0154] Further, the second command is at least one of a read command and a write command supported by the protocol of the memory, the read command is a Write Buffer command, and the write command is a Read Buffer command.

[0155] Further, the constructing unit is further configured to set the mode field between a first bit and a second bit of a specified byte in the second command.

[0156] Further, the specified byte is byte1, the first bit is bit0, and the second bit is bit4.

[0157] Further, the constructing unit is further configured to obtain the pre-erase command by newly defining an operation code in an interface protocol command set of the memory.

[0158] Further, the constructing unit is further configured to obtain the pre-erase command by defining a target attribute parameter in a parameter set of the specified request, wherein the target attribute parameter is used to transmit the pre-erase parameter.

[0159] Further, the determining unit 1701 is further configured to determine the pre-erase parameter if the memory supports the pre-erase function and the current application scenario of the host belongs to the specified scenario.

[0160] Further, the determining unit 1701 is further configured to obtain a value of a first specified bit in an extended feature support field of a device descriptor in a protocol of the memory; if the value of the first specified bit is a first specified value, it is determined that the memory supports the pre-erase function, otherwise, it is determined that the memory does not support the pre-erase function.

[0161] Further, the memory is a universal flash memory, the device descriptor is DeviceDescriptor, the extended feature support field is dExtendedUFSFeaturesSupport, and the first specified bit is Bit

[22] .

[0162] Further, the determining unit 1701 is further configured to obtain a value of a second specified bit in a write acceleration support field of a device descriptor in a protocol of the memory; if the value of the second specified bit is a second specified value, it is determined that the memory supports the pre-erase function, otherwise, it is determined that the memory does not support the pre-erase function.

[0163] Further, the memory is a universal flash memory, the device descriptor is DeviceDescriptor, the write acceleration support field is wExtendedWriteBoosterSupport, and the second specified bit is a reserved bit.

[0164] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described devices and modules can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0165] In several embodiments provided in the present application, the coupling between the modules can be electrical, mechanical or other forms of coupling.

[0166] In addition, each functional module in each embodiment of the present application can be integrated in one processing module, or each module can exist physically independently, or two or more modules can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software functional module.

[0167] Please refer to Figure 19FIG. 18 shows a structural block diagram of a computer readable medium according to an embodiment of the present application. The computer readable medium 1800 stores program codes, which can be invoked by a processor to execute the methods described in the above method embodiments.

[0168] The computer readable medium 1800 can be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read-only memory), an EPROM, a hard disk, or a ROM. Alternatively, the computer readable medium 1800 comprises a non-transitory computer readable medium. The computer readable medium 1800 has a storage space for program codes 1810 to execute any of the above methods. These program codes can be read from or written to one or more computer program products. The program codes 1810 can be compressed in a suitable form, for example.

[0169] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than limit the technical solutions thereof; even though the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some of the technical features thereof; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A memory management method characterized by comprising: A host applied to a storage system, the storage system further comprising a memory, the host being connected with the memory, the method comprising: In a case where a current application scenario of the host belongs to a specified scenario, determining a pre-erase parameter, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold; Interacting with the memory through a pre-erase command, wherein the pre-erase parameter comprises at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory, and a pre-erase capacity currently configured by the host; The method further comprises: In a case where a current application scenario of the host belongs to a specified scenario, determining a pre-erase parameter, wherein the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold; If the memory supports a pre-erase function, in a case where a current application scenario of the host belongs to a specified scenario, determining a pre-erase parameter; The method further comprises: Obtaining a value of a second specified bit of a write acceleration support field of a device descriptor in a protocol of the memory, the second specified bit being used to mark a pre-erase function; 2. The method of claim 1, wherein, If the value of the second specified bit is a second specified value, it is determined that the memory supports the pre-erase function, otherwise, it is determined that the memory does not support the pre-erase function. The method further comprises:

3. The method of claim 2, wherein, Based on a specified field of a first command, constructing a pre-erase command, wherein the first command comprises a command supported by a protocol of the memory, and the specified field comprises at least one of a reserved field and an extension field. The specified field is an extension field in the first command, and the constructing of the pre-erase command based on the specified field of the first command comprises:

4. The method of claim 3, wherein, By setting a value of the extension field of the first command, which is not assigned a function, to a target identifier corresponding to the pre-erase function, the first command is configured as the pre-erase command, wherein a data area corresponding to the extension field is used to store the pre-erase parameter.

5. The method of claim 4, wherein, The memory is a general flash memory, the extension field is an EHS field, and the value not assigned a function belongs to a specified value range of the EHS field.

6. The method of claim 5, wherein, The specified value range is 02H to 7FH or 80H to FFH.

7. The method of claim 1, wherein, The value not assigned a function is 80H of the EHS field. The method further comprises: Setting a mode field in a second command, wherein the second command belongs to a command supported by the protocol of the memory; 8. The method of claim 7, wherein, Setting the mode field of the second command to a specified value, and configuring the second command as the pre-erase command, wherein the specified value is used to represent that a current function of the second command is the pre-erase function.

9. The method of claim 7, wherein, The second command is at least one of a read command and a write command supported by the protocol of the memory, the read command is a Write Buffer command, and the write command is a Read Buffer command. The setting of the mode field in the second command comprises: A mode field is set between a first bit and a second bit of a specified byte in the second command.

10. The method of claim 9, wherein, The specified byte is byte1, the first bit is bit0, and the second bit is bit4.

11. The method of claim 1, wherein, Before the pre-erase parameter is interacted with the memory through the pre-erase command, the method further includes: The pre-erase command is obtained by newly defining an operation code in an interface protocol command set of the memory.

12. The method of claim 1, wherein, Before the pre-erase parameter is interacted with the memory through the pre-erase command, the method further includes: The pre-erase command is obtained by defining a target attribute parameter in a parameter set of a specified request, where the target attribute parameter is used to deliver the pre-erase parameter.

13. The method of claim 12, wherein, The specified request is a query request or a task management request.

14. The method of claim 1, wherein, The memory is a universal flash memory, the device descriptor is a Device Descriptor, the write acceleration support field is a wExtendedWriteBoosterSupport, and the second specified bit is a reserved bit corresponding to the write acceleration support field.

15. The method of claim 14, wherein, The second specified bit belongs to a range of bit3 to bit15.

16. The method of claim 15, wherein, The second specified bit is Bit3.

17. A memory management device, comprising: A host applied to a storage system, the storage system further including the memory, the host being connected with the memory, and the apparatus including: A determination unit configured to determine a pre-erase parameter in a case where a current application scenario of the host belongs to a specified scenario, where the specified scenario is used to represent that a data amount corresponding to to-be-written data is greater than a specified threshold. An interaction unit configured to interact with the memory through a pre-erase command to obtain a pre-erase parameter, where the pre-erase parameter includes at least one of a maximum pre-erase capacity supported by the memory, a current remaining pre-erase capacity of the memory, and a currently configured pre-erase capacity of the host. The determination unit is further configured to determine a pre-erase parameter in a case where a current application scenario of the host belongs to a specified scenario if the memory supports a pre-erase function. The determination unit is further configured to obtain a value of a second specified bit of a write acceleration support field of a device descriptor in a protocol of the memory; if the value of the second specified bit is a second specified value, it is determined that the memory supports a pre-erase function, otherwise, it is determined that the memory does not support a pre-erase function.

18. A storage system, characterized by The apparatus includes: a host; a memory; the host is connected with the memory, and the host is configured to execute the method according to any one of claims 1-16.

19. A computer readable medium characterized by The computer readable medium stores processor-executable program code, which, when executed by the processor, causes the processor to execute the method according to any one of claims 1-16.

20. A method of pre-erasing a memory, the method comprising: A memory applied to a storage system, the storage system further including a host, and the method including: obtaining a pre-erase parameter sent by the host, the pre-erase parameter including a currently configured pre-erase capacity; performing a pre-erase operation based on the pre-erase parameter; and performing a pre-erase operation based on the pre-erase parameter. The preset bit in the preset field of the device descriptor of the memory is used to represent whether the memory supports the pre-erase function; the preset field is a write acceleration support field of the device descriptor of the memory, and the preset bit is a second designated bit; the second designated bit of the write acceleration support field of the device descriptor of the memory is used to mark the pre-erase function, and a second designated value of the second designated bit is used to represent that the memory supports the pre-erase function.

21. The method of claim 20, wherein, The memory is a general flash memory, the device descriptor is a Device Descriptor, the write acceleration support field is wExtendedWriteBoosterSupport, and the second designated bit is a reserved bit corresponding to the write acceleration support field.

22. The method of claim 21, wherein, The second designated bit belongs to a range of bit3 to bit15.

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