Decoding method and device

By using the target prediction mode to predict and fill high-permission content during video/image decoding, the problem of visual separation between the privacy area and the non-private area when decoding is solved, and the user's viewing experience is improved.

CN120201202APending Publication Date: 2025-06-24HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202410084689.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-21
Filing Date
2024-01-19
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

During the video/image decoding process, low-privileged users cannot decode high-privileged content, resulting in a clear visual separation between the privacy areas and the non-privileged areas, affecting the user's viewing experience.

Method used

The target prediction mode is used to predict the high-permission content of the image, and generate predicted values ​​to fill the privacy area instead of using fixed values ​​to reduce the visual separation between the privacy area and the non-private area.

Benefits of technology

By filling high-permission content with predictions, users' viewing experience is improved and the visual separation between private areas and non-private areas is reduced.

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Abstract

The invention provides a decoding method and device, relates to the technical field of media, and aims to predict and fill a privacy area (privacy content) in a prediction mode in a decoding process, visually weaken the split feeling of a filled part and a surrounding environment and improve the watching experience of a user. The method comprises the following steps: analyzing a code stream, and obtaining a content permission identifier of a current coding unit, the content permission identifier being used for indicating whether the content of the current coding unit is a high permission content or a low permission content; and under the condition that the content permission identifier indicates that the content of the current coding unit is high-permission content and the user permission of the decoding end is low-permission, predicting the current coding unit by adopting a target prediction mode to obtain a predicted value of the current coding unit.
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Description

[0001] This application claims the priority of a Chinese patent application with the application number 202311779077.9 and the application title "A Decoding Method and Device" filed on December 21, 2023, the entire content of which is incorporated herein by reference. Technical Field

[0002] This application relates to the field of media technology, and in particular, to a decoding method and device. Background Art

[0003] During the encoding and decoding process of video / images, privacy protection may be involved. For example, for a frame of an image to be encoded, some regions are privacy regions and some regions are non-privacy regions. In the bitstream generated after the encoding end encodes the image to be encoded, one bitstream is the privacy bitstream obtained by encoding the privacy region, and another bitstream is the non-privacy bitstream obtained by encoding the non-privacy region and other bitstreams obtained by encoding other information (such as syntax elements).

[0004] Currently, at the decoding end, only when the user at the decoding end has a high privilege can the privacy bitstream be decoded. If the user's privilege is low, the decoding end will skip the decoding process of the privacy bitstream and directly fill all pixels in the privacy region with a fixed value, and then display the decoded image. This filling method makes the filled region in the image visually have an obvious sense of fragmentation from other regions, greatly affecting the user's viewing experience. Summary of the Invention

[0005] This application provides a decoding method and device. In the scenario where a user with low privilege decodes high-privilege content of an image, by appropriately predicting the high-privilege content of the image, the user's viewing experience can be improved.

[0006] This application adopts the following technical solutions:

[0007] In a first aspect, this application provides a decoding method, including: parsing a bitstream to obtain a content privilege identifier of a current coding unit, where the content privilege identifier is used to indicate whether the content of the current coding unit is high-privilege content; when the content privilege identifier indicates that the content of the current coding unit is high-privilege content and the user privilege at the decoding end is low, predicting the current coding unit using a target prediction mode to obtain a predicted value (which can also be referred to as a predicted sample) of the current coding unit.

[0008] The decoding method provided by this application, in the scenario where a user with low privilege decodes high-privilege content of an image, predicts the high-privilege content of the image through the target prediction mode to fill the privacy region, rather than filling it in a way of using a fixed value, weakening the visual sense of fragmentation between the privacy region and the non-privacy region in the image, and can improve the user's viewing experience.

[0009] In a possible implementation, the decoding method provided by the present application further includes: determining a reconstructed value of the current coding unit according to a predicted value of the current coding unit.

[0010] Optionally, the predicted value of the current coding unit may be used as the reconstructed value of the current coding unit.

[0011] In one implementation, reconstructing the current coding unit may include: predictive sample decoding and residual sample decoding. Among them, in the predictive sample decoding process, a target prediction mode is used for prediction to obtain a predicted value; in the sample decoding, the residual value of the coding unit is set to 0; after completing the predictive sample decoding and the residual sample decoding, prediction compensation is performed to obtain a compensated sample (adding the predicted value of the coding unit and the residual to obtain the reconstructed value of the coding unit at the encoding end).

[0012] In a possible implementation, the target prediction mode is a prediction mode set by the user, and the user can flexibly set the prediction mode according to requirements. The decoding end may provide an interface for the user to input the target prediction mode. For example, the user can specify a specific prediction mode by setting the decoding end command line parameter (such as privacy_stuff).

[0013] In a possible implementation, the target prediction mode is an intra prediction mode, and the intra prediction mode can be used to quickly predict the current coding unit.

[0014] In a possible implementation, the target prediction mode includes at least one of the following intra prediction modes: DC prediction mode, planar prediction mode, bilinear prediction mode, or angular prediction mode.

[0015] Optionally, the current coding unit may include a luminance component and / or a chrominance component. For the luminance component and the chrominance component of the same coding unit, the same intra prediction mode may be used, or different intra prediction modes may be used. If the coding unit includes a luminance component and a chrominance component, for example, the DC prediction mode is used to predict the luminance component, and the DC prediction mode is also used to predict the chrominance component; or for another example, the planar mode is used to predict the luminance component, and the DC prediction mode is used to predict the chrominance component.

[0016] The above target prediction mode should be a prediction mode supported by the decoder. Optionally, the target prediction mode may also be other intra prediction modes other than the above several intra prediction modes, that is, the target prediction mode can be extended. The user can set and expand it according to the actual required effect. Of course, the above target prediction mode may also be an inter prediction mode, which is not limited in the present application.

[0017] In one possible implementation, the permission protection mode of the current coding unit is the privacy protection single-layer coding mode. The privacy protection single-layer coding mode means that the coding end performs single-layer coding on the image to be coded, performs single-layer coding on both the privacy content and the non-privacy content, and the coded bitstream includes a privacy bitstream and a non-privacy bitstream.

[0018] In a second aspect, the present application provides a decoding device, which includes various modules for implementing the method described in the first aspect and any one of its possible implementations. The decoding device has the function of implementing the behaviors in the method example of any one of the above first aspect and its possible implementations. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0019] In a third aspect, the present application provides a decoding device, including at least one processor and a memory. The at least one processor executes a program or instruction stored in the memory so that the decoding device implements the method described in any one of the above first aspect or any of its possible implementations.

[0020] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium for storing a computer program, and the computer program includes a method for implementing the above first aspect or any of its possible implementations.

[0021] In a fifth aspect, an embodiment of the present application further provides a computer program product containing instructions, which, when running on a computer, enables the computer to implement the method described in any one of the above first aspect or any of its possible implementations.

[0022] In a sixth aspect, an embodiment of the present application further provides a chip, including: an input interface, an output interface, and at least one processor. Optionally, the chip further includes a memory. The at least one processor is used to execute the code in the memory, and when the at least one processor executes the code, the chip implements the method described in any one of the above first aspect or any of its possible implementations.

[0023] Optionally, the above chip may also be an integrated circuit.

[0024] The decoding device, computer storage medium, computer program product, and chip provided by the present application are all used to execute the decoding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the decoding method provided above, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1a is an exemplary block diagram of a decoding system provided by an embodiment of the present application;

[0026] Figure 1b An exemplary block diagram of a video decoding system provided by an embodiment of the present application;

[0027] Figure 2 An exemplary block diagram of a video encoder provided by an embodiment of the present application;

[0028] Figure 3 An exemplary block diagram of a video decoder provided by an embodiment of the present application;

[0029] Figure 4 An exemplary schematic diagram of a candidate image block provided by an embodiment of the present application;

[0030] Figure 5 An exemplary block diagram of a video decoding device provided by an embodiment of the present application;

[0031] Figure 6 An exemplary block diagram of a device provided by an embodiment of the present application;

[0032] Figure 7 One of the schematic diagrams of a decoding process provided by an embodiment of the present application;

[0033] Figure 8 Another schematic diagram of a decoding process provided by an embodiment of the present application;

[0034] Figure 9 One of the schematic flowcharts of a decoding method provided by an embodiment of the present application;

[0035] Figure 10 Another schematic flowchart of a decoding method provided by an embodiment of the present application;

[0036] Figure 11 A schematic diagram of a decoding device provided by an embodiment of the present application;

[0037] Figure 12 A schematic diagram of the structure of a chip provided by an embodiment of the present application;

[0038] Figure 13 A schematic diagram of the structure of an electronic device provided by an embodiment of the present application;

[0039] Figure 14 A schematic diagram of the structure of a decoding device provided by an embodiment of the present application. Detailed implementation manners

[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the scope of protection of the embodiments of the present application.

[0041] The term "and / or" in this document is merely a description of the association relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone.

[0042] In the description of the embodiments of the present application, the terms "first" and "second" in the specification and the accompanying drawings are used to distinguish different objects or different processes for the same object, rather than to describe the specific order of the objects.

[0043] In addition, the terms "include" and "have" and any variations thereof mentioned in the description of the embodiments of the present application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include other unlisted steps or units, or may optionally further include other steps or units inherent to these processes, methods, products, or devices.

[0044] It should be noted that in the description of the embodiments of the present application, words such as "exemplarily" or "for example" are used to give examples, illustrations, or explanations. Any embodiment or design solution described as "exemplarily" or "for example" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplarily" or "for example" is intended to present relevant concepts in a specific manner.

[0045] Data encoding and decoding include two parts: data encoding and data decoding. Data encoding is performed on the source side (or usually referred to as the encoder side), and generally includes processing (e.g., compressing) the original data to reduce the amount of data required to represent the original data (thereby enabling more efficient storage and / or transmission). Data decoding is performed on the destination side (or usually referred to as the decoder side), and generally includes performing inverse processing relative to the encoder side to reconstruct the original data. The "encoding and decoding" of the data involved in the embodiments of the present application should be understood as the "encoding" or "decoding" of the data. The encoding part and the decoding part are also collectively referred to as encoding and decoding (encoding and decoding, CODEC).

[0046] In the case of lossless data coding, the original data can be reconstructed, that is, the reconstructed original data has the same quality as the original data (assuming no transmission loss or other data loss during storage or transmission). In the case of lossy data coding, further compression is performed through quantization, etc., to reduce the amount of data required to represent the original data, and the decoder side cannot fully reconstruct the original data, that is, the quality of the reconstructed original data is lower or worse than that of the original data.

[0047] The embodiments of the present application can be applied to video data and other data with compression / decompression requirements, etc. The following takes the coding of video data (abbreviated as video coding) as an example to illustrate the embodiments of the present application. Other types of data (such as image data, audio data, integer data, and other data with compression / decompression requirements) can refer to the following description, and the embodiments of the present application will not be elaborated further. It should be noted that compared with video coding, during the coding process of data such as audio data and integer data, there is no need to divide the data into blocks, but the data can be directly coded.

[0048] Video coding generally refers to processing an image sequence that forms a video or video sequence. In the field of video coding, the terms "picture", "frame", or "image" can be used as synonyms.

[0049] Several video coding standards belong to "lossy hybrid video codecs" (that is, combining spatial and temporal prediction in the pixel domain with 2D transform coding for applying quantization in the transform domain). Each image in a video sequence is usually divided into a set of non-overlapping blocks, and coding is usually performed at the block level. In other words, the encoder usually processes and encodes the video at the block (video block) level. For example, prediction blocks are generated through spatial (intra-frame) prediction and temporal (inter-frame) prediction; the prediction blocks are subtracted from the current block (the currently processed / block to be processed) to obtain a residual block; the residual block is transformed and quantized in the transform domain to reduce the amount of data to be transmitted (compressed), and the decoder side applies the inverse processing part relative to the encoder to the encoded or compressed block to reconstruct the current block for representation. In addition, the encoder needs to repeat the processing steps of the decoder so that the encoder and the decoder generate the same predictions (such as intra-frame prediction and inter-frame prediction) and / or reconstruct pixels for processing, that is, for encoding subsequent blocks.

[0050] In the following embodiments of the decoding system 10, the encoder 20 and the decoder 30 are described according to Figures 1a to 3 are described.

[0051] Figure 1aAn exemplary block diagram of the decoding system 10 provided by the embodiments of the present application. For example, a video decoding system 10 (or simply referred to as the decoding system 10) that can utilize the technology of the embodiments of the present application. The video encoder 20 (or simply referred to as the encoder 20) and the video decoder 30 (or simply referred to as the decoder 30) in the video decoding system 10 represent devices that can be used to execute various techniques according to the various examples described in the embodiments of the present application.

[0052] As Figure 1a shown, the decoding system 10 includes a source device 12, and the source device 12 is used to provide encoded image data 21 such as encoded images to a destination device 14 for decoding the encoded image data 21.

[0053] The source device 12 includes an encoder 20, and additionally, optionally, may include an image source 16, a pre-processor (or pre-processing unit) 18 such as an image pre-processor, and a communication interface (or communication unit) 22.

[0054] The image source 16 may include or may be any type of image capture device for capturing real-world images, etc., and / or any type of image generation device, such as a computer graphics processor for generating computer animated images or any type of device for acquiring and / or providing real-world images, computer-generated images (e.g., screen content, virtual reality (VR) images, and / or any combination thereof (e.g., augmented reality (AR) images)). The above image source may be any type of memory or storage device for storing any of the above images.

[0055] To distinguish the processing performed by the pre-processor (or pre-processing unit) 18, the image (or image data) 17 may also be referred to as the original image (or original image data) 17.

[0056] The pre-processor 18 is used to receive the original image data 17 and pre-process the original image data 17 to obtain pre-processed images (or pre-processed image data) 19. For example, the pre-processing performed by the pre-processor 18 may include trimming, color format conversion (e.g., from RGB to YCbCr), color correction, or denoising. It can be understood that the pre-processing unit 18 may be an optional component.

[0057] The video encoder (or encoder) 20 is used to receive the pre-processed image data 19 and provide the encoded image data 21 (which will be further described below according to Figure 2 etc.).

[0058] The communication interface 22 in the source device 12 can be used to: receive the encoded image data 21 and send the encoded image data 21 (or any other processed version) to another device such as the destination device 14 or any other device through the communication channel 13 for storage or direct reconstruction.

[0059] The destination device 14 includes a decoder 30 and, additionally or alternatively, may include a communication interface (or communication unit) 28, a post-processor (or post-processing unit) 32, and a display device 34.

[0060] The communication interface 28 in the destination device 14 is used to directly receive the encoded image data 21 (or any other processed version) from the source device 12 or from any other source device such as a storage device. For example, the storage device is a storage device for the encoded image data, and provide the encoded image data 21 to the decoder 30.

[0061] The communication interface 22 and the communication interface 28 can be used to send or receive the encoded image data (or encoded data) 21 through a direct communication link between the source device 12 and the destination device 14, such as a direct wired or wireless connection, etc., or through any type of network, such as a wired network, a wireless network, or any combination thereof, any type of private network and public network, or any combination of any type thereof.

[0062] For example, the communication interface 22 can be used to encapsulate the encoded image data 21 into a suitable format such as a message, and / or use any type of transmission encoding or processing to process the above-mentioned encoded image data for transmission on the communication link or communication network.

[0063] The communication interface 28 corresponds to the communication interface 22. For example, it can be used to receive the transmission data and use any type of corresponding transmission decoding or processing and / or de-encapsulation to process the transmission data to obtain the encoded image data 21.

[0064] Both the communication interface 22 and the communication interface 28 can be configured as Figure 1a a unidirectional communication interface as indicated by the arrow of the corresponding communication channel 13 from the source device 12 to the destination device 14 in the figure, or a bidirectional communication interface, and can be used to send and receive messages, etc., to establish a connection, confirm and exchange any other information related to the communication link and / or data transmission such as the transmission of the encoded image data, etc.

[0065] The video decoder (or decoder) 30 is used to receive the encoded image data 21 and provide the decoded image data (or decoded image data) 31 (which will be further described below according to Figure 3 etc.).

[0066] The post-processor 32 is used to perform post-processing on the decoded image, such as the decoded image data 31 (also referred to as the reconstructed image data), to obtain post-processed image data 33 such as the post-processed image. The post-processing performed by the post-processing unit 32 may include, for example, color format conversion (e.g., from YCbCr to RGB), color grading, cropping, or resampling, or any other processing for generating the decoded image data 31 for display on the display device 34, etc.

[0067] The display device 34 is used to receive the post-processed image data 33 to display an image to a user, viewer, etc. The display device 34 may be or include any type of display for representing the reconstructed image, e.g., an integrated or external display screen or monitor. For example, the display screen may include a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other type of display screen.

[0068] The decoding system 10 further includes a training engine 25, which is used to train the encoder 20 (especially the entropy encoding unit 270 in the encoder 20) or the decoder 30 (especially the entropy decoding unit 304 in the decoder 30) to perform entropy encoding on the image blocks to be encoded according to the estimated probability distribution. For a detailed description of the training engine 25, please refer to the following method test examples.

[0069] Although Figure 1a the source device 12 and the destination device 14 are shown as separate devices, the device embodiments may also include both the source device 12 and the destination device 14 or the functions of both the source device 12 and the destination device 14 simultaneously, i.e., include both the source device 12 or the corresponding function and the destination device 14 or the corresponding function simultaneously. In these embodiments, the source device 12 or the corresponding function and the destination device 14 or the corresponding function may be implemented using the same hardware and / or software or by separate hardware and / or software or any combination thereof.

[0070] According to the description, Figure 1a the presence and (accurate) division of different units or functions in the shown source device 12 and / or destination device 14 may vary according to the actual device and application, which is obvious to those skilled in the art.

[0071] Please refer to Figure 1b , Figure 1bAn exemplary block diagram of a video decoding system 40 provided by an embodiment of the present application. The encoder 20 (e.g., video encoder 20) or the decoder 30 (e.g., video decoder 30) or both can be implemented by processing circuitry in the video decoding system 40 as shown in Figure 1b , for example, one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, video coding dedicated processors, or any combination thereof. Please refer to Figure 2 and Figure 3 . Figure 2 An exemplary block diagram of a video encoder provided by an embodiment of the present application. Figure 3 An exemplary block diagram of a video decoder provided by an embodiment of the present application. The encoder 20 can be implemented by processing circuitry 46 to include various modules discussed with reference to Figure 2 the encoder 20 and / or any other encoder system or subsystem described herein. The decoder 30 can be implemented by processing circuitry 46 to include various modules discussed with reference to Figure 3 the decoder 30 and / or any other decoder system or subsystem described herein. The above-mentioned processing circuitry 46 can be used to perform various operations discussed below. As shown in Figure 5 , if part of the technology is implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable storage medium and execute the instructions in hardware using one or more processors, thereby implementing the technology of the embodiments of the present application. One of the video encoder 20 and the video decoder 30 can be integrated as part of a combined codec (encoder / decoder, CODEC) in a single device, as shown in Figure 1b .

[0072] The source device 12 and the destination device 14 may include any of a variety of devices, including any type of handheld device or fixed device, such as a laptop or notebook computer, mobile phone, smartphone, tablet or tablet computer, camera, desktop computer, set-top box, television, display device, digital media player, video game console, video streaming device (e.g., a content service server or a content distribution server), a broadcast receiving device, a broadcast transmitting device, and a monitoring device, etc., and may or may not use any type of operating system. The source device 12 and the destination device 14 may also be devices in a cloud computing scenario, such as virtual machines in a cloud computing scenario. In some cases, the source device 12 and the destination device 14 may be equipped with components for wireless communication. Therefore, the source device 12 and the destination device 14 may be wireless communication devices.

[0073] The source device 12 and the destination device 14 may install virtual scene application programs (applications, APPs) such as virtual reality (VR) applications, augmented reality (AR) applications, or mixed reality (MR) applications, and may run VR applications, AR applications, or MR applications based on user operations (such as clicking, touching, swiping, shaking, voice control, etc.). The source device 12 and the destination device 14 may collect images / videos of any object in the environment through a camera and / or a sensor, and then display virtual objects on the display device according to the collected images / videos. The virtual objects may be virtual objects in a VR scene, an AR scene, or an MR scene (i.e., objects in a virtual environment).

[0074] It should be noted that in the embodiments of the present application, the virtual scene application programs in the source device 12 and the destination device 14 may be application programs built into the source device 12 and the destination device 14 themselves, or may be application programs provided by third-party service providers installed by users themselves, and no specific limitation is made thereto.

[0075] In addition, the source device 12 and the destination device 14 may install real-time video transmission applications, such as live broadcast applications. The source device 12 and the destination device 14 may collect images / videos through a camera, and then display the collected images / videos on the display device.

[0076] In some cases, Figure 1aThe illustrated video decoding system 10 is merely exemplary, and the techniques provided by embodiments of the present application are applicable to video coding settings (e.g., video encoding or video decoding), which may not necessarily include any data communication between an encoding device and a decoding device. In other examples, data is retrieved from local memory, sent over a network, and so on. A video encoding device may encode data and store the data in memory, and / or a video decoding device may retrieve data from memory and decode the data. In some examples, encoding and decoding are performed by devices that do not communicate with each other but only encode data into memory and / or retrieve and decode data from memory.

[0077] Please refer to Figure 1b , Figure 1b which is an exemplary block diagram of a video decoding system 40 provided by an embodiment of the present application. As Figure 1b shown, the video decoding system 40 may include an imaging device 41, a video encoder 20, a video decoder 30 (and / or a video codec implemented by a processing circuit 46), an antenna 42, one or more processors 43, one or more memory memories 44, and / or a display device 45.

[0078] As Figure 1b shown, the imaging device 41, the antenna 42, the processing circuit 46, the video encoder 20, the video decoder 30, the processor 43, the memory memory 44, and / or the display device 45 can communicate with each other. In different instances, the video decoding system 40 may include only the video encoder 20 or only the video decoder 30.

[0079] In some instances, antenna 42 can be used to transmit or receive an encoded bitstream of video data. Additionally, in some instances, display device 45 can be used to present video data. Processing circuitry 46 can include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and the like. Video decoding system 40 can also include optional processor 43, which can similarly include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and the like. Additionally, memory 44 can be any type of memory, such as volatile memory (e.g., static random access memory (SRAM), dynamic random access memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.). In a non-limiting example, memory 44 can be implemented by cache memory. In other instances, processing circuitry 46 can include memory (e.g., cache, etc.) for implementing an image buffer and the like.

[0080] In some instances, video encoder 20 implemented by logic circuitry can include an image buffer (e.g., implemented by processing circuitry 46 or memory 44) and a graphics processing unit (e.g., implemented by processing circuitry 46). The graphics processing unit can be communicatively coupled to the image buffer. The graphics processing unit can include video encoder 20 implemented by processing circuitry 46 to implement the various modules discussed with reference to Figure 2 and / or any other encoder system or subsystem described herein. The logic circuitry can be used to perform the various operations discussed herein.

[0081] In some instances, video decoder 30 can be implemented by processing circuitry 46 in a similar manner to implement video decoder 30 discussed with reference to Figure 3 and / or the various modules discussed with reference to any other decoder system or subsystem described herein. In some instances, video decoder 30 implemented by logic circuitry can include an image buffer (implemented by processing circuitry 46 or memory 44) and a graphics processing unit (e.g., implemented by processing circuitry 46). The graphics processing unit can be communicatively coupled to the image buffer. The graphics processing unit can include video decoder 30 implemented by processing circuitry 46 to implement the various modules discussed with reference to Figure 3 and / or any other decoder system or subsystem described herein.

[0082] In some examples, antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, etc. related to the encoded video frames discussed herein, such as data related to encoded partitions (e.g., transform coefficients or quantized transform coefficients, optional indicators as discussed, and / or data defining the encoded partitions). The video decoding system 40 may also include a video decoder 30 coupled to the antenna 42 and configured to decode the encoded bitstream. A display device 45 is used to present video frames.

[0083] It should be understood that for the examples described with reference to the video encoder 20 in the embodiments of the present application, the video decoder 30 may be used to perform the reverse process. Regarding signaling syntax elements, the video decoder 30 may be used to receive and parse such syntax elements and accordingly decode the relevant video data. In some examples, the video encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such examples, the video decoder 30 may parse such syntax elements and accordingly decode the relevant video data.

[0084] For ease of description, the embodiments of the present application are described with reference to the versatile video coding (VVC) reference software or the high-efficiency video coding (HEVC) developed by the video coding experts group (VCEG) of ITU-T and the joint collaboration team on video coding (JCT-VC) of the ISO / IEC motion picture experts group (MPEG). Those of ordinary skill in the art understand that the embodiments of the present application are not limited to HEVC or VVC.

[0085] Encoder and Encoding Method

[0086] As Figure 2 shown, the video encoder 20 includes an input terminal (or input interface) 201, a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a loop filter 220, a decoded picture buffer (DPB) 230, a mode selection unit 260, an entropy encoding unit 270, and an output terminal (or output interface) 272. The mode selection unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a partitioning unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown).Figure 2 The illustrated video encoder 20 may also be referred to as a hybrid video encoder or a video encoder based on a hybrid video codec.

[0087] See Figure 2 , the inter-frame prediction unit is a trained target model (also referred to as a neural network), and the neural network is used to process an input image or an image region or an image block to generate a predicted value of the input image block. For example, the neural network for inter-frame prediction is used to receive an input image or an image region or an image block and generate a predicted value of the input image or an image region or an image block.

[0088] The residual calculation unit 204, the transform processing unit 206, the quantization unit 208, and the mode selection unit 260 form the forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the inter-frame prediction unit 244, and the intra-frame prediction unit 254 form the backward signal path of the encoder, where the backward signal path of the encoder 20 corresponds to the signal path of the decoder (see Figure 3 the decoder 30 in). The inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer 230, the inter-frame prediction unit 244, and the intra-frame prediction unit 254 also form the "built-in decoder" of the video encoder 20.

[0089] Images and image segmentation (images and blocks)

[0090] The encoder 20 can be used to receive an image (or image data) 17 through the input terminal 201, etc. For example, an image in an image sequence forming a video or a video sequence. The received image or image data can also be a preprocessed image (or preprocessed image data) 19. For simplicity, the following description uses the image 17. The image 17 can also be referred to as the current image or the image to be encoded (especially when distinguishing the current image from other images in video coding, other images such as previously encoded and / or decoded images in the same video sequence, i.e., the video sequence that also includes the current image).

[0091] (Digital) images are or can be regarded as two-dimensional arrays or matrices composed of pixel points with intensity values. Pixel points in the array can also be referred to as pixels (pixel or pel, short for picture element). The number of pixel points in the array or image in the horizontal and vertical directions (or axes) determines the size and / or resolution of the image. To represent colors, usually three color components are adopted, that is, the image can be represented as or include three pixel point arrays. In the RGB format or color space, the image includes corresponding red, green, and blue pixel point arrays. However, in video coding, each pixel is usually represented in a luminance / chrominance format or color space, such as YCbCr, including a luminance component indicated by Y (sometimes also represented by L) and two chrominance components represented by Cb and Cr. The luminance component Y represents the luminance or gray-level intensity (for example, the two are the same in a grayscale image), while the two chrominance components Cb and Cr represent the chrominance or color information components. Accordingly, an image in the YCbCr format includes a luminance pixel point array of luminance pixel point values (Y) and two chrominance pixel point arrays of chrominance values (Cb and Cr). An image in the RGB format can be converted or transformed into the YCbCr format, and vice versa, and this process is also called color transformation or conversion. If the image is black and white, then the image can only include a luminance pixel point array. Accordingly, the image can be, for example, a luminance pixel point array in a monochrome format or a luminance pixel point array and two corresponding chrominance pixel point arrays in 4:2:0, 4:2:2, and 4:4:4 color formats.

[0092] In one embodiment, an embodiment of the video encoder 20 may include an image segmentation unit ( Figure 2 not shown in the figure) for segmenting the image 17 into a plurality of (usually non-overlapping) image blocks 203. These blocks may also be referred to as root blocks, macroblocks (H.264 / AVC), or coding tree blocks (CTB), or coding tree units (CTU) in the H.265 / HEVC and VVC standards. The segmentation unit can be used to use the same block size for all images in the video sequence and use a corresponding grid defining the block size, or change the block size between images or subsets of images or groups of images, and segment each image into corresponding blocks.

[0093] In other embodiments, the video encoder can be used to directly receive the blocks 203 of the image 17, for example, one, several, or all of the blocks constituting the above-mentioned image 17. The image block 203 can also be referred to as the current image block or the image block to be encoded.

[0094] Similar to Image 17, Image Block 203 is also or can be considered as a two-dimensional array or matrix composed of pixel points with intensity values (pixel values), but Image Block 203 is smaller than Image 17. In other words, Block 203 can include an array of pixel points (e.g., the luminance array in the case of a monochrome image 17 or the luminance array or chrominance arrays in the case of a color image) or three arrays of pixel points (e.g., one luminance array and two chrominance arrays in the case of a color image 17) or any other number and / or type of arrays according to the color format adopted. The number of pixel points in the horizontal and vertical directions (or axes) of Block 203 defines the size of Block 203. Accordingly, the block can be an array of M×N (M columns × N rows) pixel points, or an array of M×N transform coefficients, etc.

[0095] In one embodiment, Figure 2 the illustrated video encoder 20 is used to encode Image 17 block by block, for example, performing encoding and prediction on each Block 203.

[0096] In one embodiment, Figure 2 the illustrated video encoder 20 can also be used to segment and / or encode an image using slices (also called video slices), where the image can be segmented or encoded using one or more slices (usually non-overlapping). Each slice can include one or more blocks (e.g., Coding Tree Unit CTU) or one or more block groups (e.g., coding blocks (tile) in H.265 / HEVC / VVC standards and bricks in VVC standards).

[0097] In one embodiment, Figure 2 the illustrated video encoder 20 can also be used to segment and / or encode an image using slice / coding block group (also called video coding block group) and / or coding block (also called video coding block), where the image can be segmented or encoded using one or more slice / coding block groups (usually non-overlapping), each slice / coding block group can include one or more blocks (e.g., CTU) or one or more coding blocks, etc., where each coding block can be in a shape such as a rectangle and can include one or more complete or partial blocks (e.g., CTU).

[0098] Residual Calculation

[0099] The residual calculation unit 204 is used to calculate the residual block 205 based on the image block (or original block) 203 and the prediction block 265 (the prediction block 265 is introduced in detail later) in the following way: for example, subtracting the pixel value of the prediction block 265 from the pixel value of the image block 203 pixel by pixel (pixel by pixel) to obtain the residual block 205 in the pixel domain.

[0100] Transformation

[0101] The transform processing unit 206 is configured to perform a discrete cosine transform (DCT) or a discrete sine transform (DST), etc. on the pixel values of the residual block 205, to obtain transform coefficients 207 in the transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients, representing the residual block 205 in the transform domain.

[0102] The transform processing unit 206 can be used to apply an integer approximation of DCT / DST, such as the transform specified for H.265 / HEVC. Compared with the orthogonal DCT transform, this integer approximation is usually scaled by a certain factor. To maintain the norm of the residual block after forward and inverse transform processing, other scaling factors are used as part of the transform process. The scaling factors are usually selected according to certain constraints, such as the power of 2 used for shift operations, the bit depth of the transform coefficients, the trade-off between accuracy and implementation cost, etc. For example, at the encoder 20 side, a specific scaling factor is specified for the inverse transform by the inverse transform processing unit 212 (and at the decoder 30 side, a corresponding inverse transform is performed by, for example, the inverse transform processing unit 312), and correspondingly, at the encoder 20 side, a corresponding scaling factor can be specified for the forward transform by the transform processing unit 206.

[0103] In one embodiment, the video encoder 20 (correspondingly, the transform processing unit 206) can be used to output transform parameters such as the type of one or more transforms, for example, directly output or output after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the transform parameters for decoding.

[0104] Quantization

[0105] The quantization unit 208 is configured to quantize the transform coefficients 207 through, for example, scalar quantization or vector quantization, to obtain quantized transform coefficients 209. The quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209.

[0106] The quantization process can reduce the bit depth associated with some or all of the transform coefficients 207. For example, an n-bit transform coefficient can be rounded down to an m-bit transform coefficient during quantization, where n is greater than m. The degree of quantization can be modified by adjusting the quantization parameter (QP). For example, for scalar quantization, different degrees of scaling can be applied to achieve finer or coarser quantization. A smaller quantization step corresponds to finer quantization, while a larger quantization step corresponds to coarser quantization. The appropriate quantization step can be indicated by the quantization parameter (QP). For example, the quantization parameter can be an index of a predefined set of appropriate quantization steps. For example, a smaller quantization parameter can correspond to fine quantization (smaller quantization step), and a larger quantization parameter can correspond to coarse quantization (larger quantization step), and vice versa. Quantization can include dividing by the quantization step, and the corresponding or inverse dequantization performed by the dequantization unit 210 and the like can include multiplying by the quantization step. Embodiments according to some standards such as HEVC can be used to determine the quantization step using the quantization parameter. Generally, the quantization step can be calculated using a fixed-point approximation of an equation involving division based on the quantization parameter. Other scaling factors can be introduced for quantization and dequantization to recover the norm of the residual block that may be modified due to the scaling used in the fixed-point approximation of the equations for the quantization step and the quantization parameter. In one exemplary implementation, the scaling of the inverse transform and dequantization can be combined. Alternatively, a custom quantization table can be used and indicated from the encoder to the decoder in the bitstream. Quantization is a lossy operation, and the larger the quantization step, the greater the loss.

[0107] In one embodiment, the video encoder 20 (correspondingly, the quantization unit 208) can be used to output the quantization parameter (QP), for example, directly output or output after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the quantization parameter for decoding.

[0108] Dequantization

[0109] The dequantization unit 210 is used to perform the inverse quantization of the quantization unit 208 on the quantization coefficients to obtain the dequantized coefficients 211. For example, the inverse quantization scheme of the quantization scheme performed by the quantization unit 208 is performed according to or using the same quantization step as the quantization unit 208. The dequantized coefficients 211 can also be referred to as dequantized residual coefficients 211, corresponding to the transform coefficients 207. However, due to the loss caused by quantization, the dequantized coefficients 211 are usually not exactly the same as the transform coefficients.

[0110] Inverse transform

[0111] The inverse transform processing unit 212 is configured to perform an inverse transform of the transform performed by the transform processing unit 206, for example, an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), to obtain a reconstructed residual block 213 (or corresponding dequantized coefficients 213) in the pixel domain. The reconstructed residual block 213 may also be referred to as the transform block 213.

[0112] Reconstruction

[0113] The reconstruction unit 214 (e.g., an adder 214) is configured to add the transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the pixel domain, for example, by adding the pixel values of the reconstructed residual block 213 and the pixel values of the prediction block 265.

[0114] Filtering

[0115] The loop filter unit 220 (or simply referred to as the "loop filter" 220) is configured to filter the reconstructed block 215 to obtain a filtered block 221, or generally configured to filter the reconstructed pixels to obtain filtered pixel values. For example, the loop filter unit is configured to facilitate pixel transitions or improve video quality. The loop filter unit 220 may include one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 may include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process may be a deblocking filter, an SAO filter, and an ALF filter. As another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in-loop shaper) is added. This process is performed before deblocking. As another example, the deblocking filtering process may also be applied to internal sub-block edges, such as affine sub-block edges, ATMVP sub-block edges, sub-block transform (SBT) edges, and intra sub-partition (ISP) edges. Although the loop filter unit 220 is shown as a loop filter in Figure 2 it may be implemented as a post-loop filter in other configurations. The filtered block 221 may also be referred to as the filtered reconstructed block 221.

[0116] In one embodiment, the video encoder 20 (correspondingly, the loop filter unit 220) may be used to output loop filter parameters (such as SAO filter parameters, ALF filter parameters, or LMCS parameters), for example, directly output or output after entropy coding by the entropy coding unit 270, such that the decoder 30 can receive and use the same or different loop filter parameters for decoding.

[0117] Decoded picture buffer

[0118] The decoded picture buffer (DPB) 230 may be a reference image memory that stores reference image data for use by the video encoder 20 when encoding video data. The DPB 230 may be formed of any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. The decoded picture buffer 230 may be used to store one or more filtered blocks 221. The decoded picture buffer 230 may also be used to store other previously filtered blocks of the same current image or different images such as previous reconstructed images, e.g., previously reconstructed and filtered blocks 221, and may provide the complete previously reconstructed i.e., decoded image (and corresponding reference blocks and pixels) and / or partially reconstructed current image (and corresponding reference blocks and pixels), e.g., for inter-frame prediction. The decoded picture buffer 230 may also be used to store one or more unfiltered reconstructed blocks 215, or generally unfiltered reconstructed pixels, e.g., reconstructed blocks 215 that have not been filtered by the loop filter unit 220, or reconstructed blocks or reconstructed pixels that have not undergone any other processing.

[0119] Mode selection (partitioning and prediction)

[0120] The mode selection unit 260 includes a partitioning unit 262, an inter-frame prediction unit 244, and an intra-frame prediction unit 254, and is used to receive or obtain original image data such as the original block 203 (the current block 203 of the current image 17) and reconstructed image data from the decoded picture buffer 230 or other buffers (e.g., column buffer, Figure 2 not shown in the figure), e.g., filtered and / or unfiltered reconstructed pixels or reconstructed blocks of the same (current) image and / or one or more previous decoded images. The reconstructed image data is used as reference image data required for prediction such as inter-frame prediction or intra-frame prediction to obtain the predicted block 265 or predicted value 265.

[0121] The mode selection unit 260 can be used to determine or select a segmentation for the current block (including no segmentation) and a prediction mode (e.g., intra-frame or inter-frame prediction mode), and generate a corresponding prediction block 265 to calculate the residual block 205 and reconstruct the reconstructed block 215.

[0122] In one embodiment, the mode selection unit 260 can be used to select a segmentation and a prediction mode (e.g., from the prediction modes supported or available by the mode selection unit 260), where the above prediction mode provides the best match or the smallest residual (the smallest residual means better compression in transmission or storage), or provides the smallest signaling overhead (the smallest signaling overhead means better compression in transmission or storage), or considers or balances both of the above at the same time. The mode selection unit 260 can be used to determine the segmentation and the prediction mode according to rate distortion Optimization (RDO), that is, select the prediction mode that provides the smallest rate distortion optimization. The terms "best", "lowest", "optimal", etc. in this article do not necessarily refer to "the best", "the lowest", "the optimal" in general, but can also refer to the situation that meets the termination or selection criteria. For example, values or other limitations that exceed or are lower than the threshold may lead to a "sub-optimal choice", but will reduce the complexity and processing time.

[0123] In other words, the segmentation unit 262 can be used to segment the images in the video sequence into a sequence of coding tree units (CTUs). The CTU 203 can be further segmented into smaller block parts or sub-blocks (forming blocks again). For example, by iteratively using quadtree (QT) partitioning, binary tree (BT) partitioning, or triple-tree (TT) partitioning or any combination thereof, and used to perform predictions on, for example, each of the block parts or sub-blocks, where mode selection includes selecting the tree structure for segmenting the block 203 and selecting the prediction mode applied to each of the block parts or sub-blocks.

[0124] The segmentation (e.g., performed by the segmentation unit 262) and prediction processing (e.g., performed by the inter-frame prediction unit 244 and the intra-frame prediction unit 254) performed by the video encoder 20 will be described in detail below.

[0125] Segmentation

[0126] The splitting unit 262 may split (or divide) an image block (or CTU) 203 into smaller parts, such as small blocks in a square or rectangular shape. For an image with an array of three pixel points, one CTU consists of an N×N block of luminance pixel points and two corresponding chrominance pixel point blocks. The maximum allowable size of the luminance block in the versatile video coding (VVC) standard under development is specified as 128×128, but it may be specified as a value different from 128×128 in the future, such as 256×256. The CTUs of an image may be grouped / concentrated into slices / coding tree units, coding tree blocks, or tiles. One coding tree block covers a rectangular area of an image, and one coding tree block may be divided into one or more tiles. One tile consists of multiple CTU rows within one coding tree block. A coding tree block that is not divided into multiple tiles may be called a tile. However, a tile is a true subset of a coding tree block and thus is not called a coding tree block. The VVC supports two coding tree unit modes, namely the raster scan slice / coding tree unit mode and the rectangular slice mode. In the raster scan coding tree unit mode, one slice / coding tree unit contains a sequence of coding tree blocks in the raster scan of the coding tree blocks of an image. In the rectangular slice mode, a slice contains multiple tiles of an image, and these tiles together form a rectangular area of the image. The tiles within a rectangular slice are arranged in the tile raster scan order of the slice. These smaller blocks (which may also be called sub-blocks) may be further split into even smaller parts. This is also called tree splitting or hierarchical tree splitting, where a root block at the root tree level 0 (hierarchical level 0, depth 0), etc., can be recursively split into two or more blocks at the next lower tree level, such as nodes at tree level 1 (hierarchical level 1, depth 1). These blocks can in turn be split into two or more blocks at the next lower level, such as tree level 2 (hierarchical level 2, depth 2), etc., until the splitting ends (because an end criterion is met, such as reaching the maximum tree depth or the minimum block size). Blocks that are not further split are also called leaf blocks or leaf nodes of the tree. A tree split into two parts is called a binary-tree (BT), a tree split into three parts is called a ternary-tree (TT), and a tree split into four parts is called a quad-tree (QT).

[0127] For example, a coding tree unit (CTU) may be or include a CTB of luminance pixel points, two corresponding CTBs of chrominance pixel points of an image having three pixel point arrays, or a CTB of pixel points of a monochrome image or a CTB of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Correspondingly, a coding tree block (CTB) may be an N×N pixel point block, where N may be set to a certain value such that components are divided into CTBs, and this is segmentation. A coding unit (CU) may be or include a coding block of luminance pixel points, two corresponding coding blocks of chrominance pixel points of an image having three pixel point arrays, or a coding block of pixel points of a monochrome image or a coding block of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Correspondingly, a coding block (CB) may be an M×N pixel point block, where M and N may be set to a certain value such that a CTB is divided into coding blocks, and this is segmentation.

[0128] For example, in an embodiment, according to HEVC, a coding tree unit (CTU) may be divided into multiple CUs by using a quadtree structure represented as a coding tree. A decision is made at the leaf CU level as to whether to use inter (temporal) prediction or intra (spatial) prediction to encode an image region. Each leaf CU may be further divided into one, two, or four PUs according to the PU partition type. The same prediction process is used within one PU, and relevant information is transmitted to the decoder in units of PUs. After obtaining a residual block by applying a prediction process according to the PU partition type, a leaf CU may be segmented into transform units (TUs) according to another quadtree structure similar to the coding tree used for CUs.

[0129] For example, in an embodiment, according to the latest video coding standard currently under development (referred to as Versatile Video Coding (VVC)), a combined quadtree using nested multi-type trees (such as binary trees and ternary trees) is used to divide the segmentation structure for segmenting coding tree units. In the coding tree structure within a coding tree unit, a CU can be square or rectangular. For example, a coding tree unit (CTU) is first segmented by a quadtree structure. The quadtree leaf nodes are further segmented by a multi-type tree structure. The multi-type tree structure has four partitioning types: vertical binary tree partitioning (SPLIT_BT_VER), horizontal binary tree partitioning (SPLIT_BT_HOR), vertical ternary tree partitioning (SPLIT_TT_VER), and horizontal ternary tree partitioning (SPLIT_TT_HOR). The multi-type tree leaf nodes are called coding units (CUs), unless the CU is too large for the maximum transform length, and such segments are used for prediction and transform processing without any further segmentation. In most cases, this means that the CU, PU, and TU have the same block size in the coding block structure of the quadtree nested multi-type tree. This exception occurs when the maximum supported transform length is less than the width or height of the color component of the CU. VVC has developed a unique signaling mechanism for the segmentation partitioning information in the coding structure with a quadtree nested multi-type tree. In the signaling mechanism, the coding tree unit (CTU), as the root of the quadtree, is first segmented by the quadtree structure. Then each quadtree leaf node (when large enough to be) is further segmented into a multi-type tree structure. In the multi-type tree structure, it is indicated by a first identifier (mtt_split_cu_flag) whether the node is further segmented. When the node is further segmented, the partitioning direction is first indicated by a second identifier (mtt_split_cu_vertical_flag), and then it is indicated by a third identifier (mtt_split_cu_binary_flag) whether the partitioning is a binary tree partitioning or a ternary tree partitioning. According to the values of mtt_split_cu_vertical_flag and mtt_split_cu_binary_flag, the decoder can derive the multi-type tree partitioning mode (MttSplitMode) of the CU based on predefined rules or tables. It should be noted that for a certain design, such as the 64×64 luma block and 32×32 chroma pipeline design in a VVC hardware decoder, when the width or height of the luma coding block is greater than 64, TT partitioning is not allowed. When the width or height of the chroma coding block is greater than 32, TT partitioning is also not allowed. The pipeline design divides the image into multiple virtual pipeline data units (VPDUs), and each VPDU is defined as non-overlapping units in the image. In the hardware decoder, consecutive VPDUs are processed simultaneously in multiple pipeline stages. In most pipeline stages, the VPDU size is roughly proportional to the buffer size, so it is necessary to keep the VPDU small.In most hardware decoders, the VPDU size can be set to the maximum transform block (TB) size. However, in VVC, the splitting of the ternary tree (TT) and binary tree (BT) may increase the VPDU size.

[0130] In addition, it should be noted that when a part of a tree node block exceeds the bottom or the right image boundary, the tree node block is forced to be divided until all pixel points of each coded CU are within the image boundary.

[0131] For example, the above-mentioned intra sub-partitions (ISP) tool can vertically or horizontally divide the luma intra prediction block into two or four sub-parts according to the block size.

[0132] In one example, the mode selection unit 260 of the video encoder 20 can be used to perform any combination of the segmentation techniques described above.

[0133] As described above, the video encoder 20 is used to determine or select the best or optimal prediction mode from a (predetermined) set of prediction modes. The set of prediction modes may include, for example, intra prediction modes and / or inter prediction modes.

[0134] Intra Prediction

[0135] The set of intra prediction modes may include 35 different intra prediction modes. For example, non-directional modes such as the DC (or mean) mode and the planar mode, or directional modes defined as in HEVC, or may include 67 different intra prediction modes. For example, some traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks defined in VVC. Another example is that in order to avoid the division operation of DC prediction, only the longer side is used to calculate the average value of non-square blocks. Also, the intra prediction result of the planar mode can be modified using the position-dependent intra prediction combination (PDPC) method.

[0136] The intra prediction unit 254 is used to generate an intra prediction block 265 by reconstructing pixel points using adjacent blocks of the same current image according to the intra prediction mode in the set of intra prediction modes.

[0137] The intra-frame prediction unit 254 (or generally the mode selection unit 260) is also used to output intra-frame prediction parameters (or generally information indicating the selected intra-frame prediction mode of the block) in the form of syntax elements 266 to the entropy coding unit 270 for inclusion in the encoded image data 21, so that the video decoder 30 can perform operations, such as receiving and using the prediction parameters for decoding.

[0138] The intra prediction modes in HEVC include DC prediction mode, plane prediction mode and 33 angle prediction modes, with a total of 35 candidate prediction modes. The current block can use the pixels of the reconstructed image blocks on the left and above as references for intra prediction. The image blocks in the surrounding area of ​​the current block used for intra prediction of the current block become reference blocks, and the pixels in the reference blocks are called reference pixels. Among the 35 candidate prediction modes, the DC prediction mode is applicable to the area with flat texture in the current block, and all pixels in this area use the average value of the reference pixels in the reference block as prediction; the plane prediction mode is applicable to image blocks with smoothly changing textures. The current block that meets this condition uses the reference pixels in the reference block for bilinear interpolation as the prediction of all pixels in the current block; the angle prediction mode uses the characteristics that the texture of the current block is highly correlated with the texture of the adjacent reconstructed image blocks, and copies the values ​​of the reference pixels in the corresponding reference block along a certain angle as the prediction of all pixels in the current block.

[0139] The HEVC encoder selects an optimal intra-frame prediction mode for the current block from 35 candidate prediction modes and writes the optimal intra-frame prediction mode into the video bitstream. To improve the coding efficiency of intra-frame prediction, the encoder / decoder derives three most likely modes from the optimal intra-frame prediction modes of the reconstructed image blocks in the surrounding area using intra-frame prediction. If the optimal intra-frame prediction mode selected for the current block is one of the three most likely modes, a first index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the three most likely modes; if the selected optimal intra-frame prediction mode is not one of the three most likely modes, a second index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the other 32 modes (other modes among the 35 candidate prediction modes except the aforementioned three most likely modes). The HEVC standard uses a 5-bit fixed-length code as the aforementioned second index.

[0140] The methods for the HEVC encoder to derive the three most probable modes include: selecting the optimal intra prediction modes of the left adjacent picture block and the upper adjacent picture block of the current block and putting them into a set. If the two optimal intra prediction modes are the same, only one of them needs to be retained in the set. If the two optimal intra prediction modes are the same and both are angular prediction modes, then select two angular prediction modes adjacent to this angular direction and add them to the set; otherwise, sequentially select the planar prediction mode, the DC mode, and the vertical prediction mode and add them to the set until the number of modes in the set reaches 3.

[0141] After the HEVC decoder performs entropy decoding on the bitstream, it obtains the mode information of the current block. This mode information includes an indication flag indicating whether the optimal intra prediction mode of the current block is among the three most probable modes, and the index of the optimal intra prediction mode of the current block among the three most probable modes or the index of the optimal intra prediction mode of the current block among the other 32 modes.

[0142] Inter-frame prediction

[0143] In a possible implementation, the inter-frame prediction mode set depends on the available reference images (i.e., for example, at least part of the previously decoded images stored in the DBP 230 as described above) and other inter-frame prediction parameters. For example, it depends on whether to use the entire reference image or only a part of the reference image, such as a search window area near the region of the current block, to search for the best-matching reference block, and / or for example, it depends on whether to perform pixel interpolation such as half-pixel, quarter-pixel, and / or sixteenth-pixel interpolation.

[0144] In addition to the above prediction modes, a skip mode and / or a direct mode can also be adopted.

[0145] For example, for extended merge prediction, the merge candidate list for this mode consists of the following five candidate types in order: spatial MVP from spatially adjacent CUs, temporal MVP from collocated CUs, history-based MVP from the FIFO table, pairwise average MVP, and zero MV. Decoder side motion vector refinement (DMVR) based on bilateral matching can be used to increase the accuracy of the MVs in the merge mode. The merge mode with MVD (MMVD) comes from the merge mode with motion vector difference. The MMVD flag is sent immediately after the skip flag and the merge flag to specify whether the CU uses the MMVD mode. An adaptive motion vector resolution (AMVR) scheme for the CU level can be used. AMVR supports encoding the MVD of the CU with different precisions. The MVD of the current CU is adaptively selected according to the prediction mode of the current CU. When the CU is encoded in the merge mode, the combined inter / intra prediction (CIIP) mode can be applied to the current CU. The inter and intra prediction signals are weighted and averaged to obtain the CIIP prediction. For affine motion compensation prediction, the affine motion field of the block is described by the motion information of the motion vectors of 2 control points (4 parameters) or 3 control points (6 parameters). Subblock-based temporal motion vector prediction (SbTMVP), similar to the temporal motion vector prediction (TMVP) in HEVC, predicts the motion vectors of the sub-CUs within the current CU. Bi-directional optical flow (BDOF), formerly known as BIO, is a simplified version that reduces computations, especially in terms of the number of multiplications and the size of the multipliers. In the triangular partitioning mode, the CU is evenly partitioned into two triangular parts in two partitioning ways: diagonal partitioning and anti-diagonal partitioning. In addition, the bi-directional prediction mode is extended based on simple averaging to support weighted averaging of two prediction signals.

[0146] The inter prediction unit 244 may include a motion estimation (ME) unit and a motion compensation (MC) unit (both are in Figure 2(not shown in the figure). The motion estimation unit can be used to receive or obtain the image block 203 (the current image block 203 of the current image 17) and the decoded image 231, or at least one or more previously reconstructed blocks, for example, the reconstructed blocks of one or more other / different previously decoded images 231, to perform motion estimation. For example, the video sequence may include the current image and the previous decoded image 231, or in other words, the current image and the previous decoded image 231 may be part of the image sequence forming the video sequence or form the image sequence.

[0147] For example, the encoder 20 can be used to select a reference block from multiple reference blocks of the same or different images in multiple other images, and provide the reference image (or reference image index) and / or the offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block as an inter-frame prediction parameter to the motion estimation unit. This offset is also called a motion vector (MV).

[0148] The motion compensation unit is used to obtain, for example, receive, the inter-frame prediction parameter, and perform inter-frame prediction according to or using the inter-frame prediction parameter to obtain the inter-frame prediction block 246. The motion compensation performed by the motion compensation unit may include extracting or generating a prediction block according to the motion / block vector determined by motion estimation, and may also include performing interpolation with sub-pixel accuracy. The interpolation filter can generate pixel points of other pixels from the pixel points of known pixels, thereby potentially increasing the number of candidate prediction blocks available for encoding the image block. Once the motion vector corresponding to the PU of the current image block is received, the motion compensation unit can locate the prediction block pointed to by the motion vector in one of the reference image lists.

[0149] The motion compensation unit can also generate syntax elements related to the block and the video slice for the video decoder 30 to use when decoding the image blocks of the video slice. Additionally, or as an alternative to the slice and the corresponding syntax elements, coded block groups and / or coded blocks and the corresponding syntax elements can be generated or used.

[0150] In the process of obtaining the candidate motion vector list in the advanced motion vector prediction (AMVP) mode, the motion vectors (MVs) that can be added to the candidate motion vector list as an alternative include the MVs of the spatially adjacent and temporally adjacent image blocks of the current block, where the MVs of the spatially adjacent image blocks can include the MVs of the left candidate image block located on the left side of the current block and the MVs of the upper candidate image block located above the current block. Exemplarily, please refer to Figure 4 , Figure 4 which is an exemplary schematic diagram of the candidate image block provided by the embodiment of the present application, such as Figure 4As shown, the set of candidate image blocks on the left includes {A0, A1}, the set of candidate image blocks above includes {B0, B1, B2}, and the set of temporally adjacent candidate image blocks includes {C, T}. All three of these sets can be added as alternatives to the candidate motion vector list. However, according to the existing coding standard, the maximum length of the candidate motion vector list for AMVP is 2. Therefore, it is necessary to determine the MVs of up to two image blocks to be added to the candidate motion vector list from the three sets according to the specified order. This order can be to first consider the set of candidate image blocks on the left of the current block {A0, A1} (first consider A0, and if A0 is not available, then consider A1), secondly consider the set of candidate image blocks above the current block {B0, B1, B2} (first consider B0, if B0 is not available, then consider B1, and if B1 is not available, then consider B2), and finally consider the set of temporally adjacent candidate image blocks of the current block {C, T} (first consider T, and if T is not available, then consider C).

[0151] After obtaining the above candidate motion vector list, the optimal MV is determined from the candidate motion vector list through the rate distortion cost (RDcost), and the candidate motion vector with the minimum RD cost is used as the motion vector predictor (MVP) of the current block. The rate distortion cost is calculated by the following formula:

[0152] J = SAD + λR

[0153] Where J represents the RD cost, SAD is the sum of absolute differences (SAD) between the pixel values of the predicted block obtained by motion estimation using the candidate motion vector and the pixel values of the current block, R represents the bitrate, and λ represents the Lagrange multiplier.

[0154] The encoder transmits the index of the determined MVP in the candidate motion vector list to the decoder. Further, a motion search can be performed within the neighborhood centered on the MVP to obtain the actual motion vector of the current block. The encoder calculates the motion vector difference (MVD) between the MVP and the actual motion vector and also transmits the MVD to the decoder. The decoder parses the index, finds the corresponding MVP in the candidate motion vector list according to the index, parses the MVD, and adds the MVD to the MVP to obtain the actual motion vector of the current block.

[0155] In the process of obtaining the candidate motion information list in the Merge mode, the motion information that can be added to the candidate motion information list as an alternative includes the motion information of spatially or temporally adjacent image blocks of the current block, where the spatially adjacent image blocks and temporally adjacent image blocks can be referred to Figure 4 , the candidate motion information corresponding to the spatial domain in the candidate motion information list comes from 5 spatially adjacent blocks (A0, A1, B0, B1, and B2). If the spatially adjacent blocks are not available or are intra-frame predicted, their motion information is not added to the candidate motion information list. The candidate motion information in the temporal domain of the current block is obtained by scaling the MV of the corresponding block in the reference frame according to the picture order count (POC) of the reference frame and the current frame. First, it is judged whether the block at position T in the reference frame is available. If it is not available, the block at position C is selected. After obtaining the above candidate motion information list, the optimal motion information is determined from the candidate motion information list through the RD cost as the motion information of the current block. The encoding end transmits the index value of the position of the optimal motion information in the candidate motion information list (denoted as mergeindex) to the decoding end.

[0156] Entropy coding

[0157] The entropy coding unit 270 is used to apply an entropy coding algorithm or scheme (for example, variable length coding (VLC) scheme, context adaptive VLC scheme (CALVC), arithmetic coding scheme, binarization algorithm, context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or other entropy coding methods or techniques) to the quantized residual coefficients 209, inter-frame prediction parameters, intra-frame prediction parameters, loop filter parameters, and / or other syntax elements, to obtain encoded image data 21 that can be output in the form of an encoded bitstream 21 through the output terminal 272, so that a video decoder 30, etc. can receive and use the parameters for decoding. The encoded bitstream 21 can be transmitted to the video decoder 30 or stored in a memory for later transmission or retrieval by the video decoder 30.

[0158] Other structural variants of the video encoder 20 can be used to encode a video stream. For example, a non-transform-based encoder 20 can directly quantize the residual signal in the case where some blocks or frames do not have a transform processing unit 206. In another implementation, the encoder 20 can have a quantization unit 208 and an inverse quantization unit 210 combined into a single unit.

[0159] Decoder and decoding method

[0160] As Figure 3 shown, the video decoder 30 is used to receive encoded image data 21 (e.g., an encoded bitstream 21) encoded by, for example, the encoder 20, and obtain a decoded image 331. The encoded image data or bitstream includes information for decoding the above-mentioned encoded image data, such as data representing image blocks of an encoded video slice (and / or an encoded group of blocks or an encoded block) and related syntax elements.

[0161] In Figure 3 the example of, the decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., an adder 314), a loop filter 320, a decoded image buffer (DBP) 330, a mode application unit 360, an inter prediction unit 344, and an intra prediction unit 354. The inter prediction unit 344 can be or include a motion compensation unit. In some examples, the video decoder 30 can perform a decoding process that is generally opposite to the encoding process described with reference to Figure 2 the video encoder 100.

[0162] As in the encoder 20 above, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded image buffer DPB 230, the inter prediction unit 344, and the intra prediction unit 354 also form the "built-in decoder" of the video encoder 20. Correspondingly, the inverse quantization unit 310 can be functionally the same as the inverse quantization unit 110, the inverse transform processing unit 312 can be functionally the same as the inverse transform processing unit 122, the reconstruction unit 314 can be functionally the same as the reconstruction unit 214, the loop filter 320 can be functionally the same as the loop filter 220, and the decoded image buffer 330 can be functionally the same as the decoded image buffer 230. Therefore, the explanations of the corresponding units and functions of the video encoder 20 correspondingly apply to the corresponding units and functions of the video decoder 30.

[0163] Entropy decoding

[0164] The entropy decoding unit 304 is used to parse the bitstream 21 (or generally the encoded image data 21) and perform entropy decoding on the encoded image data 21 to obtain quantization coefficients 309 and / or decoded encoded parameters ( Figure 3not shown in the figure), etc., such as any one or all of inter-frame prediction parameters (e.g., reference image index and motion vector), intra-frame prediction parameters (e.g., intra-frame prediction mode or index), transform parameters, quantization parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 can be used to apply the decoding algorithm or scheme corresponding to the encoding scheme of the entropy encoding unit 270 of the encoder 20. The entropy decoding unit 304 can also be used to provide inter-frame prediction parameters, intra-frame prediction parameters, and / or other syntax elements to the mode application unit 360, and provide other parameters to other units of the decoder 30. The video decoder 30 can receive syntax elements at the video slice and / or video block level. Additionally, or as an alternative to the slice and the corresponding syntax elements, coded block groups and / or coded blocks and the corresponding syntax elements can be received or used.

[0165] In some implementations, the video decoder 30 can include multiple entropy decoding units 304. For example, in a privacy protection scenario, the bitstream obtained by encoding video images includes a privacy bitstream and a non-privacy bitstream. Therefore, the video decoder 30 can include two entropy decoding units 304. Among them, one entropy decoding unit 304 is used to parse the privacy bitstream in the bitstream, and the other entropy decoding unit 304 is used to parse the non-privacy bitstream in the bitstream.

[0166] Inverse quantization

[0167] The inverse quantization unit 310 can be used to receive a quantization parameter (QP) (or generally information related to inverse quantization) and quantization coefficients from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304), and inverse-quantize the decoded quantization coefficients 309 based on the above quantization parameter to obtain inverse quantization coefficients 311. The inverse quantization coefficients 311 can also be referred to as transform coefficients 311. The inverse quantization process can include using the quantization parameter calculated by the video encoder 20 for each video block in the video slice to determine the quantization degree, and also determine the degree of inverse quantization to be performed.

[0168] Inverse transform

[0169] The inverse transform processing unit 312 can be used to receive the dequantized coefficients 311, also referred to as transform coefficients 311, and apply a transform to the dequantized coefficients 311 to obtain a reconstructed residual block 213 in the pixel domain. The reconstructed residual block 213 can also be referred to as a transform block 313. The transform can be an inverse transform, such as an inverse DCT, inverse DST, inverse integer transform, or a conceptually similar inverse transform process. The inverse transform processing unit 312 can also be used to receive transform parameters or corresponding information from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304) to determine the transform to be applied to the dequantized coefficients 311.

[0170] Reconstruction

[0171] The reconstruction unit 314 (e.g., adder 314) is used to add the reconstruction residual block 313 to the prediction block 365 to obtain the reconstruction block 315 in the pixel domain. For example, the pixel values of the reconstruction residual block 313 and the pixel values of the prediction block 365 are added together.

[0172] Filtering

[0173] The loop filter unit 320 (in or after the encoding loop) is used to filter the reconstruction block 315 to obtain the filtered block 321, so as to smoothly perform pixel transformation or improve video quality, etc. The loop filter unit 320 may include one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 may include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process may be a deblocking filter, an SAO filter, and an ALF filter. For another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in-loop shaper) is added. This process is performed before deblocking. For another example, the deblocking filtering process may also be applied to internal sub-block edges, such as affine sub-block edges, ATMVP sub-block edges, sub-block transform (SBT) edges, and intra sub-partition (ISP) edges. Although the loop filter unit 320 is Figure 3 shown as a loop filter in [description], in other configurations, the loop filter unit 320 may be implemented as a post-loop filter.

[0174] Decoded picture buffer

[0175] Subsequently, the decoded video block 321 in an image is stored in the decoded picture buffer 330. The decoded picture buffer 330 stores the decoded picture 331 as a reference picture, and the reference picture is used for subsequent motion compensation of other pictures and / or output for display respectively.

[0176] The decoder 30 is used to output the decoded picture 311 through the output terminal 312, etc., for the user to display or view.

[0177] Prediction

[0178] The inter-frame prediction unit 344 can be functionally the same as the inter-frame prediction unit 244 (especially the motion compensation unit), and the intra-frame prediction unit 354 can be functionally the same as the inter-frame prediction unit 254, and decides on the division or segmentation and performs prediction based on the segmentation and / or prediction parameters or corresponding information received from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304). The mode application unit 360 can be used to perform prediction (intra-frame or inter-frame prediction) for each block according to the reconstructed image, block, or corresponding pixel points (filtered or unfiltered), to obtain the predicted block 365.

[0179] When encoding a video slice as an intra-coded (I) slice, the intra-frame prediction unit 354 in the mode application unit 360 is used to generate the predicted block 365 for the image block of the current video slice according to the indicated intra-frame prediction mode and the data of the previously decoded blocks from the current image. When the video image is encoded as an inter-coded (i.e., B or P) slice, the inter-frame prediction unit 344 (e.g., the motion compensation unit) in the mode application unit 360 is used to generate the predicted block 365 for the video block of the current video slice according to the motion vector and other syntax elements received from the entropy decoding unit 304. For inter-frame prediction, these predicted blocks can be generated from one of the reference images in one of the reference image lists. The video decoder 30 can construct the reference frame lists 0 and 1 using the default construction technique according to the reference images stored in the DPB 330. In addition to or as an alternative to a slice (e.g., a video slice), the same or similar process can be applied to embodiments of the coded block group (e.g., the video coded block group) and / or the coded block (e.g., the video coded block), for example, the video can be encoded using I, P, or B coded block groups and / or coded blocks.

[0180] The mode application unit 360 is used to determine the prediction information for the video block of the current video slice by parsing the motion vector and other syntax elements, and use the prediction information to generate the predicted block for the current video block being decoded. For example, the mode application unit 360 uses some received syntax elements to determine the prediction mode (e.g., intra-frame prediction or inter-frame prediction) for the video block of the encoded video slice, the inter-frame prediction slice type (e.g., B slice, P slice, or GPB slice), the construction information for one or more reference image lists for the slice, the motion vector for each inter-frame encoded video block of the slice, the inter-frame prediction state for each inter-frame encoded video block of the slice, and other information to decode the video block within the current video slice. In addition to or as an alternative to a slice (e.g., a video slice), the same or similar process can be applied to embodiments of the coded block group (e.g., the video coded block group) and / or the coded block (e.g., the video coded block), for example, the video can be encoded using I, P, or B coded block groups and / or coded blocks.

[0181] In one embodiment, Figure 3The video encoder 30 can also be used to segment and / or decode an image using slices (also referred to as video slices), where the image can be segmented or decoded using one or more slices (usually non-overlapping). Each slice may include one or more blocks (e.g., CTUs) or one or more groups of blocks (e.g., coding tree units in the H.265 / HEVC / VVC standards and tiles in the VVC standard).

[0182] In one embodiment, Figure 3 The illustrated video decoder 30 can also be used to segment and / or decode an image using slice / coding tree unit groups (also referred to as video coding tree unit groups) and / or coding tree units (also referred to as video coding tree units), where the image can be segmented or decoded using one or more slice / coding tree unit groups (usually non-overlapping), each slice / coding tree unit group may include one or more blocks (e.g., CTUs) or one or more coding tree units, etc., where each coding tree unit can be in a shape such as a rectangle and may include one or more whole or partial blocks (e.g., CTUs).

[0183] Other variants of the video decoder 30 can be used to decode the encoded image data 21. For example, the decoder 30 can produce an output video stream without the loop filter unit 320. For example, a non-transform-based decoder 30 can directly dequantize the residual signal without the inverse transform processing unit 312 for certain blocks or frames. In another implementation, the video decoder 30 can have the dequantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0184] It should be understood that in the encoder 20 and the decoder 30, the processing result of the current step can be further processed and then output to the next step. For example, after interpolation filtering, motion vector derivation, or loop filtering, further operations such as clip or shift operations can be performed on the processing results of interpolation filtering, motion vector derivation, or loop filtering.

[0185] It should be noted that further operations can be performed on the derived motion vectors of the current block (including but not limited to the control point motion vectors in the affine mode, the sub-block motion vectors in the affine, planar, and ATMVP modes, the temporal motion vectors, etc.). For example, the value of the motion vector can be restricted to a predefined range according to the representation bits of the motion vector. If the representation bits of the motion vector are bitDepth, the range is from -2^(bitDepth - 1) to 2^(bitDepth - 1) - 1, where "^" represents the power. For example, if bitDepth is set to 16, the range is from -32768 to 32767; if bitDepth is set to 18, the range is from -131072 to 131071. For example, the values of the derived motion vectors (such as the MVs of 4 4×4 sub-blocks in an 8×8 block) are restricted such that the maximum difference between the integer parts of the above 4 4×4 sub-block MVs does not exceed N pixels, for example, does not exceed 1 pixel. Two methods for restricting the motion vector according to bitDepth are provided here.

[0186] Although the above embodiments mainly describe video coding and decoding, it should be noted that the embodiments of the decoding system 10, the encoder 20, and the decoder 30, as well as other embodiments described herein, can also be used for still image processing or coding and decoding, that is, the processing or coding and decoding of a single image independent of any previous or consecutive images in video coding and decoding. Generally, if the image processing is limited to a single image 17, the inter-frame prediction units 244 (encoder) and 344 (decoder) may not be available. All other functions (also referred to as tools or techniques) of the video encoder 20 and the video decoder 30 can equally be used for static image processing, such as residual calculation 204 / 304, transformation 206, quantization 208, dequantization 210 / 310, (inverse) transformation 212 / 312, segmentation 262 / 362, intra-frame prediction 254 / 354, and / or loop filtering 220 / 320, entropy coding 270, and entropy decoding 304.

[0187] Please refer to Figure 5 , Figure 5 which is an exemplary block diagram of a video decoding device 500 provided by an embodiment of the present application. The video decoding device 500 is suitable for implementing the disclosed embodiments described herein. In one embodiment, the video decoding device 500 can be a decoder, such as Figure 1a the video decoder 30 in Figure 1a or an encoder, such as

[0188] Video decoding device 500 includes: an input port 510 (or input port 510) for receiving data and a receiver unit (Rx) 520; a processor, logic unit, or central processing unit (CPU) 530 for processing data; for example, the processor 530 here can be a neural network processor 530; a transmitter unit (Tx) 540 for transmitting data and an output port 550 (or output port 550); a memory 560 for storing data. The video decoding device 500 may further include optical-to-electrical (OE) components and electrical-to-optical (EO) components coupled to the input port 510, the receiving unit 520, the transmitting unit 540, and the output port 550 for the exit or entry of optical or electrical signals.

[0189] The processor 530 is implemented by hardware and software. The processor 530 can be implemented as one or more processor chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. The processor 530 communicates with the input port 510, the receiving unit 520, the transmitting unit 540, the output port 550, and the memory 560. The processor 530 includes a decoding module 570 (e.g., a neural network-based decoding module 570). The decoding module 570 implements the embodiments disclosed above. For example, the decoding module 570 performs, processes, prepares, or provides various encoding operations. Therefore, the decoding module 570 provides a substantial improvement to the functions of the video decoding device 500 and affects the switching of the video decoding device 500 to different states. Alternatively, the decoding module 570 is implemented by instructions stored in the memory 560 and executed by the processor 530.

[0190] The memory 560 includes one or more disks, tape drives, and solid-state drives and can be used as an overflow data storage device for storing such programs when a selected program is to be executed and for storing instructions and data read during the execution of the program. The memory 560 can be volatile and / or non-volatile and can be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random-access memory (SRAM).

[0191] Please refer to Figure 6 , Figure 6An exemplary block diagram of apparatus 600 provided by an embodiment of the present application. Apparatus 600 can be used as Figure 1a either or both of source device 12 and destination device 14 in

[0192] The processor 602 in apparatus 600 can be a central processing unit. Alternatively, processor 602 can be any other type of device or multiple devices that can manipulate or process information, existing or to be developed in the future. Although the disclosed implementations can be implemented using a single processor such as processor 602 shown in the figure, using more than one processor is faster and more efficient.

[0193] In one implementation, the memory 604 in apparatus 600 can be a read-only memory (ROM) device or a random access memory (RAM) device. Any other suitable type of storage device can be used as memory 604. Memory 604 can include code and data 606 that the processor 602 accesses via bus 612. Memory 604 can also include an operating system 608 and application programs 610. The application programs 610 include at least one program that allows the processor 602 to execute the methods described above herein. For example, the application programs 610 can include applications 1 to N, and also include a video decoding application that executes the methods described above herein.

[0194] Apparatus 600 can also include one or more output devices, such as a display 618. In one example, the display 618 can be a touch-sensitive display that combines a display with a touch-sensitive element that can be used to sense touch inputs. The display 618 can be coupled to the processor 602 via bus 612.

[0195] Although the bus 612 in apparatus 600 is described herein as a single bus, the bus 612 can include multiple buses. In addition, the secondary storage can be directly coupled to other components of apparatus 600 or accessed via a network, and can include a single integrated unit such as a memory card or multiple units such as multiple memory cards. Therefore, apparatus 600 can have a variety of configurations.

[0196] During the video / image encoding process, in some scenarios, privacy protection is involved. For example, in the image to be encoded, some content belongs to private content (which can also be called high-privilege content. For example, when the image to be encoded includes a face, since the face belongs to private information, it belongs to high-privilege content), and some content belongs to non-private content (which can also be called low-privilege content). In scenarios where privacy protection is required, privacy protection (which can also be called privilege protection) should be considered during the encoding and decoding processes. That is to say, special processing is required during the encoding and / or decoding processes. It can be understood that high-privilege content requires privilege protection. For example, when the user privilege at the decoding end is low, the high-privilege content cannot be decoded, or special processing (such as blurring) is performed on the high-privilege content during encoding at the encoding end. Low-privilege content does not require privilege protection.

[0197] In the following embodiments of this application, the name "privacy protection" involved can also be replaced by "privilege protection", the name "private content" involved can also be replaced by "high-privilege content", the name "non-private content" can be replaced by "low-privilege content", the "private bitstream" can be replaced by "high-privilege bitstream", and the name "non-private bitstream" can be replaced by "low-privilege bitstream". The mutually replaceable names will not be distinguished in the following embodiments.

[0198] Currently, in a privacy protection scheme based on single-layer encoding and decoding, for each frame of the image to be encoded containing private content, the image to be encoded includes a private area and a non-private area. When the encoding end generates two segments of bitstreams (that is, in the bitstream obtained after encoding the image to be encoded by the encoding end), one segment of the bitstream is the private bitstream obtained by encoding the private area, and the other segment of the bitstream is the non-private bitstream obtained by encoding other information (such as syntax elements, such as the content privilege identifier of the coding unit) and encoding the non-private area.

[0199] Exemplarily, the above scheme divides the private area with the coding unit (CU) as the smallest unit, encrypts all the data within the CU, and the minimum size of the private area is 8×8 (aligned with 8×8, adapting to the smallest size allowed by the CU). The CU privilege flag (PrivacyLevel, which can also be called the content privilege identifier of the CU) indicates that the content of the current CU is low-privilege (non-private content) or high-privilege (private content). The information of the low-privilege CU can be parsed from the non-private bitstream, and the information of the high-privilege CU can be parsed from the private bitstream. At the decoding end, for high-privilege users (that is, users with high privileges), the content of the high-privilege CU can be parsed. For low-privilege users, the decoding process of the high-privilege CU needs to be skipped, and a fixed value is used to fill as the reconstructed value of the CU.

[0200] Strictly abide by the principle that low - privilege content cannot refer to high - privilege content through simple restrictions on entropy decoding design, prediction, and filtering. Referring to the privacy protection process for decoding images of high - privilege users (UserPermission = 1) and the privacy protection process for decoding images of low - privilege users (UserPermission = 0), the state of the entropy decoder is continuously updated during the entropy decoding process. To limit the impact of high - privilege updates on low - privilege ones, there are two entropy decoders during the process of high - privilege users parsing the bitstream. During the decoding process, the corresponding bitstream and entropy decoder are matched according to the CU privilege to parse the bitstream to obtain the CU content. Among them, when predicting a CU, if a reference mode / reference pixel needs to be obtained during prediction, and if the privilege of the reference block / reference pixel is greater than (higher than) the privilege of the current block (both the current block and the reference block are CUs), it is determined that the current block cannot use the high - privilege reference block for prediction; during the filtering process of each low - privilege CU, the low - privilege CU cannot refer to the reconstruction value of the high - privilege CU. That is, if the privilege of the sample to be filtered is lower than the privilege of the reference sample, it is not filtered, otherwise it is filtered. At the same time, combined with the "Technical Standard for Digital Video and Audio Coding for Security and Protection Monitoring", English: Surveillance Video and Audio Coding, abbreviated as: SVAC, referring to the bitstream encryption scheme in SAVC 3, the bitstream of 1 patch (block) is divided into 2 hybrid bitstreams. The first part is the non - privacy bitstream, and the second part is the privacy bitstream.

[0201] The following combines Figure 7 and Figure 8 to describe the decoding process at the decoding end in the privacy protection scenario.

[0202] Figure 7 Figure [diagram number] is a schematic diagram of the decoding process when the user privilege at the decoding end is high. When the user privilege at the decoding end is high, the decoding end can decode the entire bitstream, that is, the decoding end can decode the non - privacy bitstream and the privacy bitstream. Specifically, referring to Figure 7 , the decoding end obtains the privacy bitstream, non - privacy bitstream, and other information (syntax elements, such as CU partition information and the privilege level of the CU) from the bitstream. The entropy decoder 1 performs entropy decoding, prediction, inverse transform, and inverse quantization on the privacy bitstream in combination with the syntax elements to obtain the reconstruction value of the privacy region. The entropy decoder 2 performs entropy decoding, prediction, inverse transform, and inverse quantization on the non - privacy bitstream in combination with the syntax elements to obtain the reconstruction value of the non - privacy region, thereby obtaining the reconstructed image.

[0203] Figure 8Schematic diagram of the decoding process when the user permission at the decoding end is at a low level. When the user permission at the decoding end is at a low level, the decoding end can only decode non-private bitstreams and cannot decode private bitstreams. In this case, the entropy decoder 2 combines syntax elements to perform entropy decoding, prediction, inverse transformation, and inverse quantization on the non-private bitstream to obtain the reconstructed values of the non-private region, and fills the private region corresponding to the private bitstream with a fixed value, that is, uses the fixed value as the reconstructed value of the private region, so as to obtain the reconstructed image.

[0204] According to the above description, currently, during privacy protection encoding, when the user permission at the decoding end is at a low level, the prediction and residual decoding processes are skipped when decoding the private region, and all pixel positions are directly filled with a fixed value (PaddingPixel), and the fixed value can be 0 or other values. That is: if the value of the permission flag bit PrivacyLevel of a coding unit is equal to 1 and the value of UserPermission is equal to 0, then the current coding unit skips the prediction sample decoding and residual sample decoding processes, and all reconstructed values of the current coding unit are equal to PaddingPixel. Otherwise (that is, when the user permission is at a high level), the prediction sample decoding and residual sample decoding operations are performed respectively.

[0205] When the above user permission is at a low level, the private region is filled with pure green using a fixed value (such as 0), but the pure green filling visually increases the sense of disconnection from the surrounding environment (there is an obvious sense of disconnection between the filled area and other areas visually), which greatly affects the user viewing experience.

[0206] Regarding the problem that the obvious sense of disconnection between the filled area and other areas in the image caused by filling the private region with a fixed value affects the user viewing experience. The embodiment of the present application provides a decoding method and device, which relate to how to process high-permission content during the process of image / video decoding. Specifically, after the decoding end parses and obtains the content permission identifier of the current coding unit from the bitstream (the content permission identifier indicates whether the content of the coding unit is high-permission), when the content permission identifier indicates that the content of the current coding unit is high-permission content and the user permission at the decoding end is at a low level, the target prediction mode is used to perform prediction on the current coding unit to obtain the predicted value of the current coding unit. This method can, in the scenario where a low-permission user decodes high-permission content of an image, perform prediction on the high-permission content of the image through an appropriate prediction method instead of using the method of filling with a fixed value, weaken the visual sense of disconnection between the private region and the non-private region in the image, and can improve the user viewing experience.

[0207] The decoding method and apparatus provided in the embodiments of the present application are applied in a scenario where the privacy protection single-layer coding mode is enabled, that is, the permission protection mode of the video / image is the privacy protection single-layer coding mode. The privacy protection single-layer coding mode means that the encoding end performs single-layer coding on the image to be encoded, performs single-layer coding on both the private content and the non-private content, and the resulting bitstream includes a private bitstream and a non-private bitstream.

[0208] In the embodiments of the present application, the encoding end encodes the image to be encoded to obtain a bitstream and transmits the bitstream to the decoding end. The bitstream includes syntax elements acting on one encoded video sequence or one image. For example, the bitstream includes the content permission identifier of the coding unit, and the bitstream also includes other syntax elements. For example, the privacy mode index (PrivacyModeIndex) and the improved intra prediction flag (IipFlag). When the value of IipFlag is "1", it means that the current coding unit should use the improved intra prediction; when the value of IipFlag is "0", it means that the current coding unit should not use the improved intra prediction. Other syntax elements included in the bitstream are not listed one by one here.

[0209] Optionally, the process of encoding the image to be encoded by the encoding end can use an H.264 encoder, an H.265 encoder, an H.266 encoder, a second-generation audio video coding standard (AVS2) encoder, a third-generation audio video coding standard (AVS3) encoder, a second-generation surveillance video and audio coding (SVAC2) encoder, a third-generation surveillance video and audio coding (SVAC3) encoder, or other encoders to encode the image to be encoded to obtain a bitstream.

[0210] It should be noted that the encoding end encodes the image to be encoded according to the normal encoding process, and the embodiments of the present application do not describe the process of encoding the image to be encoded by the encoding end.

[0211] Combined with the above content, the decoding method provided in the embodiments of the present application will be described in detail below. The decoding method provided in the embodiments of the present application can be applied to the decoder 30 (or the video decoder 30) in the above Figure 1a 、 Figure 1b or Figure 3 .

[0212] As Figure 9As shown in the figure, an embodiment of the present application provides a decoding method, which is applied to a decoding end. The method includes S901 - S902.

[0213] S901. Analyze the code stream to obtain the content permission identifier of the current coding unit.

[0214] It can be understood that for the video or image to be encoded, the encoding unit of each frame of the image is a coding unit (CU). After the encoder completes the encoding, for each CU, the code stream of the image to be encoded also carries the permission flag bit of the CU (or called the content permission identifier) to indicate whether the content of the CU is high - permission content. That is to say, the content of the CU is private content (i.e., high - permission content) or non - private content (or low - permission content). Correspondingly, after the decoder obtains the code stream, it can parse the content permission identifier of each CU from the code stream. Herein, the content of the coding unit refers to the pixel points within the coding unit, or the sample points within the encoding - end unit.

[0215] Exemplarily, the content permission identifier can be the privacy level (PrivacyLevel). The content permission identifier (or the permission flag bit) can be represented by PrivacyLevel, and PrivacyLevel is a binary variable.

[0216] For example, when the PrivacyLevel value is "1", it indicates that the content of the current coding unit is high - permission content; when the PrivacyLevel value is "0", it indicates that the content of the current coding unit is low - permission content. Or it can be described as when the PrivacyLevel value is "1", it means that the permission level of all sample points within the current coding unit is 1; when the PrivacyLevel value is "0", it means that the permission level of all sample points within the current coding unit is 0. When there is no content permission identifier in the code stream, it is defaulted that the content of the coding unit is low - permission content.

[0217] For another example, when the PrivacyLevel value is "1", it can represent that the content of the coding unit is low - permission content (or non - private content); when the PrivacyLevel value is "0", it can represent that the content of the coding unit is high - permission content (or private content).

[0218] The code stream of the image to be encoded also carries the permission protection mode index (i.e., PrivacyModeIndex). The permission protection mode index is used to indicate the permission protection mode of the video / image to be encoded, which also indicates the permission protection mode of the current coding unit.

[0219] The permission protection mode index is used to indicate the permission protection mode. Exemplarily, the permission protection mode index can be represented by PrivacyModeIndex. PrivacyModeIndex is a 2-bit unsigned integer with a value range of 0 to 3. A PrivacyModeIndex value of "0" represents the privacy protection hierarchical independent coding mode, a PrivacyModeIndex value of "1" represents the privacy protection hierarchical reference coding mode, a PrivacyModeIndex value of "3" represents the privacy protection single-layer coding mode, and the value of "2" is reserved. In some embodiments, if the permission protection mode index does not exist in the bitstream (i.e., the bit stream), the default value of PrivacyModeIndex is equal to 0, that is, the permission protection mode is the privacy protection hierarchical independent coding mode.

[0220] In the embodiment of the present application, the value of the permission protection mode index parsed from the bitstream is 3, that is, the permission protection mode of the current encoded image is the privacy protection single-layer coding mode.

[0221] S902. When the content permission identifier indicates that the content of the current coding unit is high-permission content and the user permission at the decoding end is low-permission, the target prediction mode is used to predict the current coding unit to obtain the predicted value of the current coding unit (i.e., the reconstructed value of the current coding unit).

[0222] In the embodiment of the present application, the target prediction mode is used to predict the current coding unit to obtain a predicted value (which can also be referred to as a prediction sample), and this predicted value is used to fill the privacy area.

[0223] In one implementation, the user permission at the decoding end can be represented by UserPermission. Among them, UserPermission = 1 indicates that the user is a high-permission user (or described as: the user permission is high-permission), that is, the user has the permission to parse the privacy bitstream; UserPermission = 0 indicates that the user is a low-permission user (or described as: the user permission is low-permission), that is, the user has no permission to parse the privacy bitstream and only has the permission to parse the non-privacy bitstream.

[0224] Optionally, the user permission (UserPermission) can be input through an external device. In some embodiments, if there is no external device input for the user permission, it is defaulted that the user has no permission and is low-permission.

[0225] In the embodiments of the present application, the above-mentioned target prediction mode for predicting the current coding unit may be a prediction mode set by the user, and the user can flexibly set the prediction mode according to requirements. In some implementation manners, the decoding end may provide an interface for the user to input the target prediction mode. For example, the user can specify a specific prediction mode by setting the decoding end command line parameter (such as privacy_stuff).

[0226] Optionally, the above-mentioned target prediction mode may be an intra prediction mode. Using the intra prediction mode can quickly predict the current coding unit. The intra prediction modes that can be used to predict the coding unit of high-privilege content may include, but are not limited to, at least one of the following: direct current prediction mode (i.e., DC mode), planar prediction mode (i.e., Plane mode), bilinear prediction mode (i.e., Bilinear mode), or angular prediction mode.

[0227] The current coding unit may include a luminance component and / or a chrominance component. For the luminance component and the chrominance component of the same coding unit, the same intra prediction mode may be used, or different frame prediction modes may be used. If the coding unit includes a luminance component and a chrominance component, for example, the direct current prediction mode is used to predict the luminance component, and the direct current prediction mode is also used to predict the chrominance component; or for another example, the planar mode is used to predict the luminance component, and the direct current prediction mode is used to predict the chrominance component.

[0228] For a coding unit with the PrivacyLevel value equal to 1, using the above-mentioned target prediction mode (the above-mentioned several intra prediction modes), first determine the upper reference row and the left reference column of the current privacy area (the current coding unit), and then predict the luminance component and the chrominance component of the current area respectively. It should be noted that the upper reference row and the left reference column of the current coding unit are the rows and columns of the reconstructed coding unit.

[0229] When the direct current prediction mode is used to predict the current coding unit, the predicted value of each pixel of the current coding unit is the average value of all pixels in the upper reference row and the left reference column of the current coding unit.

[0230] When the planar prediction mode is used to predict the current coding unit, for a pixel of the current coding unit, its predicted value is the average value of the reference pixel closest to the pixel in the upper reference row and the pixel closest to the pixel in the left reference column.

[0231] When the current coding unit is predicted using the bilinear prediction mode, for each pixel to be predicted in the last row (the bottom row) and the last column (the rightmost column) of the current coding unit, its predicted value is the weighted value of the reference pixel closest to the pixel to be predicted in the upper reference row and the pixel closest to the pixel to be predicted in the left reference column. Among them, the weighting weight is related to the distance from the pixel to be predicted to the reference pixel. The closer the pixel to be predicted is to the reference pixel, the greater the weight. For other pixels to be predicted outside the last row and the last column of the current coding unit, its predicted value is the weighted value of the reference pixel closest to the pixel to be predicted in the upper reference row, the reference pixel closest to the pixel to be predicted in the lower reference row (i.e., the last row of the current coding unit), the pixel closest to the pixel to be predicted in the left reference column, and the pixel closest to the pixel to be predicted in the right reference column (i.e., the last column of the current coding unit). Similarly, the weight is related to the weight of the distance from the pixel to be predicted to the reference pixel. The closer the pixel to be predicted is to the reference pixel, the greater the weight.

[0232] When the current coding unit is predicted using the angular mode, the reference pixel of each pixel to be predicted in the current coding unit is determined from the upper reference row and the left reference column according to a preset angle, and the predicted value of the pixel to be predicted is determined based on the reference pixel.

[0233] For more detailed implementation processes of predicting the current coding unit using the direct current prediction mode (i.e., the DC mode), the plane prediction mode (i.e., the Plane mode), the bilinear prediction mode (i.e., the Bilinear mode), or the angular prediction mode, reference can be made to relevant technical materials.

[0234] In one implementation, the upper reference row and the left reference column of the current privacy region are obtained by using the intra-frame luminance / chrominance DC mode, and DC prediction is performed on the luminance and chrominance of the current region respectively. That is: if the value of PrivacyLevel is equal to 1 and the value of UserPermission is equal to 0, then the current coding unit can skip the prediction sample decoding and residual sample decoding processes, and all the reconstructed values of the current coding unit are obtained by intra-frame DC mode prediction.

[0235] In another implementation, the upper reference row and the left reference column of the current privacy region are obtained by using the intra-frame Plane mode, and prediction is performed on the luminance and chrominance of the current region respectively. That is: if the value of PrivacyLevel is equal to 1 and the value of UserPermission is equal to 0, then the current coding unit can skip the prediction sample decoding and residual sample decoding processes, and all the reconstructed values of the current coding unit are obtained by intra-frame Plane mode prediction.

[0236] In another implementation, the intra-frame Bilinear mode is used to obtain the upper reference row and the left reference column of the current privacy area, and the luminance and chrominance of the current area are predicted respectively. That is, if the value of PrivacyLevel is equal to 1 and the value of UserPermission is equal to 0, the current coding unit skips the prediction sample decoding and residual sample decoding processes, and all the reconstructed values of the current coding unit are predicted by the intra-frame Bilinear mode.

[0237] In another implementation, the intra-frame angular prediction mode is used to obtain the upper reference row and the left reference column of the current privacy area, and the luminance and chrominance of the current area are predicted respectively. That is, if the value of PrivacyLevel is equal to 1 and the value of UserPermission is equal to 0, the current coding unit skips the prediction sample decoding and residual sample decoding processes, and all the reconstructed values of the current coding unit are predicted by the intra-frame angular prediction mode.

[0238] In some embodiments, the above target prediction mode can be set in the above user-specified manner, randomly generated (i.e., randomly selected from candidate prediction modes), or pre-configured, and the embodiments of the present application do not make limitations.

[0239] Exemplarily, the user can specify the intra-frame prediction mode by setting the decoder command line parameter (privacy_stuff). For example, privacy_stuff 1 specifies the use of the DC prediction mode, privacy_stuff 2 specifies the use of the planar prediction mode, privacy_stuff 3 specifies the use of the bilinear prediction mode, and privacy_stuff 4 specifies the use of the angular prediction mode.

[0240] In some embodiments, when the user does not set privacy_stuff on the command line, the coding units of high-privilege content can be filled with the original fixed value (such as green filling) by default, that is, the privacy area of the image is filled with a fixed value.

[0241] The target prediction mode should be a prediction mode supported by the decoder. Optionally, the target prediction mode can also be other intra-frame prediction modes other than the above several intra-frame prediction modes, that is, the target prediction mode can be extended. The user can set and expand it according to the actual required effect. Of course, the above target prediction mode can also be an inter-frame prediction mode, and the embodiments of the present application do not make limitations.

[0242] In the decoding method provided by the embodiments of the present application, in a scenario where a user with low permissions decodes high-permission content of an image, the high-permission content of the image is predicted through a target prediction mode to fill the privacy area, rather than filling it in a way of using a fixed value, so as to weaken the visual disconnection between the privacy area and the non-privacy area in the image and improve the viewing experience of the user.

[0243] Combined Figure 9 , such as Figure 10 shown, in one implementation manner, the decoding method provided by the embodiments of the present application may further include S903.

[0244] S903. Determine the reconstruction value of the current coding unit according to the prediction value of the current coding unit.

[0245] It can be understood that generally decoding a coding unit includes predicting sample decoding and residual sample decoding. After completing the predicting sample decoding and the residual sample decoding, prediction compensation is performed to obtain a compensated sample, and then the equivalent string reference image buffer is updated. Among them, predicting sample decoding refers to predicting the current coding unit to obtain the prediction value of the current coding unit; residual sample decoding refers to decoding the residual of the current coding unit from the bitstream; prediction compensation refers to adding the prediction value and the residual of the coding end unit to obtain a compensated sample, and the compensated sample is the reconstruction value of the coding unit.

[0246] Among them, predicting sample decoding includes: determining the coding unit type and related information. For example, for a coding unit with an intra prediction type of ordinary intra prediction, the ordinary intra prediction modes of all intra prediction blocks included therein are respectively derived and ordinary intra prediction is performed; for a coding unit with an intra prediction type of block copy intra prediction, the block vector information included therein is respectively derived and block copy intra prediction is performed; for a coding unit with an intra prediction type of string copy intra prediction, the string copy intra prediction information included therein is respectively derived and string copy intra prediction is performed; for a coding unit with an inter prediction type, the motion information of all inter prediction values included therein is respectively derived and inter prediction is performed; storing the motion information of the coding unit and storing the spatial intra prediction information of the coding unit.

[0247] Residual sample decoding includes: determining the quantization parameter; determining the way of dividing the coding unit into transform blocks; decoding each transform block in turn. If the luminance coding block of the current coding unit contains multiple transform blocks, first set the values in the residue sample matrix ResidueMatrix of the coding unit to 0, and then place the decoded luminance transform block with a size of M1×M2 in the residue sample matrix ResidueMatrix of the coding unit in the area with (blockX, blockY) as the upper left corner, a width of M1, and a height of M2.

[0248] For the case where the content of the coding unit is low-privilege content, or for the case where the user privilege at the decoding end is high-privilege, the above-described process of predicting sample decoding can be adopted. After obtaining the relevant syntax elements from the bitstream, the coding unit is predicted, and according to the above-described process of residual sample decoding, the residual block of the current coding unit is decoded.

[0249] In the embodiments of the present application, when the content of the current coding unit is high-privilege content and the user privilege at the decoding end is low-privilege, the decoding end has no privilege to decode the current coding unit, that is, the decoding end cannot decode the privacy bitstream in the bitstream and cannot obtain the relevant syntax elements. Therefore, the present application can adopt the intra prediction mode specified by the user to perform prediction (i.e., prediction sample decoding) and residual sample decoding on the current coding unit. It can also be understood that if the value of PrivacyLevel of a CU is equal to 1 and the value of UserPermission is equal to 0, the current coding unit skips the prediction sample decoding and residual sample decoding processes.

[0250] In one implementation, during the process of the decoding end decoding the coding unit using the intra prediction mode specified in SVAC 3.0, the syntax elements that need to be referred to can include but are not limited to the following several:

[0251] (1) Intra Coding Unit Flag (IntraCuFlag)

[0252] A binary variable. A value of "1" indicates that the prediction type of the current coding unit is ordinary intra prediction or block copy intra prediction or string copy intra prediction; a value of "0" indicates that the prediction type of the current coding unit is inter prediction.

[0253] In the embodiments of the present application, since the target prediction mode adopted by the decoding end is the intra prediction mode, in order to enable the decoding end to apply the decoding process specified by the standard, the intra coding unit flag needs to be set, and the intra coding unit flag needs to be set to 1, that is, it indicates to adopt ordinary intra prediction or block copy intra prediction or string copy intra prediction.

[0254] (2) Derived Mode Partition Flag (DtSplitFlag)

[0255] A binary variable. A value of "1" indicates that derived mode partitioning should be performed; a value of "0" indicates that derived mode partitioning should not be performed. If DtSplitFlag does not exist in the bitstream, the default value of DtSplitFlag is 0.

[0256] Similarly, the decoding end also needs to set the derivative mode division flag. In the embodiments of the present application, the derivative mode division flag can be set flexibly. For example, the value of the derivative mode division flag can be set to 0 or 1, that is, it is possible to perform derivative mode division on the current coding unit or not, which does not affect the intra prediction of the current coding unit.

[0257] (3) Block copy intra mode flag (IbcCuFlag)

[0258] A binary variable. A value of "1" indicates that the current coding unit is in the block copy intra prediction mode; a value of "0" indicates that the current coding unit is not in the block copy intra prediction mode. If IbcCuFlag does not exist in the bitstream, the default value of IbcCuFlag is 0.

[0259] Similarly, the decoding end also needs to set the block copy intra mode flag. In the embodiments of the present application, since the intra prediction mode adopted by the decoding end is the ordinary intra prediction mode (such as the DC prediction mode, plane prediction mode, bilinear prediction mode or angular prediction mode mentioned above), the block copy intra mode flag needs to be set to 0, that is, the current coding unit is not in the block copy intra prediction mode.

[0260] (4) String copy intra mode flag (IscCuFlag)

[0261] A binary variable. A value of "1" indicates that the current coding unit is in the string copy intra prediction mode; a value of "0" indicates that the current coding unit is not in the string copy intra prediction mode.

[0262] Similarly, the decoding end also needs to set the block copy intra mode flag, and the string copy intra mode flag needs to be set to 0, that is, the current coding unit is not in the string copy intra mode flag.

[0263] (5) Spatial angular weighted prediction mode flag (SawpFlag)

[0264] A binary variable. A value of "1" indicates that the current coding unit is in the spatial angular weighted prediction mode; a value of "0" indicates that the current coding unit is not in the spatial angular weighted prediction mode. If SawpFlag does not exist in the bitstream, the default value of SawpFlag is 0.

[0265] The spatial angular weighted prediction mode flag can be set flexibly. For example, the value of the spatial angular weighted prediction mode flag can be set to 0 or 1, that is, it is possible that the current coding unit is in the spatial angular weighted prediction mode or not, which does not affect the intra prediction of the current coding unit.

[0266] (6) Intra prediction filtering flag (IntraPfFlag)

[0267] Binary variable. A value of "1" indicates that the current coding unit should use intra prediction filtering; a value of "0" indicates that the current coding unit should not use intra prediction filtering. If IntraPfFlag does not exist in the bitstream, the default value of IntraPfFlag is 0.

[0268] The intra prediction filtering flag can also be flexibly set. It can be set to 0 or 1, that is, it is possible to use intra prediction filtering for the current coding unit or not to use intra filtering, without affecting the intra prediction of the current coding unit.

[0269] (7) Improved intra prediction flag (IipFlag)

[0270] Binary variable. A value of "1" indicates that the current coding unit should use improved intra prediction; a value of "0" indicates that the current coding unit should not use improved intra prediction. If IipFlag does not exist in the bitstream, the default value of IipFlag is 0.

[0271] The improved intra prediction flag can also be flexibly set. It can be set to 0 or 1, that is, it is possible to use improved intra prediction for the current coding unit or not to use improved intra prediction, without affecting the intra prediction of the current coding unit.

[0272] These above-mentioned syntax elements can be set by the user or pre-set in the decoder, and the embodiments of the present application do not make any limitations.

[0273] Combined with the above content, in the case where the content of the coding unit is high-privilege content and the user privilege at the decoding end is a low-privilege user, in one implementation, the prediction sample decoding process is to perform prediction using the target prediction mode, and the residual sample decoding is to set the residual value of the coding unit to 0 (that is, set the values in the residual sample matrix ResidueMatrix to 0), which can also be understood as there is no residual. That is to say, all the reconstructed values of the current coding unit are equal to PaddingPixel, and PaddingPixel is predicted by the intra prediction mode.

[0274] In one implementation, the above 7 syntax elements can be set as follows: set IntraCuFlag of the coding unit to 1, DtSplitFlag to 0, IbcCuFlag to 0, IscCuFlag to 0, SawpFlag to 0, IntraPfFlag to 0, and IipFlag to 0.

[0275] As an exemplary implementation, the processes of decoding the current coding unit using the DC prediction mode, planar prediction mode, bilinear prediction mode, and angular prediction mode are described below respectively.

[0276] 1. Using the DC prediction mode

[0277] The process of decoding the predicted samples includes: setting the IntraCuFlag of the coding unit to 1, DtSplitFlag to 0, IbcCuFlag to 0, IscCuFlag to 0, SawpFlag to 0, IntraPfFlag to 0, and IipFlag to 0. If the coding unit includes a luminance component, set the value of IntraLumaPredMode (intra-frame luminance prediction mode) of the coding unit to 0, that is, set the luminance prediction mode to 'Intra_Luma_DC', and perform ordinary intra-frame prediction; if the coding unit includes a chrominance component, set the value of IntraChromaPredMode of the coding unit to 1, that is, set the chrominance prediction mode to 'Intra_Chroma_DC', and perform ordinary intra-frame prediction.

[0278] The decoding of the residual samples includes: setting the residual of the coding unit to 0.

[0279] After completing the decoding of the predicted samples and the residual samples, perform prediction compensation to obtain the compensated samples, and then update the equivalent string reference image buffer. That is, add the predicted value of the coding unit to the residual to obtain the reconstructed value of the coding end unit.

[0280] 2. Using the planar prediction mode

[0281] The process of decoding the predicted samples includes: setting the IntraCuFlag of the coding unit to 1, DtSplitFlag to 0, IbcCuFlag to 0, IscCuFlag to 0, SawpFlag to 0, IntraPfFlag to 0, and IipFlag to 0. If the coding unit includes a luminance component, set the value of IntraLumaPredMode of the coding unit to 1, that is, set the luminance prediction mode to 'Intra_Luma_Plane', and perform ordinary intra-frame prediction; if the coding unit includes a chrominance component, set the value of IntraChromaPredMode of the coding unit to 1, that is, set the chrominance prediction mode to 'Intra_Chroma_DC' (or other modes that support predicting the chrominance component), and perform ordinary intra-frame prediction.

[0282] The decoding of the residual samples includes: setting the residual of the coding unit to 0.

[0283] After completing the prediction sample decoding and the residual sample decoding, perform prediction compensation to obtain the compensated samples, and then update the equalization string reference image buffer.

[0284] 3. Adopt the bilinear prediction mode

[0285] The process of prediction sample decoding includes: setting the IntraCuFlag of the coding unit to 1, the DtSplitFlag to 0, the IbcCuFlag to 0, the IscCuFlag to 0, the SawpFlag to 0, the IntraPfFlag to 0, and the IipFlag to 0. If the coding unit includes a luminance component, set the value of IntraLumaPredMode of the coding unit to 2, that is, set the luminance prediction mode to 'Intra_Luma_Bilinear', and perform ordinary intra prediction; if the coding unit includes a chrominance component, set the value of IntraChromaPredMode of the coding unit to 4, that is, set the chrominance prediction mode to 'Intra_Chroma_Bilinear', and perform ordinary intra prediction.

[0286] The residual sample decoding includes: setting the residual of the coding unit to 0.

[0287] After completing the prediction sample decoding and the residual sample decoding, perform prediction compensation to obtain the compensated samples, and then update the equalization string reference image buffer.

[0288] 4. Adopt the angular prediction mode

[0289] The process of prediction sample decoding includes: setting the IntraCuFlag of the coding unit to 1, the DtSplitFlag to 0, the IbcCuFlag to 0, the IscCuFlag to 0, the SawpFlag to 0, the IntraPfFlag to 0, and the IipFlag to 0. If the coding unit includes a luminance component, set the value of IntraLumaPredMode of the coding unit to 13 (indicating the angle value used in the angular prediction mode), set the luminance prediction mode to 'Intra_Luma_Angular', and perform ordinary intra prediction; if the coding unit includes a chrominance component, set the value of IntraChromaPredMode of the coding unit to 1, set the chrominance prediction mode to 'Intra_Chroma_DC' (or other modes that support predicting the chrominance component), and perform ordinary intra prediction.

[0290] In summary, when the user at the decoding end is a low-privilege user, for the CUs of private content (high-privilege content, i.e., the value of PrivacyLevel is equal to 1), the coding units are reconstructed according to S902 - S903. When the user at the decoding end is a low-privilege user, for the CUs of non-private content (low-privilege content, i.e., the value of PrivacyLevel is equal to 0), the decoding end performs inverse processing relative to the encoder for decoding to obtain the reconstructed values of the CUs, and then based on the reconstructed CUs, a reconstructed image is obtained.

[0291] In some embodiments, when the user at the decoding end is a high-privilege user, the decoding end performs inverse processing relative to the encoder to decode the bitstream to obtain the reconstructed values of all CUs, thereby obtaining a reconstructed image.

[0292] In summary, in the decoding method provided by the embodiments of the present application, when the user is a low-privilege user, during the decoding process, for the privacy area (CUs of private content), prediction and filling are performed in a predictive manner, and fixed values are no longer used for filling. In this way, visually, the sense of disconnection between the filled part and the surrounding environment can be weakened, improving the user viewing experience.

[0293] It can be understood that in order for the decoding device to implement the above functions, it includes corresponding hardware and / or software modules for executing each function. Combining the algorithm steps of each example described in the embodiments disclosed in this article, the embodiments of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the form of hardware or computer software driving the hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to exceed the scope of the embodiments of the present application.

[0294] The embodiments of the present application can divide the functional modules of the decoding device according to the above method examples. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware. It should be noted that the division of modules in this embodiment is illustrative, only a logical function division, and there can be other division methods in actual implementation.

[0295] In the case of dividing each functional module corresponding to each function, Figure 11 shows a possible schematic composition diagram of the decoding device involved in the above embodiments, as Figure 11 shown, the decoding device 1100 may include: a parsing unit 1101, a prediction unit 1102, and a reconstruction unit 1103.

[0296] The parsing unit 1101, the prediction unit 1102, and the reconstruction unit 1103 cooperate to execute the steps of S901 - S903 in the above - mentioned method embodiments.

[0297] An embodiment of this application also provides a chip. Figure 12 A schematic structural diagram of a chip 1200 is shown. The chip 1200 includes one or more processors 1201 and an interface circuit 1202. Optionally, the above - mentioned chip 1200 may further include a bus 1203.

[0298] The processor 1201 may be an integrated circuit chip with signal - processing capabilities. During implementation, each step of the above - mentioned decoding method may be completed by the integrated logic circuit in hardware in the processor 1201 or by instructions in software form.

[0299] Optionally, the above - mentioned processor 1201 may be a general - purpose processor, a digital signal processing (DSP) processor, an application specific integrated circuit (ASIC), a field - programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods and steps disclosed in the embodiments of this application. The general - purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0300] The interface circuit 1202 may be used for sending or receiving data, instructions, or information. The processor 1201 may use the data, instructions, or other information received by the interface circuit 1202 for processing and may send the processed information through the interface circuit 1202.

[0301] Optionally, the chip further includes a memory. The memory may include a read - only memory and a random - access memory and provide operation instructions and data to the processor. A part of the memory may further include a non - volatile random - access memory (NVRAM).

[0302] Optionally, the memory stores an executable software module or data structure. The processor may execute corresponding operations by calling the operation instructions stored in the memory (the operation instructions may be stored in the operating system).

[0303] Optionally, the chip can be used in the encoding device involved in the embodiments of the present application. Optionally, the interface circuit 1202 can be used to output the execution result of the processor 1201. For the encoding method or decoding method provided by one or more embodiments of the present application, reference can be made to the foregoing various embodiments, which will not be elaborated here.

[0304] It should be noted that the functions corresponding to the processor 1201 and the interface circuit 1202 can be implemented through hardware design, software design, or a combination of software and hardware, and there is no limitation here.

[0305] Figure 13 It is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device 1300 can be a processor, a chip in the processor, or a functional module. As Figure 13 shown, the electronic device 1300 includes a processor 1301, a transceiver 1302, and a communication line 1303.

[0306] Among them, the processor 1301 is used to execute any step in the encoding method or decoding method provided by the embodiment of the present application, and during the execution of any step in the encoding method or decoding method provided by the embodiment of the present application, the transceiver 1302 and the communication line 1303 can be selectively called to complete the corresponding operations.

[0307] Furthermore, the electronic device 1300 may further include a memory 1304. Among them, the processor 1301, the memory 1304, and the transceiver 1302 can be connected through the communication line 1303.

[0308] Among them, the processor 1301 is a processor, a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1301 can also be other devices with processing functions, such as circuits, devices, or software modules, without limitation.

[0309] The transceiver 1302 is used to communicate with other devices or other communication networks. The other communication networks can be Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc. The transceiver 1302 can be a module, a circuit, a transceiver, or any device capable of realizing communication.

[0310] The transceiver 1302 is mainly used for transmitting and receiving commands, information, etc. It may include a transmitter and a receiver for respectively transmitting and receiving commands, information, etc. Operations other than the transmission and reception of commands, information, etc. are implemented by the processor.

[0311] The communication line 1303 is used to transmit information between the components included in the electronic device 1300.

[0312] In one design, the processor can be regarded as a logic circuit and the transceiver as an interface circuit.

[0313] The memory 1304 is used to store instructions. Among them, the instructions can be computer programs.

[0314] Among them, the memory 1304 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct rambus RAM (DRRAM). The memory 1304 can also be a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, etc. It should be noted that the memories of the systems and methods described herein are intended to include, but are not limited to, these and any other suitable types of memories.

[0315] It should be noted that the memory 1304 can exist independently of the processor 1301 or be integrated with the processor 1301. The memory 1304 can be used to store instructions, program codes, or some data, etc. The memory 1304 can be located inside the electronic device 1300 or outside the electronic device 1300, without limitation. The processor 1301 is used to execute the instructions stored in the memory 1304 to implement the method provided in the above embodiments of the present application.

[0316] In one example, the processor 1301 can include one or more processors, such as Figure 13 the processor 0 (CPU0) and the processor 1 (CPU1) in

[0317] As an alternative implementation, the electronic device 1300 includes multiple processors. For example, in addition to Figure 13 the processor 1301 in

[0318] As an alternative implementation, the electronic device 1300 further includes an output device 1305 and an input device 1306. Exemplarily, the input device 1306 is a device such as a keyboard, a mouse, a microphone, or a joystick, and the output device 1305 is a device such as a display screen or a speaker.

[0319] It should be noted that the electronic device 1300 can be a chip system or a device with a Figure 13 similar structure in Figure 13 Among them, the chip system can be composed of chips or can include chips and other discrete devices. Actions, terms, etc. involved between the embodiments of the present application can be referred to each other without limitation. The message names or parameter names in the messages exchanged between the devices in the embodiments of the present application are only examples, and other names can also be used in specific implementations without limitation. In addition, Figure 13 the composition structure shown in Figure 13 does not constitute a limitation on the electronic device 1300. In addition to

[0320] The processor and transceiver described in this application can be implemented on an integrated circuit (IC), analog IC, radio frequency integrated circuit, mixed-signal IC, application specific integrated circuit (ASIC), printed circuit board (PCB), electronic device, etc. The processor and transceiver can also be fabricated using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-type metal-oxide-semiconductor (NMOS), P-type metal oxide semiconductor (PMOS), bipolar junction transistor (BJT), BiCMOS, silicon germanium (SiGe), gallium arsenide (GaAs), etc.

[0321] Figure 14 FIG. is a schematic structural diagram of a decoding device provided for an embodiment of this application. The decoding device can be applied to the scenarios shown in the above method embodiments. For ease of description, Figure 14 only the main components of the decoding device are shown, including a processor 1401, a memory 1402, a control circuit 1403, and an input / output device 1404. The processor 1401 is mainly used for processing communication protocols and communication data, executing software programs, and processing the data of software programs. The memory 1402 is mainly used for storing software programs and data. The control circuit 1403 is mainly used for power supply and the transmission of various electrical signals. The input / output device 1404 is mainly used for receiving data input by users and outputting data to users.

[0322] When the decoding device is the processor 1401, the control circuit 1403 can be the main board. The memory 1402 includes storage media with storage functions such as hard disks, RAM, and ROM. The processor 1401 can include a baseband processor 1401 and a central processor. The baseband processor is mainly used to process communication protocols and communication data, and the central processor is mainly used to control the entire decoding device, execute software programs, and process the data of software programs. The input / output device 1404 includes a display screen, a keyboard, a mouse, etc. The control circuit 1403 can further include or be connected to a transceiver circuit or a transceiver, such as a network cable interface, etc., for sending or receiving data or signals, such as performing data transmission and communication with other devices. Further, it can also include an antenna for wireless signal transmission and reception, for data / signal transmission with other devices.

[0323] An embodiment of the present application further provides a decoding device, which includes: at least one processor. When the at least one processor executes program code or instructions, the above-mentioned related method steps are implemented to realize the decoding method in the above-mentioned embodiment.

[0324] Optionally, the device may further include at least one memory for storing the program code or instructions.

[0325] An embodiment of the present application further provides a computer storage medium, in which computer instructions are stored. When the computer instructions run on the decoding device, the decoding device is caused to execute the above-mentioned related method steps to realize the decoding method in the above-mentioned embodiment.

[0326] An embodiment of the present application further provides a computer program product. When the computer program product runs on a computer, the computer is caused to execute the above-mentioned related steps to realize the decoding method in the above-mentioned embodiment.

[0327] An embodiment of the present application further provides a decoding device, which may specifically be a chip, an integrated circuit, a component, or a module. Specifically, the device may include a processor connected to a memory for storing instructions, or the device includes at least one processor for obtaining instructions from an external memory. When the device runs, the processor can execute the instructions to cause the chip to execute the decoding method in each of the above method embodiments.

[0328] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that includes one or more available media integrated. The available medium can be a magnetic medium (such as a floppy disk, magnetic disk, magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state drive (SSD)), etc.

[0329] Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and brevity of description, only the above division of each functional module is used as an example. In actual applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0330] In several embodiments provided in the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces, and the indirect couplings or communication connections of the devices or units can be in an electrical, mechanical, or other form.

[0331] The unit described as a separation component may or may not be physically separated. The component displayed as a unit may or may not be a physical unit, that is, it may be located in one place or may be distributed across multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0332] In addition, each functional unit in various embodiments of the present application may be integrated into a processing unit, may exist separately as individual physical units, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0333] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in various embodiments of the present application. The aforementioned storage medium includes: flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk, or optical disk and other various media that can store program codes.

[0334] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.

Claims

1. A decoding method, characterized in that: include: Parse the code stream and obtain the content permission identifier of the current coding unit; The content authority identifier is used to indicate whether the content of the current encoding unit is high-authority content; When the content permission identifier indicates that the content of the current coding unit is high-authority content and the user permission of the decoding end is low-authority, the current coding unit is predicted using a target prediction mode to obtain a predicted value of the current coding unit.

2. The method according to claim 1, characterized in that A reconstructed value of the current coding unit is determined according to the predicted value of the current coding unit.

3. The method according to claim 1 or 2, characterized in that: The target prediction mode is a prediction mode set by a user.

4. The method according to any one of claims 1 to 3, characterized in that: The target prediction mode is an intra prediction mode.

5. The method according to claim 4, characterized in that The target prediction mode includes at least one of the following intra-frame prediction modes: a direct current prediction mode, a planar prediction mode, a bilinear prediction mode or an angular prediction mode.

6. The method according to any one of claims 1 to 5, characterized in that: The permission protection mode of the current coding unit is a privacy protection single-layer coding mode.

7. A decoding device, comprising at least one processor and a memory, characterized in that: The at least one processor executes a program or instruction stored in the memory so that the decoding device implements the method according to any one of claims 1 to 6.

8. A computer-readable storage medium for storing a computer program, characterized in that: When the computer program is executed on a computer or a processor, the computer or the processor is enabled to implement the method according to any one of claims 1 to 6.

9. A computer program product, comprising instructions, characterized in that: When the instructions are executed on a computer or a processor, the computer or the processor is enabled to implement the method according to any one of claims 1 to 6.

10. A chip comprising at least one processor and a memory, characterized in that: The at least one processor executes a program or instruction stored in the memory so that the chip implements the method according to any one of claims 1 to 6.