Preparation method of printed circuit board and printed circuit board

By covering the dry film on the core board of the printed circuit board and partially etched, a ladder-like patterned circuit is formed, which solves the problem of high cost of insertion loss control of printed circuit boards, and the effect of reducing high-frequency losses and ensuring stable signal transmission is achieved.

CN120201649APending Publication Date: 2025-06-24SHENNAN CIRCUITS
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Patent Information

Application Number
CN202510189899.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-19
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

The insertion loss control cost of the inner and outer layers of printed circuit boards is high.

Method used

By obtaining a core plate containing the patterned lines, covering the core plate with a dry film and exposing at least one side of the patterned lines, partial etching is performed to form a trapezoidal patterned line.

Benefits of technology

Without increasing material costs, the insertion loss of printed circuit boards is reduced, the current distribution is improved, the high-frequency loss is reduced, and the signal is stable transmission is ensured.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a preparation method of a printed circuit board and the printed circuit board. The method comprises the following steps: acquiring a core board comprising a patterned circuit; covering the core plate with a dry film, and exposing at least one side edge of the patterned circuit; and partially etching at least one side edge of the patterned circuit to obtain the printed circuit board comprising the trapezoid-like patterned circuit. The dry film covers the core board to partially etch at least one side edge of the patterned circuit, and the printed circuit board with the trapezoid-like patterned circuit is formed under the condition that the material cost is not increased, so that the current distribution is improved, the high-frequency loss is reduced, the stable signal transmission is ensured through the trapezoid-like patterned circuit, and the product quality is improved. The technical problem that the control cost of the insertion loss of inner and outer layer lines of the printed circuit board is high is solved.
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Description

Technical Field

[0001] This application relates to the technical field of printed circuit boards, and particularly to a method for manufacturing a printed circuit board and a printed circuit board. Background Art

[0002] The trend of high integration and multi-function development of electronic products is becoming increasingly obvious, which puts forward more and more stringent processing and design requirements for the processing of assembly components of electronic products. Especially for the printed circuit boards carried by assembly components, it is required that their signal transmission should have the performance of low delay, high speed, and high frequency.

[0003] However, the current research and development of printed circuit board materials with ultra-low dielectric constant or dielectric loss is difficult and costly, and the processing problems of the copper foil surface treatment of printed circuit boards are also relatively obvious, which leads to high control costs for the insertion loss of printed circuit boards. Summary of the Invention

[0004] The main technical problem to be solved by this application is to provide a method for manufacturing a printed circuit board and a printed circuit board, which can solve the technical problem of high control cost of the insertion loss of the inner and outer layer circuits of the printed circuit board.

[0005] To solve the above technical problem, a technical solution adopted by this application is: The manufacturing method includes:

[0006] Obtain a core board containing patterned circuits;

[0007] Cover the core board with a dry film, and expose at least one side edge of the patterned circuit;

[0008] Partially etch at least one side edge of the patterned circuit to obtain a printed circuit board containing trapezoid-like patterned circuits.

[0009] Optionally, the step of covering the core board with a dry film and exposing at least one side edge of the patterned circuit includes:

[0010] Cover the core board with a wet film;

[0011] Expose the wet film in other areas except at least one side edge of the patterned circuit to form a dry film covering the other areas and a wet film on at least one side edge of the patterned circuit;

[0012] Use a developer to remove the wet film to expose at least one side edge of the patterned circuit.

[0013] Optionally, the step of partially etching at least one side edge of the patterned circuit to obtain a printed circuit board containing trapezoid-like patterned circuits includes:

[0014] According to a preset etching amount, perform partial etching on at least one side of the patterned circuit to obtain a printed circuit board including a trapezoid-like patterned circuit, wherein the volume of the etching amount is 10% to 15% of the volume of the patterned circuit.

[0015] Optionally, the width of at least one side of the patterned circuit is 5% to 10% of the width of the patterned circuit.

[0016] Optionally, the obtaining of the core board including the patterned circuit includes:

[0017] Obtain the core board including the metal layer;

[0018] According to a preset circuit pattern, perform pattern transfer on the metal layer to form an initial patterned circuit;

[0019] Perform metal thickening on the initial patterned circuit to obtain the core board including the patterned circuit.

[0020] Optionally, before obtaining the core board including the patterned circuit, it includes:

[0021] Use simulation software to set the circuit parameters of the trapezoid-like patterned circuit, and correspondingly generate a straight-line patterned circuit according to the circuit parameters;

[0022] According to the circuit parameters, correspondingly simulate a right-angled patterned circuit, and perform the steps of obtaining the core board including the patterned circuit and subsequent steps to simulate the trapezoid-like patterned circuit;

[0023] After performing partial etching on at least one side of the patterned circuit to obtain a printed circuit board including a trapezoid-like patterned circuit, it further includes:

[0024] Through the simulation software, obtain the insertion loss comparison result between the simulated right-angled patterned circuit and the trapezoid-like patterned circuit.

[0025] Optionally, the obtaining of the insertion loss comparison result between the right-angled patterned circuit and the trapezoid-like patterned circuit through the simulation software includes:

[0026] Through the simulation software, respectively extract the transmission coefficients of the scattering parameters of the right-angled patterned circuit and the trapezoid-like patterned circuit in the differential mode to obtain the insertion loss comparison result.

[0027] To solve the above technical problems, another technical solution adopted by this application is: a printed circuit board, the printed circuit board includes:

[0028] A trapezoid-like patterned circuit, at least one side of the trapezoid-like patterned circuit is italic.

[0029] Optionally, both sides of the trapezoid-like patterned circuit are italicized.

[0030] Optionally, the width of at least one side of the patterned circuit is 5% - 10% of the width of the patterned circuit.

[0031] To solve the above technical problems, another technical solution adopted in this application is: an electronic device, which includes:

[0032] A memory for storing executable program code;

[0033] A processor for calling and running the executable program code from the memory, so that the electronic device executes the method for preparing a printed circuit board described in any one of the above.

[0034] To solve the above technical problems, another technical solution adopted in this application is: a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the method for preparing a printed circuit board described in any one of the above.

[0035] Different from the prior art, the embodiment of this application provides a method for preparing a printed circuit board, which includes: obtaining a core board containing a patterned circuit; covering the core board with a dry film and exposing at least one side of the patterned circuit; partially etching at least one side of the patterned circuit to obtain a printed circuit board containing a trapezoid-like patterned circuit. Covering the core board with a dry film to partially etch at least one side of the patterned circuit, a printed circuit board with a trapezoid-like patterned circuit is formed without increasing the material cost, so as to improve the current distribution through the trapezoid-like patterned circuit, reduce the high-frequency loss, ensure stable signal transmission, and solve the technical problem of high control cost of the insertion loss of the inner and outer layer circuits of the printed circuit board. Description of the Drawings

[0036] Figure 1 is a schematic flowchart of the first embodiment of the method for preparing a printed circuit board of this application;

[0037] Figure 2 is a schematic flowchart of the second embodiment of the method for preparing a printed circuit board of this application;

[0038] Figures 3a to 3f is a schematic diagram of an exemplary process step of the method for preparing a printed circuit board of this application;

[0039] Figure 4 is a schematic flowchart of the third embodiment of the method for preparing a printed circuit board of this application;

[0040] Figure 5 is an exemplary structural block diagram of an electronic device for the method of manufacturing a printed circuit board according to the present application;

[0041] Figure 6 is an exemplary structural block diagram of a computer-readable storage medium for the method of manufacturing a printed circuit board according to the present application;

[0042] Figure 7 is an exemplary structural block diagram of a computer-readable storage medium for the method of manufacturing a printed circuit board according to the present application.

[0043] Reference numerals in the drawings: core board 1; initial patterned circuit 2; patterned circuit 3; wet film 4; dry film 5; trapezoid-like patterned circuit 6; insertion loss result of right-angled patterned circuit 7; insertion loss result of trapezoid-like patterned circuit 8. Detailed Embodiment

[0044] The present application will be described in detail below with reference to the drawings and embodiments.

[0045] In this embodiment, considering that the development trend of high integration and multi-functionality of electronic products is becoming increasingly obvious, more and more stringent processing and design requirements are imposed on the processing of assembly devices of electronic products. Especially for the printed circuit boards carried by their assembly devices, it is required that their signal transmission has the performance of low delay, high speed, and high frequency.

[0046] With the increase in signal frequency, the control of insertion loss is an urgent issue to be overcome in the processing and manufacturing of printed circuit boards. At present, the research and development of ultra-low dielectric constant or dielectric loss of current materials is difficult and costly, and the processing problems of copper foil surface treatment are also relatively obvious.

[0047] Therefore, in order to avoid replacing with high-cost materials and the low-loss circuit processing method of replacing the copper foil treatment method, this embodiment proposes a circuit processing method for a printed circuit board that can reduce insertion loss, effectively realizing the cost control requirements of the printed circuit board in terms of insertion loss based on existing materials.

[0048] Please refer to Figure 1 , Figure 1 is a schematic flow chart of the first embodiment of the method for manufacturing a printed circuit board according to the present application. It should be noted that if there are substantially the same results, the method of the present application is not limited to Figure 1 the flow sequence shown. As Figure 1 shown, the manufacturing method includes:

[0049] Step S110, obtaining a core board including a patterned circuit;

[0050] Among them, the core board can be the basic material in electronic product manufacturing, used to carry electronic components or wires. The patterned circuit can be the circuit lines pre-constructed on the surface of the core board. The patterned circuit is arranged according to a predetermined design to provide electrical connections for electronic devices.

[0051] Step S120, covering the core board with a dry film and exposing at least one side edge of the patterned circuit;

[0052] Among them, the dry film can be a photosensitive material and can be used to protect and mask the core board. In this embodiment, covering the core board can be covering most areas of the core board with a dry film, only exposing at least one side edge of the patterned circuit, which can ensure that the subsequent etching only acts on the exposed side edge and does not affect the overall structure of the patterned circuit.

[0053] Step S130, partially etching at least one side edge of the patterned circuit to obtain a printed circuit board including a trapezoid-like patterned circuit.

[0054] Among them, the partial etching can be micro-etching. For example, selectively removing a part of the material on the side edge makes the patterned circuit present a trapezoid-like shape in cross-section. Compared with the rectangular shape with the same upper and lower widths of the cross-section of the traditional right-angled circuit, the top of the cross-section of the trapezoid-like patterned circuit is narrower and the bottom is wider. Thus, it can be achieved by performing one-time partial etching on the patterned circuit, relatively reducing the processing steps and effectively realizing the cost control of the insertion loss of the printed circuit board. At the same time, the gradually changing trapezoid-like patterned circuit makes the electric field distribution relatively gentle, can effectively reduce the edge effect generated by the electric field at the edge, relieve the reflection loss of the signal, and thus improve the impedance matching.

[0055] In this embodiment, by covering the core board with a dry film to partially etch at least one side edge of the patterned circuit, a printed circuit board with a trapezoid-like patterned circuit is formed without increasing the material cost, so as to improve the current distribution, reduce the high-frequency loss, ensure the stable transmission of signals, and solve the technical problem of the high control cost of the insertion loss of the inner and outer layer circuits of the printed circuit board.

[0056] Please refer to Figure 2 , Figure 2 which is a schematic flowchart of the second embodiment of the method for preparing the printed circuit board of the present application. In this embodiment, the method includes the following steps:

[0057] Step S210, obtaining the core board including a metal layer;

[0058] Specifically, the metal layer can be copper or copper alloy, used to provide a material basis for subsequent patterning and etching.

[0059] Step S220: According to a preset circuit pattern, perform pattern transfer on the metal layer to form an initial patterned circuit;

[0060] Specifically, according to a pre-designed circuit pattern, the circuit pattern can be transferred onto the metal layer through processes such as photolithography, exposure, and development, thereby determining the initial shape of the circuit and defining the circuit's orientation, width, etc. to form an initial patterned circuit.

[0061] Step S230: Thicken the metal of the initial patterned circuit to obtain the core board containing the patterned circuit.

[0062] Specifically, methods such as electroplating or electroless plating are used to thicken the metal layer of the initial circuit part to increase the circuit's conductivity and mechanical strength. Circuit thickening can improve the current-carrying capacity and corrosion resistance, ensuring the long-term stability of the printed circuit board.

[0063] Step S240: Cover the core board with a wet film;

[0064] Specifically, the wet film can be a liquid photosensitive material that covers the core board to protect and cover the corresponding areas. Through the selective coverage of the wet film, only at least one side of the patterned circuit is exposed, which can effectively improve the accuracy of micro-etching.

[0065] Step S250: Expose the wet film in other areas except at least one side of the patterned circuit to form a dry film covering the other areas and a wet film on at least one side of the patterned circuit;

[0066] Among them, the other areas are the non-patterned circuit areas on the core board and the areas on the patterned circuit area except at least one side. The dry film protects the other areas, and the wet film remains in a state that is easy to remove without exposure to ensure that only the specified side is exposed when the wet film is removed later.

[0067] Specifically, use an exposure machine to irradiate the other areas of the core board to cure the wet film on the other areas, thereby forming a dry film covering the other areas while keeping the wet film state of at least one side area of the patterned circuit unchanged.

[0068] Controlling the width of at least one side of the patterned circuit within 5% - 10% of the total circuit width can effectively achieve delicate structure control, concentrate the current in the main transmission area, and at the same time make the trapezoidal structure avoid being too steep or gentle, ensuring the formation of a uniform signal transmission path. At the same time, precise control can be achieved with a small amount of etching, without the need for multiple large-area etchings of the circuit, thereby avoiding excessive weakening of the total width of the circuit and ensuring the circuit's conductivity and signal integrity.

[0069] Step S260, use a developer to remove the wet film to expose at least one side edge of the patterned circuit.

[0070] Specifically, use a developer to remove the uncured wet film, thereby exposing at least one side edge of the patterned circuit, and the other areas are continuously protected by the dry film to avoid being affected by etching, so as to ensure that the etching operation only acts on the side edges of the patterned circuit without affecting other parts.

[0071] Step S270, perform partial etching on at least one side edge of the patterned circuit according to a preset etching amount to obtain a printed circuit board including a trapezoid-like patterned circuit, wherein the volume of the etching amount is 10% - 15% of the volume of the patterned circuit.

[0072] Specifically, perform partial etching on the exposed side edges of the patterned circuit according to a preset etching amount to make the cross-section trapezoid-like, and the volume of the etching amount can be controlled within 10% - 15% of the volume of the patterned circuit. Form a trapezoid-like circuit cross-sectional structure, and precisely control the etching depth of the circuit side edges by adjusting the etching amount to reduce process and material costs.

[0073] By controlling the trapezoid-like side etching amount within 10% - 15% of the volume of the patterned circuit, the impedance characteristics of the circuit can be optimized, reducing signal reflection and insertion loss; at the same time, the 10% - 15% etching amount can not only increase the optimization effect of the trapezoid structure, but also will not significantly reduce the effective cross-sectional area of the conductor, have a small impact on the circuit volume, maintain sufficient circuit thickness and width, and avoid structural defects or fractures caused by a decrease in circuit strength due to over-etching.

[0074] In an exemplary embodiment, refer to Figures 3a to 3f . Figure 3a Show the core board 1 and the initial patterned circuit 2; Figure 3b Show thickening the initial patterned circuit 2 to form the patterned circuit 3; Figure 3c Show covering the wet film 4 on the surface of the core board 1; Figure 3d Show exposing the wet film 4 in the areas other than the two side edges of the patterned circuit 3 to form the dry film 5 on the surfaces of the other areas, so that the other areas can be protected by the dry film 5 in the subsequent micro-etching step; Figure 3e Show performing micro-etching on the two side edges of the patterned circuit 3 respectively to form the trapezoid-like patterned circuit 6; Figure 3f Show the printed circuit board after multi-layer lamination.

[0075] In this embodiment, in order to avoid using high-cost materials for replacement and the low-loss circuit processing method of replacing the copper foil treatment method, by using simulation software to perform simulation on a printed circuit board including patterned circuits, and combining with the actual circuit processing flow of the printed circuit board, a circuit processing method capable of reducing the insertion loss of the printed circuit board is proposed, which can effectively meet the cost control requirements of the printed circuit board in terms of insertion loss based on existing materials. Please refer to Figure 4 , Figure 4 is a schematic flowchart of the third embodiment of the method for preparing a printed circuit board according to the present application. In this embodiment, the method includes the following steps:

[0076] Step S410, using simulation software to set the circuit parameters of the trapezoid-like patterned circuit, and generating a straight-line patterned circuit according to the circuit parameters;

[0077] Among them, the circuit parameters can be used to determine the physical dimensions and arrangements of each wire in the patterned circuit, and thus directly affect the impedance, insertion loss, and electrical performance of signal transmission. The circuit parameters can include but are not limited to at least one of the circuit length, circuit width, and circuit spacing. Specifically, the circuit length can affect the signal transmission path, and a longer circuit will increase the signal transmission loss; the circuit width can determine the conductive area, the larger its width, the smaller the resistance, and it will also affect impedance matching; the circuit spacing can represent the distance between multiple circuits, and a smaller spacing may increase the parasitic capacitance and affect the signal transmission characteristics.

[0078] Step S420, according to the circuit parameters, correspondingly simulate a printed circuit board including right-angled patterned circuits, and perform the steps of obtaining the core board including the patterned circuits and subsequent steps to simulate the trapezoid-like patterned circuit;

[0079] Specifically, in the simulation environment, a set of right-angled patterned circuit models are created using the same circuit parameters. Then, according to the execution steps of the first embodiment or the second embodiment, a printed circuit board including trapezoid-like patterns can be simulated.

[0080] Among them, the right-angled patterned circuit is rectangular in cross-section and is commonly used for circuit transmission in traditional designs. However, this design may generate a relatively large insertion loss at high frequencies. The trapezoid-like structure in this embodiment can be obtained through partial etching and edge thickening. By using the same parameters, it is ensured that the performance differences between the right-angled patterned circuit and the trapezoid-like patterned circuit under the same circuit parameter conditions can be accurately calculated through simulation, which is convenient for subsequent insertion loss comparison and analysis.

[0081] Step S430, through the simulation software, obtain the insertion loss comparison results of the simulated right-angled patterned circuit and the trapezoid-like patterned circuit.

[0082] Among them, the simulation software is used to simulate the models of right-angled patterned lines and trapezoid-like patterned lines. The simulation software includes, but is not limited to, High Frequency Structure Simulator (HFSS) software, electromagnetic simulation software, full-wave three-dimensional electromagnetic simulation software, Advanced Design System (ADS) software, etc.

[0083] Insertion loss can be the energy lost by a signal after passing through a transmission path. The smaller the insertion loss, the lower the loss of the signal when passing through the transmission line, and the higher the transmission efficiency. By comparing the insertion loss results of the two line structures, it can be determined which structure is more beneficial for signal transmission, and then the design can be optimized.

[0084] Specifically, in the simulation software, insertion loss simulations are performed on the right-angled and trapezoid-like line models, and the simulation results of the insertion loss are compared and analyzed.

[0085] Furthermore, S430 may include: through the simulation software, respectively extract the transmission coefficients of the scattering parameters of the right-angled patterned line and the trapezoid-like patterned line in the differential mode to obtain the insertion loss comparison result.

[0086] Among them, the scattering parameters can be used to represent the reflection and transmission characteristics of signals in network transmission. The transmission coefficient can be a component in the S parameters of the HFSS software, which is used to describe the energy attenuation situation when a signal is transmitted from one port to another port. For example, S21 or SDD12 represents the transmission loss from one input port to the output port. In the differential mode of the scattering parameters, the signal is transmitted through two conductors in opposite phases, which can effectively resist external interference. The transmission coefficient in the differential mode can be SDD12.

[0087] In an exemplary embodiment, the insertion loss values of the right-angled patterned line and the trapezoid-like patterned line are compared under the same specifications. The specific line parameters are shown in Table 1 below.

[0088] Table 1 Right-angled Patterned Line and Trapezoid-like Patterned Line

[0089] model line length line width line pitch right-angled patterned line 100 mil 6 mil 8 mil trapezoid-like patterned line 100 mil 6 mil 8 mil

[0090] Generate corresponding models according to the line parameters in Table 1, and the obtained insertion loss comparison results are as Figure 5 shown. Among them, Figure 5The horizontal axis represents the communication frequency, and the vertical axis represents the insertion loss coefficient. The insertion loss results of the rectangular patterned line 7 and the trapezoid-like patterned line 8. By respectively extracting the SDD12 parameter curves from the S-parameters of the rectangular patterned line and the trapezoid-like patterned line and comparing them, since the trapezoid-like cross-section improves the electric field distribution at the edges, the insertion loss of the printed circuit board is effectively reduced.

[0091] In this embodiment, by simulating the trapezoid-like and rectangular patterned lines, it is verified that the design of the trapezoid-like structure is superior to the traditional rectangular design in terms of signal integrity. The trapezoid-like line structure optimizes the impedance matching to a certain extent, reduces the edge parasitic effect and current concentration, especially showing lower insertion loss in high-frequency signal transmission.

[0092] To solve the above technical problems, another technical solution adopted by this application is: a printed circuit board, which includes:

[0093] A trapezoid-like patterned line, at least one side of the trapezoid-like patterned line is italic.

[0094] Optionally, both sides of the trapezoid-like patterned line are italic.

[0095] Optionally, the width of at least one side of the patterned line is 5% - 10% of the width of the patterned line.

[0096] Please refer to Figure 6 , Figure 6 is an exemplary structural block diagram of an electronic device for the preparation method of the printed circuit board of this application. As Figure 6 shown, the electronic device 600 of this application may include a processor 601 and a memory 602, where the processor 601 and the memory 602 communicate through a bus. The memory 602 stores program instructions for the preparation of the printed circuit board. When the program instructions are executed by the processor 601, the above processor executes the above relevant method steps to implement a preparation method of a printed circuit board in the above embodiment.

[0097] Please refer to Figure 7 , Figure 7 is an exemplary structural block diagram of a computer-readable storage medium for the preparation method of the printed circuit board of this application. As Figure 7 shown, a computer program 701 is stored in the computer-readable storage medium 700. When the computer program 701 runs on a computer by a processor, the computer executes the above relevant method steps to implement a preparation method of a printed circuit board in the above embodiment.

[0098] In the above solution, a core board including a patterned circuit is obtained; a dry film is used to cover the core board, and at least one side of the patterned circuit is exposed; at least one side of the patterned circuit is partially etched to obtain a printed circuit board including a trapezoid-like patterned circuit. By using a dry film to cover the core board to partially etch at least one side of the patterned circuit, a printed circuit board with a trapezoid-like patterned circuit is formed without increasing the material cost, so as to improve the current distribution through the trapezoid-like patterned circuit, reduce the high-frequency loss, ensure stable signal transmission, and solve the technical problem of high control cost of the insertion loss of the inner and outer layer circuits of the printed circuit board.

[0099] In several implementation manners provided in the present application, it should be understood that the disclosed methods, electronic devices, and storage media can be implemented in other ways. For example, the device implementation manners described above are merely illustrative. For example, the division of the modules or units is only a logical function division, and there may be other division manners in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in an electrical, mechanical, or other form.

[0100] The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this implementation manner.

[0101] In addition, each functional unit in various implementation manners of the present application can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of software functional units.

[0102] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the preparation method described in various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs.

[0103] The above are only the embodiments of this application, and do not limit the patent scope of this application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of this application, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of this application.

Claims

1. A method for preparing a printed circuit board, characterized in that: The preparation method comprises: obtaining a core board including patterned circuits; Covering the core board with a dry film and exposing at least one side of the patterned circuit; At least one side of the patterned circuit is partially etched to obtain a printed circuit board including a trapezoidal patterned circuit.

2. The preparation method according to claim 1, characterized in that: The method of covering the core board with a dry film and exposing at least one side of the patterned circuit comprises: Covering the core plate with a wet film; Exposure treatment is performed on the wet film in other areas other than at least one side of the patterned circuit to form a dry film covering the other areas and the wet film on at least one side of the patterned circuit; The wet film is removed by using a developing solution to expose at least one side of the patterned circuit.

3. The preparation method according to claim 1, characterized in that: The method of partially etching at least one side of the patterned circuit to obtain a printed circuit board containing a trapezoidal patterned circuit comprises: According to a preset etching amount, at least one side of the patterned circuit is partially etched to obtain a printed circuit board including a trapezoidal patterned circuit, wherein the volume of the etching amount is 10% to 15% of the volume of the patterned circuit.

4. The preparation method according to claim 1, characterized in that: The width of at least one side of the patterned circuit is 5% to 10% of the width of the patterned circuit.

5. The preparation method according to claim 1, characterized in that: The step of obtaining a core board including a patterned circuit comprises: Obtaining the core board comprising a metal layer; According to a preset circuit pattern, pattern transfer is performed on the metal layer to form an initial patterned circuit; The initial patterned circuit is subjected to metal thickening to obtain the core board including the patterned circuit.

6. The preparation method according to claim 1, characterized in that: Before obtaining the core board including the patterned circuit, the method includes: Using simulation software to set the line parameters of the trapezoidal patterned line, and generating a straight patterned line according to the line parameters; According to the circuit parameters, a corresponding simulation includes a rectangular patterned circuit, and the steps of obtaining a core board including the patterned circuit and subsequent steps are performed to simulate the trapezoidal patterned circuit; After partially etching at least one side of the patterned circuit to obtain a printed circuit board including a trapezoidal patterned circuit, the method further includes: The simulation software is used to obtain the insertion loss comparison results of the simulated rectangular patterned circuit and the trapezoidal patterned circuit.

7. The preparation method according to claim 6, characterized in that: The insertion loss comparison result of the rectangular patterned circuit and the trapezoidal patterned circuit is obtained by the simulation software, including: The simulation software is used to extract the transmission coefficients of the scattering parameters of the rectangular patterned circuit and the trapezoidal patterned circuit in the differential mode, respectively, to obtain the insertion loss comparison result.

8. A printed circuit board, characterized in that: The printed circuit board comprises: A quasi-trapezoidal patterned circuit, wherein at least one side of the quasi-trapezoidal patterned circuit is in italics.

9. The printed circuit board according to claim 8, characterized in that: Both sides of the trapezoidal patterned circuit are in italics.

10. The printed circuit board according to claim 8, characterized in that: The width of at least one side of the patterned circuit is 5% to 10% of the width of the patterned circuit.