Single-chip microcomputer MCU time-delay reset circuit
By introducing a feedback circuit and a self-tuning varactor tube into the delay reset circuit of the microcontroller MCU, the delay time is adjusted in real time, and the problem of power supply voltage fluctuations affecting the delay time is solved, achieving the stability of the delay time and the robustness of the system.
Patent Information
- Application Number
- CN202510351750.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-24
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2045-03-24
AI Technical Summary
When the power supply voltage fluctuates, the delay time is easily affected, making it difficult to ensure the accuracy of the reset timing.
By introducing a feedback circuit and a self-tuning varactor tube, the power supply voltage is monitored in real time and the capacity of the varactor tube is adjusted adaptively to ensure that the delay time remains stable under the fluctuation of the power supply voltage.
The stability of delay time under fluctuations in the power supply voltage is achieved, avoiding error resets, and improving the robustness and reliability of the system.
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Figure CN120215365A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of single-chip microcomputers, and specifically relates to a delay reset circuit for a single-chip microcontroller MCU. Background Art
[0002] In a single-chip microcontroller (MCU) system, the reset circuit is an important part to ensure the reliable operation of the system. In a traditional reset circuit, the reset is directly triggered at the moment of power-on. However, the instability of the power supply voltage may lead to incorrect reset or startup failure. For this reason, a delay reset circuit delays for a period of time after power-on before triggering the reset signal to ensure power stability. However, in the existing delay reset circuit, the delay time is easily affected when the power supply voltage fluctuates, and it is difficult to ensure the accuracy of the reset timing. Therefore, designing a reset circuit that can adaptively adjust the delay time according to the change of the power supply voltage has become the key to improving the stability and innovation of the single-chip microcomputer system. Summary of the Invention
[0003] The purpose of the present invention is to provide a delay reset circuit for a single-chip microcontroller MCU, which solves the problem of incorrect reset at the moment of power-on, and realizes the adaptive adjustment of the delay time through a feedback circuit and a self-tuning varactor, ensuring that the delay time remains stable under the fluctuation of the power supply voltage.
[0004] To achieve the above purpose, the technical solution of the present invention is as follows:
[0005] A delay reset circuit for a single-chip microcontroller MCU includes an RC delay network circuit, a Schmitt trigger U1A, and a feedback circuit;
[0006] The RC delay network circuit: includes a resistor R1 and a varactor C1;
[0007] The resistor R1: one end is connected to the power supply Vcc, and the other end is connected to the varactor C1 and the input end of the Schmitt trigger U1A;
[0008] The varactor C1: as a variable capacitance element, one end is connected to the resistor R1 and the input end of the Schmitt trigger U1A, and the other end is grounded;
[0009] The Schmitt trigger U1A: the input end is connected to the common node of the resistor R1 and the varactor C1, and the output end is connected to the reset pin of the single-chip microcomputer;
[0010] The feedback circuit: includes a voltage detection circuit and a bias voltage control circuit, which are used to monitor the power supply voltage Vcc and adjust the bias voltage of the varactor C1 to self-tune its capacitance value; the voltage detection circuit: includes a voltage division network composed of a resistor R2 and a resistor R3. One end of the resistor R2 is connected to Vcc, and the other end is connected to the resistor R3; the other end of the resistor R3 is grounded;
[0011] Bias voltage control circuit: It includes operational amplifier U2 and resistor R4; the negative input terminal of the operational amplifier U2 is connected to the reference voltage Vref, the positive input terminal is connected to the common node of resistor R2 and resistor R3, and the output terminal is connected to the control terminal of varactor diode C1 through resistor R4.
[0012] Preferably, when the RC delay network circuit is powered on, the varactor diode C1 is charged through resistor R1, and the voltage gradually rises. The delay time is determined by the resistance value of resistor R1 and the capacitance value of varactor diode C1.
[0013] Preferably, the voltage detection of the feedback circuit outputs the voltage through the voltage division of resistor R2 and resistor R3 reflecting the change of Vcc.
[0014] Preferably, the bias control of the feedback circuit compares the output voltage V sense with the reference voltage V ref , and outputs the bias voltage V bias ; when Vcc increases, the output voltage V sense increases, the bias voltage V bias decreases, and the capacitance value of varactor diode C1 decreases; when Vcc decreases, the output voltage V sense decreases, the bias voltage V bias increases, and the capacitance value of varactor diode C1 increases.
[0015] Preferably, the capacitance value of the varactor diode C1 changes with the bias voltage V bias to compensate for the influence of Vcc fluctuation on the delay time, keep the delay time t stable, and form a self-tuning mechanism.
[0016] Preferably, the Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches the high-level threshold Vth, a reset signal is output.
[0017] Preferably, the delay network time of the RC delay network circuit where C D is the capacitance value of varactor diode C1, and C D is dynamically adjusted by the feedback circuit.
[0018] Adopting the above scheme, the beneficial effect of the present invention is:
[0019] The present invention provides a delay reset circuit for a single-chip microcomputer MCU. The self-adaptability of the circuit monitors Vcc in real time through the feedback circuit and adjusts the capacitance value C of the varactor diode C1 D, Ensure that the delay time is stable under voltage fluctuations, avoid false reset, and improve the system robustness. In the implementation, a feedback circuit containing operational amplifier U2 and a self-tuning mechanism of varactor diode C1 are introduced. The circuit is simple and the cost is controllable, which solves the problem of reset deadlock of the microcontroller (MCU) in complex application scenarios and strong electromagnetic environments. Brief Description of the Drawings
[0020] Figure 1 It is the circuit schematic diagram of the embodiment of the present invention; Detailed Embodiment
[0021] Typical embodiments reflecting the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various changes in different embodiments, all of which do not depart from the scope of the present invention, and the descriptions and illustrations therein are essentially for illustrative purposes rather than to limit the present invention. For those of ordinary skill in the art, the specific meanings of the various terms in this application document in the present invention can be understood according to specific circumstances.
[0022] The embodiment of the present invention provides a delay reset circuit for a microcontroller MCU, which is applied to the on-chip reset module of the microcontroller.
[0023] Circuit Structure
[0024] As Figure 1 shown, a delay reset circuit for a microcontroller MCU provided by the present invention includes an RC delay network circuit, a Schmitt trigger U1A and a feedback circuit;
[0025] RC delay network circuit: includes resistor R1 and varactor diode C1;
[0026] Resistor R1: One end is connected to Vcc, and the other end is connected to the varactor diode C1 and the input terminal IN of the Schmitt trigger U1A;
[0027] Varactor diode C1: One end is connected to resistor R1 and the input terminal IN of the Schmitt trigger U1A, the other end is grounded, and the control terminal is connected to the feedback circuit;
[0028] Schmitt trigger U1A: The input terminal IN is connected to the common node of resistor R1 and varactor diode C1, and the output terminal OUT is connected to the reset pin NRST of the microcontroller;
[0029] Feedback circuit: includes a voltage detection circuit and a bias voltage control circuit, which are used to monitor the power supply voltage Vcc and adjust the bias voltage of the varactor diode C1 to self-tune its capacitance value;
[0030] Voltage detection circuit: includes a voltage division network composed of resistor R2 and resistor R3; One end of resistor R2 is connected to Vcc, the other end is connected to one end of resistor R3, and the other end of resistor R3 is grounded;
[0031] Bias voltage control circuit: includes operational amplifier U2 and resistor R4; the negative input terminal of operational amplifier U2 is connected to Vref, the positive input terminal is connected to the common node of resistor R2 and resistor R3, and the output terminal is connected to the control terminal of varactor diode C1 through R4.
[0032] When the RC delay network circuit is powered on, the varactor diode C1 is charged through resistor R1, and the voltage gradually rises. The delay time is determined by the resistance value of resistor R1 and the capacitance value of varactor diode C1.
[0033] The voltage detection of the feedback circuit outputs the voltage through the voltage division of resistor R2 and resistor R3
[0034] The bias control of the feedback circuit compares the output voltage V through operational amplifier U2 sense with the reference voltage V ref , and outputs the bias voltage V bias ; when Vcc increases, the output voltage V sense increases, the bias voltage V bias decreases, and the capacitance value of varactor diode C1 decreases; when Vcc decreases, the output voltage V sense decreases, the bias voltage V bias increases, and the capacitance value of varactor diode C1 increases.
[0035] The capacitance value of the varactor diode C1 changes with the bias voltage V bias to compensate for the influence of Vcc fluctuation on the delay time and keep the delay time t stable, forming a self-tuning mechanism.
[0036] The Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches the high-level threshold Vth, a reset signal is output.
[0037] The delay network time of the RC delay network circuit where C D is the capacitance value of the varactor diode C1, and C D is dynamically adjusted by the feedback circuit.
[0038] A single-chip microcomputer MCU delay reset circuit provided by the present invention has the following working process:
[0039] 1. After Vcc is powered on, the varactor diode C1 is charged through resistor R1, and the voltage at the input terminal IN of the Schmitt trigger U1A rises.
[0040] 2. Feedback circuit:
[0041] The resistor R2 and resistor R3 divide the voltage to generate the output voltage V sense , and the operational amplifier U2 compares the output voltage V sense with the reference voltage Vref;
[0042] If Vcc increases and V sense > Vref, the output voltage V sense increases, and the output bias voltage V of the operational amplifier U2 bias decreases, and the capacitance value C of the varicap C1 D decreases; if Vcc decreases, the output voltage V sense decreases, and the bias voltage V bias increases, and the capacitance value C of the varicap C1 D increases.
[0043] 3. When the IN voltage reaches the high-level threshold Vth of the Schmitt trigger U1A, OUT flips and outputs a reset signal.
[0044] Parameter Design
[0045] Target delay: t = 100 ms, nominal Vcc = 5 V, Vth = 3 V.
[0046] Component selection: R1 = 100 kΩ, nominal capacitance C of the varicap C1 D = 1 μF (when V bias = 2 V), R2 = 20 kΩ, R3 = 10 kΩ, Vref = 1.5 V, R4 = 1 kΩ.
[0047] Self-tuning Verification:
[0048] When Vcc = 5 V, the operational amplifier U2 adjusts V bias ≈ 2 V, C D = 1 μF, t ≈ 100 ms.
[0049] When Vcc = 5.5 V, the bias voltage V bias decreases, and the capacitance value C of the varicap C1 D decreases to about 0.9 μF, and t remains close to 100 ms.
[0050] Implementation Effect
[0051] Experiments show that when Vcc fluctuates by ±10%, the delay time deviation < 5%, which is significantly better than the traditional design. The circuit is applicable to industrial control, Internet of Things and other fields.
[0052] From the above embodiments, it can be seen that the self-adaptability of the circuit of the present invention monitors Vcc in real time through the feedback circuit and adjusts the capacitance value C of the varicap C1 D , ensuring that the delay time is stable under voltage fluctuations, avoiding misreset, and improving the system robustness. In the implementation, a feedback circuit containing an operational amplifier and a varicap self-tuning mechanism are introduced. The circuit is simple and the cost is controllable, solving the problem of reset deadlock of the microcontroller (MCU) in complex application scenarios and strong electromagnetic environments.
[0053] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A single-chip microcomputer MCU delayed reset circuit, characterized in that: Including RC delay network circuit, Schmitt trigger U1A and feedback circuit; RC delay network circuit: including resistor R1 and varactor C1; Resistor R1: one end is connected to the power supply Vcc, and the other end is connected to the varactor C1 and the input end of the Schmitt trigger U1A; Varactor C1: as a variable capacitance element, one end of which is connected to the resistor R1 and the input end of the Schmitt trigger U1A, and the other end is grounded; Schmitt trigger U1A: The input end is connected to the common node of resistor R1 and varactor C1, and the output end is connected to the reset pin of the microcontroller; Feedback circuit: including voltage detection circuit and bias voltage control circuit, used to monitor power supply voltage Vcc and adjust bias voltage of varactor C1 to self-tune its capacitance; Voltage detection circuit: comprising a voltage divider network composed of resistors R2 and R3; one end of the resistor R2 is connected to Vcc, and the other end is connected to one end of the resistor R3; the other end of the resistor R3 is grounded; The bias voltage control circuit includes an operational amplifier U2 and a resistor R4; the negative input terminal of the operational amplifier U2 is connected to the reference voltage Vref, the positive input terminal is connected to the common node of the resistors R2 and R3, and the output terminal is connected to the control terminal of the varactor C1 through the resistor R4.
2. The single-chip microcomputer MCU delayed reset circuit according to claim 1, characterized in that: When the RC delay network circuit is powered on, the varactor C1 is charged through the resistor R1, and the voltage gradually rises. The delay time is determined by the capacitance of the resistor R1 and the varactor C1.
3. The single-chip microcomputer MCU delayed reset circuit according to claim 1, characterized in that: The voltage detection of the feedback circuit outputs the voltage through the resistor R2 and the resistor R3.
4. The single-chip microcomputer MCU delayed reset circuit according to claim 3, characterized in that: The bias control of the feedback circuit compares the output voltage V through the operational amplifier U2 sense With reference voltage V ref , output bias voltage V bias ; When Vcc increases, the output voltage V sense Increase, bias voltage V bias decreases, the capacitance of the varactor C1 decreases; when Vcc decreases, the output voltage V sense Decrease, bias voltage V bias Increases, and the capacitance of the varactor C1 increases.
5. The single-chip microcomputer MCU delayed reset circuit according to claim 4, characterized in that: The capacitance of the varactor C1 changes with the bias voltage V bias Changes to compensate for the impact of Vcc fluctuations on the delay time, keep the delay time t stable, and form a self-tuning mechanism.
6. The single-chip microcomputer MCU delayed reset circuit according to claim 1, characterized in that: The Schmitt trigger U1A converts the output of the RC delay network circuit into a digital signal; when the input voltage reaches the high level threshold Vth, a reset signal is output.
7. The single-chip microcomputer MCU delayed reset circuit according to claim 6, characterized in that: The delay network time of the RC delay network circuit Among them C D is the capacitance of the varactor C1, C D Dynamically regulated by a feedback circuit.
Citation Information
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