Active power consumption management system
By designing an active power consumption management system including a current monitoring module, a first current management module and a first clock module, the lack of current monitoring flexibility and comprehensiveness in the prior art is solved, and multi-particle power consumption management and faster response are achieved.
Patent Information
- Application Number
- CN202510706840.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-06-27
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
In the active power consumption management of the prior art, the flexibility and comprehensiveness of current monitoring are poor, making it difficult to achieve refined and multi-particle power consumption management.
An active power consumption management system is designed, including a current monitoring module, a first current management module and a first clock module. The current monitoring module calculates the equivalent current based on the key signals and preset weights in the chip. The first current management module performs current overlimit analysis through the accumulator and the buffer unit, and sends control instructions to the first clock module for frequency down and/or step-down processing.
Through the combination of multiple sets of accumulators and buffer units, the current average limit analysis under multiple time windows is realized, which improves the comprehensiveness and flexibility of current monitoring, and can manage the power consumption of the chip more precisely.
Smart Images

Figure CN120215671A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power consumption management, and particularly to an active power consumption management system. Background Art
[0002] In the scenario of power consumption management for a chip, the existing solutions usually add connection lines between the power supply module and the chip. After the power supply module detects that the current exceeds the standard, it feeds back to the chip through the connection lines, which can only achieve passive management of the chip current. Moreover, the feedback path needs to pass through the connection lines, resulting in a relatively long feedback path, making the response of power consumption management lag. In addition, the management granularity of the above solutions is relatively coarse, and it is difficult to achieve refined and multi-granularity power consumption management.
[0003] In addition, there is a method that proposes to calculate the equivalent current of the chip according to the time ratio of the key signals in the chip being high-valid, which can obtain the current of the chip in each extremely short time and can achieve real-time monitoring and regulation of the chip current at the microsecond level. In addition, there is also a system that proposes to quickly adjust the internal load of the chip by actively reducing the instruction emission density.
[0004] Based on the above solutions, the response speed of power consumption management can be effectively improved. However, there is still a need for multi-granularity current monitoring so that the chip can operate normally under specific working conditions. The comprehensiveness and flexibility of current monitoring in the existing solutions are still poor.
[0005] Therefore, how to improve the flexibility and comprehensiveness of current monitoring during active power consumption management has become an urgent problem to be solved. Summary of the Invention
[0006] For the above technical problems, the technical solution adopted by the present invention is as follows: An active power consumption management system, the system includes: a current monitoring module, a first current management module, and a first clock module, wherein the first current management module includes M accumulators and a cache unit corresponding to each accumulator, and M is an integer greater than zero.
[0007] The current monitoring module is used to determine the equivalent current of the same power supply domain corresponding to each key signal in the chip within the preset time period according to the preset weights corresponding to each key signal in the chip and the time ratio of being high-valid within the preset time period.
[0008] The first current management module is used to perform current overlimit analysis based on the equivalent currents respectively determined by the current monitoring module within a plurality of preset time periods, and obtain M first analysis results. When the M first analysis results meet the first preset condition, a preset control instruction is sent to the first clock module. Among them, the accumulator is used to accumulate the equivalent currents of a plurality of preset time periods, and the accumulated result is used as the first current within the unit time period corresponding to the accumulator.
[0009] The buffer unit is used to calculate the average value based on the plurality of first currents output by the corresponding accumulator, obtain the current average value corresponding to the target time period, and use the current average value corresponding to the target time period as the first analysis result of the corresponding accumulator.
[0010] The first clock module is used to perform frequency reduction and / or voltage reduction processing according to the preset control instruction after receiving the preset control instruction.
[0011] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solutions, an active power consumption management system provided by the present invention can achieve considerable technical progress and practicality, and has wide utilization value in the industry. It has at least the following beneficial effects: The present invention provides an active power consumption management system, which includes: a current monitoring module, a first current management module, and a first clock module. Among them, the first current management module includes M accumulators and a buffer unit corresponding to each accumulator, where M is an integer greater than zero. The current monitoring module is used to determine the equivalent current of the same power supply domain of each key signal in the chip according to the preset weights corresponding to each key signal in the chip and the time ratio of being high-effective within a preset time period. The first current management module is used to perform current overlimit analysis based on the equivalent currents respectively determined by the current monitoring module within a plurality of preset time periods, and obtain M first analysis results. When the M first analysis results meet the first preset condition, a preset control instruction is sent to the first clock module. Among them, the accumulator is used to accumulate the equivalent currents of a plurality of preset time periods, and the accumulated result is used as the first current within the unit time period corresponding to the accumulator. The buffer unit is used to calculate the average value based on the plurality of first currents output by the corresponding accumulator, obtain the current average value corresponding to the target time period, and use the current average value corresponding to the target time period as the first analysis result of the corresponding accumulator. The first clock module is used to perform frequency reduction and / or voltage reduction processing according to the preset control instruction after receiving the preset control instruction.
[0012] It can be seen that each accumulator corresponds to a cache unit respectively. Thus, through multiple groups of accumulators and cache units, the over-limit analysis of the current mean value under multiple time windows is realized, the multi-granularity current monitoring is achieved, and the comprehensiveness and flexibility of the current monitoring are improved. Description of the Drawings
[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0014] Figure 1 It is a schematic structural diagram of an active power consumption management system provided by an embodiment of the present invention. Detailed Embodiments
[0015] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.
[0016] This embodiment provides an active power consumption management system. Refer to Figure 1 , which is a schematic structural diagram of an active power consumption management system provided by an embodiment of the present invention. The system includes: a current monitoring module, a first current management module, and a first clock module. Among them, the first current management module includes M accumulators and a cache unit corresponding to each accumulator, where M is an integer greater than zero; The current monitoring module is used to determine the equivalent current of the same power supply domain of the key signals in the chip according to the preset weights corresponding to each key signal in the chip and the time ratio of being high-effective within a preset time period; The first current management module is used to perform current over-limit analysis on the equivalent currents respectively determined by the current monitoring module in a plurality of preset time periods to obtain M first analysis results. When the M first analysis results meet the first preset condition, a preset control instruction is sent to the first clock module. Among them, the accumulator is used to accumulate the equivalent currents of a plurality of preset time periods, and the accumulated result is used as the first current within the unit time period corresponding to the accumulator; The cache unit is used to calculate the mean value of the first currents output by the corresponding accumulator to obtain the current mean value corresponding to the target time period, and use the current mean value corresponding to the target time period as the first analysis result of the corresponding accumulator; The first clock module is configured to perform frequency downscaling and / or voltage downscaling according to the preset control instruction after receiving the preset control instruction.
[0017] Wherein, the active power management system is applied to a chip to monitor the current in the chip and then manage the chip power consumption. The multiple key signals are multiple key signals corresponding to at least one circuit module in the same power supply domain of the same chip. The same power supply domain means that each circuit module shares the same voltage source for power supply. The time ratio of the high-valid time corresponding to each key signal is different under different working states of the chip. The first current management module is based on the time ratio of the high-valid time of each key signal in the same preset time period, and weights and sums up the time ratios of the high-valid time of the multiple key signals according to the preset weights of each key signal to obtain the equivalent current corresponding to the preset time period. High-valid can refer to high-level valid. The key signal can refer to the signal in each circuit module in the same power supply domain that represents a major contribution to the current of the chip. For a certain circuit module, the operations represented by different key signals have different impacts on the current of the circuit module.
[0018] Specifically, the current monitoring module sequentially predicts the equivalent currents corresponding to multiple preset time periods in chronological order, and after predicting the equivalent current corresponding to a preset time period, sends the equivalent current to the first current management module, that is, sends it to M accumulators respectively. It should be noted that each preset time period can be defaulted to be equivalent, and the preset time period can correspond to a clock cycle of the chip.
[0019] In a specific implementation manner, the accumulator corresponds to an accumulated value; Correspondingly, the accumulator is used to accumulate the equivalent currents of several preset time periods, and takes the accumulated result as the first current in the unit time period corresponding to the accumulator, including: The accumulator is configured to accumulate the equivalent current with the accumulated value when receiving the equivalent current, and update the accumulated value with the accumulated result; The accumulator is further configured to send the accumulated value as the first current to the cache unit corresponding to the accumulator and set the accumulated value to zero when receiving a preset signal.
[0020] Wherein, the preset signal can refer to a pulse signal. For example, when the preset signal is a rising edge, the accumulated value at this time is used as the first current corresponding to a unit time period, sent to the corresponding cache unit, and then the accumulated value is set to zero.
[0021] Specifically, the equivalent current is sent to the accumulator according to the clock cycle, and the accumulator accumulates the equivalent current with an absolute time length according to its corresponding preset signal, so as to obtain the first current within the time window corresponding to the preset signal.
[0022] It should be noted that the preset signals corresponding to different accumulators are different, so the time windows corresponding to different accumulators are different, that is, the unit time period lengths corresponding to different accumulators are different, so that multi-granularity current monitoring can be realized through different accumulators.
[0023] In a specific implementation manner, the system further includes a second clock module, and the cache units corresponding to the M accumulators are the same; The second clock module is used to configure the preset signals corresponding to the M accumulators respectively.
[0024] Among them, the second clock module can use the reference clock refclk provided by the PCIE device. Through the second clock module, the implementer can configure the preset signals corresponding to the M accumulators respectively, so as to realize current monitoring under different time windows.
[0025] In a specific implementation manner, the cache unit is a first-in first-out cache unit, the capacity of the cache unit is N, and the cache unit corresponds to the current mean value; Correspondingly, the cache unit is used to calculate the mean value according to several first currents output by the corresponding accumulator to obtain the current mean value corresponding to the target time period, and further includes: When the cache unit receives a new first current, calculate the difference between the new first current and the first current with the earliest time sequence in the cache unit; Add the ratio of the difference to N to the current mean value corresponding to the cache unit, and update the current mean value corresponding to the cache unit with the addition result.
[0026] Among them, the cache unit can be a first-in first-out cache unit (FIFO). In this embodiment, the capacities of the respective cache units are the same, all being N. The current mean value is calculated through the cache unit, that is, the mean value of the first currents in N unit time periods is calculated.
[0027] Specifically, in this embodiment, the moving average method is adopted to calculate the current mean value. When the cache unit receives a new first current, calculate the difference between the new first current and the first current with the earliest time sequence in the cache unit, add the ratio of the difference to N to the current mean value corresponding to the cache unit, and update the current mean value corresponding to the cache unit with the addition result, so as to realize the mean value calculation with a relatively small amount of calculation.
[0028] It should be noted that whenever the cache unit receives a new first current, the average current is updated, and the average current is used as a new analysis result to determine whether the first preset condition is satisfied.
[0029] In a specific implementation, the cache unit corresponds to an average current threshold; The first preset condition is that there exists a cache unit whose average current corresponding to the target time period is greater than its corresponding average current threshold.
[0030] Among them, when the average current updated after any cache unit receives a new first current is greater than its preset average current threshold, it is considered that the average current under the time window corresponding to this cache unit exceeds the limit, that is, the M analysis results satisfy the first preset condition, and power consumption control is required at this time.
[0031] Specifically, the implementer can determine the down-frequency and / or down-voltage amplitude corresponding to the preset control instruction according to the amplitude by which the average current updated by the cache unit exceeds its corresponding average current threshold.
[0032] In a specific implementation, the system further includes a second current management module and a conversion module; The second current management module is used to perform current change rate analysis based on the equivalent currents respectively determined by the current monitoring module within a plurality of preset time periods to obtain a second analysis result. When the second analysis result is greater than a preset current change rate threshold, a frequency modulation instruction is sent to the conversion module; The conversion module is used to reduce the operating frequency of the chip after receiving the frequency modulation instruction.
[0033] Among them, the second current management module can be used to monitor that the current change rate does not exceed a preset current change rate threshold. The second current management module can include a second accumulator and a shift register. The second accumulator can also be used to accumulate the equivalent currents within a plurality of preset time periods, and the accumulation result is used as the second current within the unit time period corresponding to the accumulator.
[0034] After the second accumulator obtains a new second current, the second current is sent to the shift register. At this time, the output of the shift register and the second current are used for difference calculation to obtain the current change rate.
[0035] Specifically, the implementer can use multiple shift registers to calculate the current change rate under different time windows. Correspondingly, when the current change rate corresponding to any shift register exceeds the current change rate threshold, a frequency modulation instruction is sent to the conversion module.
[0036] In this embodiment, the frequency modulation instruction can refer to a half-frequency reduction instruction.
[0037] In a specific embodiment, the conversion module corresponds to a frequency-down state, and the frequency-down state includes a frequency-down state and a non-frequency-down state; The conversion module is configured to reduce the operating frequency of the chip after receiving the frequency modulation instruction, including; The conversion module is configured to reduce the operating frequency of the chip when receiving the frequency modulation instruction and the frequency-down state is the non-frequency-down state.
[0038] Among them, since the conversion module is also used to implement functions such as monitoring current jitter, therefore, the conversion module may have performed frequency modulation processing due to other conditions, but the calculation of the current change rate is the same at different frequencies. Therefore, when the conversion module receives the frequency modulation instruction, it is also necessary to obtain that the frequency-down state is the non-frequency-down state before reducing the operating frequency of the chip.
[0039] In one embodiment, the conversion module can send the frequency-down state to the second current management module, and the second current management module sends a frequency modulation instruction when the second analysis result is greater than a preset current change rate threshold and the frequency-down state is the non-frequency-down state.
[0040] In a specific embodiment, the system further includes: a high-speed power bus and the chip, and the current monitoring module is further used for current prediction; The update process of the preset weights corresponding to each key signal in the chip is as follows: Input a reference application into the chip, obtain the predicted current output by the current monitoring module, and obtain the reference current through the high-speed power bus; Determine the training loss according to the predicted current and the reference current, and update the preset weights corresponding to each key signal in the chip according to the training loss.
[0041] Among them, the training loss can be calculated using the mean square error loss function. According to the training loss, the preset weights corresponding to each key signal in the chip are updated until the training loss converges, and the updated preset weights corresponding to each key signal in the chip are obtained.
[0042] Specifically, the implementer can perform offline update on the preset weights corresponding to each key signal in the chip according to the historical predicted current and historical reference current corresponding to the historical application, and perform online fine-tuning on the preset weights corresponding to each key signal in the chip when the chip executes the reference application in real time.
[0043] It can be seen that each accumulator corresponds to a cache unit respectively. Thus, through multiple groups of accumulators and cache units, the over-limit analysis of the current mean value under multiple time windows is realized, the multi-granularity current monitoring is achieved, and the comprehensiveness and flexibility of the current monitoring are improved.
[0044] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for illustration and not for limiting the scope of the present invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the present invention. The scope disclosed by the present invention is defined by the appended claims.
Claims
1. An active power consumption management system, characterized in that, The system includes: a current monitoring module, a first current management module, and a first clock module. Among them, the first current management module includes M accumulators and a cache unit corresponding to each accumulator, where M is an integer greater than zero; The current monitoring module is configured to determine the equivalent current of the same power domain of each key signal in the chip within a preset time period according to the preset weights corresponding to each key signal in the chip and the time ratio of being high-effective within the preset time period; The first current management module is configured to perform current overlimit analysis based on the equivalent currents respectively determined by the current monitoring module within a plurality of preset time periods to obtain M first analysis results. When the M first analysis results meet a first preset condition, a preset control instruction is sent to the first clock module. Among them, the accumulator is configured to accumulate the equivalent currents of a plurality of preset time periods, and use the accumulation result as the first current within the unit time period corresponding to the accumulator; The cache unit is configured to calculate the current mean value corresponding to the target time period according to a plurality of first currents output by the corresponding accumulator, and use the current mean value corresponding to the target time period as the first analysis result of the corresponding accumulator; The first clock module is configured to perform frequency reduction and / or voltage reduction processing according to the preset control instruction after receiving the preset control instruction.
2. The active power consumption management system according to claim 1, characterized in that The accumulator corresponds to an accumulated value; Correspondingly, the accumulator is configured to accumulate the equivalent currents of a plurality of preset time periods, and use the accumulation result as the first current within the unit time period corresponding to the accumulator, including: The accumulator is configured to, when receiving an equivalent current, accumulate the equivalent current with the accumulated value, and update the accumulated value with the accumulation result; The accumulator is further configured to, when receiving a preset signal, send the accumulated value as the first current to the cache unit corresponding to the accumulator, and set the accumulated value to zero.
3. The active power consumption management system according to claim 2, wherein The system further includes a second clock module, and the cache units corresponding to the M accumulators are the same; The second clock module is configured to configure the preset signals corresponding to the M accumulators respectively.
4. The active power consumption management system according to claim 1, characterized in that The cache unit is a first-in-first-out cache unit, the capacity of the cache unit is N, and the cache unit corresponds to a current mean value; Correspondingly, the cache unit is configured to calculate the current mean value corresponding to the target time period according to a plurality of first currents output by the corresponding accumulator, and further includes: When the cache unit receives a new first current, calculate the difference between the new first current and the first current with the earliest timing in the cache unit; Add the ratio of the difference to N to the current mean value corresponding to the cache unit, and update the current mean value corresponding to the cache unit with the addition result.
5. The active power consumption management system according to claim 1, wherein The cache unit corresponds to a current mean value threshold; The first preset condition is that there exists a cache unit, and the current mean value of this cache unit corresponding to the target time period is greater than its corresponding current mean value threshold.
6. The active power consumption management system according to claim 1, wherein The system further includes a second current management module and a conversion module; The second current management module is configured to perform current change rate analysis based on the equivalent currents respectively determined by the current monitoring module within a plurality of preset time periods, so as to obtain a second analysis result. When the second analysis result is greater than a preset current change rate threshold, a frequency modulation instruction is sent to the conversion module; The conversion module is configured to reduce the operating frequency of the chip after receiving the frequency modulation instruction.
7. The active power consumption management system according to claim 6, wherein The conversion module corresponds to a frequency reduction state, and the frequency reduction state includes a frequency-reduced state and a non-frequency-reduced state; The conversion module is configured to reduce the operating frequency of the chip after receiving the frequency modulation instruction, including; The conversion module is configured to reduce the operating frequency of the chip when the frequency modulation instruction is received and the frequency reduction state is the non-frequency-reduced state.
8. The active power consumption management system according to claim 1, wherein The system further includes: a high-speed power bus and the chip, and the current monitoring module is further configured for current prediction; The update process of the preset weights corresponding to each key signal in the chip is as follows: Input a reference application into the chip to obtain a predicted current output by the current monitoring module and a reference current obtained through the high-speed power bus; Determine a training loss according to the predicted current and the reference current, and update the preset weights corresponding to each key signal in the chip according to the training loss.
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