Task processing method and device, and related equipment

Abstract

A task processing method and device and related equipment relate to the technical field of computers. A first task is executed, the first task including multiple subtasks, and a subtask being executed is a first subtask. In the process of executing the first subtask, when a second task to be executed has a higher priority than the first task, after the first subtask is executed, the second task is executed preferentially, the first subtask and the second task are executed by the same processing unit, and after the second task is executed, the remaining subtasks in the first task are executed. In this way, in the process of executing the first task, the second task with a higher priority is inserted for execution, and the entire first task does not need to be executed to completion, thereby reducing the time delay of processing the second task with a higher priority, so that the requirement of an application for the processing time delay of the second task can be met, and the performance of the application is optimized.

Description

[0001] This application is a divisional application, the original application number is 202311832069.6, the original application date is December 27, 2023, and the entire contents of the original application are incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of task processing, and in particular to a task processing method, device and related equipment. BACKGROUND

[0003] With the development of multi-core processor core architecture, using multi-core parallel processing tasks has become the mainstream task processing mode.

[0004] At present, in the process of processing tasks by multiple processor cores, there are often cases where multiple tasks need to use the same processor core for processing. Since the execution mode of the processor core architecture is usually run-to-completion, that is, after the first task is started, the processor core will continue to execute the first task until the first task is executed, therefore, the second task needs to wait for the first task to be executed before the second task can continue to be executed using the processor core.

[0005] However, this way of processing tasks increases the processing time of the second task and reduces the processing efficiency of the second task. When the second task is a time-sensitive task, the time delay of the second task being executed will exceed the upper limit of the time delay that the second task can tolerate, thereby affecting the operation of the upper-layer business corresponding to the second task. SUMMARY

[0006] The present application provides a task processing method to enable high-priority tasks (such as time-sensitive businesses) to be executed first in the case of run-to-completion execution mode of the processor core architecture, thereby meeting the low-latency requirement of high-priority tasks being processed. In addition, the present application also provides a task processing device, a computing device, a computer-readable storage medium and a computer program product.

[0007] In a first aspect, the present application provides a task processing method, which can be executed by a corresponding task processing apparatus. Specifically, the task processing apparatus executes a first task, which includes a plurality of subtasks. The task processing apparatus can divide the first task into the plurality of subtasks, and the currently executed subtask is a first subtask. During execution of the first subtask, when a second task to be executed is detected, and the priority of the second task is higher than the priority of the first task, the task processing apparatus executes the second task after the first subtask is executed, and the first subtask and the second task are executed by the same processing unit, which can be a processor core or the like. After the second task is executed, the task processing apparatus executes the remaining subtasks of the first task, i.e., the subtasks of the first task other than the first subtask, such as continuing to execute the remaining subtasks by the processor core.

[0008] During execution of the first task, for the second task with higher priority, the task processing apparatus executes the second task by the processing unit after the first subtask in the currently executed first task is executed. That is, during execution of the first task, the task processing apparatus inserts execution of the second task with higher priority, without waiting for the entire first task to be executed, so as to reduce the time delay of processing the second task with higher priority, thereby meeting the requirement of the application for the processing time delay of the second task, and optimizing the performance of the application.

[0009] In a possible implementation, before executing the first task, the task processing apparatus identifies the first task as a low-priority task according to the type of the first task, and divides the first task into a plurality of subtasks. In this way, during execution of each subtask in the first task with lower priority, if there is a task with higher priority waiting to be executed, the task with higher priority can be executed after the currently executed subtask in the first task is executed, so as to reduce the time delay of processing the second task with higher priority.

[0010] In a possible implementation, the first task includes a plurality of task classes, and the task processing apparatus can divide the first task into a plurality of subtasks according to the plurality of task classes included in the first task. In this case, each subtask includes at least one task class. In this way, the task processing apparatus can divide the subtasks according to the task classes in the task.

[0011] In a possible implementation, the first task includes a plurality of operators, and the task processing apparatus can divide the first task into a plurality of subtasks according to the plurality of operators included in the first task. In this case, each subtask includes at least one operator. In this way, the task processing apparatus can divide the subtasks according to the operators in the task.

[0012] In a possible implementation, the first task and the second task are thread tasks in a first process task, and the task processing apparatus can further edit the first process task into a first computation graph including the first task and the second task according to the editing model, and the first computation graph can be configured to indicate a dependency relationship between different thread tasks in the first process task, for example, different thread tasks can be indicated by different nodes in the first computation graph, and the dependency relationship between different thread tasks can be indicated by a directed edge between the nodes, and the dependency relationship refers to a dependency relationship between thread tasks to be executed, so that the task processing apparatus can detect the second task that can be executed at present from the first computation graph. In this way, the task processing apparatus can implement processing of thread tasks in sequence through the computation graph, and ensure smooth execution of the thread tasks.

[0013] In a possible implementation, when the application is started, the runtime scheduler (i.e., the task processing apparatus) can apply for processor resources from the memory, and the processor resources can be used as user-mode resources, and the processor resources can include a plurality of cores, so that when the first process task is started, the runtime scheduler can intercept a resource application request for the first process task, and allocate the user-mode resources to the first process task. In this way, in the process of executing the thread tasks in the first process task by using the user-mode resources, a switching process between the user mode and the kernel mode can not be performed, and the switching overhead between the user mode, the kernel mode and the user mode can be effectively reduced.

[0014] In a possible implementation, before the task processing apparatus executes the second task, the task processing apparatus can obtain a resource scheduling result, and the resource scheduling result can indicate that a plurality of subtasks are executed by a first processor core, and after the second task is executed, the task processing apparatus can schedule hardware resources to execute the remaining subtasks in the first task, and specifically, the remaining subtasks in the first task can be executed by the first processor core according to the resource scheduling result. In this way, even if the second task with higher execution priority is inserted, the task processing apparatus can continue to execute the remaining subtasks in the first task by using the first processor core based on the previously set resource scheduling result, and a new hardware resource does not need to be scheduled for the remaining subtasks, which can effectively reduce the resource scheduling overhead, and improve the utilization rate of the hardware resources.

[0015] In a possible implementation, the application includes a plurality of programming models, for example, a first programming model and a second programming model, and the application can edit different process tasks into a plurality of thread tasks by using different programming models.

[0016] In a second aspect, the present application provides a task processing apparatus, an execution module configured to execute a first task, the first task comprising a plurality of subtasks, and a currently executing subtask being a first subtask; a detection module configured to detect that a second task to be executed has a higher priority than the first task; the execution module is further configured to, when the detection module detects that the second task to be executed has the higher priority than the first task, execute the second task after the first subtask is executed, the first subtask and the second task being executed by a same processing unit; and execute remaining subtasks in the first task after the second task is executed.

[0017] In a possible implementation, the task processing apparatus further comprises an identification module configured to identify the first task as a low-priority task according to a type of the first task before the first task is executed; and a division module configured to divide the first task into the plurality of subtasks.

[0018] In a possible implementation, the first task comprises a plurality of task classes; and the division module is configured to divide the first task into the plurality of subtasks according to the plurality of task classes, each of the plurality of subtasks comprising at least one task class.

[0019] In a possible implementation, the first task comprises a plurality of operators; and the division module is configured to divide the first task into the plurality of subtasks according to the plurality of operators, each of the plurality of subtasks comprising at least one operator.

[0020] In a possible implementation, the first task and the second task are thread tasks in a first process task; the task processing apparatus further comprises an editing module configured to edit the first process task into a first computation graph comprising the first task and the second task according to an editing model, the first computation graph being configured to set a dependency relationship between different thread tasks in the first process task; and the detection module is configured to detect the second task from the first computation graph.

[0021] In a possible implementation, the task processing apparatus can be a runtime scheduler; the task processing apparatus further comprises an application module configured to, when an application is started, apply to a kernel for processor resources, and use the processor resources as user-mode resources, the processor resources comprising a plurality of cores; and an interception module configured to, when the first process task is started, intercept a resource application request of the first process, and allocate the user-mode resources to the first process task.

[0022] In a possible implementation, the task processing apparatus further comprises an acquisition module configured to acquire a resource scheduling result before the second task is executed, the resource scheduling result indicating that the plurality of subtasks are executed by a first processor core; and the execution module is configured to, after the second task is executed, execute the remaining subtasks in the first task by using the first processor core according to the resource scheduling result.

[0023] In a possible implementation, the application includes multiple programming models, such as the first programming model and the second programming model, and the application can edit different process tasks into multiple thread tasks through different programming models.

[0024] In a third aspect, the present application provides a computing device, which includes a processor and a memory. The processor and the memory are in communication with each other. The processor is configured to execute instructions stored in the memory, so that the computing device performs the task processing method in the first aspect or any implementation manner of the first aspect. It should be noted that the memory can be integrated into the processor or independent of the processor. The computing device can further include a bus. The processor is connected to the memory through the bus. The memory can include a readable memory and a random access memory.

[0025] In a fourth aspect, the present application provides a computer readable storage medium, which stores instructions. When the instructions are executed on a computing device, the computing device performs the operation steps of the task processing method in the first aspect or any implementation manner of the first aspect.

[0026] In a fifth aspect, the present application provides a computer program product including instructions, which, when executed on a computing device, causes the computing device to perform the operation steps of the task processing method in the first aspect or any implementation manner of the first aspect.

[0027] On the basis of the implementation manners of the aspects provided in the present application, further combinations can be made to provide more implementation manners. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 Structure schematic diagram of an example data processing system provided in the present application;

[0029] Figure 2 Flowchart of a task processing method provided in the present application;

[0030] Figure 3 Execution dependency between multiple thread tasks provided in the present application;

[0031] Figure 4 Schematic diagram of the execution time delay of the second task being reduced provided in the present application;

[0032] Figure 5 Structure schematic diagram of a task processing apparatus provided in the present application;

[0033] Figure 6 Hardware structure schematic diagram of a computing device provided in the present application. DETAILED DESCRIPTION

[0034] The terms "first", "second", and the like in the description and in the claims of the present application and above drawings are used to distinguish similar objects, and do not necessarily have to be used to describe a particular sequential or chronological order. It should be understood that the terms used in this way can be interchanged, as appropriate, and are merely a way of distinguishing between objects of the same attribute used in the description of the embodiments of the present application.

[0035] The technical solutions in the present application will be described below in conjunction with the accompanying drawings provided by the present application.

[0036] Referring to Figure 1 , a structural schematic diagram of a data processing system is shown. As Figure 1 indicated, the data processing system 10 includes an application layer 101, a hardware layer 102, and a task processing apparatus 200.

[0037] The application layer 101 includes at least one application, such as an image recognition application, etc. Figure 1 An application 1 is exemplarily taken as an example in the description. The application 1 can include at least one programming model. Figure 1 Programming models 1 to 3 are exemplarily taken as an example in the description. Exemplarily, the programming model can be a message passing interface (MPI) model, an open multi-processing (OpenMP) model, a SYCL model (which is a high-level programming model of open computing language (OpenCL)), etc., or can be other types of programming models.

[0038] The hardware layer 102 includes a plurality of processor cores, each of which can execute a thread task, and the plurality of processor cores can be used to execute a plurality of thread tasks in parallel. The plurality of processor cores in the hardware layer 102 can be the same, or there can be differences between the plurality of processor cores, such as some processor cores being large cores with higher processing performance and other processor cores being small cores with lower processing performance, etc.

[0039] Further, the hardware layer 102 can also include other devices, such as Figure 1The illustrated network interface controller (NIC), memory, accelerator, or can be other types of devices. Illustratively, the memory can be, for example, direct memory access (DMA), etc. The accelerator can be, for example, a graphics processing unit (GPU), etc.

[0040] The task processing apparatus 200 is configured to schedule the processor cores (and other hardware) in the hardware layer 102 to execute thread tasks. Illustratively, the task processing apparatus 200 can be implemented by software. For example, the task processing apparatus 200 can be referred to as a runtime scheduler, and the runtime scheduler can run on the processor cores, etc.

[0041] During the running of the application 1, at least one task can be generated based on the operations of the user on the application 1, such as a data search task, etc. For each task, the programming model can edit the task into one or more process tasks, and the process tasks can have a dependency relationship, such as the execution of a process task A in the process tasks depends on the execution result of a process task B (i.e., the process task B needs to be executed first). Then, the programming model can generate a plurality of computation Figure 1 graphs based on the dependency relationship between the process tasks. Figure 1 Each node in the computation Figure 1 graph represents a process task, and the directed edges between the nodes in the computation Figure 1 graph are used to indicate the dependency relationship between the process tasks. Then, for each process task, the orchestration model can edit the process task into a plurality of thread tasks, and the thread tasks can have a dependency relationship, such as the execution of a thread task A in the thread tasks depends on the execution of a thread task B first, so that the programming model can generate a computation Figure 2 graph based on the dependency relationship between the thread tasks. In actual application scenarios, each process task can correspond to a computation Figure 2 graph. In this way, the programming model can implement the orchestration of the process tasks and the thread tasks by using the computation Figure 1 graphs and the computation Figure 2 graphs.

[0042] Based on the orchestration results of the process tasks and the thread tasks by the programming model (which can be the computation Figure 1 graphs and the computation Figure 2 graphs described above), the task processing apparatus 200 can schedule the processor cores (and other hardware) in the hardware layer 102 to execute the thread tasks.), the task processing apparatus can schedule multiple processor cores in the hardware layer 102 to execute multiple thread tasks included in each process task in parallel. Among them, the data processing system 10 processes the thread tasks based on a run-to-completion execution mode, that is, after the thread task starts to be executed, the thread task will be executed until the task is completed, and the thread task will not be interrupted by other thread tasks during execution; accordingly, the resources used by the thread task during execution will not be preempted by other thread tasks.

[0043] However, during the execution of the thread first task with a lower priority by the processor core, there are often other thread tasks with a higher priority in a state of waiting for execution. At this time, the thread second task needs to wait until the processor core finishes executing the thread first task before starting to execute the thread second task, which causes the thread second task to be in a state of waiting for execution for a long time, resulting in a long overall execution delay of the thread second task with a higher priority, affecting the business running in the application layer 101, such as business response timeout.

[0044] Therefore, the task processing apparatus 200 provided by the present application can control the processor core and other hardware resources in the hardware layer 102 to interleave the execution of other tasks with a higher priority during the execution of a task.

[0045] Specifically, for the thread first task with a lower priority, the task processing apparatus 200 will split the thread first task into multiple subtasks before execution, and execute the first subtask in the multiple subtasks by using the processor core in the hardware layer 102. During the execution of the first subtask, there may be a thread second task with a higher priority in a state of waiting for execution, then when the task processing apparatus 200 detects that the priority of the thread second task to be executed is higher than the priority of the thread first task, and the thread second task can also be executed by using the processor core, the task processing apparatus 200 will execute the thread second task by using the processor core after the execution of the first subtask is completed. After the execution of the thread second task is completed, the task processing apparatus 200 continues to execute the remaining subtasks (such as the second subtask, the third subtask, etc. obtained by splitting the thread first task) in the thread first task.

[0046] Because the first thread task is broken down into multiple subtasks, during the execution of the first thread task, the task processing device 200 can execute the second thread task, which has a higher priority and is issued by the application layer 101, as soon as the first subtask of the currently executing first thread task is completed. In other words, during the execution of the first thread task, the task processing device 200 inserts the execution of the second thread task, which has a higher priority. This eliminates the need for the second thread task to wait for the entire first thread task to complete before it can be executed, thereby reducing the processing latency of the higher-priority second thread task. This meets the latency requirements of the application business in the application layer 101 and optimizes the performance of the application in the application layer 101.

[0047] In practical applications, during the process of scheduling multiple processor cores in the hardware layer 102 to execute multiple thread tasks in parallel, the task processing device 200 can accelerate the processing of high-priority thread tasks through the above process, thereby completing the multiple thread tasks included in a process task. Furthermore, once all the multiple thread tasks included in all process tasks have been processed in the above manner, the task generated by application 1 can be completed.

[0048] It is worth noting that the above Figure 1 The data processing system 10 shown is merely an illustrative example and is not intended to be limiting. For instance, in real-world applications, the data processing system 10 may also include an operating system kernel. Figure 1 (Not shown in the image) and other parts. For example, in other data processing systems, the application layer 101 may include a larger number of applications, and the types and number of programming models included in different applications may differ; or, the hardware layer 102 may also include other types or other numbers of hardware.

[0049] For ease of understanding, embodiments of the task processing method provided in this application will be described below with reference to the accompanying drawings.

[0050] See Figure 2 , Figure 2 This is a flowchart illustrating a task processing method provided in an embodiment of this application. This method can be applied to... Figure 1 The data processing system 10 described above can also be applied to other applicable data processing systems. For ease of explanation, this embodiment applies to... Figure 1 The data processing system 10 shown is used as an example for illustration.

[0051] in, Figure 2 The task processing methods shown may specifically include:

[0052] S201: The task processing device 200 acquires the first task to be executed.

[0053] In this embodiment, after the programming model (such as programming model 1) edits for each process task to obtain corresponding multiple thread tasks and the computation graph corresponding to these multiple thread tasks, the programming model can determine the first task that can be executed at the moment based on the dependencies between different thread tasks indicated by the computation graph. This first task can be one of the multiple thread tasks. For example, the computation graph generated by the programming model can be as follows: Figure 3 As shown. Among them, Figure 3 The algorithm includes multiple nodes, each indicating a thread task; directed edges between different nodes indicate execution dependencies between different thread tasks. For example, a directed edge between node 1 and node 3 indicates that the execution of the thread task identified by node 3 depends on the thread task identified by node 1 being executed first. Furthermore, tasks identified by different nodes are executed with different priorities, such as... Figure 3 The thread tasks indicated by nodes 3 and 8 in the table are executed with higher priority (higher than the thread tasks indicated by the other nodes). In this embodiment, the first task that can be executed at present as described in step S201 may be a lower priority task indicated by nodes 4, 6, and 9.

[0054] Then, the programming model sends the first task to the operating system kernel through the first type of interface, requesting the operating system kernel to schedule resources for the first task to execute it. The first type of interface is the interface through which the programming model sends thread tasks to the outside world.

[0055] Accordingly, the task processing device 200 can continuously monitor the first type of interface (which can be one or more); and when the programming model outputs the first task through the first type of interface, the task processing device 200 can intercept the first task sent by the programming model 1 to the kernel, so that the task processing device 200 can subsequently perform resource scheduling for the first task, such as scheduling a processing unit to execute the first task. The scheduled processing unit can be a processor core in the hardware layer 102, and can also include other hardware such as accelerator cards and network cards.

[0056] Alternatively, after the programming model generates multiple thread tasks and a computation graph, the task processing device 200 can detect the currently executable thread task based on the dependencies between different thread tasks indicated by the computation graph; that is, it can detect the thread task that does not depend on other thread tasks for execution. Assuming the detected currently executable thread task is the first task, the task processing device 200 will schedule and execute the task for the first task's processor core 1.

[0057] In actual application, before the task processing apparatus 200 acquires the first task, the task processing apparatus 200 (or referred to as runtime scheduler) can also create user-mode resources based on the hardware in the hardware layer 102 in advance, so as to process the first task in the user mode. The created user-mode resources can be, for example, user-mode threads.

[0058] In specific implementation, when the application 1 is started, the programming model can apply to the kernel of the operating system for creating processor resources for executing tasks through the second type of interface, the processor resources including a plurality of processor cores (or simply referred to as cores). Correspondingly, the task processing apparatus 200 can continuously monitor the second type of interface, and when the programming model outputs a request for applying for processor resources through the second type of interface, the task processing apparatus 200 can intercept the request, apply for the processor resources from the memory, and take the applied processor resources as user-mode resources, which means the processor resources used in the user mode. For example, the task processing apparatus 200 can create a plurality of user-mode threads according to the number of the applied processor resources (i.e. the plurality of processor cores). The user-mode thread, also referred to as user-level thread, is a thread implemented in a user program without the support of the kernel of the operating system, and the thread is created in the user space. Each user-mode thread can be responsible for scheduling a processor core and can be used to execute a thread task. At this time, the number of user-mode threads created by the task processing apparatus 200 for each programming model can match the number of processor cores in the hardware layer 102. For example, assuming that the hardware layer 102 includes 32 processor cores, the task processing apparatus 200 can create 32 user-mode threads for each of the programming model 1 to the programming model 3, so that the task processing apparatus 200 can create a total of 96 user-mode threads. In this way, after the task processing apparatus 200 creates a plurality of user-mode threads for the processor resources, the processor resources can be used as user-mode resources.

[0059] In actual application, when the task processing apparatus 200 is started, the task processing apparatus 200 can first manage all the hardware in the hardware layer 102, including the processor cores and the devices (such as network cards, accelerators, DMA, etc.) used by the processor cores, to determine the hardware resources included in the hardware layer 102. Then, the task processing apparatus 200 can notify each programming model of the hardware resource information (such as the number of processor cores included in the hardware layer 102) of the hardware layer 102. In this way, each programming model can apply for corresponding processor resources based on the hardware resource information, such as applying for 32 processor cores included in the hardware layer 102.

[0060] After the user-mode resource is created, when the first process task is started, i.e., the plurality of thread tasks included in the first process task start to execute, the programming model can send a resource application request to the kernel through the third type of interface to request a corresponding processor resource to execute the plurality of thread tasks included in the first process task. Correspondingly, the task processing apparatus 200 can intercept the resource application request and allocate the user-mode resource to the first process task, i.e., allocate the user-mode resource to each thread task included in the first process task.

[0061] The following describes a case of processing and allocating a user-mode resource to a first task in a plurality of thread tasks.

[0062] S202: The task processing apparatus 200 splits the first task into a plurality of subtasks, including a first subtask and a second subtask.

[0063] In this embodiment, the task processing apparatus 200 can obtain the priority of the execution of the first task before executing the first task by using the allocated user-mode resource.

[0064] The priority of the execution of the first task can be specified by a technician / user, for example, the technician / user can define that the priority of the execution of a task issued under the OpenMP model is low, and define that the priority of the execution of a task issued under the SYCL model is high. The first task (thread task) generated by the programming model can include priority information. For example, the first task can include a priority, when the priority is “high” or “1”, it indicates that the priority of the execution of the first task is high, and when the priority is “low” or “0”, it indicates that the priority of the execution of the first task is low.

[0065] Alternatively, the priority of the execution of the first task can be obtained by the task processing apparatus 200 through analysis. For example, the first task can include its type, when the type of the first task indicates that the first task is a data computation type or a data storage type task, the task processing apparatus 200 can determine that the priority of the execution of the first task is low, and when the type of the first task indicates that the first task is a data movement type task (such as data backup, data migration, etc.), the task processing apparatus 200 can determine that the priority of the execution of the first task is high.

[0066] Therefore, the task processing apparatus 200 can further determine the priority of the execution of the first task after obtaining the first task, and the high or low priority can be identified by a corresponding numerical value, a mark, etc. For ease of understanding, this embodiment describes a case of the first task as a task with a low priority.

[0067] After determining that the first task is a low-priority task, the task processing apparatus 200 can split the first task into a plurality of sub-tasks, and the priority of the plurality of sub-tasks obtained by splitting remains consistent with the priority of the first task.

[0068] As a first implementation example of splitting the first task, when the programming model generates the first task based on a task class (task_base), the first task can include a plurality of task classes, so that the task processing apparatus 200 can take each task class as a sub-task in the first task, thereby splitting the first task. Wherein, the task class refers to a class defined for a task, and different classes can include different task contents.

[0069] As a second implementation example of splitting the first task, the task processing apparatus 200 can block the execution logic of the first task, and each block execution task can be a sub-task of the first task, thereby splitting the first task into a plurality of sub-tasks. For example, the first task can include a plurality of operators, and each operator can be a block execution logic, so that the task processing apparatus 200 can split the first task into a plurality of sub-tasks at the granularity of the operator, and each sub-task includes at least one operator.

[0070] In actual application, the task processing apparatus 200 can also split the first task into a plurality of sub-tasks in other ways, which is not limited.

[0071] The plurality of sub-tasks corresponding to the first task can be executed in parallel. For example, the task processing apparatus 200 can split the first task into a sub-task A, a sub-task B, and a sub-task C, and the task processing apparatus 200 can execute the sub-task A and the sub-task B in parallel using a plurality of processor cores, and then execute the sub-task C using one processor core after the sub-task A and the sub-task B are executed.

[0072] Alternatively, the plurality of sub-tasks corresponding to the first task can be executed in series. For example, the task processing apparatus 200 can split the first task into a sub-task a, a sub-task b, and a sub-task c, and the task processing apparatus 200 executes the sub-task a, the sub-task b, and the sub-task c in sequence using one processor core.

[0073] For ease of illustration, in this embodiment, the plurality of sub-tasks obtained by splitting the first task include a first sub-task and a second sub-task, and the execution order of the first sub-task is before the execution order of the second sub-task, such as the execution of the second sub-task depends on the execution result of the first sub-task.

[0074] S203: The task processing apparatus 200 executes the first sub-task in the first task using a processing unit.

[0075] After the first task with lower priority is split into multiple sub-tasks, the task processing apparatus 200 can execute a first sub-task in the multiple sub-tasks by using the allocated user mode resource. In the embodiment, the user mode resource allocated to the first sub-task can include a processing unit, and the processing unit can include a processor core, and further, the processing unit can also include other hardware in the hardware layer 102, such as a GPU and the like. In actual implementation, the processing unit can run a user mode thread, and the processing unit can execute the first sub-task based on a program logic indicated by the user mode thread.

[0076] S204: In the process of executing the first sub-task, the task processing apparatus 200 acquires a second task to be executed.

[0077] For example, the task processing apparatus 200 can acquire the second task output by the programming model by monitoring and intercepting the first type of interface. Alternatively, the task processing apparatus can detect the second task that can be executed at present from a calculation graph generated by the programming model and used to indicate execution dependencies between different thread tasks, and the like, and the embodiment does not limit this.

[0078] In actual application, in the process of executing the first sub-task by the processor core (processing unit) in the hardware layer 102, there can be other tasks that can be currently executed, and the other tasks are the second tasks described in step S203. For example, when the other tasks on which the second task depends are executed by other processor cores in the process of executing the first sub-task, the second task can be in an executable state and can be acquired by the task processing apparatus 200.

[0079] S205: The task processing apparatus 200 detects whether the priority of the second task is higher than the priority of the first task, if not, step S206 is executed; if yes, step S207 is executed.

[0080] In actual implementation, the second task can carry indication information of priority, so that the task processing apparatus 200 can determine the priority of the second task according to the indication information. Alternatively, after acquiring the second task, the task processing apparatus 200 can determine the priority of the second task according to a type to which the second task belongs. The implementation of the task processing apparatus 200 to acquire the priority of the second task can refer to the description of the above-mentioned related part of acquiring the priority of the first task, and will not be described here.

[0081] Then, the task processing apparatus 200 can compare the priority of the second task with the priority of the first task being executed, and determine whether the priority of the second task to be executed is higher than the priority of the first task being executed. If not, the task processing apparatus 200 can schedule the hardware resource to execute the second task after waiting for the first task to be executed, i.e., perform step S206. If yes, the task processing apparatus 200 can insert the execution of the second task with higher priority into the execution of the first task by performing step S207. In the embodiment, the priority of the second task is set to be higher than the priority of each subtask in the first task, and the execution of the second task needs to use the same processing unit as the first subtask.

[0082] S206: When it is detected that the priority of the second task is lower than the priority of the first task, the task processing apparatus 200 waits for all subtasks in the first task to be executed, and then executes the second task using the processing unit.

[0083] S207: When it is detected that the priority of the second task is higher than the priority of the first task, the task processing apparatus 200 executes the second task using the processing unit after the first subtask is executed.

[0084] S208: The task processing apparatus 200 executes the remaining subtasks in the first task after the second task is executed.

[0085] That is, when the priority of the second task is high, the remaining subtasks in the first task except the first subtask can wait for the execution of the second task to be completed before starting to be executed.

[0086] In a specific implementation, assuming that the processing unit is a processor core, the task processing apparatus 200 can monitor whether the processor core has completed the execution of the first subtask. If the first subtask is not completed, the second task is in a state of waiting for execution until the task processing apparatus 200 determines that the first subtask is completed. At this time, the task processing apparatus 200 can schedule the second task to the processor core, so that the processor core can start to execute the second task.

[0087] After the execution of the second task is completed, the task processing apparatus 200 executes the remaining subtasks in the first task using the hardware resource in the hardware layer 102, such as that the task processing apparatus 200 can call the processor core to continue to execute the second subtask, the third subtask and the remaining subtasks in the first task.

[0088] As an implementation example, the task processing apparatus 200 can execute each subtask included in the first task based on a static scheduling strategy. In a specific implementation, before the task processing apparatus 200 executes the second task, the task processing apparatus 200 can obtain a resource scheduling result corresponding to the first task, where the resource scheduling result is used to indicate processor cores used to execute multiple subtasks in the first task. In this embodiment, it is assumed that the first subtask and the second subtask are executed by the same processor unit. The resource scheduling result can be a result generated by the task scheduling apparatus 200 after performing resource scheduling on each subtask in the first task after the first task is split.

[0089] In this way, after the execution of the second task is completed, the task processing apparatus 200 can continue to execute the second subtask in the first task by using the processing unit indicated by the resource scheduling result. That is, the hardware resource configured to execute the second subtask remains unchanged before and after the execution of the second task is inserted. In this way, during the execution of the first task, even if the second task is inserted, the task processing apparatus 200 still continues to execute the remaining subtasks in the first task by using the processor core 1 based on the previously configured resource scheduling result, and the hardware resource for the remaining subtasks does not need to be rescheduled, which can effectively reduce the overhead of resource scheduling, thereby improving the utilization of hardware resources.

[0090] Moreover, in a case where the execution mode of the data processing system 10 is run-to-completion, by splitting the first task into multiple subtasks, the second task with a higher priority can be executed in the process of executing the first task, which can enable the second task to be executed without waiting for the entire first task to be executed, thereby effectively reducing the overall time delay of the execution of the second task and improving the execution efficiency of the second task. As shown in FIG. 5, the second task can be executed at T1 without waiting until T2, so that the time delay of the execution of the second task can be shortened by (T2-T1). Figure 3

[0091] In a case where the second task can be executed with priority, the running performance of the service in the application layer 101 corresponding to the second task can also be improved, such as the response time delay of the service, thereby optimizing the performance of the application 1.

[0092] In actual application, the task processing apparatus 200 can execute multiple thread tasks included in each process task based on the above manner by using processor resources, so as to ensure that the time delay of a thread task with a higher priority waiting to be executed can be in a relatively small state during the execution of the multiple thread tasks, thereby improving the overall execution efficiency of the multiple threads, that is, improving the execution efficiency of the process task.

[0093] ​The process of the task processing apparatus 200 executing the tasks is described by taking an example in which the task processing apparatus 200 acquires a second task included in the same process task in the process of executing a first task. In other embodiments, the programming model 1 to the programming model 3 in the application 1 can each issue a plurality of thread tasks to be executed through the first type of interface. Then, the task processing apparatus 200 can intercept the plurality of thread tasks, and the task processing apparatus 200 can schedule the processor core to execute the thread task A with a lower priority issued by the programming model 1, and acquire the thread task B with a higher priority issued by the programming model 2 in the process of executing the thread task A. Then, the task processing apparatus 200 can refer to the manner described in the above embodiments to execute the thread task B preferentially after the execution of the part of the subtasks in the thread task A is completed, and continue to execute the remaining subtasks in the thread task A after the execution of the thread task B is completed, so as to improve the efficiency of the execution of the thread task B. The specific implementation manner can be referred to the related description of the execution of the first task and the second task, and will not be described herein.

[0094] In addition, the processor resource allocated to the thread task by the task processing apparatus 200 is a user state resource, which enables the same processor core to switch the execution of the thread tasks generated by different programming models based on different time slices, and the switching can be completed in the user state, for example, the user state thread a required for the execution of the thread task A generated by the programming model 1 can be switched to the user state thread b required for the execution of the thread task B generated by the programming model 2 on the processor core, which enables the processor core to switch the executed thread from the user state thread A to the user state thread B without performing the process of switching from the user state to the kernel state and then switching from the kernel state to the user state, so as to effectively reduce the overhead of thread switching.

[0095] In actual application, when the task processing apparatus 200 simultaneously acquires a plurality of thread tasks to be executed, if the thread task with a lower priority to be executed has not started to be executed, the task processing apparatus 200 can determine the thread task with a higher priority from the plurality of thread tasks that can be executed currently according to the execution dependency between the tasks, and preferentially allocate the processing unit to the thread task with a higher priority, so as to preferentially execute the thread task with a higher priority. After the execution of the thread task with a higher priority is completed, the task processing apparatus 200 schedules the processing unit to start to execute the thread task with a lower priority. If the thread task with a lower priority is executed first than the thread task with a higher priority, the task processing apparatus 200 can instruct to pause the execution of the remaining subtasks of the thread task after the execution of the part of the subtasks included in the thread task with a lower priority is completed, preferentially schedule the processing unit to the thread task with a higher priority, and continue to execute the remaining subtasks of the thread task with a lower priority by using the processing unit after the execution of the thread task with a higher priority is completed.

[0096] It is worth noting that the above-mentioned Figure 2 The method embodiment shown is only an example. Based on the method flow shown, the process in which the task processing apparatus 200 executes tasks using hardware resources in the hardware layer 102 can also adopt the following embodiments. Figure 2

[0097] Example 1: Figure 2 In the method embodiment shown, the first task and the second task obtained by the task processing apparatus 200 are thread tasks generated and sent by the same programming model. In other possible embodiments, multiple programming models in the application 1 can send multiple thread tasks with different priorities. At this time, the task processing apparatus 200 can refer to the above method to execute the thread tasks with higher priorities first.

[0098] Example 2: Figure 2 In the method embodiment shown, the task processing apparatus 200 inserts the execution of a single second task with higher priority in the process of executing the first task. In other possible embodiments, the task processing apparatus 200 can obtain multiple tasks with higher priorities to be executed at the same time. Taking the case of receiving the second task and the third task at the same time as an example, assuming that the execution of the second task and the third task needs to use the processing unit used in the execution of the first subtask, after the execution of the first subtask is completed, the task processing apparatus 200 can schedule the processor core to execute the second task with higher priority first, and after the execution of the second task is completed, the processor core will continue to execute the third task with higher priority. And when the execution of the third task is also completed, the task processing apparatus instructs the processor core to continue to execute the remaining subtasks in the first task. In this way, in the process of executing the first task with lower priority, the task processing apparatus 200 can insert the execution of multiple thread tasks with higher priority, i.e., the second task and the third task, so as to reduce the waiting execution delay of the data processing system 10 for multiple thread tasks with higher priority.

[0099] ​In addition to the priority thread task, the task processing apparatus 200 can also execute multiple thread tasks with low priority in parallel. Furthermore, when the multiple thread tasks are issued by different programming models, the task processing apparatus 200 can also instruct the processor core to execute different thread tasks assigned to the processor core in different time slices. For example, assuming that the thread tasks assigned to the processor core include thread task x issued by programming model 1 and thread task y issued by programming model 2, the task processing apparatus 200 can schedule the processor core to execute thread task x in time slice 1. When time slice 1 ends, the processor core stops executing thread task x and starts executing thread task y in the next time slice (i.e., time slice 2) immediately. Similarly, when time slice 2 ends, the processor core stops executing thread task y and continues to execute thread task x in the next time slice (i.e., time slice 3) immediately. In this way, within a time period (including multiple time slices), a single processor core can execute thread tasks issued by different programming models in parallel.

[0100] In addition, for multiple thread tasks issued by multiple thread models, in addition to instructing the processor core to execute thread tasks issued by different programming models in different time slices, the task processing apparatus 200 also supports executing thread tasks in other granularities. For example, the task processing apparatus 200 can support the processor core to execute each thread task in the granularity of a thread task. That is, the processor core executes one thread task issued by programming model 1 in a time period, and then starts to execute one thread task issued by programming model 2. For another example, the task processing apparatus 200 can support the processor core to execute thread tasks issued by different programming models in the granularity customized by a user, which is not limited.

[0101] It should be noted that, according to the above description, other reasonable combinations of steps conceived by those skilled in the art also belong to the protection scope of the present application. In addition, those skilled in the art should be familiar with the fact that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the present application.

[0102] The above is described in combination with Figures 1 to 4 The task processing method provided by the embodiments of the present application is introduced, and then the structure of the task processing apparatus and the computing device provided by the embodiments of the present application is introduced in combination with the drawings.

[0103] Reference is made to Figure 5, a structural schematic diagram of a task processing apparatus is shown, the task processing apparatus 500 comprises:

[0104] an execution module 501, configured to execute a first task, the first task comprising a plurality of subtasks, and a subtask being executed is a first subtask;

[0105] a detection module 502, configured to detect that a priority of a second task to be executed is higher than a priority of the first task;

[0106] the execution module 501 is further configured to, when it is detected that the priority of the second task to be executed is higher than the priority of the first task, execute the second task after the first subtask is executed, the first subtask and the second task being executed by a same processing unit; and execute remaining subtasks in the first task after the second task is executed.

[0107] In a possible implementation, the task processing apparatus 500 further comprises:

[0108] an identification module 503, configured to identify the first task as a low-priority task according to a type of the first task before the first task is executed;

[0109] a division module 504, configured to divide the first task into the plurality of subtasks.

[0110] In a possible implementation, the first task comprises a plurality of task classes;

[0111] the division module 504 is configured to divide the first task into the plurality of subtasks according to the plurality of task classes, and each of the plurality of subtasks comprises at least one task class.

[0112] In a possible implementation, the first task comprises a plurality of operators;

[0113] the division module 504 is configured to divide the first task into the plurality of subtasks according to the plurality of operators, and each of the plurality of subtasks comprises at least one operator.

[0114] In a possible implementation, the first task and the second task are thread tasks in a first process task, and the task processing apparatus 500 further comprises:

[0115] an editing module 505, configured to edit the first process task into a first computation graph comprising the first task and the second task according to an editing model, and a dependency relationship between different thread tasks in the first process task is set in the first computation graph;

[0116] the detection module 502 is configured to detect the second task from the first computation graph.

[0117] In a possible implementation, the task processing apparatus 500 can be a runtime scheduler, and the task processing apparatus 500 further includes:

[0118] an application module 506 configured to apply for, when an application is started, a processor resource from a kernel, and use the processor resource as a user-mode resource, the processor resource including a plurality of cores;

[0119] a capturing module 507 configured to capture, when a first process task is started, a resource application request of the first process, and allocate the user-mode resource to the first process task.

[0120] In a possible implementation, the task processing apparatus 500 further includes:

[0121] an obtaining module 508 configured to obtain, before execution of a second task, a resource scheduling result, the resource scheduling result indicating that a plurality of subtasks are executed by a first processor core;

[0122] and the execution module 501 is configured to execute, after the second task is executed, remaining subtasks in the first task by using the first processor core according to the resource scheduling result.

[0123] In a possible implementation, the application includes a plurality of programming models, such as a first programming model and a second programming model, and the application can edit different process tasks into a plurality of thread tasks by using different programming models.

[0124] Because Figure 5 the task processing apparatus 500 shown in FIG. 5 corresponds to the task processing apparatus 200 in the above-described Figure 2 embodiment, the task processing apparatus 500 has the technical effects of the task processing apparatus 200 in the above-described Figure 5 embodiment, and details are not described herein again. Figure 2

[0125] Figure 6 A hardware structure schematic diagram of a computing device 600 is provided in the present application, and the computing device 600 can implement the task processing apparatus 200 and the like in the above-described Figure 2 embodiment.

[0126] As Figure 6 ​As shown, the computing device 600 includes a processor 601, a memory 602, and a communication interface 603. The processor 601, the memory 602, and the communication interface 603 communicate with each other through a bus 604, and can also communicate through wireless transmission and other means. The memory 602 is configured to store instructions, and the processor 601 is configured to execute the instructions stored in the memory 602. Further, the computing device 600 can also include a memory unit 605, which can also be connected to the processor 601, the memory medium 602, and the communication interface 603 through the bus 604. The memory 602 stores program codes, and the processor 601 can execute the following operations by using the program codes stored in the memory 602:

[0127] performing a first task, the first task including a plurality of subtasks, and a currently executing subtask being a first subtask;

[0128] detecting that a second task to be executed has a priority higher than a priority of the first task, and after the first subtask is executed, executing the second task, the first subtask and the second task being executed by a same processing unit;

[0129] after the second task is executed, executing remaining subtasks in the first task.

[0130] It should be understood that, in the present embodiment, the processor 601 can be a CPU, and can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete device components, or the like. The general-purpose processor can be a microprocessor or any conventional processor, or the like.

[0131] The memory 602 can include read-only memory and random access memory, and provide instructions and data to the processor 601. The memory 602 can also include non-volatile random access memory.

[0132] The memory 602 can be volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. Where nonvolatile memory is utilized, it can be read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), used as external cache. By way of example, and not limitation, many forms of RAM are available, for example, static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double-data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0133] The communication interface 603 is configured to communicate with other devices connected to the computing device 600. The bus 604 can include, in addition to the data bus, a power bus, a control bus, and a state signal bus, etc. However, for the sake of clarity, all the buses are marked as the bus 604 in the figure.

[0134] It should be understood that the computing device 600 according to the embodiments of the present application can correspond to the task processing apparatus 500 in the embodiments of the present application, and can correspond to the method performed by the task processing apparatus 200 in the method according to the embodiments of the present application. Figure 2 The above and other operations and / or functions implemented by the computing device 600 are respectively for realizing the flow of the corresponding method in the embodiments of the present application, and for the sake of brevity, will not be repeated here. Figure 2

[0135] ​The embodiment of the present application further provides a computer readable storage medium. The computer readable storage medium can be any available medium or data storage device that can be used to store data that can be accessed by a computing device. The computer readable storage medium can be a magnetic-based medium (e.g., a floppy diskette, a hard disk drive, a magnetic tape), an optical-based medium (e.g., a compact disc (CD), a digital versatile disc (DVD)), a semiconductor-based medium (e.g., a solid state drive (SSD) or a flash memory device), and the like. The computer readable storage medium includes instructions that are executable by the computing device to perform the task processing method described above.

[0136] The embodiment of the present application further provides a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the processes or functions described in the embodiment of the present application are generated in whole or in part.

[0137] The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer or data center to another website, computer or data center through wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode.

[0138] The computer program product can be a software installation package, which can be downloaded and executed on a computing device in the case of needing to use any method of the foregoing task processing method.

[0139] The above-described embodiments can be implemented in part or in whole through software, hardware, firmware, or any combination thereof. When implemented in software, the above-described embodiments can be implemented using one or more computer programs that are stored in a computer-readable medium at one or more locations, which are read and executed by one or more computers. The computer-readable medium can be a computer program product, a memory, or any other suitable storage device. The computer-readable medium can be a memory, such as a random access memory (RAM), a read-only memory (ROM), or a flash memory. The computer-readable medium can also be a storage device, such as a hard disk drive, a solid state drive, a floppy disk, a tape drive, a flash memory, an optical disk, or any other suitable storage device. The computer-readable medium can be a server, a data center, or any other suitable data storage device that includes one or more of the above-mentioned memory or storage devices. The computer-readable medium can be a transmission medium, such as a wire, a cable, a fiber-optic, a digital user line (DSL), or a wireless transmission medium, such as an infrared, a radio frequency, a microwave, or any other suitable transmission medium. The computer program product can be tangibly embodied in a computer-readable medium, which is a machine-readable storage medium or memory, or a server, a data center, or any other suitable data storage device that includes one or more of the above-mentioned memory or storage devices. The computer program product can also be tangibly embodied in a transmission medium, such as a wire, a cable, a fiber-optic, a digital user line (DSL), or a wireless transmission medium, such as an infrared, a radio frequency, a microwave, or any other suitable transmission medium.

[0140] The terminology used in the above-described embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used in this specification and the appended claims, the singular forms "a," "an" and "the" are intended to include both singular and plural forms, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It will be understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0141] Reference throughout this specification to "one embodiment" or "an embodiment" or "a specific embodiment" or "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" or "in a specific embodiment" or "in some embodiments" in various places throughout this specification are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Additionally, the terminology used in the description is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. The use of the terms "including," "comprising," or "having" and variations thereof in this description are meant to encompass the items listed thereafter, but do not exclude other items from being added. The use of the terms "a" and "an" are meant to encompass one or more items.

[0142] The above merely provides the specific implementation of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A task processing method characterized by, The method comprises: intercepting a resource application request sent by a programming model to a kernel, the resource application request being used to request resources for processing a first task, the programming model being used to generate the first task and a second task; a processing unit executes a thread in a user state to execute the first task, the first task comprising a plurality of subtasks, a subtask being executed by the processing unit being a first subtask, the processing unit being a first processor core, and the first processor core being a user state resource; in response to detecting that a priority of the second task to be executed is higher than a priority of the first task, the processing unit executes a thread in a user state to execute the second task after executing the first subtask; after the second task is executed, a subtask after the first subtask in the first task is executed.

2. The method of claim 1, wherein, The method further comprises: before the first task is executed, identifying the first task as a low-priority task according to a type of the first task; dividing the first task into the plurality of subtasks.

3. The method of claim 2, wherein, The first task comprises a plurality of task classes, and the dividing of the first task into the plurality of subtasks comprises: dividing the first task into the plurality of subtasks according to the plurality of task classes, each of the plurality of subtasks comprising at least one task class.

4. The method of claim 2, wherein, The first task comprises a plurality of operators, and the dividing of the first task into the plurality of subtasks comprises: dividing the first task into the plurality of subtasks according to the plurality of operators, each of the plurality of subtasks comprising at least one operator.

5. The method of claim 1, wherein, The first task and the second task are thread tasks in a first process task, and the method further comprises: editing the first process task into a first computation graph comprising the first task and the second task according to an editing model, a dependency relationship between different thread tasks in the first process task being set in the first computation graph; detecting the second task from the first computation graph.

6. The method according to any one of claims 1 to 5, characterized in that, The method further comprises: before the second task is executed, obtaining a resource scheduling result, the resource scheduling result indicating that the plurality of subtasks are executed by a first processor core; then, the executing of the remaining subtasks in the first task after the second task is executed comprises: after the second task is executed, executing the remaining subtasks in the first task by the first processor core according to the resource scheduling result.

7. A task processing apparatus characterized by comprising: The apparatus comprises: an intercepting module configured to intercept a resource application request sent by a programming model to a kernel, the resource application request being used to request resources for processing a first task, the programming model being used to generate the first task and a second task; an executing module configured to execute a thread in a user state by a processing unit to execute the first task, the first task comprising a plurality of subtasks, a subtask being executed being a first subtask, the processing unit being a first processor core, and the first processor core being a user state resource; a detecting module configured to detect whether a priority of the second task to be executed is higher than a priority of the first task. The execution module is further configured to, in response to detecting that the priority of the second task to be executed is higher than the priority of the first task, execute the second task by executing a user-mode thread by the processing unit after the first subtask of the first task is executed by the processing unit; and execute a subtask of the first task after the second subtask of the first task after the second task is executed.

8. The apparatus of claim 7, wherein, The apparatus further includes: The identification module is configured to identify the first task as a low-priority task according to the type of the first task before the first task is executed. The division module is configured to divide the first task into the plurality of subtasks.

9. The apparatus of claim 8, wherein, The first task includes a plurality of task classes. The division module is configured to divide the first task into the plurality of subtasks according to the plurality of task classes, and each of the plurality of subtasks includes at least one task class.

10. The apparatus of claim 8, wherein, The first task includes a plurality of operators. The division module is configured to divide the first task into the plurality of subtasks according to the plurality of operators, and each of the plurality of subtasks includes at least one operator.

11. The apparatus of claim 7, wherein, The first task and the second task are thread tasks in a first process task, and the apparatus further includes: The editing module is configured to edit the first process task into a first computation graph including the first task and the second task according to an editing model, and the first computation graph sets a dependency relationship between different thread tasks in the first process task. The detection module is configured to detect the second task from the first computation graph.

12. The apparatus of any one of claims 7 to 11, wherein, The apparatus further includes: The acquisition module is configured to acquire a resource scheduling result before the second task is executed, and the resource scheduling result indicates that the plurality of subtasks are executed by a first processor core. Then, the execution module is configured to execute remaining subtasks of the first task by the first processor core according to the resource scheduling result after the second task is executed.

13. A computing device, comprising: The apparatus includes a processor and a memory. The processor is configured to execute instructions stored in the memory to cause the computing device to perform steps of the method according to any one of claims 1 to 6.

14. A computer-readable storage medium, characterized in that, The apparatus includes instructions that, when executed on at least one computing device, cause the at least one computing device to perform the method according to any one of claims 1 to 6.

15. A computer program product comprising instructions, characterized in that, ​

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