180-degree phase shifting method and phase shifting circuit

Abstract

The invention relates to a 180-degree phase shifting method and a phase shifting circuit, which are characterized in that external delay resistors and delay capacitors of two monostable multivibrators are set, so that the pulse widths output by the two monostable multivibrators are half of the switching period of an input PWM1 (Pulse Width Modulation 1); then, the connection relation of the two monostable multivibrators is set up, so that the first monostable multivibrator triggers PWM wave output at the rising edge of the input signal PWM1, the second monostable multivibrator triggers PWM wave output at the falling edge of the input signal PWM1, and duty ratio information of the input signal PWM1 is invisibly obtained through the triggering mode; and a trigger is designed to reversely extract the duty ratio signal, so that a PWM2 signal which is subjected to 180-degree phase shift and corresponds to the PWM1 signal with the input duty ratio of 0.5-1 can be obtained. 180-degree PWM wave phase shift can be realized by adopting two chips and two groups of resistors and capacitors, the circuit is simple to realize, and an economic scheme for phase shift control is provided for a PWM controller type switching power supply.

Description

Technical Field

[0001] The present invention relates to the technical field of signal processing, and particularly relates to a 180-degree phase shift method and a phase shift circuit. Background Art

[0002] To improve the design power, switched-mode power supplies usually adopt an interleaved parallel connection method. The PWM waves of each unit are phase-shifted and controlled, and the generated ripples are superimposed and canceled, which can effectively reduce the magnitude of the output ripple. The two-unit interleaved parallel connection is the most common method. The phase difference between the PWM control signals of the two units is 180 degrees, which is generally realized through a phase shift circuit. The common 180-degree PWM phase shift circuits are divided into three types: digital controller phase shift, triangular carrier bias phase shift, and frequency divider and counter phase shift. Digital controller phase shift is suitable for high-power switched-mode power supplies controlled by a digital controller, and the cost is relatively high. Triangular carrier bias phase shift is suitable for switched-mode power supplies that generate PWM waves by comparing triangular carriers. The control is relatively complex and is no longer commonly used. Switched-mode power supplies with a PWM controller as the control core have simple control and low cost, and have become the mainstream of low-power switched-mode power supplies. The interleaved parallel connection of PWM controllers usually uses a frequency divider and a counter for phase shift control, and the phase shift circuit is relatively complex and the cost is relatively high. Summary of the Invention

[0003] In view of the above problems, a 180-degree phase shift method and a phase shift circuit are proposed. The 180° phase shift of the PWM wave with a duty cycle of 0.5-1 is realized through a double-precision monostable multivibrator and a NAND gate, and the circuit implementation is simple.

[0004] The technical solution of the present invention is as follows: A 180-degree phase shift method, setting the external delay resistors and delay capacitors of two monostable multivibrators, so that the pulse widths output by the two monostable multivibrators are both half of the input PWM1 switching period; then building the connection relationship of the two monostable multivibrators, so that the first monostable multivibrator triggers the PWM wave output at the rising edge of the input signal PWM1, while the second monostable multivibrator triggers the PWM wave output at the falling edge of the input signal PWM1. This triggering form implicitly obtains the duty cycle information of the input signal PWM1; then through the design of a flip-flop, the duty cycle signal is reversely extracted, and the PWM2 signal with a 180-degree phase shift of the PWM1 signal corresponding to the input duty cycle of 0.5-1 can be obtained.

[0005] A 180-degree phase shift circuit includes a dual-channel monostable multivibrator and 2 two-input NAND gates; the dual-channel monostable multivibrator includes monostable multivibrators A and B, delay resistors R1 and R2, and delay capacitors C1 and C2; the output pulse width t of each monostable multivibrator X is configured according to the following formula: t X = R X * C X, X = 1 or 2, where t X The unit is ms; R X The unit is kΩ, and the minimum value is 5 kΩ; C X The unit is uf;

[0006] The reset pin CA and the trailing-edge trigger pin BA of the monostable multivibrator A are connected to the VDD high level, the leading-edge trigger pin AA is connected to the PWM1 input signal. According to the truth table of the dual-channel monostable multivibrator, the rising edge of the input PWM1 signal triggers the output pin QA to output a pulse signal;

[0007] The reset pin CB of the monostable multivibrator B is connected to the VDD high level, the leading-edge trigger pin AB is connected to the VSS low level, and the trailing-edge trigger pin BB is connected to the PWM1 input signal. According to the truth table of the dual-channel monostable multivibrator, the falling edge of the input PWM1 triggers the output pin QB to output a pulse signal;

[0008] The two 2-input NAND gates include NAND gate A and NAND gate B. The output signal QA of the monostable multivibrator A is connected to the 1st input pin of NAND gate A, the output signal QB of the monostable multivibrator B is connected to the 5th input pin of NAND gate B. The 3rd output pin of NAND gate A is connected to the 4th input pin of NAND gate B, the 6th output pin of NAND gate B is connected to the 2nd input pin of NAND gate A, and the 3rd output pin of NAND gate A outputs the PWM2 signal with a 180-degree phase shift.

[0009] Preferably, the NAND gates A and B form a flip-flop. The relationship between the output signal PWM2 and the input signals QA and QB is: when QA = 1 and QB = 1, PWM2 maintains the previous state; when QA = 1 and QB = 0, PWM2 = 0; when QA = 0 and QB = 0, PWM2 = 1; when QA = 0 and QB = 1, PWM2 = 1. Combining with the dual-channel monostable multivibrator circuit realizes a 180-degree phase shift of the input signal PWM1 to obtain the output signal PWM2.

[0010] An application of a 180-degree phase-shifting circuit, selecting the 180-degree phase-shifting circuit described in claim 2 or 3 to obtain two-unit PWM control signals with a 180-degree phase difference for a two-unit interleaved parallel switching power supply.

[0011] An application of a 180-degree phase-shifting method, using the 180-degree phase-shifting method described in claim 1 to generate two-unit PWM control signals with a 180-degree phase difference for a two-unit interleaved parallel switching power supply.

[0012] The beneficial effects of the present invention are as follows: The 180-degree phase-shifting method and phase-shifting circuit of the present invention can achieve a 180-degree phase shift of the PWM wave by using 2 chips and 2 groups of resistors and capacitors, providing an economical solution for phase-shift control of PWM controller-type switching power supplies. Brief Description of the Drawings

[0013] Figure 1 A 180-degree phase-shifting circuit diagram of the present invention;

[0014] Figure 2 The phase-shifting simulation waveform diagram of the circuit of the present invention at a duty cycle of 0.5;

[0015] Figure 3 The phase-shifting simulation waveform diagram of the circuit of the present invention at a duty cycle of 0.6;

[0016] Figure 4 The phase-shifting simulation waveform diagram of the circuit of the present invention at a duty cycle of 0.7;

[0017] Figure 5 The phase-shifting simulation waveform diagram of the circuit of the present invention at a duty cycle of 0.8;

[0018] Figure 6 The phase-shifting simulation waveform diagram of the circuit of the present invention at a duty cycle of 0.9. Detailed Description of the Preferred Embodiments

[0019] The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. This embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation manners and specific operation processes are given, but the protection scope of the present invention is not limited to the following embodiments.

[0020] Specific embodiment: A 180-degree phase-shifting circuit for a two-cell interleaved parallel Boost power supply is as Figure 1 shown. The duty cycle of the PWM wave of the Boost power supply is in the range of 0.5 - 1, and the switching frequency is 10 kHz.

[0021] The described 180-degree phase-shifting circuit includes a dual-channel monostable multivibrator and 2 two-input NAND gates.

[0022] The dual-channel monostable multivibrator includes monostable multivibrators A and B, delay resistors R1 and R2, and delay capacitors C1 and C2. The monostable multivibrator is selected as CD4538, and 1 chip includes 2 monostable multivibrators, which is suitable for this circuit.

[0023] The described delay resistor R1 is connected between the power supply terminal VDD and the T2A pin, and the delay capacitor C1 is connected between the T1A pin and the T2A pin.

[0024] The delay resistor R2 is connected between the CB and T2B pins, and one end of the delay capacitor C2 is connected to the T1B pin and the other end is connected to the T2B pin.

[0025] The said delay resistor and delay capacitor respectively configure the output pulse widths of the monostable multivibrators A and B. The output pulse width t X is configured according to the following formula:

[0026] t X = R X * C X , where X = 1 or 2,

[0027] where t X is in ms; R X is in kΩ and the minimum value is 5 kΩ; C X is in μF.

[0028] The pulse widths t1 and t2 are equal and are configured to be half of the PWM1 switching period, i.e., 50 μs. Therefore, R1 = R2 = 10 kΩ and C1 = C2 = 0.005 μF are configured.

[0029] The reset pin CA and the trailing-edge trigger pin BA of the monostable multivibrator A are connected to the VDD high level, and the leading-edge trigger pin AA is connected to the PWM1 input signal. According to the truth table of the dual-channel monostable multivibrator, the output pin QA of the PWM1 rising-edge trigger outputs a pulse signal, and the pulse signal width is 50 μs. Then QA is a PWM wave with a 50% duty cycle triggered by the PWM1 rising edge.

[0030] The reset pin CB of the monostable multivibrator B is connected to the VDD high level, the leading-edge trigger pin AB is connected to the VSS low level, and the trailing-edge trigger pin BB is connected to the PWM1 input signal. According to the truth table of the dual-channel monostable multivibrator, the output pin QB of the PWM1 falling-edge trigger outputs a pulse signal, and the pulse signal width is 50 μs. Then QB is a PWM wave with a 50% duty cycle triggered by the PWM1 falling edge.

[0031] The said two 2-input NAND gates include NAND gate A and NAND gate B, and the model CD4011B 4-channel 2-input NAND gate is selected. The output signal QA of the monostable multivibrator A is connected to the 1st input pin of NAND gate A, the output signal QB of the monostable multivibrator B is connected to the 5th input pin of NAND gate B, the 3rd output pin of NAND gate A is connected to the 4th input pin of NAND gate B, the 6th output pin of NAND gate B is connected to the 2nd input pin of NAND gate A, and the 3rd output pin of NAND gate A outputs the PWM2 signal with a 180-degree phase shift.

[0032] The power supply of the CD4538 and CD4011B is +5V, which is compatible with the output signal of the PWM controller.

[0033] The NAND gates A and B form a flip-flop, and the relationship between the output signal PWM2 and the input signals QA and QB is as follows: when QA = 1 and QB = 1, PWM2 maintains the previous state; when QA = 1 and QB = 0, PWM2 = 0; when QA = 0 and QB = 0, PWM2 = 1; when QA = 0 and QB = 1, PWM2 = 1; combined with the dual-channel monostable multivibrator circuit, the input signal PWM1 is phase-shifted by 180 degrees to obtain the output signal PWM2.

[0034] In this application, by setting the external delay resistors and delay capacitors of the two monostable multivibrators, the pulse widths output by the two monostable multivibrators are both half of the switching period of the input PWM1. Then, the connection relationship of the two monostable multivibrators is built such that the first monostable multivibrator triggers the PWM wave output at the rising edge of the input signal PWM1, while the second monostable multivibrator triggers the PWM wave output at the falling edge of the input signal PWM1. This triggering form implicitly obtains the duty cycle information of the input signal PWM1, and then through the design of the flip-flop, the duty cycle signal is reverse-extracted to obtain the PWM2 signal with a 180-degree phase shift of the PWM1 signal corresponding to the input duty cycle of 0.5 - 1.

[0035] The present embodiment is simulated. The cases where the duty cycles of PWM1 are 0.5, 0.6, 0.7, 0.8, and 0.9 are respectively simulated, and the simulation waveforms are as Figures 2 - 6 shown. The signals from top to bottom in the figure are PWM1, QA, QB, and PWM2. PWM1 is a 10 kHz PWM input signal, QA is a PWM wave with a 50% duty cycle and 10 kHz triggered by the rising edge of PWM1, QB is a PWM wave with a 50% duty cycle and 10 kHz triggered by the falling edge of PWM1, and PWM2 is a 10 kHz PWM wave with a 180-degree phase shift of PWM1. It can be seen that the present invention can achieve a 180-degree phase shift of the PWM wave with a duty cycle of 0.5 - 1.

[0036] The above-described embodiments only represent the specific implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent should be subject to the appended claims.

Claims

1. A 180-degree phase shift method, characterized in that: The external delay resistors and delay capacitors of the two monostable multivibrators are set so that the pulse widths of the outputs of the two monostable multivibrators are both half of the switching period of the input PWM1; then the connection relationship between the two monostable multivibrators is established so that the first monostable multivibrator triggers the PWM wave output at the rising edge of the input signal PWM1, and the second monostable multivibrator triggers the PWM wave output at the falling edge of the input signal PWM1. This triggering form implicitly obtains the duty cycle information of the input signal PWM1; then, by designing a trigger, the duty cycle signal is reversely extracted to obtain the PWM2 signal after the phase shift of 180 degrees corresponding to the input duty cycle of 0.5-1.

2. A 180-degree phase shift circuit, characterized in that: Includes a dual-channel monostable multivibrator and two 2-input NAND gates; The dual-channel monostable multivibrator comprises monostable multivibrators A and B, delay resistors R1 and R2, and delay capacitors C1 and C2; each monostable multivibrator outputs a pulse width t X Configure according to the following formula: X =R X *C X , X = 1 or 2, where t X The unit is ms; R X The unit is kΩ, the minimum value is 5kΩ; C X The unit is uf; The reset pin CA and the trailing edge trigger pin BA of the monostable multivibrator A are connected to the VDD high level, and the leading edge trigger pin AA is connected to the PWM1 input signal. According to the dual-channel monostable multivibrator truth table, the rising edge of the input PWM1 signal triggers the output pin QA to output a pulse signal; The reset pin CB of the monostable multivibrator B is connected to the VDD high level, the leading edge trigger pin AB is connected to the VSS low level, and the trailing edge trigger pin BB is connected to the PWM1 input signal. According to the dual-channel monostable multivibrator truth table, the input PWM1 falling edge triggers the output pin QB to output a pulse signal; The two 2-input NAND gates include a NAND gate A and a NAND gate B, the output signal QA of the monostable multivibrator A is connected to the input pin No. 1 of the NAND gate A, the output signal QB of the monostable multivibrator B is connected to the input pin No. 5 of the NAND gate B, the output pin No. 3 of the NAND gate A is connected to the input pin No. 4 of the NAND gate B, the output pin No. 6 of the NAND gate B is connected to the input pin No. 2 of the NAND gate A, and the output pin No. 3 of the NAND gate A outputs a PWM2 signal after the phase is shifted by 180 degrees.

3. The 180-degree phase shift circuit according to claim 2, characterized in that: The NAND gates A and B form a trigger, and the relationship between the output signal PWM2 and the input signals QA and QB is: when QA=1, QB=1, PWM2 maintains the previous state; when QA=1, QB=0, PWM2=0; when QA=0, QB=0, PWM2=1; when QA=0, QB=1, PWM2=1; combined with the dual-channel monostable multivibrator circuit, the input signal PWM1 is phase-shifted by 180 degrees to obtain the output signal PWM2.

4. An application of a 180-degree phase shift circuit, characterized in that: The 180-degree phase shift circuit described in claim 2 or 3 is selected to obtain two-unit PWM control signals with a phase difference of 180 degrees, which are used for a switching power supply with two units staggered in parallel.

5. An application of a 180-degree phase shift method, characterized in that: The 180-degree phase shift method described in claim 1 is used to generate two-unit PWM control signals with a phase difference of 180 degrees, which are used for a switching power supply with two units staggered in parallel.

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