Ring oscillation circuit, chip and electronic equipment

Abstract

The invention discloses a ring oscillation circuit, a chip and electronic equipment, and belongs to the technical field of integrated circuits. The annular oscillation circuit comprises an oscillation driving circuit and an oscillation ring circuit; the oscillation driving circuit is used for driving the oscillation ring circuit according to the first driving capability under the condition that the oscillation ring circuit does not start oscillation; under the condition that the oscillation ring circuit starts oscillation, the oscillation ring circuit is driven according to the second driving capacity, and the first driving capacity is larger than the second driving capacity; and the oscillation ring circuit is used for outputting an orthogonal signal according to the driving of the oscillation driving circuit. According to the ring oscillation circuit, the driving capability of the oscillation ring circuit is dynamically controlled through the oscillation driving circuit, so that the problem that the oscillation ring circuit does not start oscillation due to insufficient driving capability can be avoided, the problem that the oscillation frequency is reduced due to overlarge driving capability can be avoided, an orthogonal signal with higher frequency can be generated, and the reliability of the ring oscillation circuit is improved. Therefore, the method can be applied to applications with higher frequency generation.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and particularly to a ring oscillator circuit, a chip, and an electronic device. Background Art

[0002] In the field of integrated circuit technology, a ring oscillator circuit is a commonly used circuit for generating orthogonal signals. Orthogonal signals refer to two or more mutually orthogonal signals, and mutual orthogonality means that the phase difference between two signals always remains 90 degrees. As the demand frequency for orthogonal signals in application operation becomes higher and higher, how to generate higher-frequency orthogonal signals through a ring oscillator circuit is an urgent problem to be solved. Summary of the Invention

[0003] This application provides a ring oscillator circuit, a chip, and an electronic device, which can output higher-frequency orthogonal signals.

[0004] On the one hand, a ring oscillator circuit is provided. The ring oscillator circuit includes an oscillation driving circuit and an oscillation loop circuit;

[0005] The oscillation driving circuit is configured to drive the oscillation loop circuit according to a first driving ability when the oscillation loop circuit is not oscillating; and drive the oscillation loop circuit according to a second driving ability when the oscillation loop circuit is oscillating, where the first driving ability is greater than the second driving ability;

[0006] The oscillation loop circuit is configured to output orthogonal signals according to the drive of the oscillation driving circuit.

[0007] In a possible implementation manner, the oscillation driving circuit includes an oscillation detection circuit, a first starting circuit, and a second starting circuit, and the first starting circuit is connected to the oscillation loop circuit through a switch;

[0008] The oscillation detection circuit is configured to detect whether the oscillation loop circuit is oscillating according to the signal output by the oscillation loop circuit, close the switch when it detects that the oscillation loop circuit is not oscillating, and open the switch when it detects that the oscillation loop circuit is oscillating;

[0009] The first starting circuit is configured to drive the oscillation loop circuit according to a third driving ability when the switch is closed; and not drive the oscillation loop circuit when the switch is open;

[0010] The second starting circuit is configured to drive the oscillation loop circuit according to the second driving ability, and the first driving ability is the sum of the third driving ability and the second driving ability.

[0011] In a possible implementation, when the number of oscillation driving circuits is at least two, the at least two oscillation driving circuits include an oscillation detection circuit, at least two first startup circuits, and at least two second startup circuits, and any one of the first startup circuits is connected in parallel with the corresponding second startup circuit.

[0012] In a possible implementation, the oscillation driving circuit includes an oscillation detection circuit and a first startup circuit, and the first startup circuit is connected to the oscillation loop circuit through a switch;

[0013] The oscillation detection circuit is configured to detect whether the oscillation loop circuit starts to oscillate according to the signal output by the oscillation loop circuit. When it is detected that the oscillation loop circuit does not start to oscillate, the switch is closed. When it is detected that the oscillation loop circuit starts to oscillate, the switch is opened;

[0014] The first startup circuit is configured to drive the oscillation loop circuit according to the first driving ability when the switch is closed; and not drive the oscillation loop circuit when the switch is opened.

[0015] In a possible implementation, when the number of oscillation driving circuits is at least two, the at least two oscillation driving circuits include an oscillation detection circuit and at least two first startup circuits.

[0016] In a possible implementation, the oscillation detection circuit includes a signal detection circuit and a switch control circuit;

[0017] The signal detection circuit is configured to determine that the oscillation loop circuit does not start to oscillate and output a first voltage signal to the switch control circuit when the signal output by the oscillation loop circuit is a DC voltage; and determine that the oscillation loop circuit starts to oscillate and output a second voltage signal to the switch control circuit when the signal output by the oscillation loop circuit is an AC voltage;

[0018] The switch control circuit is configured to close the switch when receiving the first voltage signal and open the switch when receiving the second voltage signal.

[0019] In a possible implementation, the signal detection circuit includes a first capacitor and a voltage control circuit;

[0020] The first capacitor is configured to disconnect the connection between the oscillation loop circuit and the voltage control circuit when the signal output by the oscillation loop circuit is a DC voltage; and conduct the connection between the oscillation loop circuit and the voltage control circuit when the signal output by the oscillation loop circuit is an AC voltage;

[0021] The voltage control circuit is configured to output the first voltage signal to the switch control circuit when there is no effect of the AC voltage, and output the second voltage signal to the switch control circuit when there is an effect of the AC voltage.

[0022] In a possible implementation manner, the signal detection circuit further includes a buffer, and the buffer is configured to prevent the first startup circuit from having a counter-effect on the signal detection circuit.

[0023] In a possible implementation manner, the oscillation loop circuit includes a plurality of inverters connected end to end. There is a node between any two inverters. Any inverter is configured to invert and output an input signal, and any node is configured to output the signal at the any node.

[0024] The oscillation driving circuit is connected between two nodes with opposite phases of the output signal, and the oscillation driving circuit is configured to drive the two nodes to maintain opposite phases of the output signal.

[0025] In a possible implementation manner, two nodes with opposite phases of the output signal form a node group. The number of node groups included in the oscillation loop circuit is at least two, and the number of oscillation driving circuits is at least two. An oscillation driving circuit is connected between two nodes of a node group and is configured to drive the two corresponding nodes to maintain opposite phases of the output signal.

[0026] In a possible implementation manner, when the one oscillation driving circuit includes a first startup circuit, the first startup circuit includes a first inverter and a second inverter. The input end of the first inverter is connected to the first node of the two nodes, the output end of the first inverter is connected to the second node of the two nodes, the output end of the second inverter is connected to the second node through a switch, and the output end of the second inverter is connected to the first node through a switch.

[0027] In a possible implementation manner, when the oscillation driving circuit further includes a second startup circuit, the second startup circuit includes a third inverter and a fourth inverter. The input end of the third inverter is connected to the first node, the output end of the third inverter is connected to the second node, the output end of the fourth inverter is connected to the second node, and the output end of the fourth inverter is connected to the first node.

[0028] On the other hand, a chip is provided, and the chip includes the ring oscillator circuit as described in the above aspect.

[0029] In yet another aspect, an electronic device is provided, and the electronic device includes the ring oscillator circuit as described in the above aspect.

[0030] The technical solution provided by this application can at least bring the following beneficial effects:

[0031] The technical solution provided by this application dynamically controls the driving ability of the oscillation loop circuit through an oscillation driving circuit, so that when the oscillation loop circuit fails to start oscillating, it can start oscillating according to a relatively large first driving ability, avoiding the problem that the oscillation loop circuit fails to start oscillating due to insufficient driving ability; when the oscillation loop circuit starts oscillating, it can maintain a relatively high oscillation frequency according to a relatively small second driving ability, avoiding the problem that the oscillation frequency of the oscillation loop circuit decreases due to excessive driving ability. Thus, the ring oscillator circuit provided by this application can generate orthogonal signals with higher frequencies for applications in higher frequency generation. Description of the Drawings

[0032] In order to more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0033] Figure 1 is a schematic diagram of the circuit structure of a ring oscillator with orthogonal phases provided by the related art;

[0034] Figure 2 is a schematic diagram of a signal waveform provided by an embodiment of this application;

[0035] Figure 3 is a schematic diagram of the structure of a ring oscillator circuit provided by an embodiment of this application;

[0036] Figure 4 is a schematic diagram of the structure of another ring oscillator circuit provided by an embodiment of this application;

[0037] Figure 5 is a schematic diagram of the structure of another ring oscillator circuit provided by an embodiment of this application;

[0038] Figure 6 is a schematic diagram of the structure of another ring oscillator circuit provided by an embodiment of this application;

[0039] Figure 7 is a schematic diagram of the structure of another ring oscillator circuit provided by an embodiment of this application;

[0040] Figure 8 is a schematic diagram of the structure of another ring oscillator circuit provided by an embodiment of this application;

[0041] Figure 9It is a schematic structural diagram of a signal detection circuit provided by an embodiment of the present application. Detailed implementation manners

[0042] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0043] In applications of wireless communication or high-speed serial communication in the field of analog integrated circuits, fixed-frequency orthogonal signals are often used as carrier sources or clock sources. Among them, a fixed-frequency orthogonal signal refers to two or more signals with the same frequency and orthogonal to each other, and being orthogonal means that the phase difference between the two signals always remains 90 degrees. A ring oscillator with orthogonal phases is a currently commonly used circuit for generating fixed-frequency orthogonal signals.

[0044] A ring oscillator usually consists of multiple inverters or delay units connected in series to form a closed-loop structure. When the circuit is powered on, due to the propagation delay of the inverter, the signal continuously propagates in the loop and generates a phase delay, eventually forming a stable oscillation signal. By reasonably designing the number of stages and the structure of the ring oscillator, a specific phase relationship exists between the outputs of different stages, thereby obtaining orthogonal signals.

[0045] Among them, an inverter is used to perform a logical inversion on the input signal, so that the input and output levels of the inverter are opposite. For example, when the input of the inverter is a high level (logic 1), the output of the inverter is a low level (logic 0), and vice versa. An inverter usually includes a PMOS transistor (pull-up transistor) and an NMOS transistor (pull-down transistor). When the input signal is a high level, the NMOS transistor is turned on, the PMOS transistor is turned off, and the output is a low level; when the input signal is a low level, the PMOS transistor is turned on, the NMOS transistor is turned off, and the output is a high level.

[0046] MOS transistor is an abbreviation of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), also known as a metal-oxide-semiconductor field-effect transistor or a field-effect transistor for short. In a PMOS transistor, the source and drain are composed of P-type semiconductor materials, and the channel is an N-type semiconductor; in an NMOS transistor, the source and drain are composed of N-type semiconductor materials, and the channel is a P-type semiconductor.

[0047] Exemplarily, the circuit structure of a ring oscillator with orthogonal phases is as Figure 1As shown. The circuit includes eight inverters, namely QP1, QM1, QP2, QM2, WP1, WM1, WP2, and WM2. Among them, QP1, QP2, QM1, and QM2 are connected end to end to form a ring structure, and X1, X3, X2, and X4 are the four nodes of the ring structure. When the circuit generates a signal with a certain frequency, the signal is equivalent to starting from X1, passing through X3, X2, and X4 and then returning to X1. Therefore, the phase differences between the signals at X1, X3, X2, and X4 are successively spaced 90 degrees (i.e., 360 degrees / 4).

[0048] For example, the phase of the signal at X1 is 0 degrees, the phase of the signal at X3 is 90 degrees, the phase of the signal at X2 is 180 degrees, and the phase of the signal at X4 is 270 degrees. Among them, the waveform diagrams of the signals respectively generated at X1, X3, X2, and X4 can be as Figure 2 shown. Thus, the signal generated at X1 and the signal generated at X3 are orthogonal signals, the signal generated at X3 and the signal generated at X2 are orthogonal signals, the signal generated at X2 and the signal generated at X4 are orthogonal signals, and the signal generated at X4 and the signal generated at X1 are orthogonal signals. Moreover, the phase difference between the signal generated at X1 and the signal generated at X2 is 180 degrees. Therefore, X1 and X2 are a set of differential nodes, and the phase difference between the signal generated at X3 and the signal generated at X4 is 180 degrees. Therefore, X3 and X4 are a set of differential nodes.

[0049] Since each set of differential nodes requires a set of inverters to maintain their phase difference at 180 degrees to start oscillating, therefore, in the Figure 1 shown circuit, there are four starting inverters, namely WP1, WM1, WP2, and WM2. Among them, the functions of WP1 and WM1 are to make the phase difference between the signal generated at X1 and the signal generated at X2 180 degrees, and the functions of WP2 and WM2 are to make the phase difference between the signal generated at X3 and the signal generated at X4 180 degrees. The starting inverters are located at the starting position of the ring structure, receive the signal from the previous cycle, and invert the signal and then pass it to the next inverter.

[0050] The startup process includes: when the power is turned on, due to factors such as power supply noise, the subthreshold effect of transistors, and the initial state of parasitic capacitors, a small voltage difference will be generated at the input and output terminals of the startup inverter. This small voltage difference will be regarded as an initial signal by the startup inverter. Assuming the initial signal is high level, the startup inverter will invert the initial signal to low level and transmit it to the next inverter. The low-level signal will sequentially pass through other inverters along the ring structure. After being inverted by the inverters, it will finally return to the input terminal of the startup inverter, making the input of the startup inverter become low level, and then making the output of the startup inverter become high level, thus starting the first cycle of oscillation. After that, the signal will continuously cycle and invert in the ring structure, generating a periodic oscillation signal.

[0051] Therefore, the startup inverter needs to have sufficient sensitivity to the initial small voltage difference to ensure that the ring oscillator can start up reliably. If the parasitic capacitance of the startup inverter is too large or the transistor driving ability is too weak, it may not be able to effectively invert and propagate the initial small signal, resulting in the inability to form a stable oscillation, and then the ring oscillator will have a problem of being locked and unable to start up.

[0052] For example, in Figure 1 the shown ring oscillator, if the driving abilities of WP1, WM1, WP2, and WM2 are too small, WP1, WM1, WP2, and WM2 cannot reverse the signal, resulting in the phases of the signals at X1 and X2 being both 0 degrees without phase difference, and the phases of the signals at X3 and X4 being both 180 degrees without phase difference. At this time, QP1, QP2, QM1, and QM2 on the ring link do not need to oscillate, and their own inputs and outputs are already inverted, that is, the phase difference already satisfies 180 degrees. Therefore, the ring oscillator does not start up.

[0053] To avoid the problem of the above ring oscillator not starting up, usually the sizes of the startup inverters WP1, WM1, WP2, and WM2 are increased to increase the driving ability of the startup inverters, so that there must be a 180-degree phase difference relationship between nodes X1 and X2, and X3 and X4. However, an overly large size of the startup inverter will lead to a decrease in the oscillation frequency or even the termination of oscillation, making it impossible to generate high-frequency quadrature signals.

[0054] The reason why an over-sized startup inverter can lead to a decrease in the oscillation frequency or even cause oscillation termination is that the instantaneous effects of the Q-type inverter and the W-type inverter are opposite. Since the oscillation frequency is essentially the time period of the rise and fall of the node voltage, the presence of the W-type inverter will increase the time period of the rise and fall of the node voltage. The time period is negatively correlated with the oscillation frequency, thus resulting in a decrease in the oscillation frequency. If the driving capabilities of the pull-up voltage and pull-down voltage of the Q-type inverter and the W-type inverter are the same, the node voltage will remain unchanged and the oscillation will stop. The Q-type inverter refers to QP1, QM1, QP2, and QM2 on the ring link, and the W-type inverter refers to WP1, WM1, WP1, and WM2 that serve as the startup inverter.

[0055] Exemplarily, taking QP1 and WP1 corresponding to node X1 as an example, when node X1 is at a low level, the function of QP1 is to pull node X1 to a high level, while the function of WP1 is to pull node X1 back to a low level. If the size of WP1 is too large, it will cause an increase in the input capacitance and output capacitance of WP1. A larger capacitance requires a longer time to complete charging and discharging, resulting in a greater delay time when the signal passes through WP1. The increase in the delay time will cause a decrease in the oscillation frequency.

[0056] The embodiment of the present application provides a ring oscillator circuit, which can avoid the problem of non-startup and circumvent the problem of a decrease in the oscillation frequency or oscillation termination caused by an excessive driving capability of the startup inverter. Furthermore, it can generate a higher-frequency orthogonal signal for applications that require higher-frequency generation.

[0057] See Figure 3 , Figure 3 FIG. is a schematic structural diagram of a ring oscillator circuit provided by the embodiment of the present application. The ring oscillator circuit 00 includes an oscillation driving circuit 10 and an oscillation ring circuit 11. Among them, the oscillation driving circuit 10 is configured to drive the oscillation ring circuit 11 according to a first driving capability when the oscillation ring circuit 11 has not started to oscillate; and drive the oscillation ring circuit 11 according to a second driving capability when the oscillation ring circuit 11 has started to oscillate, and the first driving capability is greater than the second driving capability. The oscillation ring circuit 11 is configured to output an orthogonal signal according to the drive of the oscillation driving circuit 10.

[0058] Among them, the first driving ability meets the starting condition, and the starting condition includes: when the oscillation loop circuit 11 has not started to oscillate, it will not cause the oscillation loop circuit 11 not to start oscillating due to the too small first driving ability. The second driving ability meets the frequency condition, and the frequency condition includes: when the oscillation loop circuit 11 has started to oscillate, it will not cause the oscillation frequency to decrease due to the too large second driving ability. The oscillation of the oscillation loop circuit 11 means that physical quantities such as the current or voltage of the oscillation loop circuit 11 change periodically with time, and the oscillation frequency is the frequency of the periodic change; the non-oscillation of the oscillation loop circuit 11 means that physical quantities such as the current or voltage of the oscillation loop circuit 11 are fixed.

[0059] Therefore, the ring oscillator circuit 00 provided by the embodiment of the present application dynamically controls the driving ability of the oscillation loop circuit 11 through the oscillation driving circuit 10, so that when the oscillation loop circuit 11 has not started to oscillate, it can start to oscillate according to the larger first driving ability, avoiding the problem that the oscillation loop circuit 11 cannot start oscillating due to insufficient driving ability; when the oscillation loop circuit 11 has started to oscillate, it can maintain a higher oscillation frequency according to the smaller second driving ability, avoiding the problem that the oscillation frequency of the oscillation loop circuit 11 decreases due to too large driving ability. Furthermore, the ring oscillator circuit 00 can generate a higher-frequency quadrature signal for application in applications with higher-frequency generation.

[0060] Optionally, the implementation manner of the oscillation driving circuit 10 includes but is not limited to the following two. First, as Figure 4 shown, the oscillation driving circuit 10 includes an oscillation detection circuit 101 and a first starting circuit 102, and the first starting circuit 102 is connected to the oscillation loop circuit 11 through a switch. In this case, the oscillation detection circuit 101 is used to detect whether the oscillation loop circuit 11 has started to oscillate according to the quadrature signal output by the oscillation loop circuit 11. When it is detected that the oscillation loop circuit 11 has not started to oscillate, the switch is closed. When it is detected that the oscillation loop circuit 11 has started to oscillate, the switch is opened; the first starting circuit 102 is used to drive the oscillation loop circuit 11 according to the first driving ability when the switch is closed, and does not drive the oscillation loop circuit 11 when the switch is opened. Therefore, the second driving ability is zero.

[0061] In Figure 4 the shown ring oscillator circuit 00, the first driving ability is the driving ability of the first starting circuit 102, which is determined by the electrical characteristics of the first starting circuit 102; the second driving ability is zero. At this time, during the process when the oscillation loop circuit 11 has already started to oscillate, no additional driving force is applied.

[0062] Second, as Figure 5As shown, the oscillation driving circuit 10 includes an oscillation detection circuit 101, a first startup circuit 102, and a second startup circuit 103. The first startup circuit 102 is connected to the oscillation loop circuit 11 through a switch. In this case, the oscillation detection circuit 101 is configured to detect whether the oscillation loop circuit 11 starts to oscillate according to the quadrature signal output by the oscillation loop circuit 11. When it is detected that the oscillation loop circuit 11 does not start to oscillate, the switch is closed. When it is detected that the oscillation loop circuit 11 starts to oscillate, the switch is opened. The first startup circuit 102 is configured to drive the oscillation loop circuit 11 according to the third driving ability when the switch is closed, and not to drive the oscillation loop circuit 11 when the switch is opened. The second startup circuit 103 is configured to drive the oscillation loop circuit 11 according to the second driving ability. The first driving ability is the sum of the third driving ability and the second driving ability.

[0063] That is to say, in Figure 5 the ring oscillator circuit 00 shown, the second driving ability is the driving ability of the second startup circuit 103 for the oscillation loop circuit 11, which is determined by the electrical characteristics of the second startup circuit 103. The driving ability of the first startup circuit 102 for the oscillation loop circuit 11 is the third driving ability, which is determined by the electrical characteristics of the first startup circuit 102. What is dynamically controlled by the switch is whether the first startup circuit 102 drives the oscillation loop circuit 11. When the switch is closed, the first startup circuit 102 and the second startup circuit 103 drive the oscillation loop circuit 11 simultaneously. Therefore, the first driving ability is the sum of the second driving ability and the third driving ability.

[0064] In the embodiment of the present application, the oscillation loop circuit 11 includes a plurality of inverters connected end to end. There is a node between any two inverters. Any inverter is configured to invert and output an input signal. Any node is configured to output the signal at any node. The oscillation driving circuit 10 is connected between two nodes with opposite-phase output signals. The oscillation driving circuit 10 is configured to drive these two nodes to keep the output signals in opposite phases. For example, the phase difference between every two adjacent nodes is 90 degrees, that is, every two adjacent nodes are used to generate a set of quadrature signals.

[0065] When a plurality of signals are output by a plurality of nodes, among the plurality of nodes, there are two nodes with opposite-phase output signals. These two nodes form a node group, that is, two nodes with a phase difference of 180 degrees in the output signals. Taking the two nodes with opposite-phase output signals among the plurality of nodes including a first node and a second node as an example, the oscillation driving circuit 10 is connected between the first node and the second node, and is configured to drive the first node and the second node to keep the output signals in opposite phases.

[0066] In a possible case, the number of node groups included in the oscillation loop circuit 11 is at least two, and the number of oscillation driving circuits 10 is at least two. One oscillation driving circuit 10 is connected between two nodes of one node group, and is used to drive the output signals between the corresponding two nodes to have opposite phases. Among them, one oscillation detection circuit 101 can be shared among at least two oscillation driving circuits 10. For example, at least two oscillation driving circuits 10 include one oscillation detection circuit 101 and at least two first starting circuits 102; or, at least two oscillation driving circuits 10 include one oscillation detection circuit 101, at least two first starting circuits 102 and at least two second starting circuits 103, and any first starting circuit 102 is connected in parallel with the corresponding second starting circuit 103.

[0067] Optionally, taking the two nodes of one node group connected by one oscillation driving circuit 10 as the first node and the second node respectively, in the case where the oscillation driving circuit 10 includes the first starting circuit 102, the first starting circuit 102 includes a first inverter and a second inverter. The input end of the first inverter is connected to the first node among the two nodes, the output end of the first inverter is connected to the second node among the two nodes, the output end of the second inverter is connected to the second node through a switch, and the output end of the second inverter is connected to the first node through a switch. In the case where the oscillation driving circuit 10 further includes the second starting circuit 103, the second starting circuit 103 includes a third inverter and a fourth inverter. The input end of the third inverter is connected to the first node, the output end of the third inverter is connected to the second node, the output end of the fourth inverter is connected to the second node, and the output end of the fourth inverter is connected to the first node.

[0068] Exemplarily, taking the oscillation loop circuit 11 including 4 inverters connected end to end as an example. Refer to Figure 6 For the ring oscillator circuit provided in the embodiment of the present application shown, the 4 inverters connected end to end are QP1, QM1, QP2, and QM2 respectively. X1, X3, X2, and X4 are the four nodes of the ring structure, and the phase differences of the output signals between X1, X3, X2, and X4 are 90 degrees apart in sequence. The phases of the output signals of X1 and X3 are opposite, and the phases of the output signals of X2 and X4 are opposite.

[0069] The multiple first starting circuits 102 include four inverters EP1, EP2, EM1, and EM2. EP1 and EM1 are one first starting circuit 102 between X1 and X3, and EP2 and EM2 are another first starting circuit 102 between X2 and X4. Among them, a switch is connected in series at the output of each of EP1, EP2, EM1, and EM2, that is, S1 - S4. Exemplarily, the switches S1 - S4 are closed under the action of a high level and opened under the action of a low level.

[0070] Optionally, the multiple second oscillation circuits 103 include four inverters, namely WP1, WM1, WP1, and WM2. WP1 and WM1 are one second oscillation circuit 103 between X1 and X3, and WP1 and WM2 are another second oscillation circuit 103 between X2 and X4. If switches S1 - S4 are closed, it is equivalent to EP1, EP2, EM1, and EM2 being respectively connected in parallel with WP1, WM1, WP2, and WM2. Among them, EP1, EM1 are connected in parallel with WP1, WM1, making the driving ability between nodes X1 and X2 stronger by 180 degrees. For example, the driving ability between X1 and X2 is the superposition of the driving abilities of EP1 and EM1 and the driving abilities of WP1 and WM1; EP2, EM2 are connected in parallel with WP2, WM2, making the driving ability between nodes X3 and X4 stronger by 180 degrees. For example, the driving ability between X3 and X4 is the superposition of the driving abilities of EP2 and EM2 and the driving abilities of WP2 and WM2.

[0071] That is to say, Figure 6 The driving abilities of WP1, WM1, WP2, and WM2 in Figure 1 can be significantly reduced compared to those of WP1, WM1, WP2, and WM2 in Figure 7 shown. In a possible case, the ring oscillator provided in the embodiment of the present application may also not require WP1, WM1, WP2, and WM2, and directly achieve oscillation through EP1, EP2, EM1, and EM2, for example

[0072] Regarding the above-mentioned ring oscillation circuit 00, referring to Figure 8 , the oscillation detection circuit 101 may include a signal detection circuit 1011 and a switch control circuit 1012. The signal detection circuit 1011 is used to determine that the oscillation ring circuit 11 has not started oscillating and output a first voltage signal to the switch control circuit 1012 when the signal output by the oscillation ring circuit 11 is a DC voltage; and determine that the oscillation ring circuit 11 has started oscillating and output a second voltage signal to the switch control circuit 1012 when the signal output by the oscillation ring circuit 11 is an AC voltage. The switch control circuit 1012 is used to close the switch when receiving the first voltage signal and open the switch when receiving the second voltage signal.

[0073] In a possible implementation, the signal detection circuit 1011 includes a first capacitor and a voltage control circuit; the first capacitor is configured to disconnect the connection between the oscillation loop circuit 11 and the voltage control circuit when the signal output by the oscillation loop circuit 11 is a DC voltage; and connect the oscillation loop circuit 11 and the voltage control circuit when the signal output by the oscillation loop circuit 11 is an AC voltage; the voltage control circuit is configured to output a first voltage signal to the switch control circuit 1012 when there is no AC voltage acting thereon; and output a second voltage signal to the switch control circuit 1012 when there is an AC voltage acting thereon.

[0074] Exemplarily, the voltage control circuit includes a first transistor, a second transistor, a third transistor, a second capacitor, a resistor, an input terminal and an output terminal. The input terminal is connected to the signal output terminal of the oscillation loop circuit 11, and the output terminal is connected to the switch control circuit 1012.

[0075] Wherein, one end of the first capacitor is connected to the input terminal, and the other end of the first capacitor is connected to the gates of the second transistor and the third transistor, and is configured to control the gate voltages of the second transistor and the third transistor according to the signal output by the signal output terminal of the oscillation loop circuit 11; the source and gate of the first transistor are connected to the power supply terminal, the drain of the first transistor is connected to the drain of the second transistor, and the sources of the second transistor and the third transistor are both connected to the ground terminal, and are configured to control the drain current of the third transistor according to the gate voltage; the drain of the third transistor, one end of the resistor and one end of the second capacitor are all connected to the output terminal, and the other end of the resistor and the other end of the second capacitor are both connected to the power supply terminal, and are configured to control the voltage signal at the output terminal according to the drain current of the third transistor.

[0076] Optionally, the signal detection circuit 1011 further includes a buffer, and the output terminal is connected to the switch control circuit 1012 through the buffer. Wherein, the buffer can be used as an isolation element to transmit the signal of the previous-stage circuit to the subsequent-stage circuit, and at the same time prevent the subsequent-stage circuit from having a reverse effect on the previous-stage circuit. In the embodiments of the present application, the buffer is configured to prevent the first starting circuit 102 from having a reverse effect on the signal detection circuit 1011.

[0077] Exemplarily, the schematic structural diagram of the signal detection circuit 1011 can be as Figure 9 shown. Wherein, the first transistor is MOS transistor M1, the second transistor is MOS transistor M2, the third transistor is MOS transistor M3, the resistor is R1, the second capacitor is C1, the first capacitor is C2, and the buffer is BUF. Taking the output signal connected by the capacitor C1 as an example of the node X1 in the oscillation loop circuit 11 for illustration.

[0078] The working principle of the signal detection circuit 1011 is as follows: When the ring oscillator circuit 00 provided in the embodiment of the present application is not oscillating, the voltage of node X1 is in a DC voltage state, that is, the voltage of node X1 is a fixed value, and the fixed value is a high level or a low level. One end of the capacitor C2 is connected to node X1. Due to the DC blocking effect of the capacitor C2, when the voltage of node X1 is in a DC voltage state, node X1 will not have any influence on the other end node Y1 of the capacitor C2. Node Y1 is connected to the gates of M2 and M3, so node X1 will not have any influence on the gates of M2 and M3.

[0079] In Figure 9 , M1 is a PMOS transistor, and the PMOS transistor is a low-threshold transistor, that is, it conducts when the gate-source voltage Vgs is at a low level and disconnects when the gate-source voltage Vgs is at a high level. M2 and M3 are NMOS transistors, and the NMOS transistors are high-threshold transistors, that is, they conduct when the gate-source voltage Vgs is at a high level and disconnect when the gate-source voltage Vgs is at a low level.

[0080] Therefore, although the gate of the PMOS transistor M1 is connected to the power supply VDD and the gate-source voltage Vgs1 of the PMOS transistor M1 = 0 is in the cut-off region, the PMOS transistor M1 has a leakage current in the order of nA (nanoampere), and this leakage current will pass through the drain of the NMOS transistor M2. Among them, the leakage current refers to the tiny current flowing from the source to the drain under the action of the reverse bias voltage of the P-N junction when the transistor is in the cut-off state.

[0081] For the NMOS transistor M2 and the NMOS transistor M3, since the leakage current generated by the PMOS transistor M1 flows through the drain of the NMOS transistor M2, the gate-source voltage Vgs2 of the NMOS transistor M2 is approximately equal to the threshold voltage Vth. And because the gate-source voltages of the NMOS transistor M2 and the NMOS transistor M3 are equal, when the voltage of node X1 is a fixed value, the leakage current of the NMOS transistor M3 is approximately equal to the leakage current of the NMOS transistor M2, also in the order of nA. The leakage current of the NMOS transistor M2 flows through a resistor R1 in the order of kΩ (kilo Ohm), generating a voltage drop relative to the power supply VDD in the order of uV (microvolt). The voltage of the power supply VDD is usually 1.8V (volt), making the input of the buffer BUF approximately in a high-level state, and the output of the buffer BUF is a high level.

[0082] As Figure 9As shown, the output of buffer BUF is connected to the control terminals of switches S1 - S4 simultaneously. Since the output of buffer BUF is at a high level, switches S1 - S4 are all closed, which is equivalent to enhancing the driving capabilities of WP1, WM1, WP2, and WM2, making the signals at nodes X1 and X2 have opposite phases, and the signals at nodes X3 and X4 have opposite phases. Having opposite phases means a 180 - degree phase difference relationship, thus avoiding the locked - up state where X1 and X2 or X3 and X4 have the same phase, making Figure 6 the ring - oscillator circuit shown in Fig. 6 or Fig. 7 start to oscillate.

[0083] After the ring - oscillator circuit starts to oscillate, the signal output from node X1 is an oscillating signal, that is, the voltage at node X1 is in an AC voltage state. Due to the function of capacitor C2 in passing AC signals, the AC component of node X1 acts on node Y1 through capacitor C2. The supply voltage of the ring oscillator is the same as that of the oscillation detection circuit, both being VDD of 1.8V, making the amplitude of the AC component of node X1 be VDD. The voltage V1 at Y1 can be expressed by the following formula 1. Where, Vth2 is the threshold voltage of NMOS transistors M2 and M3, VDD is the supply voltage, and w is the oscillation frequency of the ring oscillator.

[0084] V1 = Vth2 + 0.5 * VDD * cos(wt) Formula 1

[0085] In this case, the current I3 flowing through NMOS transistor M3 can be expressed by the following formula 2.

[0086]

[0087] Where, A is a constant determined by the process and the size of NMOS transistor M3. It can be seen from formula 2 that the current I3 is composed of a DC component and a high - frequency AC component with a frequency of 2w superimposed. Since the capacitor has the characteristic of passing high - frequency signals and blocking low - frequency signals, capacitor C1 connected to the DC voltage VDD is equivalent to short - circuiting the high - frequency signal, that is, only the DC signal passes through R1. Therefore, capacitor C1 filters out the high - frequency AC component, making the current flowing through resistor R1 be the DC component (A * VDD) 2 / 8. The magnitude of this DC component is usually on the order of mA (milliampere), making the voltage drop of R1 relative to VDD be on the order of V (volt), thus making the input of BUF approximately at a low level, so that BUF outputs a low level, switches S1 - S4 disconnect, and reduces the driving capabilities of X1 and X2, X3 and X4 with opposite signal phases.

[0088] In summary, it can be seen that the advantage of the embodiment of the present application is that when the ring oscillator circuit needs to start oscillating, the driving capabilities of the signals with opposite phases between X1 and X2, and between X3 and X4 can be enhanced to start the ring oscillator circuit. After the ring oscillator circuit starts oscillating, due to the intervention of the oscillation detection circuit, the driving capabilities of the signals with opposite phases between X1 and X2, and between X3 and X4 will be reduced, or the driving capabilities of the signals with opposite phases between X1 and X2, and between X3 and X4 will be eliminated, avoiding the influence of the driving capabilities during the oscillation process on the normal ring oscillation process of the oscillation loop circuit, thereby avoiding the disadvantages of frequency decrease or frequency suspension caused by the too strong driving capabilities of the signals with opposite phases between X1 and X2, and between X3 and X4.

[0089] A chip provided by an embodiment of the present application, the chip includes the ring oscillator circuit 00 as shown in Figure 3-8 any one. Thus, the chip can generate orthogonal signals with higher frequencies for applications in higher frequency generation.

[0090] An electronic device provided by an embodiment of the present application, the electronic device includes the ring oscillator circuit 00 as shown in Figure 3-8 any one. Exemplarily, the electronic device includes the above chip, and the above chip includes the ring oscillator circuit 00 as shown in Figure 3-8 any one. Thus, the electronic device generates orthogonal signals with higher frequencies through the chip for applications in higher frequency generation.

[0091] It should be understood that the terms used in the embodiments of the present disclosure are only for explaining the embodiments of the present disclosure, rather than aiming to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the ordinary meanings understood by those of ordinary skill in the field to which the present disclosure belongs.

[0092] For example, the "first", "second" or "third" and similar words used in the specification and claims of the present patent application of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components.

[0093] Similarly, words such as "a" or "one" do not indicate a quantity limitation either, but indicate the existence of at least one.

[0094] Words such as "include" or "comprise" mean that the elements or objects appearing before "include" or "comprise" cover the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects.

[0095] Terms such as "upper", "lower", "left", or "right" are only used to represent relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly. "Connection" or "coupling" refers to an electrical connection.

[0096] "And / or" indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0097] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described gate driving circuit, shift register unit, each circuit, and each sub-circuit can refer to the corresponding processes in the method embodiments and will not be elaborated herein.

[0098] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A ring oscillator circuit, characterized in that: The ring oscillation circuit comprises an oscillation driving circuit and an oscillation ring circuit; The oscillation driving circuit is used to drive the oscillation ring circuit according to the first driving capability when the oscillation ring circuit does not oscillate; When the oscillation ring circuit starts to oscillate, the oscillation ring circuit is driven according to a second driving capability, wherein the first driving capability is greater than the second driving capability; The oscillation ring circuit is used to output an orthogonal signal according to the driving of the oscillation driving circuit.

2. The ring oscillator circuit according to claim 1, characterized in that: The oscillation driving circuit comprises an oscillation detection circuit, a first oscillation starting circuit and a second oscillation starting circuit, wherein the first oscillation starting circuit is connected to the oscillation ring circuit via a switch; The oscillation detection circuit is used to detect whether the oscillation ring circuit has started oscillation according to the signal output by the oscillation ring circuit, and close the switch when it is detected that the oscillation ring circuit has not started oscillation, and open the switch when it is detected that the oscillation ring circuit has started oscillation; The first oscillator circuit is used to drive the oscillation ring circuit according to a third driving capability when the switch is closed; When the switch is disconnected, the oscillation ring circuit is not driven; The second oscillator circuit is used to drive the oscillation ring circuit according to the second driving capability, and the first driving capability is the sum of the third driving capability and the second driving capability.

3. The ring oscillator circuit according to claim 1, characterized in that: The oscillation driving circuit comprises an oscillation detection circuit and a first oscillation starting circuit, wherein the first oscillation starting circuit is connected to the oscillation ring circuit via a switch; The oscillation detection circuit is used to detect whether the oscillation ring circuit has started oscillation according to the signal output by the oscillation ring circuit, and close the switch when it is detected that the oscillation ring circuit has not started oscillation, and open the switch when it is detected that the oscillation ring circuit has started oscillation; The first oscillator circuit is used to drive the oscillation ring circuit according to the first driving capability when the switch is closed; When the switch is turned off, the oscillation ring circuit is not driven.

4. The ring oscillator circuit according to claim 2, characterized in that: When there are at least two oscillation driving circuits, the at least two oscillation driving circuits include an oscillation detection circuit, at least two first oscillation starting circuits and at least two second oscillation starting circuits, and any first oscillation starting circuit is connected in parallel with the corresponding second oscillation starting circuit.

5. The ring oscillator circuit according to claim 3, characterized in that: When the number of the oscillation driving circuits is at least two, the at least two oscillation driving circuits include one oscillation detection circuit and at least two first oscillation starting circuits.

6. The ring oscillator circuit according to any one of claims 2 to 5, characterized in that: The oscillation detection circuit includes a signal detection circuit and a switch control circuit; The signal detection circuit is used to determine that the oscillation ring circuit has not started oscillating when the signal output by the oscillation ring circuit is a DC voltage, and output a first voltage signal to the switch control circuit; and to determine that the oscillation ring circuit has started oscillating when the signal output by the oscillation ring circuit is an AC voltage, and output a second voltage signal to the switch control circuit; The switch control circuit is used to close the switch when a first voltage signal is received, and to open the switch when a second voltage signal is received.

7. The ring oscillator circuit according to claim 6, characterized in that: The signal detection circuit includes a first capacitor and a voltage control circuit; The first capacitor is used to disconnect the oscillation ring circuit from the voltage control circuit when the signal output by the oscillation ring circuit is a DC voltage; and to connect the oscillation ring circuit to the voltage control circuit when the signal output by the oscillation ring circuit is an AC voltage; The voltage control circuit is used to output the first voltage signal to the switch control circuit when the AC voltage is not applied; and to output the second voltage signal to the switch control circuit when the AC voltage is applied.

8. The ring oscillator circuit according to claim 7, characterized in that: The signal detection circuit further includes a buffer, and the buffer is used to prevent the first oscillation circuit from generating a counter-effect on the signal detection circuit.

9. The ring oscillator circuit according to any one of claims 1 to 5, 7 and 8, characterized in that: The oscillation ring circuit includes a plurality of inverters connected end to end, a node is included between any two inverters, any inverter is used to output an input signal in reverse, and any node is used to output a signal at any node; The oscillation driving circuit is connected between two nodes whose output signals have opposite phases, and is used to drive the two nodes to keep the output signals in opposite phases.

10. The ring oscillator circuit according to claim 9, characterized in that: The two nodes with opposite phases of the output signals form a node group, the oscillation ring circuit includes at least two node groups, the oscillation drive circuits include at least two oscillation drive circuits, and an oscillation drive circuit is connected between two nodes of a node group to drive the corresponding two nodes to keep the output signals in opposite phases.

11. The ring oscillator circuit according to claim 10, characterized in that: In the case where the one oscillation driving circuit includes a first oscillation starting circuit, the first oscillation starting circuit includes a first inverter and a second inverter, an input end of the first inverter is connected to a first node of the two nodes, an output end of the first inverter is connected to a second node of the two nodes, an output end of the second inverter is connected to the second node through a switch, and an output end of the second inverter is connected to the first node through a switch.

12. The ring oscillator circuit according to claim 11, characterized in that: In the case where the oscillation driving circuit also includes a second oscillation starting circuit, the second oscillation starting circuit includes a third inverter and a fourth inverter, the input end of the third inverter is connected to the first node, the output end of the third inverter is connected to the second node, the output end of the fourth inverter is connected to the second node, and the output end of the fourth inverter is connected to the first node.

13. A chip, comprising the ring oscillation circuit according to any one of claims 1 to 12.

14. An electronic device, comprising the ring oscillation circuit according to any one of claims 1 to 12.

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