Power amplifier

Abstract

The invention discloses a power amplifier. The power amplifier comprises a Doherty amplifier, two input harmonic control circuits and two output harmonic control circuits, the Doherty amplifier includes an input circuit, an output circuit, and a main transistor and an auxiliary transistor arranged in parallel. One end of each input harmonic control circuit is coupled to the input circuit, and the other end of each input harmonic control circuit is coupled to the input end of the main transistor and the input end of the auxiliary transistor. One end of each of the two output harmonic control circuits is coupled to the output circuit, the other end of each of the two output harmonic control circuits is coupled to the output end of the main transistor and the output end of the auxiliary transistor, and the two input harmonic control circuits and the two output harmonic control circuits are used for controlling resonance of harmonic waves.

Description

Technical Field

[0001] The present invention relates to a power amplifier. Background Art

[0002] Among various power amplifier structures nowadays, the Doherty amplifier is a common structure that can achieve high efficiency at the optimum power back-off (OPBO). Moreover, in order to improve the operating efficiency of the power amplifier, a large number of passive components are used in the circuit design of the power amplifier. Summary of the Invention

[0003] In view of the above, the present invention provides a power amplifier.

[0004] The power amplifier according to an embodiment of the present invention includes: a Doherty amplifier, a two-input harmonic control circuit, and a two-output harmonic control circuit. The Doherty amplifier includes an input circuit, an output circuit, and a main transistor and an auxiliary transistor arranged in parallel. One end of each of the two-input harmonic control circuits is coupled to the input circuit, and the other ends thereof are respectively coupled to the input ends of the main transistor and the auxiliary transistor. One end of each of the two-output harmonic control circuits is coupled to the output circuit, and the other ends thereof are respectively coupled to the output ends of the main transistor and the auxiliary transistor, wherein the two-input harmonic control circuits and the two-output harmonic control circuits are used to control the resonance of harmonics.

[0005] In summary, the power amplifier according to one or more embodiments of the present invention can effectively improve the amplification efficiency of the power amplifier, and through the setting of the harmonic control circuit, the effects that the signal at the second harmonic frequency approaches a short-circuit load impedance and the signal at the third harmonic frequency approaches an open-circuit load impedance can be achieved. In addition, the power amplifier according to one or more embodiments of the present invention can effectively reduce the overall area of the power amplifier through the equivalent conversion of the impedance inversion network.

[0006] The above description of the present disclosure and the following description of the embodiments are used to illustrate and explain the spirit and principle of the present invention, and provide a further explanation of the scope of the patent application of the present invention. Brief Description of the Drawings

[0007] Figure 1 is a block diagram of a power amplifier illustrated according to an embodiment of the present invention;

[0008] Figure 2 is a circuit diagram of an input harmonic control circuit and an output harmonic control circuit at both ends of a main transistor illustrated according to an embodiment of the present invention;

[0009] Figure 3is a circuit diagram of an input harmonic control circuit and an output harmonic control circuit at both ends of an auxiliary transistor, as shown in an embodiment of the present invention;

[0010] Figure 4 is a circuit diagram of a main transistor, as shown in an embodiment of the present invention;

[0011] Figure 5 is a block diagram of a power amplifier, as shown in another embodiment of the present invention;

[0012] Figure 6 is a circuit diagram of an output circuit, as shown in an embodiment of the present invention;

[0013] Figure 7 is a schematic diagram of an equivalent conversion process, as shown in an embodiment of the present invention;

[0014] Figure 8 is a circuit diagram of a power amplifier, as shown in multiple embodiments of the present invention;

[0015] Figure 9 and Figure 10 shows a curve graph of the input power and output power of a power amplifier according to the present invention;

[0016] Figures 11 to 14 respectively shows Smith charts of the input and output of the main transistor and the auxiliary transistor of a power amplifier according to the present invention;

[0017] wherein, reference numerals:

[0018] 1, 2, 3: power amplifiers;

[0019] 10, 20, 30: Doherty amplifiers;

[0020] 11, 21, 31: input circuits;

[0021] 12, 13, 22, 23, 32, 33: input harmonic control circuits;

[0022] 121, 131, 151, 161, 321, 331, 351, 361: harmonic control inductive components;

[0023] 122, 132, 152, 162, 322, 332, 352, 362: harmonic control capacitive components;

[0024] 14, 24, 34: transistor parts;

[0025] 141, 241, 341: main transistors;

[0026] 141a, 341a, 342a: gates;

[0027] 141b, 341b, 342b: Drain;

[0028] 141c, 341c, 342c: Source;

[0029] 1411: Gate-Source Parasitic Capacitance;

[0030] 1412: Drain-Source Parasitic Capacitance;

[0031] 142, 242, 342: Auxiliary Transistor;

[0032] 15, 16, 25, 26, 35, 36: Output Harmonic Control Circuit;

[0033] 17, 27, 37: Output Circuit;

[0034] 210, 310: Input Terminal;

[0035] 211, 311: Power Divider;

[0036] 212, 312: Phase Shifter;

[0037] 213, 214, 313, 314: Input Matching Network;

[0038] 271, 272, 371, 372: Output Matching Network;

[0039] 2711, 3711: First Output Matching Network Transmission Line;

[0040] 2721, 3721: Second Output Matching Network Transmission Line;

[0041] 2712, 3712: First Matching Capacitor;

[0042] 2722, 3722: Second Matching Capacitor;

[0043] 273, 373: Impedance Inverting Network;

[0044] 2731, 3731: First Transmission Line;

[0045] 2732, 3732: Second Transmission Line;

[0046] 2733, 3733: Third Transmission Line;

[0047] 274, 374, OUT’: Output Terminal;

[0048] C1, C2, C3, C4, C5, C6, C7, 311a, 312a, 312c, 313b, 314b, C B , CB1 , C B2 , C G1 , C G2 , C D : Capacitor;

[0049] D1, D2, D3, D4, D5, D6: Curves;

[0050] I DS : Drain-source current;

[0051] L1, L2, L3, L4, L5, L6, 311b, 311c, 312b, 312d, 313a, 314a: Inductors;

[0052] R W , R G1 , R G2 : Resistor;

[0053] T1, T2: Terminals;

[0054] V G1 , V G2 : Gate voltage source;

[0055] V D : Drain voltage source;

[0056] Z A1 , Z A2 , Z A3 : Characteristic impedance;

[0057] θ A1 , θ A2 , θ A3 : Phase. Detailed implementation manners

[0058] In the following implementation manners, the detailed features and advantages of the present invention are described in detail, the content of which is sufficient for those skilled in the art to understand the technical content of the present invention and implement it accordingly, and based on the content disclosed in this specification, the scope of the patent application and the drawings, those skilled in the art can easily understand the related purposes and advantages of the present invention. The following embodiments further illustrate the viewpoints of the present invention in detail, but do not limit the scope of the present invention in any way.

[0059] Please refer to Figure 1 , Figure 1 which is a block diagram of a power amplifier shown according to an embodiment of the present invention. As Figure 1As shown, the power amplifier 1 may include a Doherty amplifier 10, two-input harmonic control circuits 12 and 13, and two-output harmonic control circuits 15 and 16. The Doherty amplifier 10 includes an input circuit 11, a transistor section 14, and an output circuit 17. The transistor section 14 may include a main transistor 141 and an auxiliary transistor 142 arranged in parallel.

[0060] One end of each of the input harmonic control circuits 12 and 13 is coupled to the input circuit 11, and the other ends of the input harmonic control circuits 12 and 13 are respectively coupled to the input ends of the main transistor 141 and the auxiliary transistor 142. One end of each of the output harmonic control circuits 15 and 16 is respectively coupled to the output ends of the main transistor 141 and the auxiliary transistor 142, and the other ends of the output harmonic control circuits 15 and 16 are coupled to the output circuit 17. Further, the input ends of the main transistor 141 and the auxiliary transistor 142 may be the gates of the transistors, and the output ends of the main transistor 141 and the auxiliary transistor 142 may be the drains of the transistors.

[0061] In some embodiments, the input harmonic control circuit 12 and the input harmonic control circuit 13 may have the same circuit structure, the output harmonic control circuit 15 and the output harmonic control circuit 16 may have the same circuit structure, and the main transistor 141 and the auxiliary transistor 142 may have the same circuit structure.

[0062] The input harmonic control circuits 12, 13 and the output harmonic control circuits 15, 16 are used to control the resonance of harmonics. Further, the input harmonic control circuits 12, 13 and the output harmonic control circuits 15, 16 can be used to control the resonance at or near the even harmonic frequencies of the operating frequency (fundamental frequency) based on the parasitic capacitances of the main transistor 141 and the auxiliary transistor 142. The voltage-controlled current sources inside the main transistor 141 and the auxiliary transistor 142 are connected to the reference plane, effectively providing a low impedance for the signals at the even harmonic frequencies, such as providing a low impedance for the signals at the second harmonic frequency. The reference plane can be the input side or the output side of the dependent current source of the transistor. The input harmonic control circuits 12, 13 and the output harmonic control circuits 15, 16 can further be used to control the resonance at or near the odd harmonic frequencies of the operating frequency (fundamental frequency) based on the parasitic capacitances of the main transistor 141 and the auxiliary transistor 142. The voltage-controlled current sources inside the main transistor 141 and the auxiliary transistor 142 are connected to the reference plane, effectively providing a high impedance for the signals at the odd harmonic frequencies, such as providing a high impedance for the signals at the third harmonic frequency. According to the structure of the power amplifier described above, the amplification efficiency of the power amplifier can be effectively improved. Moreover, by setting the input harmonic control circuit and the output harmonic control circuit, effects such as the load impedance of the signal at the second harmonic frequency approaching a short circuit and the load impedance of the signal at the third harmonic frequency approaching an open circuit can be achieved.

[0063] Please also refer to Figure 1 and Figure 2 where Figure 2 is a circuit diagram of the input harmonic control circuit and the output harmonic control circuit at both ends of the main transistor shown according to an embodiment of the present invention. As Figure 2 shown, the input harmonic control circuit 12 may include a harmonic control inductive component 121 and a harmonic control capacitive component 122. The harmonic control capacitive component 122 is serially coupled to the harmonic control inductive component 121. Further, one end of the harmonic control inductive component 121 is coupled to the output end of the input circuit 11 and the input end of the main transistor 141. The other end of the harmonic control inductive component 121 is coupled to one end of the harmonic control capacitive component 122. The other end of the harmonic control capacitive component 122 is grounded.

[0064] The output harmonic control circuit 15 may include a harmonic control inductive component 151 and a harmonic control capacitive component 152. The harmonic control capacitive component 152 is serially coupled to the harmonic control inductive component 151. Further, one end of the harmonic control inductive component 151 is coupled to the output end of the main transistor 141 and the input end of the output circuit 17. The other end of the harmonic control inductive component 151 is coupled to one end of the harmonic control capacitive component 152. The other end of the harmonic control capacitive component 152 is grounded.

[0065] Please refer to Figure 1 and Figure 3 as well, wherein Figure 3 is a circuit diagram of an input harmonic control circuit and an output harmonic control circuit at both ends of an auxiliary transistor shown according to an embodiment of the present invention. As Figure 3 shown, the input harmonic control circuit 13 may include a harmonic control inductive component 131 and a harmonic control capacitive component 132. The harmonic control capacitive component 132 is serially coupled to the harmonic control inductive component 131. Further, one end of the harmonic control inductive component 131 is coupled to the output end of the input circuit 11 and the input end of the auxiliary transistor 142. The other end of the harmonic control inductive component 131 is coupled to one end of the harmonic control capacitive component 132, and the other end of the harmonic control capacitive component 132 is grounded.

[0066] The output harmonic control circuit 16 may include a harmonic control inductive component 161 and a harmonic control capacitive component 162. The harmonic control capacitive component 162 is serially coupled to the harmonic control inductive component 161. Further, one end of the harmonic control inductive component 161 is coupled to the output end of the auxiliary transistor 142 and the input end of the output circuit 17. The other end of the harmonic control inductive component 161 is coupled to one end of the harmonic control capacitive component 162, and the other end of the harmonic control capacitive component 162 is grounded.

[0067] Please refer to Figure 1 , Figure 2 and Figure 3 as well. The inductance value of the harmonic control inductive component 121 and the capacitance value of the harmonic control capacitive component 122 of the input harmonic control circuit 12 are correlated with the capacitance value of the gate-source parasitic capacitance of the main transistor 141. The inductance value of the harmonic control inductive component 131 and the capacitance value of the harmonic control capacitive component 132 of the input harmonic control circuit 13 are correlated with the capacitance value of the gate-source parasitic capacitance of the auxiliary transistor 142. In some embodiments, the correlation may be a negative correlation. In addition, the inductance value of the harmonic control inductive component 121 of the input harmonic control circuit 12 is more negatively correlated with the operating frequency of the main transistor 141, and the inductance value of the harmonic control inductive component 131 of the input harmonic control circuit 13 is more negatively correlated with the operating frequency of the auxiliary transistor 142.

[0068] In some embodiments, the inductance values of the harmonic control inductive components 121, 131 and the capacitance values of the harmonic control capacitive components 122, 132 of the input harmonic control circuits 12, 13 may be respectively as shown in the following formula (1) and formula (2), where L IHC is the inductance value of the harmonic control inductive component; C IHCis the capacitance value of the harmonic control capacitor component; ω0 is the operating frequency of the transistor; C GS is the capacitance value of the gate-source parasitic capacitance. Further, for the input harmonic control circuit 12, ω0 is the operating frequency of the main transistor 141, and C GS is the capacitance value of the gate-source parasitic capacitance of the main transistor 141; for the input harmonic control circuit 13, ω0 is the operating frequency of the auxiliary transistor 142, and C GS is the capacitance value of the gate-source parasitic capacitance of the auxiliary transistor 142.

[0069]

[0070]

[0071] The inductance value of the harmonic control inductive component 151 and the capacitance value of the harmonic control capacitor component 152 of the output harmonic control circuit 15 are correlated with the capacitance value of the drain-source parasitic capacitance of the main transistor 141. The inductance value of the harmonic control inductive component 161 and the capacitance value of the harmonic control capacitor component 162 of the output harmonic control circuit 16 are correlated with the capacitance value of the drain-source parasitic capacitance of the auxiliary transistor 142. In some embodiments, the correlation may be a negative correlation. In addition, the inductance value of the harmonic control inductive component 151 of the output harmonic control circuit 15 has a negative correlation with the operating frequency of the main transistor 141, and the inductance value of the harmonic control inductive component 161 of the output harmonic control circuit 16 has a negative correlation with the operating frequency of the auxiliary transistor 142.

[0072] The inductance values of the harmonic control inductive components 151, 161 and the capacitance values of the harmonic control capacitor components 152, 162 of the output harmonic control circuits 15, 16 can be respectively as shown in the following formula (3) and formula (4), where L OHC is the inductance value of the harmonic control inductive component; C OHC is the capacitance value of the harmonic control capacitor component; ω0 is the operating frequency of the transistor; C DS is the capacitance value of the drain-source parasitic capacitance. Further, for the output harmonic control circuit 15, ω0 is the operating frequency of the main transistor 141, and C DS is the capacitance value of the drain-source parasitic capacitance of the main transistor 141; for the output harmonic control circuit 16, ω0 is the operating frequency of the auxiliary transistor 142, and C DS is the capacitance value of the drain-source parasitic capacitance of the auxiliary transistor 142.

[0073]

[0074]

[0075] Please refer to Figure 1 and Figure 4 as well, where Figure 4 is a circuit diagram of the main transistor shown according to an embodiment of the present invention. As Figure 4 shown, the main transistor 141 includes a gate 141a, a drain 141b, and a source 141c. The gate 141a of the main transistor 141 is connected to the output terminal of the input harmonic control circuit 12, the drain 141b of the main transistor 141 is connected to the input terminal of the output harmonic control circuit 15, and the source 141c of the main transistor 141 is grounded. More specifically, a gate-source parasitic capacitance 1411 can be formed between the gate 141a and the source 141c, and a drain-source parasitic capacitance 1412 can be formed between the drain 141b and the source 141c. The drain 141b can output a drain-source current I DS .

[0076] The capacitance value of the gate-source parasitic capacitance 1411 can be calculated as shown in the following formula (5), and the capacitance value of the drain-source parasitic capacitance 1412 can be calculated as shown in the following formula (6), where Y 11 , Y 12 and Y 22 are Figure 4 the admittance parameters of the circuit; C GS is the capacitance value of the gate-source parasitic capacitance 1411, and can be C GS in formulas (1) and (2); C DS is the capacitance value of the drain-source parasitic capacitance 1412, and can be C DS in formulas (3) and (4).

[0077]

[0078]

[0079] The structure of the auxiliary transistor 142 and the calculation method of the capacitance value of its parasitic capacitance can be the same as that of the main transistor 141, so it will not be elaborated here.

[0080] Please refer to Figure 5 where Figure 5 is a block diagram of a power amplifier shown according to another embodiment of the present invention. As Figure 5As shown, the power amplifier 2 includes a Doherty amplifier 20, two-input harmonic control circuits 22 and 23, and two-output harmonic control circuits 25 and 26. The Doherty amplifier 20 includes an input circuit 21, a transistor section 24, and an output circuit 27. The transistor section 24 includes a main transistor 241 and an auxiliary transistor 242 arranged in parallel. More specifically, the input harmonic control circuits 22 and 23, the transistor section 24, and the output harmonic control circuits 25 and 26 can be implemented in the same manner as the input harmonic control circuits 12 and 13, the transistor section 14, and the output harmonic control circuits 15 and 16 described in one or more of the above embodiments, and thus will not be elaborated herein.

[0081] In some embodiments, the input circuit 21 may include an input terminal 210, a power splitter 211, a phase shifter 212, and two-input matching networks 213 and 214. More specifically, the input terminal of the power splitter 211 may be coupled to the input terminal 210 of the power amplifier 2. The input matching network 213 is coupled between the power splitter 211 and the input harmonic control circuit 22, and the input matching network 214 is coupled between the phase shifter 212 and the input harmonic control circuit 23.

[0082] The power splitter 211 can be used to evenly distribute the input power from the input terminal 210 to the main transistor 241 and the auxiliary transistor 242. The phase shifter 212 can be used to compensate for the phase difference of the outputs of the main transistor 241 and the auxiliary transistor 242. The input matching networks 213 and 214 can be used to minimize the signal reflection at the input terminal 210.

[0083] In some embodiments, the output circuit 27 may include two-output matching networks 271 and 272, an impedance inversion network 273, and an output terminal 274. More specifically, the output matching network 271 is coupled between the output harmonic control circuit 25 and the impedance inversion network 273, and the output matching network 272 is coupled between the output harmonic control circuit 26 and the impedance inversion network 273. The output matching network 272 and the impedance inversion network 273 are further coupled to the output terminal 274.

[0084] Please refer to Figure 5 and Figure 6 where Figure 6 is a circuit diagram of the output circuit shown according to an embodiment of the present invention. As Figure 6As shown, the output circuit 27 includes two output matching networks 271, 272, an impedance inversion network 273, and an output terminal 274. More specifically, the output matching network 271 may include a first output matching network transmission line 2711 and a first matching capacitor 2712. The first output matching network transmission line 2711 is coupled between the output harmonic control circuit 25 and one end of the first matching capacitor 2712, and the other end of the first matching capacitor 2712 is grounded. The output matching network 272 may include a second output matching network transmission line 2721 and a second matching capacitor 2722. The second output matching network transmission line 2721 is coupled between the output harmonic control circuit 26 and one end of the second matching capacitor 2722, and the other end of the second matching capacitor 2722 is grounded.

[0085] In some embodiments, the impedance inversion network 273 may include a first transmission line 2731, a second transmission line 2732, and a third transmission line 2733. One end of the first transmission line 2731 is coupled to the first matching capacitor 2712 and the first output matching network transmission line 2711. The other end of the first transmission line 2731 is coupled to one end of the second transmission line 2732 and one end of the third transmission line 2733. The other end of the second transmission line 2732 is coupled to the second output matching network transmission line 2721 and the second matching capacitor 2722. The other end of the third transmission line 2733 is grounded. The other end of the second transmission line 2732 is further coupled to the output terminal 274. The grounded end of the third transmission line 2733 may further serve as the feedback terminal of the drain DC supply voltage of the main transistor 241 and the auxiliary transistor 242.

[0086] In some embodiments, the capacitance value of the first matching capacitor 2712, the capacitance value of the second matching capacitor 2722, and the impedance and phase of each of the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733 are obtained through an equivalent conversion process of the two matching inductors and a single transmission line of the two output matching networks 271 and 272 of the output circuit 27. In some embodiments, the equivalent conversion process may include one or more π-model equivalent circuit conversions and / or one or more star-delta equivalent conversions. More specifically, through these equivalent conversion processes, the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733 can obtain a single transmission line with a shorter line length, effectively reducing the overall area of the power amplifier.

[0087] Figure 7 is a schematic diagram of the equivalent conversion process according to an embodiment of the present invention, where Figure 7 shows the equivalent conversion of the impedance inversion network 273 with a characteristic impedance of 100 ohms and a phase of 90 degrees. It should be noted in particular that Figure 7 The endpoints T1 and T2 shown in can be respectively connected to Figure 5the output terminals of the output harmonic control circuits 25 and 26 shown, and the output terminal OUT’ can be Figure 5 the output terminal 274 shown. Further, the terminals T1 and T2 can be respectively connected to the first output matching network transmission line 2711 of the output matching network 271 and the second output matching network transmission line 2721 of the output matching network 272. More specifically, Figure 7 the first inductor L1 and the second inductor L2 shown in can be the matching inductors of the two output matching networks 271 and 272 of the output circuit 27 respectively, and the first inductor L1, the second inductor L2 and the impedance inversion network 273 can be converted into a single transmission line between the terminals T1 and T2.

[0088] First, in stage (i), the single transmission line between the terminals T1 and T2 is equivalently converted into a π model according to formulas (7) and (8), where L is the third inductor L3 of the impedance inversion network 273, C is the first capacitor C1 and the second capacitor C2 of the impedance inversion network 273, d2 is the phase (90 degrees), C2 is the characteristic impedance (100 ohms), and B2 is 2 times the square of π.

[0089]

[0090]

[0091] In this embodiment, the π model includes the first capacitor C1, the second capacitor C2 and the third inductor L3. In some embodiments, the capacitance values of the first capacitor C1 and the second capacitor C2 are the same as each other. More specifically, one end of the first capacitor C1 is connected to one end of the first inductor L1 and one end of the third inductor L3, one end of the second capacitor C2 is connected to one end of the second inductor L2 and the other end of the third inductor L3, and the other ends of the first capacitor C1 and the second capacitor C2 are grounded.

[0092] Next, in stage (ii), the π model is equivalently converted into a star model according to formulas (9), (10) and (11), where the star model includes the fourth inductor L4, the fifth inductor L5 and the sixth inductor L6.

[0093]

[0094]

[0095]

[0096] Both ends of the fourth inductor L4 are connected to an ungrounded end of the first capacitor C1, one end of the fifth inductor L5, and one end of the sixth inductor L6. The other end of the fifth inductor L5 is connected to an ungrounded end of the second capacitor C2. The other end of the sixth inductor L6 is grounded.

[0097] Furthermore, the present invention can be designed and adjusted according to actual requirements. For example, in stage (iii) of this embodiment, the first capacitor C1 in stage (ii) can be split into a first matching capacitor 2712 and a third capacitor C3; the second capacitor C1 in stage (ii) can be split into a second matching capacitor 2722 and a seventh capacitor C7; the sixth inductor L6 in stage (ii) can be adjusted to another inductor, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6, where the capacitance value of the third capacitor C3 is equal to the capacitance value of the fourth capacitor C4, and the capacitance value of the sixth capacitor C6 is equal to the capacitance value of the seventh capacitor C7. In other words, the first capacitor C1 and the second capacitor C2 are equivalently converted into three π models and multiple capacitors are added. The first π model includes the third capacitor C3, the fourth capacitor C4, and the fourth inductor L4, the second π model includes the sixth capacitor C6, the seventh capacitor C7, and the fifth inductor L5, and the third π model includes the fifth capacitor C5, the sixth inductor L6, and the ground terminal. More specifically, the multiple capacitors added above include the first matching capacitor 2712 and the second matching capacitor 2722. At this time, after the design and adjustment in stage (iii), the converted transmission line width can meet the current density requirements in the application.

[0098] One end of each of the third capacitor C3 and the first matching capacitor 2712 is connected to one end of the fourth inductor L4, and the other end of each of the third capacitor C3 and the first matching capacitor 2712 is grounded. One end of each of the fourth capacitor C4, the fifth capacitor C5, the fifth inductor L5, the sixth inductor L6, and the sixth capacitor C6 is connected to the other end of the fourth inductor L4. The fourth capacitor C4, the fifth capacitor C5, the sixth inductor L6, and the sixth capacitor C6 that are not connected to the other end of the fourth inductor L4 are grounded. One end of each of the seventh capacitor C7 and the second matching capacitor 2722 is connected to the other end of the fifth inductor L5, and the other end of each of the seventh capacitor C7 and the second matching capacitor 2722 is grounded.

[0099] Finally, in stage (iv), the first π model, the second π model, and the third π model are converted into the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733. Specifically, according to formulas (12) and (13), the fourth inductor L4, the third capacitor C3, and the fourth capacitor C4 are equivalently converted into the first transmission line 2731, the fifth inductor L4, the sixth capacitor C6, and the seventh capacitor C7 are equivalently converted into the second transmission line 2732, and the fifth capacitor C5 and the sixth inductor L6 are equivalently converted into the third transmission line 2733. In formulas (12) and (13), Z0 is the characteristic impedance of the transmission line, θ is the phase of the transmission line, B2 is 2 times the square of π multiplied by the operating fundamental frequency, E2 is the inductance value of the inductor, and F2 is the capacitance value of the capacitor.

[0100]

[0101] θ = cos -1 (1 - B2 2 ×E2×F2) Formula (13)

[0102] Specifically, for the first transmission line 2731, E2 in formulas (12) and (13) is the inductance value of the fourth inductor L4, and F2 is the capacitance value of the third capacitor C3 / fourth capacitor C4; for the second transmission line 2732, E2 in formulas (12) and (13) is the inductance value of the fifth inductor L5, and F2 is the capacitance value of the sixth capacitor C6 / seventh capacitor C7; for the third transmission line 2733, E2 in formulas (12) and (13) is the inductance value of the sixth inductor L6, and F2 is the capacitance value of the fifth capacitor C5.

[0103] In some embodiments, the total length of the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733 obtained after equivalent conversion may be less than the length of a single transmission line between endpoints T1 and T2. For example, the length of the single transmission line between endpoints T1 and T2 was originally 4900 microns, and the total length of the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733 obtained after equivalent conversion can be reduced to 1790 microns, but the present invention is not limited thereto. At the same time, the area occupied by the first transmission line 2731, the second transmission line 2732, and the third transmission line 2733 obtained after equivalent conversion may be less than the area occupied by a single transmission line between endpoints T1 and T2. In summary, by the equivalent conversion method adopted by the present invention, the length of the transmission line can be reduced after equivalent conversion, thereby reducing the overall area of the power amplifier.

[0104] Please refer to Figure 8 where Figure 8is a circuit diagram of a power amplifier illustrated according to multiple embodiments of the present invention. As Figure 8 shown, the power amplifier 3 includes a Doherty amplifier 30, two-input harmonic control circuits 32, 33, and two-output harmonic control circuits 35, 36. The Doherty amplifier 30 includes an input circuit 31, a transistor section 34, and an output circuit 37.

[0105] More specifically, the input circuit 31 includes an input terminal 310, a power divider 311, a phase shifter 312, and two-input matching networks 313, 314. In some embodiments, the power divider 311 may include a capacitor 311a and inductors 311b, 311c. One end of the capacitor 311a is grounded, the other end of the capacitor 311a is coupled between the inductor 311b and the inductor 311c, the other end of the inductor 311b is coupled to the input matching network 313, and the other end of the inductor 311c is coupled to the phase shifter 312.

[0106] In some embodiments, the phase shifter 312 may include capacitors 312a, 312c and inductors 312b, 312d. One end of the capacitor 312a is coupled between the inductor 311c of the power divider 311 and the inductor 312b, and the other end of the capacitor 312a is grounded. The inductor 312b is coupled between the inductor 311c and one end of the capacitor 312c. The other end of the capacitor 312c is grounded. One end of the inductor 312d is coupled to the inductor 312b and the capacitor 312c, and the other end of the inductor 312d is coupled to the input matching network 314.

[0107] In some embodiments, the input matching network 313 may include an inductor 313a and a capacitor 313b. One end of the inductor 313a is coupled to one end of the capacitor 313b, and the other end of the inductor 313a is coupled to the input harmonic control circuit 32. The other end of the capacitor 313b is grounded. Additionally, the input matching network 314 may also include an inductor 314a and a capacitor 314b. One end of the inductor 314a is coupled to one end of the capacitor 314b, and the other end of the inductor 314a is coupled to the input harmonic control circuit 33. The other end of the capacitor 314b is grounded. In short, the input matching network 313 and the input matching network 314 have the same circuit architecture.

[0108] In some embodiments, the input harmonic control circuit 32 may include a harmonic control inductive component 321 and a harmonic control capacitive component 322, and the input harmonic control circuit 33 may include a harmonic control inductive component 331 and a harmonic control capacitive component 332. More specifically, the architectures of the input harmonic control circuits 32, 33 may be the same as the input harmonic control circuit described with reference to Figure 2 and will not be elaborated herein.

[0109] In some embodiments, the transistor section 34 includes a main transistor 341 and an auxiliary transistor 342 arranged in parallel. The gate 341a of the main transistor 341 of the transistor section 34 is coupled to the harmonic control inductive component 321 of the input harmonic control circuit 32. The drain 341b of the main transistor 341 is coupled to the output harmonic control circuit 35, and the source 341c of the main transistor 341 is grounded. Additionally, the gate 342a of the auxiliary transistor 342 of the transistor section 34 is coupled to the harmonic control inductive component 331 of the input harmonic control circuit 33. The drain 342b of the auxiliary transistor 342 is coupled to the output harmonic control circuit 36, and the source 342c of the auxiliary transistor 342 is grounded. More specifically, the architectures of the main transistor 341 and the auxiliary transistor 342 can be the same as the main transistor and the auxiliary transistor described in the reference Figure 4 and will not be elaborated here.

[0110] In some embodiments, the output harmonic control circuit 35 may include a harmonic control inductive component 351 and a harmonic control capacitive component 352. The output harmonic control circuit 36 may include a harmonic control inductive component 361 and a harmonic control capacitive component 362. More specifically, the architectures of the output harmonic control circuits 35 and 36 can be the same as the output harmonic control circuit described in the reference Figure 3 and will not be elaborated here.

[0111] More specifically, the output circuit 37 includes two output matching networks 371, 372, an impedance inversion network 373, and an output terminal 374. In some embodiments, the output matching network 371 may include a first output matching network transmission line 3711 and a first matching capacitor 3712. The output matching network 372 may include a second output matching network transmission line 3721 and a second matching capacitor 3722. The architectures of the output matching networks 371 and 372 can be the same as Figure 6 the output matching networks 271 and 272 shown and will not be described here. The impedance inversion network 373 includes a first transmission line 3731, a second transmission line 3732, and a third transmission line 3733. More specifically, the impedance inversion network 373 can be the impedance inversion network described in the reference Figure 6 and Figure 7 and will not be elaborated here.

[0112] In addition, the power amplifier 3 may further include capacitors C B 、C B1 、C B2 、C D 、resistors R W 、R G1 、R G2 、and capacitor C G1 、C G2. In some embodiments, capacitor C B can be coupled between the second transmission line 3734 and the output terminal OUT. Capacitor C B1 can be coupled between the input matching network 313 and the input harmonic control circuit 32. Capacitor C B2 can be coupled between the input matching network 314 and the input harmonic control circuit 33. Capacitor C D can be coupled between the third transmission line 3733 and the ground terminal, and capacitor C D can be coupled such that one end of the third transmission line 3733 is further connected to the drain voltage source V D .

[0113] . In some embodiments, one end of resistor R W can be coupled to the input matching network 313, and the other end of resistor R W is coupled to the phase shifter 312. One end of resistor R G1 can be coupled between the input harmonic control circuit 32 and the gate 341a of the main transistor 341, and the other end of resistor R G1 can be coupled to one end of capacitor C G1 to be in common with the gate voltage source V G1 . The other end of capacitor C G1 is grounded. One end of resistor R G2 can be coupled between the input harmonic control circuit 33 and the gate 342a of the auxiliary transistor 342, and the other end of resistor R G2 can be coupled to one end of capacitor C G2 to be in common with the gate voltage source V G2 . The other end of capacitor C G2 is grounded.

[0114] Please refer to Figure 9 and Figure 10 simultaneously, where Figure 9 and Figure 10 show the curves of the input power and the output power of the power amplifier according to the present invention. As Figure 9 shown, the horizontal axis represents the input power of the power amplifier in decibel-milliwatts (dBm); the vertical axis corresponds to different curves D1, D2, D3, D4 respectively. Curve D1 represents the output power of the power amplifier in decibel-milliwatts (dBm); curve D2 represents the gain of the power amplifier in decibels (dB); curve D3 represents the drain efficiency in percentage (%); curve D4 represents the power-added efficiency (PAE) in percentage (%). As Figure 10As shown, the horizontal axis represents the output power of the power amplifier, with the unit of decibel milliwatt (dBm); the vertical axis corresponds to different curves D5 and D6 respectively. Curve D5 represents the drain efficiency, with the unit of percentage (%); curve D6 represents the power added efficiency, with the unit of percentage (%). According to Figure 9 and Figure 10 it can be seen that even when the value of the input power is low, the power amplifier according to one or more embodiments of the present invention can still have high-efficiency performance.

[0115] Please also refer to Figures 11 to 14 , in which Figures 11 to 14 respectively show the Smith charts of the input and output of the main transistor and the auxiliary transistor of the power amplifier according to the present invention. Figure 11 and Figure 12 are the Smith charts showing the input and output of the main transistor respectively, while Figure 13 and Figure 14 are the Smith charts showing the input and output of the auxiliary transistor respectively. As Figures 11 to 14 shown, the power amplifier according to one or more embodiments of the present invention can achieve effects such as the load impedance where the signal approaches a short circuit at the second harmonic frequency and the load impedance where the signal approaches an open circuit at the third harmonic frequency. In Figures 11 to 14 , the leftmost side of the Smith chart is 0 impedance, and the rightmost side is infinite impedance. The impedance value Fund.int represents the impedance value obtained when the fundamental frequency of the frequency point operation is based on the input side or the output side of the dependent current source of the transistor as the reference plane; the impedance value Fund.ext represents the impedance value obtained when the fundamental frequency of the frequency point operation is based on the terminal of the gate (for the input Smith chart) or the drain (for the output Smith chart) of the transistor as the reference plane; the impedance value 2nd.int represents the impedance value obtained when the second harmonic frequency of the frequency point is based on the input side or the output side of the dependent current source of the transistor as the reference plane; the impedance value 2nd.ext represents the impedance value obtained when the second harmonic frequency of the frequency point is based on the terminal of the gate or the drain of the transistor as the reference plane; the impedance value 3rd.int represents the impedance value obtained when the third harmonic frequency of the frequency point is based on the input side or the output side of the dependent current source of the transistor as the reference plane; the impedance value 3nd.ext represents the impedance value obtained when the third harmonic frequency of the frequency point is based on the terminal of the gate or the drain of the transistor as the reference plane. As Figures 11 to 14 shown, the power amplifier of the present invention can have a low-impedance performance at the second-order frequency and a high-impedance performance at the third-order frequency.

[0116] In summary, the power amplifier according to one or more embodiments of the present invention can effectively improve the amplification efficiency of the power amplifier. Moreover, by setting the harmonic control circuit, the signals at the second harmonic frequency can approach a short circuit, and the signals at the third harmonic frequency can approach an open circuit. In addition, the power amplifier according to one or more embodiments of the present invention can effectively reduce the overall area of the power amplifier through the equivalent conversion of the impedance inversion network.

Claims

1. A power amplifier, characterized in that, Comprising: A Doherty amplifier, comprising: An input circuit; An output circuit; A main transistor; and An auxiliary transistor, arranged in parallel with the main transistor; A two-input harmonic control circuit, one end of which is coupled to the input circuit, and the other end of which is respectively coupled to the input ends of the main transistor and the auxiliary transistor; and A two-output harmonic control circuit, one end of which is coupled to the output circuit, and the other end of which is respectively coupled to the output ends of the main transistor and the auxiliary transistor, wherein the two-input harmonic control circuit and the two-output harmonic control circuit are used to control the resonance of harmonics.

2. The power amplifier according to claim 1, characterized in that, The two-input harmonic control circuit and the two-output harmonic control circuit are used to control at even harmonic frequencies respectively based on the operating frequencies of the main transistor and the auxiliary transistor.

3. The power amplifier according to claim 2, wherein, The two-input harmonic control circuit and the two-output harmonic control circuit are used to control respectively based on the operating frequencies of the main transistor and the auxiliary transistor to provide a low impedance at even harmonic frequencies.

4. The power amplifier according to claim 3, characterized in that, The two-input harmonic control circuit and the two-output harmonic control circuit are used to control respectively based on the operating frequencies of the main transistor and the auxiliary transistor to provide a low impedance at the second harmonic frequency.

5. The power amplifier according to claim 1, wherein The two-input harmonic control circuit and the two-output harmonic control circuit are used to control at odd harmonic frequencies respectively based on the operating frequencies of the main transistor and the auxiliary transistor.

6. The power amplifier according to claim 5, characterized in that The two-input harmonic control circuit and the two-output harmonic control circuit are used to control respectively based on the operating frequencies of the main transistor and the auxiliary transistor to provide a high impedance at odd harmonic frequencies.

7. The power amplifier according to claim 6, wherein The two-input harmonic control circuit and the two-output harmonic control circuit are used to control respectively based on the operating frequencies of the main transistor and the auxiliary transistor to provide a high impedance at the third harmonic frequency.

8. The power amplifier according to claim 1, wherein Each of the two-input harmonic control circuit and the two-output harmonic control circuit respectively comprises: A harmonic control inductive component; and A harmonic control capacitive component, serially coupled to the harmonic control inductive component.

9. The power amplifier according to claim 8, wherein The inductance value of the harmonic control inductive component of the two-input harmonic control circuit and the capacitance value of the harmonic control capacitive component are respectively correlated with the capacitance values of the gate-source parasitic capacitances of the main transistor and the auxiliary transistor; and The inductance value of the harmonic control inductive component of the two-output harmonic control circuit and the capacitance value of the harmonic control capacitive component are respectively correlated with the capacitance values of the drain-source parasitic capacitances of the main transistor and the auxiliary transistor.

10. The power amplifier according to claim 9, characterized in that, The inductance value of the harmonic control inductive component of the two-input harmonic control circuit is more respectively negatively correlated with the operating frequencies of the main transistor and the auxiliary transistor, and the inductance value of the harmonic control inductive component of the two-output harmonic control circuit is more respectively negatively correlated with the operating frequencies of the main transistor and the auxiliary transistor.

11. The power amplifier according to claim 1, characterized in that The output circuit comprises: An output terminal; A first output matching network transmission line and a second output matching network transmission line, respectively coupled to the two-output harmonic control circuit; A first matching capacitor, one end of the first matching capacitor is coupled to the first output matching network transmission line, and the other end of the first matching capacitor is grounded; A second matching capacitor, one end of the second matching capacitor is coupled to the second output matching network transmission line, and the other end of the second matching capacitor is grounded; A first transmission line, one end of the first transmission line is coupled to the first matching capacitor and the first output matching network transmission line; A second transmission line, one end of the second transmission line is coupled to the second matching capacitor and the second output matching network transmission line, and the other end of the second transmission line is coupled to the output end and the other end of the first transmission line; And A third transmission line, one end of the third transmission line is coupled to the other end of the first transmission line and the other end of the second transmission line, and the other end of the third transmission line is grounded and serves as a feedback terminal for a drain DC supply voltage of the main transistor and the auxiliary transistor.

12. The power amplifier according to claim 11, wherein, The capacitance value of the first matching capacitor, the capacitance value of the second matching capacitor, and the impedance and phase of each of the first transmission line, the second transmission line, and the third transmission line are obtained through an equivalent conversion process of two matching inductors and a single transmission line of the two output matching networks of the output circuit.

13. The power amplifier according to claim 12, wherein, The total length of the first transmission line, the second transmission line, and the third transmission line is less than the length of the single transmission line.

14. The power amplifier according to claim 12, wherein, The area occupied by the first transmission line, the second transmission line, and the third transmission line is less than the area occupied by the single transmission line.

15. The power amplifier according to claim 12, wherein The equivalent conversion process includes one or more π-model equivalent circuit conversions.

16. The power amplifier according to claim 12, characterized in that, The equivalent conversion process includes one or more star-delta equivalent conversions.

17. The power amplifier according to claim 11, characterized in that, The input circuit includes: An input terminal; A power divider, coupled to the input terminal; A phase shifter, coupled to the power divider; and Two input matching networks, one of the two input matching networks is coupled between the power divider and one of the two input harmonic control circuits, and the other of the two input matching networks is connected between the phase shifter and the other of the two input harmonic control circuits.

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