Method and circuit for improving overshoot suppression efficiency of two-stage power amplifier under pulse trigger signal

Abstract

The invention discloses a method and a circuit for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal, and the method comprises the steps: a two-stage pulse power amplifier works in a B type at the front part of a microwave excitation signal, and a falling edge detection circuit is used for detecting the falling edge of the excitation signal of the power amplifier; before a falling edge of an excitation signal arrives, a grid bias voltage and a drain bias voltage are adjusted through a voltage control circuit, the working types of the two-stage power amplifier are changed respectively, and the two-stage power amplifier instantly works in a C type at the falling edge of the excitation signal by adjusting the grid bias voltage and the drain bias voltage of a pre-stage power amplifier; the grid bias voltage of the post-stage power amplifier is adjusted to enable the post-stage power amplifier to work in the class A at the moment of the falling edge of the excitation signal, so that the drain voltage does not generate overshoot at the moment of closing the microwave excitation signal. The high stability of the A-type pulse power amplifier and the high efficiency of the B-type pulse power amplifier can be obtained at the same time, and the problems of efficiency reduction and voltage overshoot caused by output waveform distortion due to different gains of the A-type power amplifier and the B-type power amplifier are solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of solid-state microwave power amplifiers, and particularly relates to a method and a circuit for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal. Background Art

[0002] Microwave power amplifiers are an important part of microwave systems. They can amplify weak microwave signals to the required power level, usually at the end of a transmitter, and are widely used in fields such as wireless communication, radar, remote sensing, medical electronics, measurement and control, and electronic countermeasures. With the increasing maturity of the third-generation semiconductor material GaN process, the output power of power amplifiers has also increased significantly. Currently, the output power of a single transistor has exceeded 2 kW. For example, the paper "Design and Implementation of an X-Band High-Power Solid-State Power Amplifier" published by Niu Haijun et al. in 2024 in Communication World.

[0003] Microwave systems with a pulse regime are widely used. Pulse regime radars, time-division transmit-receive electronic countermeasure systems, and burst communication systems all operate in a pulse regime, which requires the power amplification circuit to work in a pulse mode. Hyo-Jong Kim et al. pointed out in their 2017 article "An X-Band 100W GaN HEMT Power Amplifier Using a Hybrid Switching Method for Fast Pulse Switching" published in Progress In Electromagnetics Research B, Vol. 78, that by using drain bias voltage modulation, higher efficiency, greater output power, higher gain, faster rise time, faster fall time, and flatter gain can be obtained. Therefore, better performance can be achieved by using drain bias voltage modulation.

[0004] In the research, it was found that when using the drain bias modulation method, if the static current and the dynamic current are not equal at the moment of applying the microwave excitation pulse and the microwave excitation pulse, due to the parasitic inductance in the drain supply path, a drain voltage overshoot will occur. Only in the class-A operating mode are the static current and the dynamic current equal, which can avoid the generation of drain voltage overshoot, but the efficiency will be limited to 50% of the theoretical efficiency upper limit. Therefore, in 2021, Fang Wenrao proposed a method for improving the efficiency of a hybrid-class solid-state power amplifier in his doctoral dissertation "Research on Key Technologies of X-Band High-Power Pulse Power Amplifiers", using the method of switching between class-B and class-A operating modes within a pulse to improve the efficiency while taking into account the low drain voltage overshoot.

[0005] However, the gain of Class B operating mode is different from that of Class A operating mode. Specifically, the gain of Class B operating mode is only one-fourth of the gain of Class A operating mode. Then, when the input signal power remains unchanged, the switching of the operating mode will cause excessive gain, waveform distortion in Class A operating mode, and thus the reappearance of drain voltage overshoot, while the efficiency decreases. Summary of the Invention

[0006] The object of the present invention is to overcome the problems of low stability or low efficiency of existing power amplifiers, and a method and circuit for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal are proposed.

[0007] To achieve the above object, the present invention adopts the following technical solutions: A method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal, a two-stage pulse power amplifier composed of a driver stage and a power stage, and a multi-edge trigger function, including the following steps: Before t time 0: A pulse signal generator provides a pulse trigger signal. The rising edge of the pulse trigger signal is delayed by a second delay circuit and then sent to a radio frequency signal source; the gate voltage control circuit provides Class B operating point gate bias voltages for the driver stage power amplifier and the power stage power amplifier of the two-stage pulse power amplifier respectively. The rising edge of the pulse trigger signal is sent to the second delay circuit through a rising edge detection circuit; the above pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit; the first trigger signal triggers the drain voltage control circuit to provide a drain bias voltage for the drain of the two-stage pulse power amplifier. At t time 0: The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the radio frequency signal source, and the radio frequency signal source starts to generate an excitation signal. Between t time 0 and t time 1: The gate bias voltage and drain bias voltage of the two-stage pulse power amplifier remain unchanged, and both operate in Class B. Between t time 1 and t time 2: A second trigger signal triggers the gate voltage control circuit to adjust the gate bias voltages of the two-stage pulse power amplifier respectively. The gate voltage of the driver stage power amplifier gradually decreases, and the gate voltage of the power stage power amplifier gradually increases. The second trigger signal triggers the drain voltage control circuit to start adjusting the drain voltage of the driver stage power amplifier to gradually decrease. The operating state of the driver stage pulse power amplifier gradually changes from Class B to Class C, and it is in Class C operating state at this time. The operating state of the power stage pulse power amplifier gradually changes from class B to class A, and it is in class AB operating state at this time; At t Time 2: The gate voltage and drain voltage of the driver stage pulse power amplifier are stable, and it is in class C operating state; The gate voltage and drain voltage of the power stage pulse power amplifier are stable, and it is in class A operating state; At t Between time 2 and t Time 3: The driver stage pulse power amplifier is biased in class C, and the power stage pulse power amplifier is biased in class A; The drain voltages of both the driver stage pulse power amplifier and the power stage pulse power amplifier gradually drop to 0V.

[0008] Furthermore, when there is no microwave signal input: The pulse signal generator does not generate a pulse trigger signal. The grid voltage control circuit provides the grid bias voltage at the class B operating point for the driver stage power amplifier and the power stage power amplifier of the dual-stage pulse power amplifier respectively, and the dual-stage pulse power amplifier does not work.

[0009] Furthermore, at t Before time 0: The drain bias voltage of the driver stage power amplifier gradually rises from 0V to the required drain bias voltage, and the drain bias voltage of the power stage power amplifier gradually rises from 0V to the required drain bias voltage; At t Time 0: The drain bias voltages of both the dual-stage pulse power amplifiers have been stabilized at the required drain bias voltages; The grid voltage control circuit continues to provide the grid bias voltage at the class B operating point for the driver stage power amplifier and the power stage power amplifier of the dual-stage pulse power amplifier respectively; At t Time 1: The excitation signal is about to end, and the pulse trigger signal generated by the pulse signal generator reaches the falling edge. After the falling edge of the pulse trigger signal is delayed by the second delay circuit, it is sent to the RF signal source; The falling edge of the pulse trigger signal is sent to the second delay circuit through the falling edge detection circuit; the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit; the second trigger signal triggers the grid voltage control circuit to start adjusting the grid bias voltages of the dual-stage pulse power amplifier respectively.

[0010] Furthermore, at t Time 3: The drain voltages of both the driver stage pulse power amplifier and the power stage pulse power amplifier drop to 0V; At t After time 3: The gate voltage control circuit causes the gate voltage of the driver - stage power amplifier to start rising and recover to the gate - bias voltage when there is no microwave signal input, waiting for the arrival of the next pulse signal.

[0011] Furthermore, at t The gate voltage and drain voltage of the driver - stage power amplifier at time 2 cause the driver - stage power amplifier to operate in class - C mode, and at this time, the conduction angle of the driver - stage power amplifier operating in class - C mode is 132.4°.

[0012] A two - stage power - amplifier overshoot suppression efficiency improvement circuit under a pulse trigger signal is used to implement the two - stage power - amplifier overshoot suppression efficiency improvement method under the pulse trigger signal, and is characterized by including a pulse signal generator, a radio - frequency signal source, a control circuit, and a two - stage pulse power amplifier; The output end of the pulse signal generator is connected to the input end of the radio - frequency signal source and the input end of the control circuit, and the output end of the radio - frequency signal source and the output end of the control circuit are connected to the two - stage pulse power amplifier; The control circuit includes a drain - voltage control circuit and a gate - voltage control circuit, and the drain - voltage control circuit and the gate - voltage control circuit are respectively connected to the two - stage pulse power amplifier.

[0013] Furthermore, the control circuit further includes a rising - edge detection circuit, a falling - edge detection circuit, a first delay circuit, and a second delay circuit; The input ends of the rising - edge detection circuit and the falling - edge detection circuit are respectively connected to the output end of the pulse signal generator; the output end of the rising - edge detection circuit is respectively connected to the input end of the drain - voltage control circuit and the input end of the second delay circuit; the output end of the falling - edge detection circuit is respectively connected to the input end of the gate - voltage control circuit, the input end of the first delay circuit, and the input end of the second delay circuit; the output end of the first delay circuit is connected to the input end of the drain - voltage control circuit; the output end of the second delay circuit is connected to the input end of the radio - frequency signal source; the output end of the radio - frequency signal source is connected to the signal input end of the pulse power amplifier; the output end of the gate - voltage control circuit is connected to the gate of the two - stage pulse power amplifier, and the output end of the drain - voltage control circuit is connected to the drain of the two - stage pulse power amplifier.

[0014] Furthermore, the driver stage of the two - stage pulse power amplifier is cascaded with the power stage. The driver - stage power amplifier switches from class - B operating mode to class - C operating mode within the microwave pulse signal, and the power - stage power amplifier synchronously switches from class - B operating mode to class - A operating mode within the microwave pulse signal.

[0015] A two-stage power amplifier includes a pulse power amplifier and also includes a circuit for improving the overshoot suppression efficiency of the two-stage power amplifier under a pulse trigger signal. The output end of the radio frequency signal source is connected to the signal input end of the pulse power amplifier; the drain voltage control circuit is connected to the drain of the two-stage pulse power amplifier, and the gate voltage control circuit is connected to the gate of the two-stage pulse power amplifier.

[0016] Further, the pulse power amplifier is a power amplifier composed of field effect transistors or a power amplifier composed of bipolar transistors.

[0017] Compared with the prior art, the present invention has the following beneficial technical effects: The method for improving the overshoot suppression efficiency of the two-stage power amplifier under a pulse trigger signal proposed by the present invention is that the two-stage pulse power amplifier operates in class B with high efficiency in the front part of the microwave excitation signal. The falling edge detection circuit is used to detect the falling edge of the excitation signal of the power amplifier. Before the falling edge of the excitation signal arrives, the gate bias voltage and the drain bias voltage are adjusted through the voltage control circuit to change the operating class of the two-stage power amplifier respectively. By adjusting the gate bias voltage and the drain bias voltage of the pre-stage power amplifier, it operates in class C at the moment of the falling edge of the excitation signal, and by adjusting the gate bias voltage of the post-stage power amplifier, it operates in class A at the moment of the falling edge of the excitation signal, so that the drain voltage does not produce overshoot when the microwave excitation signal is turned off. It can simultaneously obtain the high stability of the class A pulse power amplifier and the high efficiency of the class B pulse power amplifier, and solve the problems of output waveform distortion caused by different gains of the class A power amplifier and the class B power amplifier, resulting in efficiency reduction and voltage overshoot.

[0018] The method for improving the overshoot suppression efficiency of the two-stage power amplifier under a pulse trigger signal proposed by the present invention can transfer the large voltage overshoot that may be generated by the power stage power amplifier to the driver stage power amplifier, reduce the harm of voltage overshoot, solve the waveform distortion caused by different gains during mode switching of the existing high-power hybrid pulse power amplifier, and further lead to instability and efficiency reduction problems, suppress the voltage overshoot of the high-power pulse power amplifier, avoid breakdown of the pulse power amplifier, and improve the stability of the pulse power amplifier.

[0019] Further, the efficiency is closer to the high theoretical efficiency of 78.5% of class B, showing a certain improvement compared with the existing mode.

[0020] Further, the overall power gain is improved, which is significantly helpful for alleviating the gain pressure and miniaturization limitation caused by the need for cascading multiple power amplifier stages in high-power power amplifiers. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings described herein are for illustrative purposes only and are not intended to limit the scope of the disclosure of the present invention in any way. Additionally, the shapes and proportional dimensions of the various components in the figures are merely schematic and are used to assist in understanding the present invention, rather than specifically defining the shapes and proportional dimensions of the various components of the present invention. In the accompanying drawings: Figure 1 It is a schematic diagram of the electrical characteristics of a two-stage power amplifier under a pulse signal for the method of improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal proposed by the present invention.

[0022] Figure 2 It is a schematic diagram of a two-stage power amplifier circuit system under a pulse signal for the circuit for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal proposed by the present invention.

[0023] Figure 3 It is a schematic diagram of the current waveform of the power stage power amplifier obtained by circuit simulation in ADS in an embodiment of the present invention.

[0024] Figure 4 It is a schematic diagram of the voltage waveform of the power stage power amplifier obtained by circuit simulation in ADS in an embodiment of the present invention.

[0025] Figure 5 It is a schematic diagram of the current waveform of the driver stage power amplifier obtained by circuit simulation in ADS in an embodiment of the present invention.

[0026] Figure 6 It is a schematic diagram of the voltage waveform of the driver stage power amplifier obtained by circuit simulation in ADS in an embodiment of the present invention. Detailed implementation manners

[0027] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0028] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or there may also be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this invention belongs. The terms used in the description of the present invention herein are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0030] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0031] Embodiment 1 This embodiment proposes a method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal, as Figure 1 shown, specifically including the following steps: 1] When there is no microwave signal input: The pulse signal generator does not generate a pulse trigger signal, and the grid voltage control circuit provides a class B operating point bias voltage for the driver-stage pulse power amplifier V gb1 , and provides a class B operating point bias voltage for the power-stage pulse power amplifier V gb2 ; The pulse power amplifier does not work; 2] t Before time 0: The pulse signal generator provides a pulse trigger signal; The rising edge of the pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The above pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit; the grid voltage control circuit continues to provide a class B operating point bias voltage for the driver-stage power amplifier V gb1 , and provides a class B operating point bias voltage for the power-stage power amplifier V gb2 ; The leakage voltage control circuit provides the drain bias voltage for the drain of the two-stage pulse power amplifier. The drain bias voltage of the driver-stage power amplifier gradually rises from 0V to the required drain bias voltage V db , and the drain bias voltage of the power-stage power amplifier gradually rises from 0V to the required drain bias voltage V dd ; 3] t At time 0: The drain bias voltages of the two-stage pulse power amplifier have both been stabilized at the required drain bias voltage; The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the RF signal source, and the RF signal source starts to generate the excitation signal; The grid voltage control circuit continues to provide the class B operating point bias voltage for the two-stage pulse power amplifier respectively V gb1 and V gb2 ; 4] t Between time 0 and t time 1: The grid bias voltage and drain bias voltage of the two-stage power amplifier remain unchanged and both operate in class B; 5] t At time 1: The excitation signal is about to end, and the falling edge of the pulse trigger signal generated by the pulse signal generator arrives; The falling edge of the pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The falling edge of the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, triggering the grid voltage control circuit to start adjusting the grid bias voltage of the two-stage power amplifier; the grid voltage of the power-stage power amplifier is adjusted through the grid voltage modulation circuit V ga , so that it is biased to class A mode, and the grid voltage and drain voltage of the driver-stage power amplifier are synchronously adjusted to be biased to class C mode ( V gc ) and under the corresponding drain bias voltage ( V dc ) 6] t Between time 1 and t time 2: The falling edge of the pulse trigger signal generated by the pulse signal generator arrives; The falling edge of the pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The falling edge of the above-mentioned pulse trigger signal fed into the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, triggering the grid voltage control circuit to start adjusting the grid bias voltages of the bipolar power amplifier respectively. The grid voltage of the drive stage gradually decreases from V gb1 , and the grid voltage of the power stage gradually increases from V gb2 ; The drain voltage control circuit is triggered to start adjusting the drain voltage of the drive stage power amplifier to gradually decrease from V db ; The operating state of the drive stage pulse power amplifier gradually changes from class B to class C, and it is in class C operating state at this time; The amplifier operating modes are class A (360°), class B (180°), class AB (greater than 180° and less than 360°), class C (less than 180°) according to the conduction angle, t Between time 1 and t time 2, the drive stage power amplifier switches from class B to class C (the conduction angle decreases from 180° to 132.4°); The operating state of the power stage pulse power amplifier gradually changes from class B to class A, and it is in class AB operating state at this time; The amplifier operating modes are class A (360°), class B (180°), class AB (greater than 180° and less than 360°), class C (less than 180°) according to the conduction angle, t Between time 1 and t time 2, the power stage power amplifier switches from class B to class A (the conduction angle increases from 180° to 360°).

[0032] 7】 t Time 2: The grid voltage of the drive stage power amplifier stabilizes at V gc , and the drain voltage stabilizes at V dc , being in class C operating state; The grid voltage of the power stage power amplifier stabilizes at V gb , and the drain voltage remains V dd unchanged, being in class A operating state; 8】 t Between time 2 and t time 3: The drive stage power amplifier is biased in class C, and the power stage power amplifier is biased in class A; The drain voltage of the drive stage power amplifier gradually drops to 0V, and the drain voltage of the power stage power amplifier gradually drops to 0V; 9】 t Time 3: The drain voltage of the driver - stage power amplifier drops to 0V, and the drain voltage of the power - stage power amplifier drops to 0V; 10】 t After time 3: The gate - voltage control circuit causes the gate voltage of the driver - stage power amplifier to start rising and recover to V gb1 , causing the gate voltage of the power - stage power amplifier to start falling and recover to V gb2 , waiting for the arrival of the next pulse signal.

[0033] The method for improving the over - shoot suppression efficiency of a two - stage power amplifier under a pulse trigger signal provided in this embodiment is an improved method for voltage over - shoot suppression and efficiency improvement of a hybrid two - stage high - power solid - state pulse power amplifier under the same trigger signal. It aims to solve the problems of low stability or low efficiency of existing hybrid power amplifiers due to different gain in working modes. It can simultaneously obtain the high stability of class - A pulse power amplifiers and the high efficiency of class - B pulse power amplifiers, and at the same time solve the problems of waveform distortion caused by different gains, thereby reducing stability and efficiency.

[0034] Embodiment 2 This embodiment provides a circuit for improving the over - shoot suppression efficiency of a two - stage power amplifier under a pulse trigger signal. From Figure 2 It can be seen that the pulse signal generator simultaneously provides pulse trigger signals to the RF signal source and the two - stage pulse power amplifier. The pulse trigger signal is used to trigger the RF signal source to generate an excitation signal, and trigger the drain - voltage control circuit of the pulse power amplifier to provide a bias voltage to the drain of the two - stage power amplifier, and trigger the gate - voltage control circuit to provide the correct bias voltage to the gate of the two - stage power amplifier.

[0035] To achieve that the power - stage power amplifier operates in class - A and the driver - stage power amplifier operates in class - C at the moment when the microwave excitation signal is turned off, it is necessary to judge the moment when the microwave excitation signal is turned off, control the transmission delay of the microwave excitation signal, and accurately control the magnitude of the gate bias voltage to ensure that the gate bias voltage has become the class - A bias voltage at or before the moment when the falling edge of the microwave excitation signal reaches the power amplifier. Therefore, in addition to the gate - voltage control circuit and the drain - voltage control circuit, this circuit also includes a rising - edge detection circuit, a falling - edge detection circuit, a first delay circuit, and a second delay circuit. The input ends of the rising - edge detection circuit and the falling - edge detection circuit are both connected to the output end of the pulse signal generator.

[0036] The input terminals of the rising edge detection circuit and the falling edge detection circuit are respectively connected to the output terminal of the pulse signal generator; the output terminal of the rising edge detection circuit is connected to the input terminal of the drain voltage control circuit and the input terminal of the second delay circuit; the output terminal of the falling edge detection circuit is connected to the input terminal of the gate voltage control circuit, the input terminal of the first delay circuit and the input terminal of the second delay circuit; the output terminal of the first delay circuit is connected to the input terminal of the drain voltage control circuit; the output terminal of the second delay circuit is connected to the input terminal of the RF signal source; the output terminal of the RF signal source is connected to the signal input terminal of the pulse power amplifier; the output terminals of the gate voltage control circuit and the drain voltage control circuit are respectively connected to the gate and drain of the bipolar pulse power amplifier.

[0037] The rising edge detection circuit is used to detect the rising edge of the pulse signal sent by the pulse signal generator, and when the rising edge of the pulse signal arrives, it outputs a trigger signal to the drain voltage control circuit and the second delay circuit; the falling edge detection circuit is used to detect the falling edge of the pulse signal sent by the pulse signal generator, and when the falling edge of the pulse signal arrives, it outputs a trigger signal to the gate voltage control circuit, the first delay circuit and the second delay circuit; the gate voltage control circuit and the drain voltage control circuit control the working mode of the bipolar pulse power amplifier according to the pulse signal.

[0038] In the present invention, when the falling edge comes, the gate voltage of the driving stage, the gate voltage of the power stage, and the drain voltage of the driving stage change immediately, and the excitation signal and the drain voltage of the power stage change later, and there is a time difference between the two to achieve the target function. The first delay circuit is set to keep the drain bias voltage of the power stage power amplifier unchanged within the time difference.

[0039] Combined Figure 1 , the specific working process of the above circuit is described in detail: When there is no microwave signal input: The pulse signal generator does not generate a pulse trigger signal, and the gate voltage control circuit provides a class B operating point bias voltage for the driving stage pulse power amplifier V gb1 , and provides a class B operating point bias voltage for the power stage pulse power amplifier V gb2 ; The pulse power amplifier does not work; t Before time 0: The pulse signal generator provides a pulse trigger signal; The rising edge of the pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The above pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit; the gate voltage control circuit continues to provide a class B operating point bias voltage for the driving stage power amplifier V gb1 , and provides a class B operating point bias voltage for the power stage power amplifierV gb2 ; The leakage voltage control circuit provides the drain bias voltage for the drain of the bipolar pulse power amplifier. The drain bias voltage of the driver stage power amplifier gradually rises from 0V to the required drain bias voltage V db , and the drain bias voltage of the power stage power amplifier gradually rises from 0V to the required drain bias voltage V dd ; t At time 0: The drain bias voltages of the bipolar pulse power amplifier have both been stabilized at the required drain bias voltage; The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the RF signal source, and the RF signal source starts to generate the excitation signal; The grid voltage control circuit continues to provide the class B operating point bias voltages for the bipolar pulse power amplifier respectively V gb1 and V gb2 ; t Between time 0 and t time 1: The grid bias voltage and drain bias voltage of the bipolar power amplifier remain unchanged, and both operate in class B; t At time 1: The excitation signal is about to end, and the falling edge of the pulse trigger signal generated by the pulse signal generator arrives; The falling edge of the said pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The falling edge of the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, triggering the grid voltage control circuit to start adjusting the grid bias voltage of the bipolar power amplifier; the grid voltage of the power stage power amplifier is adjusted through the grid voltage modulation circuit V ga , so that it is biased to class A mode, and the grid voltage and drain voltage of the driver stage power amplifier are synchronously adjusted to be biased to class C mode ( V gc ) and the corresponding drain bias voltage ( V dc ) t Between time 1 and t time 2: The falling edge of the pulse trigger signal generated by the pulse signal generator arrives; The falling edge of the said pulse trigger signal is delayed by the second delay circuit and sent to the RF signal source; The falling edge of the above-mentioned pulse trigger signal sent into the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, triggering the grid voltage control circuit to start adjusting the grid bias voltages of the bipolar power amplifier respectively. The grid voltage of the driver stage gradually decreases from V gb1 and the grid voltage of the power stage gradually increases from V gb2 ; the drain voltage control circuit is triggered to start adjusting the drain voltage of the driver stage power amplifier from V db gradually decreasing; The operating state of the driver stage pulse power amplifier gradually changes from class B to class C, and it is in the class C operating state at this time; The operating state of the power stage pulse power amplifier gradually changes from class B to class A, and it is in the AB class operating state at this time; t Time 2: The grid voltage of the driver stage power amplifier stabilizes at V gc and the drain voltage stabilizes at V dc , being in the class C operating state; The grid voltage of the power stage power amplifier stabilizes at V gb and the drain voltage remains V dd unchanged, being in the class A operating state; t Between time 2 and t time 3: The driver stage power amplifier is biased in class C and the power stage power amplifier is biased in class A; The drain voltage of the driver stage power amplifier gradually drops to 0V and the drain voltage of the power stage power amplifier gradually drops to 0V; t Time 3: The drain voltage of the driver stage power amplifier drops to 0V and the drain voltage of the power stage power amplifier drops to 0V; t After time 3: The grid voltage control circuit causes the grid voltage of the driver stage power amplifier to start rising and recover to V gb1 and causes the grid voltage of the power stage power amplifier to start dropping and recover to V gb2 , waiting for the arrival of the next pulse signal.

[0040] As Figure 3 shown, the current waveform and conduction angle of the power stage conform to the characteristics of class A and class B operating modes, proving that the operating state meets the requirements of the working principle of the hybrid class solid-state power amplifier.

[0041] As Figure 4 shown, the power stage voltage waveform does not change significantly in class A and class B operating modes, proving that the change in the operating mode of the driver stage can compensate for the waveform distortion caused by the different gains in class A and class B operating modes.

[0042] As Figure 5 shown, the driver stage current waveform and conduction angle conform to the characteristics of class B and class C operating modes, where the conduction angle of class C operating mode is 132.4°, proving that the operating state meets the requirements of the working principle of the hybrid class solid-state power amplifier. The conduction angle is determined according to the ratio of the conduction time of the current waveform to one cycle time. According to Figure 5 , one cycle time is 120 - 20 = 100 (ns), the conduction time of class C operating mode within the cycle is 118.4 - 81.6 = 36.8 (ns), and the conduction angle is 36.8 ÷ 100 × 360° = 132.48°. The result is limited by the precision, but it is very close to the theoretical value and can be considered to conform to the theoretical result of 132.4°.

[0043] As Figure 6 shown, the amplitude of the voltage waveform of the driver stage in class C operating mode is half of that in class B operating mode. Then the output power of the driver stage in class C operating mode is reduced to one-fourth of that in class B operating mode, proving that the change in the operating mode of the driver stage can compensate for the waveform distortion caused by the different gains in class A and class B operating modes of the power stage power amplifier.

[0044] The above embodiments take the power amplifier composed of field-effect transistors as an example, and are equally applicable to the power amplifier composed of bipolar transistors.

[0045] Upon reading the above description, many embodiments and many applications beyond the provided examples will be obvious to those skilled in the art. Therefore, the scope of this teaching should not be determined with reference to the above description, but should be determined with reference to the full scope of the foregoing claims and the equivalents thereof. For the sake of comprehensiveness, all articles and references including patent applications and published announcements are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not intended to abandon such subject matter, nor should the applicant be considered not to have considered such subject matter as part of the disclosed inventive subject matter.

[0046] The above content is a further detailed description of the present invention. It cannot be determined that the specific implementation of the present invention is limited thereto. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should all be regarded as belonging to the protection scope determined by the claims submitted for the present invention.

Claims

1. A method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal, characterized in that: The two-stage pulse power amplifier and multi-edge triggering function composed of a driving stage and a power stage include the following steps: exist t Before time 0: the pulse signal generator provides a pulse trigger signal, and the rising edge of the pulse trigger signal is delayed by the second delay circuit and then sent to the radio frequency signal source; the gate voltage control circuit provides a class B working point gate bias voltage to the driving stage power amplifier and the power stage power amplifier of the dual-stage pulse power amplifier respectively, and the rising edge of the pulse trigger signal is sent to the second delay circuit via the rising edge detection circuit; the pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal via the rising edge detection circuit; the first trigger signal triggers the drain voltage control circuit to provide a drain bias voltage to the drain of the dual-stage pulse power amplifier; exist t Time 0: The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the RF signal source, and the RF signal source starts to generate an excitation signal; exist t 0 time to t 1. Between moments: the gate bias voltage and drain bias voltage of the dual-stage pulse power amplifier remain unchanged, and both operate in class B. exist t 1 o'clock to t 2. Between moments: the second trigger signal triggers the gate voltage control circuit to adjust the gate bias voltage of the dual-stage pulse power amplifier respectively, the gate voltage of the driver-stage power amplifier gradually decreases, the gate voltage of the power-stage power amplifier gradually increases, and the second trigger signal triggers the drain voltage control circuit to start adjusting the drain voltage of the driver-stage power amplifier to gradually decrease; the working state of the driver-stage pulse power amplifier gradually changes from class B to class C, and is now in a class C working state; the working state of the power-stage pulse power amplifier gradually changes from class B to class A, and is now in a class AB working state; exist t 2 o'clock to t 3. Between moments: the driver-stage pulse power amplifier is biased in class C, and the power-stage pulse power amplifier is biased in class A; the drain voltages of the driver-stage pulse power amplifier and the power-stage pulse power amplifier gradually drop to 0V.

2. The method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal according to claim 1, characterized in that: When there is no microwave signal input: The pulse signal generator does not generate a pulse trigger signal, the gate voltage control circuit provides a class B operating point gate bias voltage to the driving stage power amplifier and the power stage power amplifier of the dual-stage pulse power amplifier respectively, and the dual-stage pulse power amplifier does not work.

3. The method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal according to claim 1, characterized in that: exist t Before time 0: the drain bias voltage of the driver-stage power amplifier gradually increases from 0V to the required drain bias voltage, and the drain bias voltage of the power-stage power amplifier gradually increases from 0V to the required drain bias voltage; exist t Time 0: The drain bias voltage of the two-stage pulse power amplifier has stabilized to the required drain bias voltage; the gate voltage control circuit continues to provide the class B operating point gate bias voltage to the driver stage power amplifier and the power stage power amplifier of the two-stage pulse power amplifier respectively; exist t Moment 1: The excitation signal is about to end, and the pulse trigger signal generated by the pulse signal generator reaches the falling edge. The falling edge of the pulse trigger signal is delayed by the second delay circuit and then sent to the RF signal source; The falling edge of the pulse trigger signal is sent to the second delay circuit via the falling edge detection circuit; The pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit; the second trigger signal triggers the gate voltage control circuit to start adjusting the gate bias voltage of the dual-stage pulse power amplifier respectively; exist t Moment 2: The gate voltage and drain voltage of the driving-stage pulse power amplifier are stable, which is a Class C working state; the gate voltage and drain voltage of the power-stage pulse power amplifier are stable, which is a Class A working state.

4. The method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal according to claim 1, characterized in that: exist t Moment 3: The drain voltages of the driving-stage pulse power amplifier and the power-stage pulse power amplifier both drop to 0V; exist t 3 hours later: The gate voltage control circuit causes the gate voltage of the driving-stage power amplifier to start rising and recover to the gate bias voltage when there is no microwave signal input, waiting for the arrival of the next pulse signal.

5. The method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal according to claim 1, characterized in that: exist t At time 2, the gate voltage and the drain voltage of the driving stage power amplifier make the driving stage power amplifier work in the class C mode, and at this time, the conduction angle of the driving stage power amplifier working in the class C mode is 132.4°.

6. A circuit for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal, used to implement the method for improving the overshoot suppression efficiency of a two-stage power amplifier under a pulse trigger signal as described in any one of claims 1 to 5, characterized in that: It includes a pulse signal generator, a radio frequency signal source, a control circuit and a double-stage pulse power amplifier; The output end of the pulse signal generator is connected to the input end of the radio frequency signal source and the input end of the control circuit, and the output end of the radio frequency signal source and the output end of the control circuit are connected to the dual-stage pulse power amplifier; The control circuit comprises a drain voltage control circuit and a gate voltage control circuit, and the drain voltage control circuit and the gate voltage control circuit are respectively connected to the double-stage pulse power amplifier.

7. The circuit for improving the efficiency of a two-stage power amplifier overshoot suppression under a pulse trigger signal according to claim 6, characterized in that: The control circuit also includes a rising edge detection circuit, a falling edge detection circuit, a first delay circuit and a second delay circuit; The input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected to the output end of the pulse signal generator; the output end of the rising edge detection circuit is respectively connected to the input end of the leakage voltage control circuit and the input end of the second delay circuit; the output end of the falling edge detection circuit is respectively connected to the input end of the gate voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected to the input end of the leakage voltage control circuit; The output end of the second delay circuit is connected to the input end of the RF signal source; the output end of the RF signal source is connected to the signal input end of the pulse power amplifier; the output end of the gate voltage control circuit is connected to the gate of the two-stage pulse power amplifier, and the output end of the drain voltage control circuit is connected to the drain of the two-stage pulse power amplifier.

8. The circuit for improving the efficiency of a two-stage power amplifier overshoot suppression under a pulse trigger signal according to claim 6, characterized in that: The driving stage and the power stage of the double-stage pulse power amplifier are cascaded, the driving stage power amplifier switches from the class B working mode to the class C working mode within the microwave pulse signal, and the power stage power amplifier switches from the class B working mode to the class A working mode synchronously within the microwave pulse signal.

9. A two-stage power amplifier, comprising a pulse power amplifier, characterized in that: It also includes the circuit described in any one of claims 6 to 8, wherein the output end of the radio frequency signal source is connected to the signal input end of the pulse power amplifier; the drain voltage control circuit is connected to the drain of the two-stage pulse power amplifier, and the gate voltage control circuit is connected to the gate of the two-stage pulse power amplifier.

10. A two-stage power amplifier according to claim 9, characterized in that: The pulse power amplifier is a power amplifier composed of field effect transistors or a power amplifier composed of bipolar transistors.

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