Differential demodulation device suitable for large-bandwidth fast frequency hopping signals

By adopting low-code rate LDPC decoder and backward feedback differential demodulation technology in large bandwidth fast frequency hopping communication systems, the problem of poor demodulation performance of traditional differential demodulation technology is solved, and more efficient signal demodulation performance is achieved.

CN120223240APending Publication Date: 2025-06-27THE 54TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
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Patent Information

Application Number
CN202510334614.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-20
Publication Date
2025-06-27

AI Technical Summary

Technical Problem

In large-bandwidth fast frequency hopping communication systems, traditional differential demodulation technology fails to fully utilize the phase information of the carrier, resulting in poor demodulation performance.

Method used

The LDPC decoder with low code rate is used to correct the timing data, and the data is corrected and demodulated by the backward feedback differential demodulation unit combined with the differential demodulation technology using the decoding gain and error correction capabilities.

Benefits of technology

The demodulation performance of differential demodulators is improved, which is specifically improved by 0.5dB and is suitable for burst signal processing.

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Abstract

The invention discloses a fast frequency hopping signal differential demodulation device suitable for large bandwidth. The fast frequency hopping signal differential demodulation device comprises a backward feedback differential demodulation unit, a de-interleaving unit, a decoder unit, a circulation controller unit and a data processing unit. The backward feedback differential demodulation unit performs differential demodulation processing according to the output result of the data processing unit and the timing data; the de-interleaving unit carries out de-interleaving processing on the data after differential demodulation; the decoder unit performs LDPC decoding processing on the data; the cycle controller unit performs gating processing on the data according to the number of iterations; the data processing unit performs encoding and interleaving processing on the data. According to the technology, the timing recovery data is corrected through the error correction capability of low-code-rate decoding, so that the demodulation performance of the differential demodulator is improved. The technology is suitable for large-bandwidth rapid frequency hopping satellite communication, low-orbit satellite communication and the like.
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Description

Technical Field

[0001] The present invention relates to a differential demodulation device for adapting to large-bandwidth fast-hopping signals in the field of communications, and is particularly applicable to large-bandwidth frequency-hopping satellite communication systems. The present invention uses the decoding gain and error correction ability of a low code rate LDPC decoder to reversely correct timing data, thereby improving the demodulation performance of differential demodulation. Background Art

[0002] Differential demodulation is mainly based on the principle of differential coding, that is, information is represented by the change between the previous and subsequent symbols. Differential demodulation is mainly applied to scenarios where the channel characteristics are complex or channel estimation is difficult. In a large-bandwidth fast-hopping communication system, due to the frequency hopping, it is difficult to estimate the phase of each hop of data, and the signal frequency offset change rate is relatively large. The differential demodulation technology has obvious advantages in frequency-hopping satellite communication. However, the traditional differential demodulation technology does not fully utilize the phase information of the carrier, and the demodulation performance is poor compared with coherent demodulation technology. Summary of the Invention

[0003] The purpose of the present invention is to improve the demodulation performance of the differential demodulator in a frequency-hopping system. By combining the reverse feedback of the decoder and differential demodulation, using the decoding gain and error correction ability of a low code rate LDPC decoder, the timing recovery data is corrected by backward feedback, and the corrected data is used for differential demodulation. Then, the data after differential demodulation is decoded, and the above process is iterated multiple times to achieve the purpose of correcting the differential demodulation data, thereby improving the demodulation performance of the differential demodulator.

[0004] The technical solution adopted by the present invention is as follows:

[0005] A differential demodulation device for adapting to large-bandwidth fast-hopping signals includes a backward feedback differential demodulation unit 1, an interleaving unit 2, a decoding unit 3, a loop controller unit 4, and a data processing unit 5;

[0006] The backward feedback differential demodulation unit 1 is used to correct the externally input timed data according to the data output by the data processing unit 5, and then perform differential demodulation processing in units of hops, and output the data after differential demodulation to the interleaving unit 2;

[0007] The interleaving unit 2 is used to perform interleaving processing on the data after differential demodulation, and output the data after interleaving processing to the decoding unit 3;

[0008] The decoding unit 3 is used to decode the data after interleaving processing, and output the data after decoding processing to the loop controller unit 4;

[0009] The loop controller unit 4 is used to perform gating processing on the decoded data, output the data to the data processing unit 5 when the number of iterations is less than the set value, and output the data to the outside when the number of iterations is equal to the set value;

[0010] The data processing unit 5 is used to perform encoding processing and interleaving processing on the input data, and group-frame the data according to the modulation end-hop format, and output the decoded data to the backward feedback differential demodulation unit 1 in units of hops.

[0011] Furthermore, the backward feedback differential demodulation unit 1 includes a data storage module 6, a data reading control module 7, and a differential demodulation module 8;

[0012] The data storage module 6 is used to cache the data after timing, and read the data in the memory area in units of the length of one-hop data according to the control signal output by the data reading control module 7, and output it to the differential demodulation module 8;

[0013] The differential demodulation module 8 is used to perform differential demodulation on the input data and output the differentially demodulated data dem(n); wherein, differential demodulation is performed based on the backward feedback method of LDPC decoded data.

[0014]

[0015] In the formula, n is the symbol position, dem(n) is the differentially demodulated data of the nth symbol, r(n) is the data after the nth timing, is the data of the nth symbol estimated by using the decoded data feedback estimation, and k1 and k2 are the weighting coefficients of the estimated data; wherein:

[0016]

[0017] In the formula, r(n + 1) is the data after the (n + 1)th timing, θ(n + 1) is the phase change of the (n + 1)th symbol relative to the nth symbol estimated according to the decoded data of the (n + 1)th point, r(n - 2) is the data after the timing of the (n - 2)th symbol, and θ(n - 1) is the phase change of the (n - 1)th symbol relative to the (n - 2)th symbol estimated according to the decoded data of the (n - 1)th point.

[0018] The present invention has the following advantages compared with the background technology:

[0019] 1. In the present invention, a low code rate LDPC decoder is used to correct the timing data, and the differential demodulation performance is improved by 0.5 dB.

[0020] 2. The present invention performs data processing and differential demodulation in units of hops, and can be applied to the processing of burst signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is the principle block diagram of the present invention.

[0022] Figure 2It is the principle block diagram of the backward feedback differential demodulation unit 1 of the present invention.

[0023] Figure 3 It is the principle block diagram of the data processing unit 5 of the present invention. Specific embodiments

[0024] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0025] Figure 1 It is the principle block diagram of the present invention, including a backward feedback differential demodulation unit 1, an interleaving unit 2, a decoding unit 3, a loop controller unit 4, and a data processing unit 5.

[0026] The backward feedback differential demodulation unit 1 is used to correct the externally input timed data according to the data output by the data processing unit 5, and then perform differential demodulation processing in units of hops, and output the differentially demodulated data to the interleaving unit 2; the interleaving unit 2 is used to perform interleaving processing on the differentially demodulated data, and output the interleaved data to the decoding unit 3; the decoding unit 3 is used to perform decoding processing on the interleaved data, and output the decoded data to the loop controller unit 4; the loop controller unit 4 is used to perform gating processing on the decoded data, and output the data to the data processing unit 5 when the number of iterations is less than the set value, and output the data to the outside when the number of iterations is equal to the set value; the data processing unit 5 is used to perform encoding processing and interleaving processing on the input data, and perform framing processing on the data according to the hop format of the modulation end, and output the decoded data to the backward feedback differential demodulation unit 1 in units of hops.

[0027] Figure 2 It is the principle block diagram of the backward feedback differential demodulation unit 1 of the present invention. Among them, the backward feedback differential demodulation unit 1 includes a data storage module 6, a data reading control module 7, and a differential demodulation module 8.

[0028] The data storage module 6 is used to cache the timed data, and read the data in the memory area in units of the length of one-hop data according to the control signal output by the data reading control module 7, and output it to the differential demodulation module 8; the differential demodulation module 8 is used to perform differential demodulation on the input data, and output the differentially demodulated data dem(n);

[0029] Among them, differential demodulation is performed based on the backward feedback method of LDPC decoded data;

[0030]

[0031] In the formula, n is the symbol position, dem(n) is the differentially demodulated data of the nth symbol, and r(n) is the nth timed data. Data for the nth symbol using decoded data feedback estimation, where k1 and k2 are weighting coefficients for the estimated data; wherein:

[0032]

[0033] In the formula, r(n + 1) is the data after the (n + 1)th timing, θ(n + 1) is the phase change of the (n + 1)th symbol relative to the nth symbol estimated from the decoded data of the (n + 1)th point, r(n - 2) is the data after the timing of the (n - 2)th symbol, and θ(n - 1) is the phase change of the (n - 1)th symbol relative to the (n - 2)th symbol estimated from the decoded data of the (n - 1)th point.

[0034] Figure 3 It is the principle block diagram of the data processing unit 5 of the present invention. Among them, the data processing unit 5 includes an LDPC encoding module 9, an interleaving module 10, and a framing module 11; wherein the LDPC encoding module 9 is used to perform encoding processing on the decoded data and output the data to the interleaving module 10; the interleaving module 10 performs interleaving processing on the encoded data and outputs the interleaved data to the framing module 11; the framing module 11 is used to perform framing processing on the interleaved data according to the modulation end hopping format and output the data to the backward feedback differential demodulation unit 1.

Claims

1. A differential demodulation device for fast frequency hopping signals with large bandwidth, characterized in that: It comprises a backward feedback differential demodulation unit (1), a deinterleaving unit (2), a decoding unit (3), a loop controller unit (4) and a data processing unit (5); The backward feedback differential demodulation unit (1) is used to correct the external input timing data according to the output data of the data processing unit (5), and then perform differential demodulation processing in units of jumps, and output the differential demodulated data to the deinterleaving unit (2); The deinterleaving unit (2) is used to perform deinterleaving processing on the differentially demodulated data, and output the deinterleaved data to the decoding unit (3); The decoding unit (3) is used for decoding the deinterleaved data and outputting the decoded data to the loop controller unit (4); The loop controller unit (4) is used to perform gating processing on the decoded data, and output the data to the data processing unit (5) when the number of iterations is less than the set value, and output the data to the outside when the number of iterations is equal to the set value; The data processing unit (5) is used to perform encoding and interleaving processing on the input data, and to perform framing processing on the data according to the modulation end hopping format, and to output the decoded data to the backward feedback differential demodulation unit (1) in units of hops.

2. The differential demodulation device for fast frequency hopping signals with large bandwidth according to claim 1, wherein the characteristic value is: The backward feedback differential demodulation unit (1) comprises a data storage module (6), a data reading control module (7) and a differential demodulation module (8); The data storage module (6) is used to cache the data after the timing, and read the data in the memory area in units of one hop data length according to the control signal output by the data reading control module (7), and output it to the differential demodulation module (8); The differential demodulation module (8) is used to perform differential demodulation on the input data and output differential demodulated data dem(n); wherein the differential demodulation is performed based on the backward feedback mode of the LDPC decoded data; Where n is the symbol position, dem(n) is the differential demodulated data of the nth symbol, r(n) is the data after the nth timing, is the data of the nth symbol estimated by using decoded data feedback, k1 and k2 are weighting coefficients of the estimated data; where: In the formula, r(n+1) is the data after timing of the n+1th point, θ(n+1) is the phase change of the n+1th symbol relative to the nth symbol estimated based on the decoded data of the n+1th point, r(n-2) is the data after timing of the n-2th symbol, and θ(n-1) is the phase change of the n-1th symbol relative to the n-2th symbol estimated based on the decoded data of the n-1th point.