S-box 3 sharing TI mask implementation method based on coordinate function splitting
By using a 3-shared class TI mask method based on coordinate function splitting, a 5-bit quadratic S-box is split into multiple sub-functions, solving the problem that existing TI masks cannot simultaneously satisfy correctness, incompleteness, and uniformity. This achieves low-power hardware security enhancement and is applicable to a variety of cryptographic algorithms.
Patent Information
- Application Number
- CN202510335771.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-20
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2045-03-20
AI Technical Summary
Existing technologies are difficult to effectively defend against side-channel attacks, especially the TI mask implementation of 5-bit quadratic S-boxes, which cannot simultaneously satisfy correctness, incompleteness and uniformity, and existing methods usually increase hardware consumption.
A 3-shared class TI mask method based on coordinate function splitting is adopted to split the 5-bit quadratic S-box into multiple sub-functions. By using a direct sharing scheme and adding correction parameters, the correctness, incompleteness and uniformity of each sub-function are ensured, and the hardware circuit is designed with RTL-level code implementation.
A 3-shared uniform mask for a 5-bit quadratic S-box was implemented, reducing hardware consumption while satisfying the security requirements of first-order side-channel analysis. It is applicable to various cryptographic algorithms such as Keccak and Ascon algorithms, and reduces the complexity of hardware implementation.
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Abstract
Description
Technical Field
[0001] This invention relates to the hardware implementation of threshold masks for S-boxes to resist side-channel analysis, specifically to a method for implementing quadratic S-box 3-shared class TI masks based on coordinate function decomposition. Technical Background
[0002] Cryptographic algorithms are the core of cryptography, and can be broadly categorized into symmetric cryptographic algorithms and public-key cryptographic algorithms. Among these, the S-box (Substitution Box) is the only core component in many symmetric cryptographic algorithms that provides a non-linear transformation, thus providing the necessary obfuscation. The security of the S-box largely determines the security of the cryptographic algorithm.
[0003] Traditional S-box designs typically focus on defending against mathematical attacks, but are less effective against physical-level attacks such as side-channel attacks. Side-channel attacks involve attackers collecting side-channel information generated by the cryptographic device during operation, such as sound, temperature, and power consumption, and using statistical methods to obtain the correlation between this information and the intermediate states of the cryptographic algorithm to steal sensitive information. Currently, the main side-channel attack is the Differential Power Attack (DPA), which exploits the correlation between device power consumption and sensitive information (such as the key). The key to defending against side-channel attacks is to weaken or even eliminate the correlation between side-channel information and sensitive information. Masking sensitive information is a mainstream method for resisting side-channel attacks. Masks are generally generated using a random number generator, and all intermediate values in the cryptographic algorithm are affected by this random number mask, thus randomizing the intermediate values in the cryptographic device.
[0004] In hardware circuit implementation, glitches are unavoidable due to the effects of synthesis layout or input delay. General masking methods (such as Boolean masks) cannot resist the effects of glitches; that is, even with glitches present, the masked circuit still leaks sensitive information. Threshold Implementation (TI) is a new masking method that can eliminate the impact of glitches on the masked circuit. TI is based on a secret sharing scheme, dividing an n-bit input variable into s shares, each of which is also n bits. Each bit of each n-bit share is added to a shared function according to certain rules, and the number of shared functions is also s. In the TI implementation, the number of shares s satisfies the equation s ≤ td + 1, where t represents the algebraic degree of the S-box and d represents the security level. When considering first-order side-channel analysis, the minimum value of the TI number of shares s is equal to 3. A key reason why TI can resist glitches in the circuit is that TI needs to satisfy correctness, incompleteness, and uniformity. Correctness means that the XOR sum of the shared functions equals the value of the original function. Correctness ensures that the final output value of the cryptographic algorithm will not change when performing a TI (Test-Integrity). Incompleteness means that at least one shared component is independent of the shared function. Incompleteness ensures that even if an attacker probes the corresponding line, they cannot obtain all the secret information. Uniformity means that when the input sharing is uniformly distributed, the output sharing also satisfies a uniform distribution. In practice, it is easy to construct a TI that satisfies correctness and incompleteness, but implementing a TI that satisfies uniformity is the challenge. The solution is to add random bits or increase the number of shared components, which usually increases the hardware cost of the S-box TI implementation.
[0005] A crucial characteristic of Cryptographic Entities (TI) is that when the TI of a given permutation-type S-box satisfies correctness, incompleteness, and uniformity, all permutations affinely equivalent to that S-box can also achieve TIs satisfying correctness, incompleteness, and uniformity. All 3-bit permutations are classified into 3 affine equivalence classes, and all 4-bit permutations into 302 affine equivalence classes. Current research on TI schemes for small-bit (3, 4-bit) permutation-type S-boxes utilizes these characteristics. However, for 5-bit S-boxes, the number of affine equivalence classes is quite large; therefore, there hasn't been much research on TI for 5-bit S-boxes. But 5-bit quadratic permutations can be classified into 75 affine equivalence classes based on affine equivalence, and some of these classes possess good cryptographic properties. A 5-bit quadratic S-box can serve as a subcomponent of an unbalanced structured S-box (8-bit structured S-box) or a subcomponent of a larger-bit (more than 8-bit) balanced structured S-box. Therefore, researching TI implementations for 5-bit quadratic S-boxes has significant practical implications. Summary of the Invention
[0006] This invention provides a method for implementing a quadratic S-box 3-shared class TI mask based on coordinate function decomposition, which can convert a 5-bit quadratic S-box into a shared class TI mask. Based on its coordinate function, it can be divided into l balancing sub-functions that can achieve correctness, incompleteness, and uniformity by sharing TI. Therefore, the 3-shared TI of the S-box will be transformed into the individual subfunctions F i The three shared TI values, and the output mask of each sub-function is the final output mask of the S-box. Among them, the sub-functions F obtained by splitting are... i The 3-shared TI must satisfy correctness, incompleteness, and uniformity, ensuring that the TI of the S-cell also satisfies correctness, incompleteness, and uniformity. This invention considers two cases for the 3-shared TI: direct sharing and correction terms. This invention adopts the following technical solution:
[0007] A method for implementing a quadratic S-box 3-shared class TI mask based on coordinate function decomposition includes the following steps:
[0008] Step 1: The S-box is a 5-bit quadratic S-box, whose coordinate function is represented as (f0, f1, f2, f3, f4). The initial value of the split length l is set to 2, and each of the split sub-functions is denoted as C. l ={F0,F1,…,F l-1}, C l This indicates the splitting scheme.
[0009] Step 2: Construct set U l Let it store all partition schemes C with partition length l. l,i C l,i The subscript i indicates C l,i For set U l The i-th element in the matrix. Since this invention does not consider the exchange between sub-functions during the splitting process, all possible splitting cases when 2≤l≤5 are as follows:
[0010] l=2: The equilibrium sub-functions F0 and F1 are respectively... (This indicates that the input variable of function F0 is 5 bits, the number of coordinate functions of F0 is 4, and its output variable is 4 bits.) (This indicates that the input variables of function F1 are 5 bits, the number of F1 coordinate functions is 1, and its output variable is 1 bit) or (This indicates that the input variable of function F0 is 5 bits, the number of coordinate functions of F0 is 3, and its output variable is 3 bits.) (This indicates that the input variable of function F1 is 5 bits, the number of F1 coordinate functions is 2, and its output variable is 2 bits.) There are two cases, and a total of... There are 15 possible splitting schemes (not considering the swapping between sub-functions), that is, the set U2 has a total of 15 elements.
[0011] l=3: The balanced sub-functions F0, F1, and F2 are respectively... or There are two situations, with a total of There are 25 possible splitting schemes (not considering the swapping between sub-functions), that is, the set U3 has a total of 25 elements.
[0012] l=4: The balanced sub-functions F0, F1, F2, and F3 are respectively... Total There are 10 possible splitting schemes (not considering the swapping between sub-functions), that is, the set U4 has a total of 10 elements.
[0013] l=5: There is one and only one partitioning scheme, which is to partition each coordinate function f of the original S-box. i Separate constructor That is, set U5 contains only one element.
[0014] That is, the number of partitioning schemes corresponding to the partitioning length 2≤l≤5 are |U2|=15, |U3|=25, |U4|=10, and |U5|=1, respectively.
[0015] Step 3: Traverse set U l Element C l,i And verify C in turn. l,i Each sub-function The corresponding TI mask Does it satisfy uniformity (i.e., determine) Is it equal to in Indicates the input mask. Indicates the output mask, if illustrate It satisfies uniformity, and the opposite indicates (If one of the subfunctions does not satisfy uniformity, then consider the next element C). l,j ,j=i+1. If C l,j If each sub-function satisfies uniformity, then set K. l , will C l,j The TI masks corresponding to each sub-function are stored in set K as the final masking scheme. l In, that is
[0016] Step 4: When U l After iterating through all elements of the set, determine the set K. l Is it an empty set? If K is empty... l If the set is empty, it means that the function does not have a TI-type mask of length l. Execute l = l + 1. If l < 5, execute step 2. If l = 5, directly output the mask scheme F0·F1·F2·F3·F4. When K l If the set is not empty, output set K directly. l .
[0017] Step 5: Write the final RTL-level code using a hardware description language based on the masking scheme. Specifically, design l sub-modules based on the split length l of the output masking scheme. The function of each sub-module is the F function of the corresponding split sub-function. i The TI implementation ultimately achieves submodule instantiation within the main module.
[0018] The beneficial effects of this invention are as follows: The method of this invention can obtain a 3-shared uniform mask scheme for any 5-bit quadratic permutation. Compared with classic TI implementations (such as direct sharing schemes and parameter correction schemes), the method of this invention decomposes the original permutation TI implementation circuit into several independent sub-circuit modules, and the decomposition length is minimized. The reused combinational logic in the original circuit may be copied to its respective sub-circuit after the decomposition step, thus increasing the overall combinational logic overhead. However, the final mask scheme will definitely satisfy correctness, incompleteness, and uniformity, i.e., satisfy the security of first-order side-channel analysis. Attached Figure Description
[0019] Figure 1 A general flowchart for obtaining a masking scheme based on coordinate function splitting using this method.
[0020] Figure 2 A TI hardware implementation RTL view of the 3-shared class S-box for the Keccak algorithm.
[0021] Figure 3 A 3-shared TI hardware implementation RTL view of the S-box function F0 for the Keccak algorithm.
[0022] Figure 4 A 3-shared TI hardware implementation RTL view of the S-box function F1 for the Keccak algorithm.
[0023] Figure 5 The TI hardware implementation RTL view for the 3-shared class of the S-box for the Ascon algorithm.
[0024] Figure 6 A non-equilibrium structure S-box bridge 3,4,5 (Left) and Misty 5,3,5(Right) Structural diagram.
[0025] Figure 7 A non-equilibrium structure S-box bridge 3,4,5 (Left) and Misty 5,3,5 (Right) TI implementation diagram. Detailed Implementation
[0026] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only for explaining the present invention and are not intended to limit the scope of the present invention.
[0027] The construction principle of the 3-shared TI mask designed in this invention is to split the known S-box, which cannot achieve 3-shared uniform TI through direct sharing or parameter modification, into two or more sub-functions that can achieve 3-shared uniform TI based on a coordinate function. Let S be a 5-bit quadratic permutation type S-box, whose input variables are represented as follows: Its output variable is represented as When its minimum split length is l, it is split into l functions F0,…,F according to the coordinate function of S, which can achieve correctness, incompleteness, and uniformity. l-1 ,in, Functions F0,…,F l-1 The 3 shared TIs are represented as follows: make for The input mask is generated independently based on the input variable x. This invention will generate an additional, independently generated mask. x j The value 1 ≤ j ≤ l-1 is called the extended mask of the input variable x. When the split length is l, the extended mask... x j The number of elements is l-1. Among them, to ensure the correctness of the masking scheme, an extended mask is used. x j It has the following relationship with the input variable x:
[0028]
[0029] The independently generated extended mask x1 , x2 … x l-1 In turn as The input mask. Let for The output mask, The output mask for S. When the split length is l, the input mask is of class TI. x , x1 , x2 … x l-1 The length is 2 (5×3)×l There are 2 (5×(3-1))×lThis involves several encoding methods. The next step is to design the RTL-level code for the S-box masking scheme, including the function... Each corresponding input mask serves as the input to its respective submodule. Based on TI's specific solution (either direct sharing or parameter modification and addition), the logic circuit RTL code is written, and the output masks of each module are used. y0 , y1 ,… y l-1 The combined result is used as the final output mask of the S-box masking scheme. y The output mask is represented as For any split length l, the output mask of the S-box y The length is always 2 5×3 That is, the output mask y There are 2 5×(3-1) Various encoding methods and output masks y Any encoding corresponds to a class TI mask ( x , x1 , x2 … x l-1 ) both have 2 5×(3-1)×(l-2) There are different encoding methods, thus satisfying uniformity. This is because the sub-function F is split... i The TI of the whole S-box satisfies incompleteness, therefore the class TI of the whole S-box satisfies incompleteness.
[0030] Taking the 3-shared class TI mask for the S-box of the Keccak algorithm as an example, the Keccak algorithm was selected as the SHA-3 standard. The S-box of this algorithm is a 5-bit quadratic permutation, belonging to class 68 of the 5-bit quadratic permutation affine equivalence classes. Current 3-shared TI methods cannot meet its uniformity requirements. The coordinate function representation of the S-box of the Keccak algorithm is as follows:
[0031] f0 = x0 + (x1 + 1)x2
[0032] f1 = x1 + (x2 + 1)x3
[0033] f2 = x2 + (x3 + 1)x4
[0034] f3=x3+(x4+1)x0
[0035] f4 = x4 + (x0 + 1)x1
[0036] Wherein, the input variables of the S-box are When the split length l = 2, the sub-functions are split according to the coordinate function. TI mask All satisfy the requirements of correctness, incompleteness, and uniformity. Here, the coordinate functions f0, f1, and f2 of the original S-box are the coordinate functions of the sub-function F0, and f3 and f4 are the coordinate functions of the sub-function F1. Let the input mask of the original S-box...x and additional independently generated extended input masks x1 They are respectively The input mask, the relationship between the TI-type input mask and the input variable x of the S-box is as follows:
[0037]
[0038] Keccak's S-box algorithm can achieve a minimum partition length of 2 for coordinate functions that meet the TI requirement. The following lists all S-box partition schemes with a partition length of 2 that meet the requirement:
[0039]
[0040] There are 5 different splitting schemes, represented as (0,1,2)·(3,4), (0,1,4)·(2,3), and so on.
[0041] (0,3,4)·(1,2), (1,2,3)·(0,4), (2,3,4)·(0,1). The sub-functions are represented by k-tuples. The number i represents the original S-box coordinate function f i It also serves as the coordinate function of the new subfunction. Taking the first listed subfunctions F0 and F1 as examples, we design the 3-shared TI schemes for each of the subfunctions F0 and F1:
[0042] 3-Shared TI Scheme for Subfunction F0 It is expressed as follows:
[0043]
[0044] Its output mask is denoted as Shared functions The output is denoted as 0≤i≤2, 0≤j≤2. To satisfy uniformity, any output mask y0 The encoding method and the corresponding input mask x There are 2 in each 4 Different encoding methods. The RTL view of this module is as follows: Figure 3 As shown.
[0045] 3-Shared TI Scheme for Subfunction F1 It is expressed as follows:
[0046]
[0047] The output mask is denoted as Shared functions The output is denoted as 3≤i≤4, 0≤j≤2. To satisfy uniformity, any output mask y1 The encoding method and the corresponding input mask x1 There are a total of 2 6 Different encoding methods. The RTL view of this module is as follows: Figure 4 As shown.
[0048] The overall S-box masking scheme RTL view is as follows: Figure 2 As shown. Due to the input mask x ( Input mask and input extended mask x1 ( The input masks are independent of each other; therefore, for the overall Keecak S-box class TI, any output mask... y The encoding method has a total of 2 corresponding TI input masks. 10 This coding method satisfies uniformity because and Since it satisfies both correctness and incompleteness, the overall S-box class TI mask satisfies both correctness and incompleteness.
[0049] Of the 75 classes of 5-bit quadratic permutation affine representations, 30 classes can directly achieve 3-shared uniform TI. This paper presents the representative elements of the remaining 45 classes of 5-bit quadratic permutation affine equivalence classes (classes 28-30, 32, 35-75), as shown in Table 1, and gives the splitting schemes for the current minimum splitting length (the splitting scheme is not unique; for example, in class 28, there are 12 splitting schemes with a splitting length of 2 that satisfy the mask requirement, represented as: (0,1,3,4)·(2), (0,2,3,4)·(1), (1,2, 3,4)·(0),(0,1,3)·(2,4),(0,1,4)·(2,3),(0,2,3)·(1,4),(0,2,4)·(1,3),(0,3,4)·(1,2),(1,2,3)·(0,4),(1,2,4)·(0,3),(1,3,4)·(0,2),(2,3,4)·(0,1)), Table 1 arbitrarily selects one splitting scheme.
[0050] This invention implements the above masking scheme using the hardware description language Verilog HDL. The masking implementation files for the 5-bit quadratic permutation representatives listed in Table 1 were logically synthesized using the Synopsys Design Compiler L-2016.03-SP1 synthesis tool. The process library used is SMIC 180nm, with a slow specification, and the operating conditions are: operating temperature 125℃ and operating voltage 1.62V. Gate equivalence was used to evaluate the hardware implementation area consumption of the 5-bit quadratic permutation using the masking scheme of this invention when there is currently no 3-shared uniform TI, as shown in Table 1.
[0051] Table 1. Representative elements of affine equivalence classes 28-30, 32, and 35-75, their TI mask decomposition schemes, and implementation costs.
[0052]
[0053]
[0054]
[0055] While no 3-shared uniform TI has been provided for the 5-bit quadratic permutation affine equivalence classes 28–30, 32, and 35–75, a direct 4-shared TI scheme has been proposed. This scheme can be applied to the above equivalence classes to implement a uniform TI mask. Table 2 compares the implementation cost of the proposed TI mask with that of the 4-shared TI.
[0056] Table 2.5-bit quadratic permutation representative element: Comparison of implementation power consumption between 3-shared and 4-shared TI classes [GE]
[0057]
[0058]
[0059] Furthermore, the 3-shared class TI mask proposed in this invention, like the TI mask, when given a class TI mask with a permutation split length of l that satisfies security properties, class TI masks for all permutations affinely equivalent to that permutation can be derived. The Ascon algorithm is the current NIST lightweight cryptographic standard. Taking the Ascon algorithm's S-box as an example, both the Ascon algorithm's S-box and the Keecak algorithm's S-box belong to affine equivalence class 68. The Ascon algorithm's S-box consists of three parts: the S-box linear layer A, the χ5 mapping, and the S-box affine layer B. The S-box linear layer and affine layer are located at χ5:x... i +(x i+1 +1)x i+2 Add the following operations to both the input and output points:
[0060] A:(x4,x3,x2,x1,x0)→(x4+x3,x3,x2+x1,x1,x0+x4)
[0061] B:(x4,x3,x2,x1,x0)→(x4,x3+x2,x2+1,x1+x0,x0+x4)
[0062] The following describes a TI-mask-like implementation of the S-box in the Ascon algorithm. The Ascon algorithm can be represented as: The χ5 mapping (S-box of Keccak's algorithm) is split into two sub-functions that can achieve direct 3-shared TI. Taking the splitting scheme (0,1,2)·(3,4) as an example, to ensure the correctness of class TI, the mask of linear layer A needs to be changed. Add repeatedly In, that is Affine layer B mask and different, Need to be The output is then compounded, i.e. This is then output as the Ascon S-box class TI mask. The RTL view of the Ascon algorithm S-box masking scheme is as follows: Figure 5 As shown, the S-box class TI mask implementation consumes 255.67 GE.
[0063] To construct S-boxes that are easy to mask with low latency, unbalanced S-box structures are typically considered, where a 5-bit quadratic S-box can be used as a sub-component of an unbalanced S-box. This invention considers two types of unbalanced S-box structures: Bridge... 3,4,5 and Misty 5,3,5 Bridge 3,4,5 The structural S-box consists of a 3-bit sub-component S3, a 4-bit sub-component S4, and a 5-bit sub-component S5. (Misty) 5,3,5 The structural S-box consists of a 3-bit sub-component S3 and two 5-bit sub-components. Composition, its specific construction method is as follows Figure 6 As shown. The proposed 3-shared class TI mask is applied to an unbalanced S-box component to implement the S-box mask, as follows. Figure 7 As shown in Table 3, the results are compared with the masked implementation of the 8-bit unbalanced structured S-box of the currently known algorithm (Fantomas, an LS-Design cryptography).
[0064] Table 3. Comparison of 8-bit unbalanced structured S-box mask consumption
[0065]
[0066] The following are the S-box lookup tables for some known algorithms and the sub-component lookup tables for the unbalanced S-box structure constructed in this invention:
[0067] Keecak=[0,9,18,11,5,12,22,15,10,3,24,1,13,4,30,7,20,21,6,23,17,16,2,19,26,27,8,25,29,28,14,31]
[0068] Ascon=[4,11,31,20,26,21,9,2,27,5,8,18,29,3,6,28,30,19,7,14,0,13,17,24,16,12,1,25,22,10,15,23]
[0069] Fantomas:
[0070] S3 = [0, 3, 6, 1, 5, 4, 2, 7]
[0071]
[0072] Bridge 3,4,5 :
[0073] S3 = [0, 3, 6, 1, 5, 4, 2, 7]
[0074] S4=[0,0,0,4,0,0,8,12,0,2,0,6,1,3,9,15]
[0075] S5=[0,17,3,22,6,29,13,18,12,15,27,28,26,19,5,8,24,11,30,9,23,14,25,4,
[0076] 21,20,7,2,10,1,16,31]
[0077] Misty 5,3,5 :
[0078] S3 = [0, 3, 6, 1, 5, 4, 2, 7]
[0079]
[0080] Of the 75 affine equivalence classes of the current 5-bit quadratic permutation, 30 classes (classes 1-27, 31, 33, 34) have a 3-shared uniform TI, while the remaining 45 classes do not have a given 3-shared TI scheme. Using the method of this invention, 3-shared masking schemes for the remaining 45 classes of affine equivalence classes (classes 28-30, 32, 35-75) of the 5-bit quadratic permutation can be obtained, all satisfying correctness, incompleteness, and uniformity. It can also implement 3-shared masking schemes for 5-bit S-boxes of some known cryptographic algorithms (such as Keecak and Ascon cryptographic algorithms). Furthermore, the 5-bit quadratic S-box permutation can also be used as a component of an 8-bit unbalanced S-box structure to construct S-boxes that are easy to mask with low latency. Therefore, the method of this invention can be used to further construct 8-bit unbalanced S-box mask implementations. The above description is an example of the preferred embodiment of this invention; parts not described in detail are common knowledge to those skilled in the art. The scope of protection of this invention is determined by the claims. Any equivalent modifications based on the technical teachings of this invention are also within the scope of protection of this invention.
Claims
1. A method for implementing an S-box 3-shared class TI mask based on coordinate function decomposition, comprising the following steps: Step 1: The S-box is an n-bit quadratic S-box, and its coordinate function is represented as (f0, f1, ..., f...). n The splitting length l takes values of 2, 3, ..., n; based on the splitting length l, the S-box is split into l balanced sub-functions F0, ..., F1 according to the coordinate function. l-1 And each splitting scheme satisfies the condition: l balancing sub-functions F0,…,F l-1 The sum of coordinate functions forms (f0, f1, ..., f n ); Consider all possible combinations of coordinate functions and construct the set U. l Store all partitioning schemes of length l, and obtain the set U corresponding to l taking the values 2, 3, ..., n. l ; Step 2: Let l = 2, and traverse set U. l All partitioning schemes, when a partitioning scheme corresponds to l balancing sub-functions F0,…,F l-1 If all TI masks simultaneously satisfy correctness, incompleteness, and uniformity, then the l balanced sub-functions F0,…,F in this splitting scheme will be... l-1 The corresponding masking scheme is stored in set K. l Proceed to step 3; otherwise, set l = l + 1 and execute step 2 again. Step 3: Based on set K l The masking scheme in the code uses a hardware description language to write the final RTL-level code, corresponding to the design of l sub-modules. The function of each sub-module is to decompose the F function into sub-functions. i The TI mask implementation is ultimately implemented in the main module to instantiate the submodule.
2. The method for implementing S-box 3 shared class TI mask based on coordinate function decomposition according to claim 1, characterized in that: n equals 5.
Citation Information
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