Anti-EOS high-performance LED epitaxial structure and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, in particular to an anti-EOS high-performance LED epitaxial structure and a preparation method thereof.The epitaxial structure comprises a substrate, and a buffer layer, a non-doped UGaN layer, a high-resistance SiC transition layer and an N-type GaN layer are sequentially grown on the substrate; the device comprises a substrate, an AlGaN layer, an AlGaN layer, a SiC / AlN / AlGaN superlattice layer, a multi-quantum well (MQW) active layer, a P-type AlGaN layer and a P-type GaN layer. The high-resistance SiC transition layer is inserted below the NGaN layer, and a high-resistance region is introduced into a current path, so that a current peak value is limited; the SiC / AlN / AlGaN superlattice layer is inserted below the MQW layer, through the stress buffer effect and the interface optimization characteristic of the superlattice structure, the transient current peak value is effectively suppressed, the current distribution uniformity is improved, the EOS resistance of the LED is remarkably improved, the defect density is reduced, and the device reliability is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to an anti-EOS high-performance LED epitaxial structure and a preparation method thereof. Background Art

[0002] LED devices are susceptible to electrical overstress (EOS) damage in practical applications, resulting in increased leakage current, decreased luminous efficiency, and even permanent failure. Traditional solutions usually alleviate the EOS problem by optimizing the electrode structure, adding a protection circuit, or improving the material doping process, but these methods have the disadvantages of complex processes, high costs, or limited effects.

[0003] Existing LED epitaxial structures usually consist of a substrate, a buffer layer, an n-GaN layer, an MQW active layer and a p-GaN layer (as shown in Figure 1 ). There are few studies on improving the EOS performance.

[0004] Traditional LED epitaxial structures lack an effective current limiting mechanism and are difficult to suppress transient current peaks. Existing current limiting layer designs (such as high-resistance GaN layers) often lead to an increase in device resistance, affecting the luminous efficiency, and lack comprehensive consideration of thermal management and current uniformity, resulting in insufficient device reliability. Summary of the Invention

[0005] Aiming at the deficiencies of the prior art, the present invention proposes an anti-EOS high-performance LED epitaxial structure and a preparation method thereof to improve the anti-EOS ability.

[0006] To achieve the above object, the present invention adopts the following technical solutions: An anti-EOS high-performance LED epitaxial structure includes a substrate, on which a buffer layer, an undoped u-GaN layer, a high-resistance SiC transition layer, and an n-GaN layer are sequentially grown; a SiC / AlN / AlGaN superlattice layer, a multi-quantum well active layer, a p-AlGaN layer, and a p-GaN layer.

[0007] Preferably, the substrate is sapphire, SiC, or Si.

[0008] Preferably, the buffer layer is low-temperature AlN or GaN.

[0009] Preferably, the thickness of the high-resistance SiC transition layer is 15 nm.

[0010] Preferably, in the superlattice layer, the thickness of the SiC layer is 1-5 nm, the thickness of the AlN layer is 1-3 nm, and the thickness of the AlGaN layer is 3-10 nm; the total thickness of the superlattice layer is: 50-300 nm.

[0011] Furthermore, the number of periods of the SiC / AlN / AlGaN superlattice layer is 5 - 30 periods.

[0012] Preferably, the number of periods of the SiC / AlN / AlGaN superlattice layer is 10 - 20 periods.

[0013] A method for preparing an anti - EOS high - performance LED epitaxial structure specifically includes the following steps: Step 1: Provide a substrate; Step 2: Sequentially grow a buffer layer and an undoped UGaN layer on the substrate; Step 3: Grow a high - resistivity SiC transition layer on the undoped UGaN layer; the growth temperature is controlled at 800 - 1000 °C, the pressure is 200 - 500 Torr, and the doping concentration: the SiC layer is doped with carbon or silicon, with a concentration of 1E18 - 5E19 cm⁻³; Step 4: Grow an N - type GaN layer on the high - resistivity SiC transition layer; Step 5: Grow a SiC / AlN / AlGaN superlattice layer on the N - type GaN layer; the SiC layer is doped with carbon or silicon, with a concentration of 1E18 - 5E19 cm⁻³; the AlGaN layer is doped with silicon or magnesium, with a concentration of 5E17 - 1E19 cm⁻³; the growth temperature is controlled at 900 - 1100 °C, the pressure is 200 - 500 Torr; precise control of the composition of each layer is achieved by adjusting the flow rates of the Al source, Ga source, NH3, and SiH4; Step 6: Sequentially grow a multi - quantum - well active layer, a P - type AlGaN layer, and a P - type GaN layer on the SiC / AlN / AlGaN superlattice layer.

[0014] Compared with the prior art, the present invention has the following beneficial effects: In the present invention, a high - resistivity SiC transition layer is inserted below the NGaN layer to introduce a high - resistivity region in the current path, thereby limiting the current peak value; a SiC / AlN / AlGaN superlattice layer is inserted below the MQW layer. Through the stress - buffering effect and interface - optimization characteristics of the superlattice structure, the transient current peak value is effectively suppressed, the uniformity of current distribution is improved, the anti - EOS ability of the LED is significantly enhanced, and at the same time, the defect density is reduced and the device reliability is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a prior - art epitaxial structure diagram.

[0016] Figure 2 It is the epitaxial structure diagram of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0017] To further illustrate the technical means and effects adopted by the present invention to achieve the intended invention purpose, the following, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation manners, structures, features and their effects of the present invention as follows.

[0018] As Figure 2 shown, an anti-EOS high-performance LED epitaxial structure of the present invention sequentially grows a buffer layer (such as low-temperature AlN or GaN), an undoped U - GaN layer, a high-resistance SiC transition layer, an N - GaN) layer, a SiC / AlN / AlGaN superlattice layer, an MQW active layer, a P - AlGaN layer, a P - GaN layer on a substrate (such as sapphire, SiC or Si).

[0019] Design mechanism and growth conditions of the present invention: 1. High-resistance SiC transition layer: SiC (silicon carbide) is a wide-bandgap semiconductor material, and its high resistivity can effectively limit the current flow. Placing the SiC transition layer at the bottom of the n-type GaN layer can effectively introduce a high-resistance region in the current path, thereby limiting the current peak; its high thermal conductivity helps with heat dissipation and improves the thermal management of the device; its high breakdown field strength can withstand high voltages and improve the voltage withstand capacity of the device; the lattice constants of SiC and GaN are close, and by optimizing the interface quality between SiC and GaN, the interface state density is reduced, and the negative impact of the current confinement layer on the device performance is reduced.

[0020] Among them: the thickness of the SiC layer is 15 nm, the growth temperature is controlled at 800 - 1000 °C, the pressure is 200 - 500 Torr, and the doping concentration: the SiC layer is doped with carbon (C) or silicon (Si), and the concentration is 1E18 - 5E19 cm⁻³.

[0021] 2. SiC / AlN / AlGaN superlattice current spreading layer: The high-resistance characteristic of the SiC layer effectively limits the current peak and prevents EOS damage; the high thermal conductivity of the AlN layer helps with heat dissipation and reduces the operating temperature of the device; the AlGaN layer adjusts the energy band structure and improves the uniformity of current distribution. By comprehensively improving current confinement, thermal management and uniformity, the reliability and lifespan of the device are significantly improved.

[0022] Among them: Specific parameters of the superlattice layer: Single-period structure: Composed of a SiC layer (thickness 1 - 5 nm), an AlN layer (thickness 1 - 3 nm), and an Al(x)Ga(1 - x)N layer (x = 0.2 - 0.8, thickness 3 - 10 nm); The number of periods is 10 - 15, and the total thickness of the superlattice: 50 - 300 nm. Doping concentration: The SiC layer is doped with carbon (C) or silicon (Si), with a concentration of 1E18 - 5E19 cm⁻³; The AlGaN layer is doped with silicon (Si) or magnesium (Mg), with a concentration of 5E17 - 1E19 cm⁻³. The growth temperature is controlled at 900 - 1100 °C, and the pressure is 200 - 500 Torr; Precise control of the composition of each layer is achieved by adjusting the flow rates of the Al source, Ga source, NH3, and SiH4; The superlattice interface adopts gradient growth or interrupted growth methods to reduce interface defects.

Claims

1. An EOS-resistant high-performance LED epitaxial structure, comprising a substrate, characterized in that: A buffer layer, a non-doped UGaN layer, a high-resistance SiC transition layer, an N-type GaN layer, a SiC / AlN / AlGaN superlattice layer, a multi-quantum well active layer, a P-type AlGaN layer, and a P-type GaN layer are sequentially grown on the substrate.

2. The EOS-resistant high-performance LED epitaxial structure according to claim 1, characterized in that: The substrate is sapphire, SiC or Si.

3. The EOS-resistant high-performance LED epitaxial structure according to claim 1, characterized in that: The buffer layer is low-temperature AlN or GaN.

4. The EOS-resistant high-performance LED epitaxial structure according to claim 1, characterized in that: The high-resistance SiC transition layer has a thickness of 15 nm.

5. The EOS-resistant high-performance LED epitaxial structure according to claim 1 or 4, characterized in that: The thickness of the SiC layer in the superlattice layer is 1-5 nm, the thickness of the AlN layer is 1-3 nm, and the thickness of the AlGaN layer is 3-10 nm; the total thickness of the superlattice layer is 50-300 nm.

6. The EOS-resistant high-performance LED epitaxial structure according to claim 5, characterized in that: The number of periods of the SiC / AlN / AlGaN superlattice layer is 5-30 periods.

7. The EOS-resistant high-performance LED epitaxial structure according to claim 6, characterized in that: The number of periods of the SiC / AlN / AlGaN superlattice layer is 10-20 periods.

8. A method for preparing an EOS-resistant high-performance LED epitaxial structure, comprising the following steps: Step 1: providing a substrate; Step 2: sequentially growing a buffer layer and a non-doped UGaN layer on the substrate; Step 3: Grow a high-resistance SiC transition layer on the non-doped UGaN layer; the growth temperature is controlled at 800-1000°C, the pressure is 200-500 Torr, and the doping concentration is: the SiC layer is doped with carbon or silicon, with a concentration of 1E18-5E19 cm⁻³; Step 4: growing an N-type GaN layer on the high-resistance SiC transition layer; Step 5: grow SiC / AlN / AlGaN superlattice layer on N-type GaN layer; dope SiC layer with carbon or silicon, concentration 1E18-5E19 cm⁻³; dope AlGaN layer with silicon or magnesium, concentration 5E17-1E19 cm⁻³; control growth temperature to 900-1100℃, pressure 200-500 Torr; precisely control the composition of each layer by adjusting the flow of Al source, Ga source, NH3 and SiH4; Step 6: sequentially growing a multi-quantum well active layer, a P-type AlGaN layer, and a P-type GaN layer on the SiC / AlN / AlGaN superlattice layer.

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