Power converter interconnection

Abstract

A power conversion apparatus may perform power processing of a reference model on a plurality of power nodes connected at one or more power ports. The power conversion device may include binning logic to bind occupied ports according to its estimated condition of occupancy nodes within a predefined condition model for an expected cluster of power nodes. The binning logic then interconnects the binned ports to the reduced tier nodes and the sparse tier nodes based on occupancy and binning.

Description

[0001] Statement of Federally Sponsored Research or Development

[0002] This invention was made with government support under Contract No. 2146490 awarded by the National Science Foundation of the United States. The government has certain rights in this invention.

[0003] Background

[0004] Priority

[0005] This application claims priority to U.S. Provisional Application No. 63 / 412,117, filed on September 30, 2022, with Attorney Docket No. 10109 - 22017P and titled POWER CONVERTER INTERCONNECTION, the entire content of which is incorporated herein by reference. Technical Field

[0006] This disclosure generally relates to power converter interconnections.

[0007] Brief Description of the Related Art

[0008] Increasingly complex electronic devices have created a need for power conversion and other signal processing in various environments. For example, devices including power circuitry systems can power components at various power levels and / or other input constraints. Accordingly, there is a growing need for systems that can efficiently and accurately process signals in a wide variety of power and frequency environments. Improvements in signal processing technology will continue to drive industrial needs. Brief Description of the Drawings

[0009] Figure 1 An example power conversion device is shown.

[0010] Figure 2 An example binning logic is shown.

[0011] Figure 3 An example binning execution system is shown. Detailed Description

[0012] In various environments, a power source (such as an electrical storage device (e.g., a battery, a fuel cell, or other electrical storage device), a solar cell, a wind turbine, a chemical process, or other power source) may output power in a state that does not match the target output of the system containing the power source (e.g., voltage, wattage, current, DC, AC, or other characterization metrics). Various environments may have mismatches between multiple power receivers (e.g., battery chargers, motors, or other power-consuming devices) connected in an integrated system. In other words, the system may have heterogeneity caused by various power nodes (e.g., power sources and / or power receivers) in the system.

[0013] Using a battery as an illustrative example, batteries that may be consistent or non-diverse (e.g., at the time of manufacturing, installation, or other lifecycle points) may degrade at different rates in some scenarios, including consistent and / or load-balanced usage environments. Thus, an initially consistent set of batteries may degrade such that the output of the set of examples is different from the target output of the system. Additionally, the deviation from the target (or the expected contribution to the target) output by each battery in the set of examples may vary from battery to battery. Different levels of degradation may occur in different battery technologies. For example, different battery packs may degrade differently, and further within those battery pack modules and / or individual cells may have diverse degradation. A battery may refer to any part of battery technology and / or other technologies that manifest as an electrical storage unit. For example, in some cases, multiple battery packs, modules, cells, chargers, controllers, power converters, or other battery internal components connected via almost any collection of electrical interconnections may be referred to as a single "battery". Additionally, an electrical storage device such as a battery may manifest as a power source, a power receiver (e.g., when being charged), or other power nodes in various environments. Solar cell / array power generation may vary due to transient and / or spatially varying irradiance distributions, cell degradation, cell obscuration (e.g., due to dust or other debris), or other non-uniform disturbances to power generation.

[0014] As an illustrative scenario, the secondary use of retired electric vehicle (EV) battery packs (e.g., as a residential backup power source or other backup power source) may require the installation of battery packs that have experienced degradation due to use. Additionally, for a wide variety of vehicles, the capacity, rating, and form factor of battery packs vary significantly. With the emergence of faster charging technologies and newer battery chemistries, the diversity may increase. This diversity is reflected not only in the secondary use battery packs for energy storage but also in the charging of different vehicles at a station. However, during these periods of rapid change, the market may partially resist some standardization because as progress outweighs the benefits of the standardization, improvements in battery performance provide benefits to producers who can incorporate the new technologies.

[0015] There is a similar trade-off between standardization and the incorporation of new technologies with other power nodes.

[0016] In various implementations, the system may implement a power converter to convert the power at a power node into a state used at an output port. In various implementations, full power processing (FPP) may include deploying a power converter between a power node and a target port to convert the power at the power node into the power of the target port. In some cases, the converter may be paired with each node in a group bound to the target port. The converter may process all the power from the nodes.

[0017] In some cases, partial power processing (PPP) can be implemented. Although the number of converters can depend on (e.g., be equal to or approximate) the number of power nodes, the PPP converters can handle less than all of the power at the nodes. Alternatively, the processing can focus on a portion of the power to condition the power from the power nodes into an output state. In some cases, PPP can reduce the overall power being processed. In some cases, PPP operation can increase efficiency relative to FPP because PPP (even with the same converters originally) does not process the full power of the system. Thus, the inefficiency of each converter is attenuated by the relative size of the portion being processed. For example, processing 100% of an FPP system with 5% losses will result in a 5% loss of system power. A PPP configuration with the same converters that processes 10% of the power will result in a 0.5% loss. Other efficiencies can be obtained, such as reduced internal heating.

[0018] For example, differential power processing (DPP) can operate on a portion of the power that is different from the target state. In some cases, the power nodes may only differ over a given range (e.g., X% to Y%, where Y > X). Thus, a set of power converters (each independently capable of handling the maximum deviation of that range (e.g., Y%)) may be sufficient to support power conversion. In some cases, the cost of the power converters can be proportional to the processing capacity of the converters. Thus, systems configured to employ PPP and / or DPP can have a cost savings advantage over FPP systems. However, some FPP systems can operate without information about the current operating condition / future operating condition of the power nodes. For example, DPP and PPP can have an operating tolerance range within which a specific output can be delivered. If the set of power nodes falls outside of that range (or, for example, degrades after installation until it is at a point outside of that range), then the PPP system may fail.

[0019] In some cases, statistical, empirical, and / or theoretical models can provide information about the condition of the power nodes. For example, a model of battery degradation versus usage and / or time can provide the state distribution of a given secondary-use battery cluster. Thus, such a model can provide predictive information about a set of batteries drawn from such a cluster.

[0020] For example, a particular cluster (or other group) of power nodes may be diverse for one or more reasons, such as degradation, model type, or other diversity factors. Condition models (including models generated from power node characterizations, statistical models, or other models of power node performance) can be used to provide information about the expected characteristics of power nodes selected from that particular cluster. Additionally, using the condition model, the cluster can be partitioned into defined segments (e.g., bins). These defined segments can be statistical segments, such as percentile ranges, individual node assignments, characterization-based assignments, or other groupings. Once partitioned into multiple segments, these segments can be treated specially such that the electrical coupling to the components of the segment can be specific to the characteristics of the power node segment. Thus, a system using diverse power nodes can pre-determine the sizing requirements of power converters. Accordingly, power converters with lower conversion capacity can be used because of the uncertainty as to whether the amount of necessary conversion capacity is reduced.

[0021] Thus, a system capable of handling a set of power nodes with conditions estimated by a model can allow for relatively robust performance against blind and / or limited characterization implementations, without requiring detailed characterization of individual power nodes in the set. Additionally, a system capable of model reference calibration can allow for a more consistent construction of a power handling system, rather than being highly dependent on the interconnections and power converter units specific to a set of power nodes.

[0022] Furthermore, an initially limited characterization of a set of power nodes can later be replaced by a more information-rich degradation trajectory obtained by leveraging the extended use and monitoring of the power nodes. For example, for the initial interconnection and binning of power nodes, point characterizations (e.g., based on data from a point or rather short moment) can be used to initially interconnect the power nodes in a power handling system at available ports. After a period of use and monitoring of the power nodes in the power handling system (e.g., after a monitoring period), it may be possible to better characterize the power nodes as a longer portion of the power node degradation trajectory can be determined from the monitoring data. Thus, the power nodes can be reconnected to the available ports based on a more extensive characterization. In some cases, different monitoring periods can be used. For example, the monitoring period can be based on the expected lifetime of the power node. For example, a battery may be expected to degrade in 10 years. Accordingly, the monitoring period can be selected as a portion of 10 years (e.g., two years) such that the degradation trajectory can be ascertained.

[0023] Additionally or alternatively, the ports of the power handling system may not necessarily tie their logical functions to specific physical port locations. Accordingly, in some implementations, power nodes can be "reconnected" to ports in a new order without physically moving the power nodes or disconnecting the power nodes from the system. More precisely, the switching system can reconfigure the routing within the power handling system such that the logical ports align with newly determined interconnections for the power nodes without physically repositioning the power nodes themselves.

[0024] Now referring to Figure 1 , an example power conversion device (PCD) 100 is shown. The example PCD 100 includes a plurality of power node connection ports 111 to 119. Each of these connection ports can be configured to support power conversion for a defined portion of a group of power nodes.

[0025] The condition model can provide characteristics of different portions. For example, the condition model can provide a central value of the expected power flow (such as an average value, a median value, a selected value convenient for conversion in combination with other central values, or other values). For example, the diversity model can provide an expected range of power flow for a defined portion. In some cases, a defined portion can be defined based on power flow values. However, other characteristics can be used. For example, power node age, power node operating voltage, power node internal resistance (such as battery resistance or other internal resistance), charge / discharge cycle count of an electrical storage device, power node current, or other characteristics. In some cases, clusters can be defined statistically (such as based on percentiles of an expected distribution due to power node age, cycle count, or other factors). Thus, the membership of a particular power node within any specific portion of a group may not be fully distinguishable. Accordingly, in some cases, ports can be configured for different portions, and then power nodes can be coupled to specific ports based on best guess and / or best fit membership assignment. As an illustrative example, a particular PCD can have four ports tuned to different quartiles of a total group of power nodes. When placing the PCD into operation, the power nodes can be partially characterized. For example, the operating voltage of each power node can be measured. Then, based on the partial characterization, the power nodes can be assigned based on the ranking of the characterized values. For example, in a best fit port assignment scheme, it can be assumed that the lowest measured operating voltage is best placed in the port of the lowest quartile (or other binning scheme), including in cases where the lowest measured operating voltage may imply membership in another quartile. In a best guess scheme, the measured characteristics can be used to estimate membership. For example, the lowest measured operating voltage can be assigned to the quartile most strongly indicated by the actually measured voltage value, regardless of the ranking relationship between this power node and other characterized power nodes at the time of installation.

[0026] The PCD 100 also includes a node interconnect 140 between a plurality of power node connection ports 111 to 119. The node interconnect 140 can be configured to couple the power node connection portions 111 to 119 in a parallel or series configuration. In some cases, one or more serial port strings can be coupled in parallel to other individual ports. The PCD 100 also includes an interconnect 130 between a plurality of power node connection ports 111 to 119 and a sparse set of power converters 141, 142, 144. The sparse set is used to regulate the power at different points to ensure a final consistent model-corrected power at the port 150.

[0027] As discussed below, the interconnect can include dynamic switching to support reconfiguration of the connections over time. The switching can allow for changing the power converter - power connection, for example, due to inconsistent degradation between power supplies after an initial setup. In some cases, dynamic reconfiguration can be applied in response to different usage scenarios. For example, ports 111 to 119 can be switched such that they are coupled in series when power flows outwards from the ports. For example, this can correspond to the discharging of coupled batteries during operation. However, ports 111 to 119 can be switched such that they are coupled in parallel when power flows inwards to the ports. For example, this can correspond to the charging of coupled batteries.

[0028] The layer interconnect 130 can include a dense set of power converters 131 to 139 to provide a first-level regulation of the power node connection ports 111 to 119 based on a central value provided by a model (e.g., partial power handling using the model deviation power). In some cases, such regulation can include a difference and / or partial conversion of an intermediate value, which is selected with reference to the central value from a condition model but is different from the referenced central value. For example, the intermediate value can include a value corresponding to a plurality of central values added together, a difference between two central values, or other target values referenced to the central value. In some cases, the intermediate value can be the central value from the condition model. The model deviation power can include a portion of the power that deviates from the central value provided by the condition model. The dense set of power converters 131 to 139 can be connected in one or more layers (below the sparse set 141, 142, 144 within the hierarchy). The total number of layers in the power converter hierarchy can include the number of layers in the dense set of power converters 131 to 139 plus the number of layers in the sparse set of power converters.

[0029] The layer interconnect 130 also includes passive connections (e.g., parallel, series, capacitive, inductive, power conversion, and / or other interconnections) to assist in regulation. Accordingly, the layer interconnect 130 may not necessarily connect the power node connection ports to the dense layer power converters one-to-one. For example, multiple serially connected nodes can be used to estimate the desired operating voltage before connecting to the power converter. Accordingly, power from multiple node connection ports can be processed by a single converter. In some cases, for simplicity of analysis and / or presentation, a complex electrical system can be referred to as, depicted as, or (via circuit equivalents) reduced to a single node and / or a single node connection port. In various implementations, the connection ports can be permanently wired to a specific power node. Accordingly, the ports can include power interfaces for power to flow out of and / or into the power node, regardless of the permanent or temporary nature of the coupling of the interface.

[0030] The interconnect 140 can be controlled by binning logic 200, which can control binning for the power nodes after a particular set of power nodes has been selected to occupy ports 111 to 119.

[0031] Figure 2 An example binning logic 200 is shown. The binning logic 200 can obtain an indication of the count of the occupied power connection ports (202). This count can indicate how many of the available ports are filled. In some cases, fewer than all of the ports may be coupled to power nodes due to availability, maintaining options for expanding the system, and / or other factors. As discussed above, a power device condition model (such as a degradation model) characterizes the expected condition of a cluster of power devices that occupy power connection ports. In some cases, this count can be user-defined. For example, a user can input the number of ports that are (or will be) occupied.

[0032] Based on the count of the occupied power connection ports, the binning logic can determine the count of the lite layer converters based on a predefined constraint that relates the count of the occupied power connection ports to the count of the lite layer converters. In various implementations, the lite layer converters can be activated at a particular ratio to the occupied ports (204). For example, there can be one activated lite layer converter for every two occupied ports, or one-to-one, or N-1 (where N is the count of the ports), or other relationships. Thus, if the occupancy of the ports is less than all, one or more of the lite layer converters can be deactivated by the binning logic. In various implementations, the lite layer converters can be configured to process power from the occupied power connection ports where the remaining power does not match within the range predicted by the power device condition model.

[0033] The binning logic 200 can obtain a count of externally defined sparse layer converters (206). The sparse layer converter count can be set during the manufacture of the power processing system. The sparse layer converters are constrained to handle the remaining power mismatches from the lean layer converters (e.g., predicted by the condition model). The mismatches at the sparse layer can match the mismatches predicted from the model because the lean layer converters can provide corrections such that the mismatches at the arrival at the sparse layer match the predicted mismatches (regardless of the mismatches before the lean layer corrections).

[0034] Based on these counts, the binning logic can determine, for each of the occupied power connection ports, a device condition interval bin that characterizes the condition of the occupied power connection port. In various implementations, the number of bins can be based on the condition model and the number of ports available in the power processing system. For example, the bins can correspond to the discretization of the condition model data. As an illustrative scenario, the degradation data can exhibit modal clustering, and the number of bins can be affected by the number of modes. In other cases, the number of bins can be affected by the number of available ports. For example, the system can have three available ports. Thus, three bins can correspond to the resolution levels available to the model of the power processing system.

[0035] Based on the counts and the bins, the binning logic 200 can determine a lean layer interconnect configuration (208). The lean layer interconnect configuration can determine which logical ports are connected to which power nodes. Then, the binning logic 200 can interconnect the sparse layer nodes by determining a sparse layer interconnect configuration (210) that adjusts to the number of occupied power ports and active lean layer converters.

[0036] Figure 3 An example binning execution system (BES) 300 is shown, which can provide an execution environment for executing the binning logic 200. The BES 300 can include system logic 314 for supporting the following: configuration simulation (Monte Carlo modeling); layer interconnect determination; and / or other operations. The system logic 314 can include a processor 316, a memory 320, and / or other circuitry that can be used to implement instructions and / or logic for interconnect determination.

[0037] The memory 320 can be used to store degradation data 322 and / or the port counts 324 used or other data. The memory 320 can also store parameters 321, such as constraints, power converter ratings, and / or other parameters that can facilitate interconnect determination. The memory can also store rules 326, which can support interconnect determination.

[0038] The memory 320 may also include applications and constructs, such as encoded objects, templates, or one or more other data structures, to support interconnect determination. The BES 300 may also include one or more communication interfaces 312, which may support wireless (e.g., Bluetooth, Wi-Fi, WLAN, cellular (3G, 4G, LTE / A)) and / or wired, Ethernet, Gigabit Ethernet, optical networking protocols. Additionally or alternatively, the communication interface 312 may support secure information exchange, such as Secure Sockets Layer (SSL) or a protocol based on public-key cryptography for sending and receiving data. The BES 300 may include a power management circuitry 334 and one or more input interfaces 328.

[0039] The BES 300 may also include a user interface 318, which may include a human-machine interface and / or a graphical user interface (GUI). The GUI may be used to present user input prompts for power converter count, interconnect preferences, and / or other user inputs.

[0040] The above methods, devices, processes, and logics may be implemented in many different ways and in many different combinations of hardware and software. For example, all or part of these implementations may be circuitry including an instruction processor (such as a central processing unit (CPU), a microcontroller, or a microprocessor); an application specific integrated circuit (ASIC), a programmable logic device (PLD), or a field programmable gate array (FPGA); or circuitry including discrete logic or other circuit components (including analog circuit components, digital circuit components, or both); or any combination thereof. As an example, the circuitry may include discrete interconnected hardware components and / or may be implemented in a multi-chip module (MCM) of multiple integrated circuit dies that may be combined on a single integrated circuit die, distributed among multiple integrated circuit dies, or in a common package.

[0041] The circuitry may also include or access instructions for the circuitry to execute. These instructions may be implemented as signals and / or data streams, and / or may be stored in a tangible storage medium different from transient signals, such as flash memory, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM); or stored on a disk or an optical disc, such as a compact disc read-only memory (CDROM), a hard disk drive (HDD), or other disk or optical disc; or stored in or on another machine-readable medium. A product such as a computer program product may specifically include a storage medium and instructions stored in or on the medium, and these instructions, when executed by the circuitry in a device, may cause the device to implement any of the processes described above or illustrated in the drawings.

[0042] These implementations can be distributed among multiple system components as a circuit system (e.g., hardware) and / or a combination of hardware and software, such as among multiple processors and memories (optionally including multiple distributed processing systems). Parameters, databases, and other data structures can be stored and managed separately, can be incorporated into a single memory or database, can be organized logically and physically in many different ways, and can be implemented in many different ways, including being implemented as data structures such as linked lists, hash tables, arrays, records, objects, or implicit storage mechanisms. These programs can be parts of a single program (e.g., subroutines), separate programs, they can be distributed across several memories and processors, or can be implemented in many different ways, such as being implemented in libraries such as shared libraries (e.g., Dynamic Link Libraries (DLLs)). For example, a DLL can store instructions that, when executed by a circuit system, perform any of the processing described above or illustrated in the figures.

[0043] The present disclosure has been described with reference to specific examples, which are intended to be illustrative only and not limiting of the disclosure. Changes, additions, and / or deletions can be made to the examples without departing from the spirit and scope of the disclosure. Various implementations have been described, and various implementations are possible. Table 1 includes various examples.

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[0048]

[0049] The foregoing description has been given for clarity of understanding only, and no unnecessary limitations should be understood therefrom.

Claims

1. A system, comprising: a processor; and a memory in data communication with the processor, the memory including instructions that are configured to cause the processor to: obtain an indication of a count of occupied power connection ports, wherein a power device condition model characterizes an expected condition of a power device cluster for occupying the power connection ports; based on the count of the occupied power connection ports, determine a count of the thin layer converters based on a predefined constraint that correlates the count of the occupied power connection ports with the count of the thin layer converters, the thin layer converters being configured to process power from the occupied power connection ports to bring a power mismatch within a range predicted via the power device condition model; obtain a count of externally defined sparse layer converters, wherein the sparse layer converters are constrained to handle the power mismatch not considered for the thin layer converters; for each of the occupied power connection ports, determine a device condition interval bin characterizing the condition of the occupied power connection port from a predetermined number of bins; based on the count of the thin layer converters and the device condition interval bins of the occupied power connection ports, determine a thin layer interconnect configuration; and based on the thin layer interconnect configuration and the count of the externally defined sparse layer converters, determine a sparse layer interconnect configuration.

2. The system according to claim 1, wherein the externally defined count includes a user-defined count.

3. The system according to claim 1, wherein: the predetermined number of bins includes at least three bins; and the at least three bins cover at least three intervals of a degradation life of a power storage device cluster.

4. The system according to claim 1, wherein one or more of the occupied power connection ports are connected to one or more batteries.

5. The system according to claim 1, wherein one or more of the occupied power connection ports are connected to one or more power sources.

6. The system according to claim 1, wherein the power device condition model is based on empirically collected data on battery degradation of a defined battery cluster.

7. The system according to claim 1, wherein the predetermined number of bins includes bins discretized according to data from the power device condition model.

8. The system according to claim 1, wherein the instructions are further configured to re-determine the device condition interval bin for each of the occupied power connection ports after a monitoring period during which condition trajectory information of the power ports is obtained.

9. The system according to claim 1, wherein the monitoring period is a predetermined duration based on a part of an expected life of a power node coupled to at least one of the occupied power connection ports.

10. A method, comprising: obtain an indication of a count of occupied power connection ports, wherein a power device condition model characterizes an expected condition of a power device cluster for occupying the power connection ports; Based on the count of the occupied power connection ports, determine the count of the thin-layer converters based on a predefined constraint that correlates the count of the occupied power connection ports with the count of the thin-layer converters, where the thin-layer converters are configured to process the power from the occupied power connection ports to bring the power mismatch within the range predicted via the power device condition model; Obtain a count of externally defined sparse-layer converters, where the sparse-layer converters are constrained to handle the power mismatch not considered for the thin-layer converters; For each of the occupied power connection ports, determine a device condition interval bin characterizing the condition of the occupied power connection port from a predetermined number of bins; Based on the count of the thin-layer converters and the device condition interval bins of the occupied power connection ports, determine a thin-layer interconnection configuration; and Based on the thin-layer interconnection configuration and the count of the externally defined sparse-layer converters, determine a sparse-layer interconnection configuration.

11. The method according to claim 10, wherein the externally defined count includes a user-defined count.

12. The method according to claim 10, wherein: the predetermined number of bins includes three bins; and the three bins cover three intervals of the deteriorating life of the power storage device cluster.

13. The method according to claim 10, wherein one or more of the occupied power connection ports are connected to one or more batteries.

14. The method according to claim 10, wherein one or more of the occupied power connection ports are connected to one or more power sources.

15. The method according to claim 10, wherein the power device condition model is based on empirically collected data on battery degradation of a defined battery cluster.

16. The method according to claim 10, wherein the predetermined number of bins includes bins discretized according to data from the power device condition model.

17. A product, comprising: A machine-readable medium other than a transient signal; and Instructions stored on the machine-readable medium, the instructions being configured to cause a processor, when executed, to: Obtain an indication of the count of the occupied power connection ports, where a power device condition model characterizes the expected condition of a power device cluster for occupying the power connection ports; Based on the count of the occupied power connection ports, determine the count of the thin-layer converters based on a predefined constraint that correlates the count of the occupied power connection ports with the count of the thin-layer converters, where the thin-layer converters are configured to process the power from the occupied power connection ports to bring the power mismatch within the range predicted via the power device condition model; Obtain a count of externally defined sparse-layer converters, where the sparse-layer converters are constrained to handle the power mismatch not considered for the thin-layer converters; For each of the occupied power connection ports, determine a device condition interval bin characterizing the condition of the occupied power connection port from a predetermined number of bins; Determine a lean layer interconnection configuration based on the count of the lean layer converters and the device condition bins of the occupied power connection ports; and Determine a sparse layer interconnection configuration based on the lean layer interconnection configuration and the count of the externally defined sparse layer converters.

18. The product according to claim 17, wherein the power device condition model is based on empirically collected data on battery degradation of a defined battery cluster.

19. The product according to claim 17, wherein the instructions are further configured to cause the processor to re-determine the device condition bins of each of the occupied power connection ports after a monitoring period, and obtain condition trajectory information of the power ports during the monitoring period.

20. The product according to claim 19, wherein the monitoring period is a predetermined duration based on a portion of the expected lifetime of a power node coupled to at least one of the occupied power connection ports.

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