Supply modulated transmitter with switching network

Abstract

The power supply modulator circuit includes: a multi-output power supply that generates a plurality of power output signals; at least one power modulator circuit that generates a modulated power output signal from a plurality of power output signals of the multi-output power supply; at least one pulse shaping network (PSN) having at least one passive element, the PSN configured to shape the modulated power output signal; at least one power amplifier coupled to receive the modulated power signal; and a switching network having a plurality of switches to create or modify a power signal path from the at least one power modulator circuit to the at least one power amplifier.

Description

Technical Field

[0001] The subject matter disclosed herein generally relates to radio frequency (RF) circuits, and more particularly to devices, systems, and techniques for use in operating supply modulation transmitters. Background Art

[0002] As is known in the art, a radio frequency (RF) transmitter is a device that generates an RF signal. The RF transmitter may be included, for example, as part of a radio communication system that uses electromagnetic waves (radio waves) to transmit information over a certain distance.

[0003] Also as is known, in an RF communication transmitter (e.g., such as an RF communication transmitter suitable for use in a mobile device such as a cellular phone), it is often necessary to make a trade-off between energy efficiency and linearity. Accordingly, it would be desirable to provide systems and techniques that allow a user to transmit data carrying an RF signal with both high efficiency and high linearity. Summary of the Invention

[0004] One general aspect includes a circuit that includes: a multi-output power supply that generates a plurality of output signals (e.g., a plurality of voltage signals that may be at one or more voltage levels); at least one power modulator circuit that generates a modulated output signal from the plurality of output signals of the multi-output power supply; at least one pulse shaping network (PSN) having at least one passive element, the PSN being configured to shape (i.e., filter or modify the trajectory of) the modulated output signal of the multi-output power supply; at least one RF amplifier (e.g., an RF power amplifier), the at least one RF amplifier being coupled to receive the modulated signal from the plurality of output supply generators; and a configuration switching network that has a plurality of switches to create or modify a signal path from at least one modulator circuit to at least one RF amplifier.

[0005] Implementations may include one or more of the following features. The multi-output power supply may include a boost converter. The switching network may include a network of switches having input terminals and output terminals. In an implementation, the network of switches (e.g., configuring the switching network) may include any switch configuration. In implementations where capacitive coupling (e.g., due to the parasitic capacitance of the switches) is a problem, configuring the switching network may include switches coupled in a T-configuration (also referred to herein as a T-arrangement or T-network). In implementations where capacitive coupling is not a problem, the T-network may be replaced by another switch configuration (i.e., a non-T-network switch configuration). In implementations using a T-network of switches, the T-network of switches may include: a first switch having a first terminal forming an input terminal of the T-network of switches and a second terminal coupled to a node; a second switch having a first terminal forming an output terminal of the T-network of switches and a second terminal coupled to the node; and a third switch having a first terminal coupled to the node and a second terminal coupled to a reference plane. The reference plane is a ground plane. The T-network of switches is coupled to the power modulator circuit in a cascade configuration to connect the modulated power output signal to at least one power amplifier or disconnect the modulated power output signal from at least one power amplifier. The T-network of switches is coupled across the PSN and is configured to selectively short-circuit the PSN. The T-network of switches is coupled across the passive elements of the PSN and is configured to change the transfer function of the PSN by selectively short-circuiting the passive elements. At least a first group of the plurality of switches is located on a first integrated circuit die, and at least a second group of the plurality of switches is located on a second integrated circuit die. The PSN may include a filter. Implementations of the described techniques may include hardware, a method or process, or computer software on a computer-accessible medium.

[0006] One general aspect includes a switching network having a plurality of switches. The switching network further includes: at least one input terminal coupled to receive a modulated power signal; at least one output terminal coupled to provide a modulated power to at least one power amplifier; and at least one T-network of switches coupled to create or modify a power signal path from the input terminal to the output terminal.

[0007] Implementations can include one or more of the following features. A switching network is coupled to a pulse shaping network (PSN) configured to shape a modulated power signal, the pulse shaping network having at least one electronic component (e.g., a passive component). A T-network of switches is coupled across the PSN and configured to selectively short-circuit the PSN. The T-network of switches is coupled across the electronic components of the PSN and configured to change the transfer function of the PSN by selectively short-circuiting the electronic components. The T-network of switches can include: a first switch having a first terminal forming an input terminal of the T-network of switches and a second terminal coupled to a node; a second switch having a first terminal forming an output terminal of the T-network of switches and a second terminal coupled to the node; and a third switch having a first terminal coupled to the node and a second terminal coupled to a reference plane. The reference plane is a ground plane. The T-network of switches is coupled to the modulated power signal in a cascaded configuration to connect the modulated power signal to the output terminal or disconnect the modulated power signal from the output terminal. Implementations of the described techniques can include hardware, methods or processes, or computer software on a computer-accessible medium. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The foregoing features can be more fully understood from the following description of the drawings, in which:

[0009] Figure 1 is a block diagram of an illustrative embodiment of a radio frequency (RF) transmitter that includes a power management circuit (PMC) having a single output and a multi-stage (or split) pulse shaping network (PSN);

[0010] Figure 2 is a block diagram of another illustrative embodiment of an RF transmitter that includes a single-output PMC with a multi-stage (or split) PSN coupled thereto;

[0011] Figure 3 is a block diagram of an illustrative RF transmitter of an alternative embodiment having a single-output PMC and a multi-stage PSN coupled to a plurality of RF amplifiers;

[0012] Figure 4 is a block diagram of an illustrative RF transmitter of an alternative embodiment having a multi-output PMC and a multi-stage PSN coupled to a plurality of RF amplifiers;

[0013] Figure 5 is a block diagram of an illustrative embodiment of a multi-stage PSN;

[0014] Figure 6 is a block diagram of an alternative embodiment of a multi-stage PSN;

[0015] Figure 7 is a block diagram of an alternative implementation of a multi - stage PSN;

[0016] Figure 8 is a schematic diagram of an illustrative filter circuit adapted for use with a multi - stage PSN having a branch with a shunt capacitor serially coupled to a resistive element between a filter terminal and a reference potential;

[0017] Figure 8A is a schematic diagram of an illustrative filter circuit adapted for use with a multi - stage PSN having a branch with a shunt capacitor serially coupled to an inductive element between a filter terminal and a reference potential;

[0018] Figure 8B is a schematic diagram of an illustrative filter circuit adapted for use with a multi - stage PSN having a parallel inductive path and a capacitive path coupled between filter terminals;

[0019] Figure 8C is a schematic diagram of an illustrative filter circuit adapted for use with a multi - stage PSN having a shunt capacitor serially coupled to a switch between a filter terminal and a reference potential;

[0020] Figure 8D is a schematic diagram of an illustrative filter circuit adapted for use with a multi - stage PSN having a shunt capacitor serially coupled to a switch between a filter terminal and a reference potential;

[0021] Figure 8E is a block diagram of an illustrative PSN;

[0022] Figure 9 is a block diagram of an illustrative integrated circuit (IC) having a split PSN;

[0023] Figure 9A is a block diagram of an illustrative IC having a split PSN;

[0024] Figure 10 is a block diagram of an illustrative hybrid circuit having a PMC coupled to a multi - stage PSN;

[0025] Figure 10A is a block diagram of an alternative illustrative hybrid circuit having a PMC coupled to a multi - stage PSN;

[0026] Figure 11 is a block diagram of an illustrative circuit having a PMC module and an RF amplifier module, wherein at least one of the modules includes at least a portion of a multi - stage PSN; and

[0027] Figure 11A Schematic of a part of an RF amplifier module that is part of a multi - stage PSN;

[0028] Figure 12A Block of a supply - modulated RF power amplifier circuit having at least one PSN;

[0029] Figure 12B Schematic of a supply - modulated RF power amplifier circuit;

[0030] Figure 13 Schematic of a switching network coupled to one or more supply modulators;

[0031] Figure 14 Schematic of a configurable filter network;

[0032] Figure 15 Schematic of a filter network that can be bypassed by a switched T - network;

[0033] Figure 16 Schematic of a modulated RF power circuit that includes one or more switched T - networks to isolate one or more power modulators;

[0034] Figure 17 Block diagram of a configurable power modulation circuit that supplies power to multiple power amplifiers; and

[0035] Figure 18 Block diagram of the physical configuration of an RF power modulation circuit that includes multiple integrated circuit dies. Detailed Description

[0036] Now referring to Figure 1 , an illustrative radio frequency (RF) transmit system 10 that can achieve both high efficiency and high linearity simultaneously includes a discrete supply modulation system 12 that supplies a bias voltage signal to a bias (or supply) terminal 23 of an RF amplifier 24.

[0037] The discrete supply modulation system 12 includes a controller 14 that includes control logic circuitry 16 (or more simply, control logic 16). The control logic 16 can receive or otherwise obtain transmit data to be transmitted over a wireless channel. The transmit data can be in any format (e.g., binary bit stream; I and Q data, etc.). Then, the control logic 16 can use this data and other possible factors to provide a signal to a digital - to - RF modulator 18, which receives the signal provided to it and generates a corresponding RF signal to be transmitted.

[0038] In some embodiments, the goal can be to generate an RF transmit signal that includes an accurate representation of the transmit data. Any number of different modulation and coding schemes (MCSs) can be used to represent the transmit data within the RF transmit signal. MCSs can include, for example, binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (e.g., QAM, 16QAM, 64QAM, 128QAM, etc.), orthogonal frequency division multiplexing (OFDM), and / or others. Some of these MCSs have a relatively high peak-to-average power ratio.

[0039] MCSs with a high peak-to-average power ratio typically require highly linear power amplification (e.g., via an RF power amplifier, such as Figure 1 the power amplifier 24 in

[0040] to provide an accurate representation of the transmit data. In the various embodiments described herein, transmit systems and techniques are described that are capable of providing efficient power amplification with sufficient linearity to support MCSs with a high peak-to-average power ratio and / or with strict error vector magnitude (EVM) requirements. Figure 1 As shown in

[0041] control logic 16 obtains the transmit data (e.g., I, Q data, where the I, Q data can be a stream of data to be transmitted from RF transmitter 10 (i.e., the transmit data)), and uses this data to provide input information to digital-to-RF modulator 18 and power management circuit 20. In one possible approach, control logic 16 can provide separate I and Q data to the digital-to-RF modulator. Then, the digital-to-RF modulator can use the I, Q information to modulate the RF carrier to generate a corresponding RF signal at the output of the digital-to-RF modulator. As is well known, I and Q data typically represent amplitude and phase. Thus, I and Q can have corresponding amplitudes A and phases θ, for example.

[0042] Regardless of the format of the data provided to the digital-to-RF modulator 18, the digital-to-RF modulator 18 provides an RF signal to the input terminal 24a of the RF amplifier 24. One of ordinary skill in the art will understand how to select the characteristics of the RF amplifier 24 to suit the needs of a particular application. In some applications (e.g., mobile handset applications), the RF amplifier 24 includes an RF power amplifier. The RF amplifier 24 receives the RF signal provided to it and provides an amplified version of the RF signal at its output terminal. For example, the output terminal of the RF amplifier 24 may be coupled to the input terminal of another RF circuit or an antenna.

[0043] As described above, the power management circuit (PMC) receives information (e.g., control signals) provided to it from the control logic 16 and, in response to that information, provides a variable supply bias voltage (i.e., a bias voltage signal) to the RF amplifier 24 (e.g., an RF power amplifier). In an embodiment, the variable supply bias voltage is provided in the form of pulses, where each pulse has one of a discrete number of voltage levels. That is, the PMC provides one of a plurality of discrete bias voltages to the bias terminal of the RF amplifier. Such discrete voltage supply levels provided by the PMC may be predetermined or may be adjusted over time based on the desired average transmit power level or other factors.

[0044] Transitions between pulses of different voltage levels (i.e., transitions from one voltage level to another) may result in unwanted frequency components in the varying supply bias voltage signal V(t) (i.e., the bias voltage signal). The variable supply bias voltage is provided to the bias (or supply) terminal 23 of the amplifier 24 via a multi-stage pulse shaping network (PSN) 22. The multi-stage PSN is used to filter out or otherwise remove unwanted frequency components in the bias voltage signal (i.e., the PSN filters or shapes the trajectory of the bias voltage signal). Thus, the filtered bias voltage signal is provided to the supply terminal 25 of the RF amplifier 24.

[0045] Also as described above, the PMC provides a variable supply bias voltage V(t) to the RF amplifier based on control signals from the control logic 16. The PMC may be configured to selectively supply one of a plurality of discrete voltages to the RF amplifier and may supply the discrete voltage to the RF amplifier via the PSN.

[0046] For reasons that will become apparent from the description provided below, a multi-stage PSN includes spaced-apart stages (i.e., physically spaced-apart stages), which may include, for example, lossless filter elements including inductors and capacitors, and may also include lossy elements such as resistors and beads. The multi-stage PSN is used to provide shaping and / or bandwidth limiting of voltage conversion between discrete voltage levels, and can provide damping of oscillations that might otherwise occur. In an embodiment, the multi-stage PSN can be selected to provide desired filter response characteristics.

[0047] Significantly, and as will also become apparent from the description provided below, the multi-stage PSN is physically divided into multiple stages. This approach allows the multi-stage PSN to provide a properly filtered bias signal to multiple amplifiers without reproducing the components of all PSN parts with each additional amplifier. A multi-stage PSN 22 is provided having desired stopband characteristics and rejection band frequency characteristics as well as desired passband frequency characteristics and rise time characteristics.

[0048] Such a multi-stage PSN arrangement is suitable for use with a transmit system in a mobile handheld terminal operating in accordance with fifth-generation (5G) communications and other connection protocols such as 802.11a / b / g / n / ac / ax / ad / ay. Such a multi-stage PSN arrangement is also suitable for use with 5G multiple-input multiple-output (MIMO), uplink carrier aggregation (ULCA), and beamforming systems.

[0049] Now referring Figure 2 , the RF transmit circuit 30 includes a PMC 20’ (which may be the same as or similar to the PMC 20 described above in connection Figure 1 with), the PMC 20’ having an input terminal configured to receive information (e.g., a control signal) provided thereto (e.g., from a controller such as the controller 14 described above in connection Figure 1 with), and in response to the information providing a variable supply bias voltage (e.g., a bias signal having one of a plurality of discrete different voltage levels at a particular point in time) to an RF amplifier 24’ having an RF input terminal 24a’, an RF output terminal 24b’, and a supply terminal 25’.

[0050] The variable supply bias voltage is provided to the amplifier 24’ by a multi-stage PSN 22’ that may be the same as or similar to the PSN 22 described above in connection Figure 1 with. In this illustrative embodiment, the multi-stage PSN 22’ includes a first PSN stage 32 (and designated “PSN-stage A” in Figure 2 ) and a second PSN stage 34 that is physically separated from PSN stage A (and designated “PSN-stage B” in Figure 2 ).

[0051] By physically partitioning the PSN 22’ into multiple levels, there is no need to reproduce the components of the first PSN level (i.e., Figure 2 level A in Figure 2 in level B) in the second PSN level. This approach creates the flexibility to place relatively large PSN components in the substrate areas of the substrate (e.g., printed circuit board (PCB)) that can better accommodate larger circuit structures. That is, the multi-level PSN method allows PSN components that require an area or volume amount (commonly referred to as space or substrate area) greater than that required by most other components that make up the PMC to physically be located in the areas of the PCB that can accommodate such components. Additionally, the multi-level PSN method allows the use of parasitic elements (e.g., parasitic inductance), which allows for the reduction in the size of circuit components (and ideally the elimination of circuit components). This results in space savings for the PSN provided by the multi-level PSN techniques described herein and also results in a cost reduction for the PSN.

[0052] Using this multi-level PSN method, the receive baseband (RxBN) and out-of-band emissions of a discrete supply modulator transmitter can be controlled while maintaining linearity and efficiency, while also accommodating an amplifier (e.g., RF PA) that is physically remote from the PMC on the IC or on the PCB or on any type of substrate in a cost-effective manner and that is suitable for a mobile device form factor.

[0053] In some embodiments, one or more RF amplifiers can be used to generate a transmit signal in an RF transmitter. For example, Figure 3 is a block diagram showing an RF transmitter including multiple power amplifiers according to an embodiment.

[0054] Now referring to Figure 3 , the PMC 36 has an input configured to receive information (e.g., control signals) provided to it (e.g., from a controller such as the controller 14 described above in connection with Figure 1 ), and in response to that information, provides a variable supply bias voltage to a plurality of RF amplifiers 42a through 42n based on control signals from the controller. In an embodiment, one or all of the RF amplifiers 42 can correspond to RF PAs.

[0055] The variable supply bias voltage is provided to the amplifiers 42a through 42N via the multi-level PSN 30. In this illustrative embodiment, the multi-level PSN 30 includes a first PSN level 38 (and designated as "PSN level A" in Figure 3 and a plurality of second PSN levels 40a through 40N (and designated as "PSN level B" in Figure 3 in i”). In this illustrative embodiment, the number of second PSN stages 40 matches the number of amplifiers 42 (i.e., there is a 1:1 correspondence between the number of second stages of the PSN and the number of amplifiers receiving the voltage supply signal through the PSN 30).

[0056] In this way, the RxBN and out-of-band emissions of the discrete supply modulation transmitter can be controlled while maintaining linearity and efficiency, while also accommodating multiple RF amplifiers 42 suitable for the form factor of mobile devices that are physically remote from the PMC in a cost-effective manner.

[0057] In addition, the characteristics of each second PSN stage 40 can be matched to the characteristics of the RF amplifier coupled to the PSN. Of course, it should be understood that in other embodiments, a single second PSN stage can be coupled to multiple RF amplifiers 40.

[0058] By physically partitioning the multi-stage PSN, there is no need to reproduce the components of the first PSN stage (i.e., stage A) for each amplifier. Thus, the multi-stage PSN serves multiple amplifiers 42a to 42N while only having multiple second stages. Since there is no need to repeat the entire PSN for each amplifier, this method saves substrate area on the PCB (or similarly, the size of the PCB required to accommodate the PMC, PSN, and amplifiers (and associated circuitry) can be reduced).

[0059] Thus, with this multi-stage PSN method, the receive baseband (RxBN) and out-of-band emissions of the discrete supply modulation transmitter can be controlled while maintaining linearity and efficiency, while also accommodating multiple RF amplifiers (e.g., RF Pa) suitable for the form factor of mobile devices that are physically remote from the PMC in a cost-effective manner.

[0060] Now referring to Figure 4 , a portion of the transmit circuit includes a PMC 44 that has an input terminal configured to receive a control signal (e.g., from a control logic circuit such as the control logic circuit 16 described above in connection with Figure 1 . The PMC 44 has a plurality of output terminals (i.e., the PMC 44 is a multi-output PMC). In this illustrative embodiment, for clarity of the text and the drawings, the PMC 44 is shown as a dual-output PMC. Of course, those of ordinary skill in the art will understand and recognize that the PMC 44 can have any number of output terminals, and the specific number of output terminals provided by the PMC 44 is selected based on various factors, including but not limited to the number of amplifiers receiving signals from the PMC 44 and the needs of a particular application.

[0061] In this illustrative embodiment, each output terminal 44a, 44b of the PMC 44 is coupled to a respective first PSN stage 46a, 46b. The output terminals of each first PSN stage 46a, 46b are coupled to corresponding second PSN stages among the second PSN stages 48a, 48b, 48c, 48d. The output terminals of the second PSN stages 48a to 48d are respectively coupled to the bias terminals of the RF amplifiers 50a, 50b, 52a, 52b.

[0062] Accordingly, Figure 4 A transmit circuit is shown that includes a plurality (here four) of RF amplifiers 50a, 50b, 52a, 52b and includes a PMC 44 that provides a variable supply bias voltage (e.g., in the case of supply modulation, a selected supply bias voltage among a plurality of supply bias voltages) to the bias terminals of the amplifiers 50a, 50b, 52a, 52b via a bias supply signal path that has respective multi-stage PSNs 45a, 45b coupled thereto. In this illustrative embodiment, the first PSN 45a includes a first PSN stage 46a (and is designated as "PSN stage A1" in Figure 4 and a plurality of second PSN stages 48a, 48b (and are designated as "PSN stage A1B1" and "PSN stage A1B2" in Figure 4 ). The second PSN 45b includes a first PSN stage 46b (and is designated as "PSN stage A2" in Figure 4 and a plurality of second PSN stages 48c, 48d (and are designated as "PSN stage A2B1" and "PSN stage A2B2" in Figure 4 ).

[0063] It should be understood that the electrical characteristics of the second PSN stages 48a, 48b are selected or configured to operate together with the electrical characteristics of the first PSN stage 46a and the electrical characteristics of the respective RF amplifier to which the second stage is coupled, while the electrical characteristics of the second PSN stages 48c, 48d are selected or configured to operate together with the electrical characteristics of the first PSN stage 46b and the electrical characteristics of the respective RF amplifier to which the second stage is coupled. Accordingly, although the characteristics of the first PSN stages A1, A2 may be different, and the characteristics of the second first PSN stages A1B1, A1B2, A2B1, A2B2 may be different, the first and second stages cooperate to provide appropriate and desired filtering to the variable supply bias voltage provided to the amplifiers 50a, 50b, 52a, 52b.

[0064] Typically, it is desirable to provide a PSN having at least one or, ideally, all of the following qualities / characteristics: a desired signal attenuation in the receive band (i.e., obtaining a desired attenuation from the input to the output at a desired offset frequency); a desired no-load voltage step response (i.e., obtaining a desired peak output voltage assuming the PSN is no-load (i.e., the PA is not biased) in response to a voltage step at the input); a desired loaded voltage step response: (i.e., obtaining a desired peak output voltage assuming the PSN is loaded (i.e., the PA is biased) in response to a voltage step at the input); a desired AC output impedance (i.e., obtaining a desired output voltage change in response to a changing AC load current at a desired frequency for a fixed input voltage); a desired DC output impedance: (i.e., obtaining a desired output voltage change in response to a DC load current for a fixed input voltage); and a desired maximum inrush current (i.e., obtaining the desired peak current that the PMIC must supply to the PSN during a voltage step). A PSN having other qualities / characteristics may also be desirable.

[0065] It should be understood that although in this illustrative embodiment only two first stages and four second stages are shown, in other embodiments, the PMC may be coupled to more than two first stages, and each first stage may be coupled to more than two second stages. Generally, the PMC may be arranged to have N output terminals (where N is an integer greater than or equal to 1), so the PMC may be coupled to at least up to N first PSN stages, and each of the N first PSN stages may be coupled to up to M second stages (where M is an integer greater than or equal to 1). Additionally, each of the second PSN stages may be coupled to P amplifiers (where P is an integer greater than or equal to 1).

[0066] Although in Figure 4 the illustrative embodiment described, the number of second PSN stages 48 matches the number of amplifiers 50 (i.e., there is a 1:1 correspondence between the number of PSN second stages and the number of amplifiers receiving the voltage supply signal through the PSN 30), in some embodiments, one or more of the second PSN stages may be coupled to more than one RF amplifier.

[0067] Now referring to Figure 5 , the combined multi-stage PSN 60 includes combined stages A and B. The stages include series and shunt impedances formed using resistors, inductors, capacitors, and / or beads and / or ferrite beads. Depending on system constraints, several different types of stages may be used alone or cascaded together to meet the requirements.

[0068] Now referring to Figure 6 , the multi-stage PSN 64 includes a first PSN stage 66 (and inFigure 6 is designated as “PSN level A”) and multiple similar second PSN levels 68a, 68b (wherein, in Figure 6 two levels are designated as “PSN level B”). In this illustrative embodiment, the second PSN levels 68a, 68b have the same or similar electrical characteristics and are configured to be coupled to RF amplifiers having similar electrical characteristics. Of course, in embodiments where the RF amplifiers are not well-matched (e.g., the electrical characteristics of RF amplifiers 50a, 50b are different from each other), then the electrical characteristics of the second PSN levels (e.g., PSN levels 68a, 68b) will also be different from each other in a manner that causes the desired performance of the corresponding RF amplifiers (e.g., Figure 4 RF amplifiers 50a, 50b in

[0069] Thus, in an embodiment, the selection of the electrical characteristics (and thus components) used to provide the PSN level depends on the electrical characteristics of the PA to which the second PSN level is coupled or the requirements regarding the frequency band in which the PA operates.

[0070] It should be understood that the PMC and the first PSN level (e.g., PSN level A) can be located at a considerable distance from the second PSN level (e.g., PSN level B) and from the RF amplifier (e.g., PA) that receives a variable supply bias voltage.

[0071] Now referring to Figure 7 , a portion of the transmit circuit 70 includes a first circuit corresponding to a power management circuit 72 that is configured as an integrated circuit (PMIC), and the integrated circuit (PMIC) has at least a portion of the first stage of a multi-stage PSN that is configured as a part thereof (i.e., at least a portion of the first PSN level is incorporated into the PMC circuit, for example, by using parasitic elements associated with the signal path that couples the PMC and / or the second PSN level to the PMC). Thus, at least a portion of the first stage of the multi-stage PSN (and ideally the entire first stage of the multi-stage PSN) is incorporated (or integrated) with at least a portion of the PMC.

[0072] The circuit portion 70 also includes a pair of second circuits 74a, 74b corresponding to RF amplifiers (which can be, for example, RF power amplifiers) having at least a portion of the second stage of a multi-stage PSN integrated therewith (i.e., at least a portion of the second PSN level is incorporated into each RF amplifier). As Figure 7 shown in

[0073] It should be noted that althoughFigure 7 Only two RF amplifiers are shown in the illustrative embodiments, but any number of RF amplifiers may be used. It should also be noted that the integrated PMC and PSN stage A may be located a significant distance from the integrated PSN stage B and the RF amplifiers. Thus, as shown and described, the inductive and capacitive parasitic characteristics (sometimes referred to as parasitic elements) caused by the interconnect structures between stage A and stage B (and the structures within the PMC and RF amplifiers) can be designed into the overall impedance characteristics and / or response characteristics of the PSN.

[0074] In Figure 7 the illustrative embodiments shown, the first and second stages of the PSN are absorbed into the respective PMC and RF amplifier circuitry (e.g., via the use of parasitic inductance and capacitance), and thus the filtering characteristics / functions performed by the PSN are also absorbed into the corresponding PMC and RF amplifier circuitry. Thus, the multi-stage PSN method described herein results in a modular solution for both the PMC and PA that can incorporate the PSN stages, thereby further reducing the materials required to fabricate the RF transmit circuitry as an IC.

[0075] Now referring to Figures 8 to 8E , a series of filter circuits suitable for use in the stages of a multi-stage PSN are shown. As will be described below in connection with Figure 8C , Figure 8D and Figure 8E , the PSN stages can be reconfigured with switches to adjust the electrical characteristics of the filters for different usage scenarios.

[0076] Now referring to Figure 8 , a passive filter circuit 80 having a first terminal 80a and a second terminal 80b includes an inductor L coupled in series (i.e., the inductor L is coupled in series between the terminals 80a, 80b of the filter circuit 80). A first terminal of a capacitor C is coupled to a first one of the first and second terminals of the inductor L, and a second terminal of the capacitor C is coupled to a first terminal of a resistor R. A second terminal of the resistor R is coupled to a reference potential (shown herein as ground). After reading the disclosure provided herein, those of ordinary skill in the art will also understand that the reference potential V REF can correspond to ground or some positive or negative potential at the top (e.g., any positive or negative voltage). The particular reference potential V REF to be used is selected to accommodate the needs of a particular application.

[0077] Now referring to Figure 8A, a passive filter circuit 82 having a first terminal 82a and a second terminal 82b includes an inductor L1 connected in series (i.e., the inductor L1 is connected in series between the terminals 82a, 82b of the filter circuit 82). A first terminal of a capacitor C1 is coupled to a first one of the first and second terminals of the inductor L1, and a second terminal of the capacitor C1 is coupled to a first terminal of a second inductor L2. A second terminal of the inductor L2 is coupled to a reference potential V REF .

[0078] Now referring to Figure 8B , a passive filter circuit 84 includes a pair of signal paths connected in parallel between a first filter terminal 84a and a second filter terminal 84b. A first parallel signal path in the parallel signal paths includes an inductor L3 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to the second filter terminal 84b. A second parallel signal path in the parallel signal paths includes a capacitor C2 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to a first terminal of a resistor R1. A second terminal of the resistor R1 is coupled to the second filter terminal 84b.

[0079] Now referring to Figure 8C , a reconfigurable filter circuit 89 having a first terminal 89a and a second terminal 89b includes an inductor L5 connected in series (i.e., the inductor L5 is connected in series between the terminals 89a, 89b of the filter circuit 89) and a shunt-connected capacitor C6. A first terminal of the capacitor C6 can be coupled to a first or second terminal of the inductor L5. A second terminal of the capacitor C6 is coupled to a reference potential V through a switch S3 REF . Thus, the reconfigurable filter circuit 89 includes at least one switchable signal path (i.e., a signal path including the switching element S3). In Figure 8D illustrative embodiments, the reconfigurable filter circuit 89 includes a single switch coupled between a terminal of the capacitor C6 and the reference potential V REF . Of course, those of ordinary skill in the art will understand that the positions of the capacitor C6 and the switch S3 can be reversed (i.e., a first terminal of the switch S3 can be coupled to a first or second terminal of the inductor L5, and a second terminal of the switch S3 can be coupled to a first terminal of the capacitor C6, while a second terminal of the capacitor C6 is coupled to the reference potential V REF ). After reading the disclosure provided herein, those of ordinary skill in the art will also understand that the reference potential V REF can correspond to ground or some positive or negative potential (e.g., any positive or negative voltage). The particular reference potential V REF to be used is selected to accommodate the needs of a particular application.

[0080] In an actual system, the switch can switch between its "on" state and "off" state on a time scale that is consistent with the time required to determine the load impedance characteristics and / or performance characteristics of an RF amplifier and / or the performance characteristics of an RF transmission system over a period of time (and thus, when compared to the switching speed of the switch, this time scale would be considered a relatively slow time scale). In an embodiment, the switch can switch between its "on" state and "off" state in response to any one or all of the following average characteristics: (1) load impedance characteristics; and / or (2) performance characteristics of the RF amplifier and / or (3) performance characteristics of the RF transmission system. In some embodiments, the switch can switch between its "on" state and "off" state in response to a substantially instantaneous impedance change (i.e., the switch state can change as fast as the impedance change can be recognized) rather than on a slower time scale (i.e., slower relative to an instantaneous time scale), such as in response to average characteristics.

[0081] Now referring to Figure 8D , a reconfigurable filter circuit 86 having a first terminal 86a and a second terminal 86b includes an inductor L4 coupled in series (i.e., the inductor L4 is coupled in series between the terminals 86a, 86b of the filter circuit 86). A first terminal of a resistor R2 is coupled to a first one of the first and second terminals of the inductor L4. A second terminal of the resistor R2 is coupled to a variable capacitance network 88 capable of providing a variable capacitance. The variable capacitance network 88 includes at least one switchable signal path (i.e., a switching path including switching elements). In Figure 8C an illustrative embodiment, the variable capacitance network includes three signal paths, two of which are switchable signal paths. The switchable signal paths (e.g., switchable elements S1, S2) can be switched according to any of the techniques described above in connection with Figure 8C .

[0082] Specifically, the network 88 includes one or more capacitors coupled between the resistor and a reference potential (here, the reference potential corresponds to ground) (wherein three capacitors are shown in this illustrative embodiment). At least one capacitor in the network 88 is coupled to a switch. The switch can be arranged (i.e., disposed on either side of the capacitor) such that the switch operates to make or break conduction between the resistor and the capacitor or between the capacitor and the reference potential V REF .

[0083] In this illustrative embodiment, a pair of switches S1, S2 are serially coupled between a respective one of capacitors C3, C5 and a reference potential. In response to the switches providing a low impedance signal path between the capacitor and the reference potential (i.e., in response to the switches being "closed"), the reconfigurable filter circuit 86 has a first filter characteristic. In response to the switches providing a high impedance signal path between the capacitor and the reference potential (i.e., in response to the switches being "open"), the reconfigurable filter circuit 86 has a different second filter characteristic.

[0084] Generally, each switchable signal path having two states (i.e., on and off) provides two different filter characteristics. Generally, for N switchable signal paths each having two states, 2 N different filter characteristics are possible.

[0085] If the impedance of an RF load coupled to the output of an RF amplifier (e.g., RF amplifier 24 described above in connection with Figure 1 description) changes or varies continuously, then the operating characteristics of the RF amplifier will also change (i.e., the varying load impedance affects the operation of the RF amplifier and thus affects the performance of the RF amplifier). By using a reconfigurable filter circuit, the filter and / or impedance characteristics of the reconfigurable filter circuit can be changed to achieve or maintain a desired performance (e.g., in response to varying RF load characteristics) through the RF amplifier.

[0086] As described above in connection with Figure 8C In a practical system, the switches can switch between their "on" state and "off" state on a time scale that is consistent with the time required to determine the load impedance characteristics and / or performance characteristics of the RF amplifier and / or the performance characteristics of the RF transmission system over a period of time (and thus, when compared to the switching speed of the switches, this time scale would be considered a relatively slow time scale). In an embodiment, the switches can switch between their "on" state and "off" state in response to any one or all of the following average characteristics: (1) the load impedance characteristics; and / or (2) the performance characteristics of the RF amplifier and / or (3) the performance characteristics of the RF transmission system. In some embodiments, the switches can switch between their "on" state and "off" state in response to a substantially instantaneous impedance change (i.e., the switch state can change as fast as the impedance change can be recognized) rather than on a slower time scale (i.e., slower relative to an instantaneous time scale), such as in response to average characteristics.

[0087] Although in Figure 8DIn an illustrative embodiment, network 88 includes three capacitors coupled in parallel, where one capacitor is directly coupled to a reference potential (here, shown as ground), and two capacitors are coupled to the reference potential (here, shown as ground) through switches. However, those of ordinary skill in the art will understand that a reconfigurable filter circuit 86 can be provided according to various other circuit implementations.

[0088] For example, and now referring to Figure 8E , a reconfigurable filter circuit 90 having a first terminal 90a and a second terminal 90b includes a plurality of impedance elements 92, 94, and the plurality of impedance elements 92, 94 have a plurality of switched impedance elements 95a to 95n coupled thereto. Each of the switched impedance elements 95a to 95n includes at least one impedance element 96, 100, 104, and the at least one impedance element 96, 100, 104 can include, for example, lossless elements including inductors and capacitors, and can also include lossy elements such as resistors and beads. The switched impedance elements 95a to 95n further include a switching element 98, 102, 106 capable of switching at least the corresponding impedance element among the impedance elements 96, 100, 104 in a manner that changes the impedance presented by the PSN stage, and the reconfigurable filter circuit 90 is part of the PSN stage.

[0089] It should be understood that, generally, at least one switching element is configured to selectively couple at least one reactance element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit. For example, in an embodiment, the positions of the reactance element and the switching element (e.g., Figure 8D the elements 96, 98 therein) can be reversed such that the switching element (e.g., switching element 98) has a first terminal coupled to one of the first and second filter terminals and a second terminal coupled to the first terminal of the reactance element (e.g., reactance element 96). The second terminal of the reactance element (e.g., reactance element 96) is coupled to the reference potential. Examples of such a configuration are shown in Figure 10 and Figure 10A .

[0090] It should also be understood that by placing switches in each of two or more signal paths, one of a plurality of different filtering characteristics can be provided over a predetermined RF frequency band. The switches can be operated independently to provide the desired filter characteristics. For example, in the case of having N switchable signal paths (where N is an integer greater than or equal to 1), the reconfigurable filter circuit is capable of providing up to 2 N different filter characteristics.

[0091] In an embodiment, at least one of at least two or more signal paths includes a switching element having a first terminal coupled to one of a first and a second terminal of a reconfigurable filter circuit and a second terminal coupled to a first terminal of one of the reactive elements.

[0092] By providing a switching element coupled between one of the terminals of the reconfigurable filter circuit and the reactive element, the impedance characteristics of the reactive element can be switched into and out of the filter circuit (thereby rendering the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position where the switch provides a low impedance signal path between the reactive element and one of the terminals of the reconfigurable filter circuit), a reconfigurable filter circuit having a first filter characteristic is provided, and by placing the switch in a different second switch position (e.g., an open position where the switch provides a high impedance signal path between the reactive element and one of the terminals of the reconfigurable filter circuit), a reconfigurable filter circuit having different second filter characteristics within a desired frequency band is provided.

[0093] In an embodiment, a second terminal of one of the reactive elements is coupled to a reference potential V REF (which may be, for example, ground).

[0094] Now referring to Figure 9 , a multi-input multi-output (MIMO) transmit circuit 110 implemented as an integrated circuit (i.e., a monolithic integrated circuit) includes a pair of RF power amplifiers 114a, 114b having RF input terminals to which RF signals are provided via signal paths 112a, 112b. The transmit circuit 110 also includes a PMC 116 (which may be functionally the same or similar to any of the PMCs described above) having an input terminal configured to receive information (e.g., a control signal) provided thereto (e.g., from a controller such as the controller 14 described above in connection with Figure 1 . In response to such a control signal, the PMC is configured to provide a variable supply bias voltage signal via a first stage 118 of a PSN. The first PSN stage 118 (e.g., via a filtering or partial filtering operation) appropriately processes the signal and provides the appropriately processed supply bias voltage signal along signal paths 120a, 120b to respective second PSN stages 122a, 22b of a second PSN. The second PSN stages 122a, 122b also (e.g., via a filtering or partial filtering operation) process the signals provided thereto and provide the appropriately processed (e.g., appropriately filtered) supply bias voltage signals to supply terminals of respective ones of the RF amplifiers 114a, 114b.

[0095] As described above, corresponding RF amplifiers 114a, 114b receive RF signals along corresponding RF signal paths 112a, 112b, amplify the signals, and provide the amplified RF signals to corresponding ones of antennas 115a, 115b through which RF transmit signals are transmitted.

[0096] It should be noted that the PMC 116 and the PSN stage A 118 are located at a relatively large distance from the PSN stages B 122a, 122b and the associated PAs 114a, 114b. In Figure 9 the illustrative embodiment, the PMC 116 and the stage A 118 are located at one end of the IC 110, while the stages B 122a, 122b and the associated PAs 114a, 114b are located substantially at the opposite end of the IC 110.

[0097] As described above, by physically partitioning the PSN into multiple stages (here, two stages including the first stage 118 and the second stages 122a, 122b), there is no need to reproduce the components of the first PSN stage (i.e., stage A). This approach reduces the amount of PSN required to be accommodated on the IC and provides the flexibility to place relatively large PSN components (i.e., PSN components that require a relatively large amount of substrate area on an integrated circuit (IC)) in an IC region that can better accommodate larger circuit structures.

[0098] In addition, with this multi-stage PSN approach, the receive baseband (RxBN) and out-of-band emissions of a discrete supply modulator transmitter can be controlled while maintaining linearity and efficiency, while also accommodating multiple RF amplifiers (e.g., multiple RF PAs), which are physically far from the PMC on the IC in a cost-effective manner and which are suitable for a mobile device form factor.

[0099] It should be understood that although the Figure 9 embodiment is shown here as an integrated circuit, a circuit can also be implemented using a hybrid of discrete circuit elements and integrated circuits (i.e., a combination of discrete circuit elements and integrated circuits). Examples of such embodiments are described below in connection with Figures 10 to 11

[0100] Now referring to Figure 9A in Figure 9A there are provided Figure 9 ​Similar components, the transmit circuit 110' of the integrated circuit includes curved signal paths 120a', 120b'. In some embodiments, it may be desirable or even necessary (e.g., due to circuit layout constraints or other factors) to include relatively long signal paths having curves or other non-linear shapes. Signal paths having lengths that give rise to parasitic inductance and / or capacitance and / or resistance (sometimes abbreviated as "parasitic effects") are sometimes referred to as "long" signal paths. In particular, long signal paths having curves or other shapes may give rise to parasitic inductance and / or capacitance and / or resistance. When long signal paths are present, the effects of such parasitic effects may be further increased or enhanced, and when long curved signal paths are present, the effects of such parasitic effects are even further increased.

[0101] As described above, the PMC 116 and stage A 118 are located at a relatively far distance from stage B 122a', 122b' and the associated PAs 114a, 114b. In Figure 9A the illustrative embodiment, the PMC 116 and stage A 118 are located at one end of the IC 110', while stage B 122a', 122b' and the associated PAs 114a', 114b' are substantially located at the opposite end of the IC 110. Thus, the lengths of the signal paths 122a', 122b' are significant, and due to the shape and / or physical length of the signal path between the first PSN stage and the second PSN stage, parasitic effects may occur. As described above, such parasitic inductance and / or capacitance can be used in the design of PSN stages such as the first PSN stage and / or the second PSN stage.

[0102] Thus, in this embodiment, the impedance characteristics of the first PSN stage 118 and / or the second PSN stages 122a', 122b' may include parasitic effects arising from one or both of the signal paths 122a', 122b'.

[0103] Now referring to Figure 10 , the substrate 130 has a PMC 132 disposed thereon, which PMC 132 may be the same as or similar to any of the PMCs described above. In an embodiment, the substrate may be provided as a printed circuit board (PCB) provided by any suitable single-layer or multi-layer dielectric material (e.g., a glass fiber-reinforced epoxy-based material or a low-temperature or low-temperature co-fired ceramic (LTCC) material, wherein conductive layers are disposed within the material or on the exposed surfaces of the material).

[0104] In Figure 10In an illustrative embodiment, the PMC is implemented as an integrated circuit disposed within an IC package, which can be, for example, a lead frame package, a substrate package, a wafer level package, or any other type of IC package known to those of ordinary skill in the art.

[0105] The PMC includes an input terminal 132a that is coupled to an input signal path 134 disposed on a PCB (e.g., using an additive or subtractive process, such as etching the signal path in a manner commonly known, or otherwise disposing the signal path as part of the PCB). The PMC input terminal 132a is configured to receive a control signal from a controller (such as the controller 14 described above in connection with Figure 1 ). The PMC 132 also includes an output terminal 132b that is coupled to a supply bias voltage signal path 136. The signal path 136 can be etched using any additive or subtractive process known to those of ordinary skill in the art or otherwise disposed as part of the PCB. As discussed above, a supply bias voltage is provided at the PMC output terminal 132b.

[0106] The first stage 138a of the PSN 138 is coupled to a supply voltage signal path. The first PSN stage can be implemented using discrete components that are electrically coupled to each other and to the supply voltage signal path. The second stage of the PSN is coupled to the supply voltage signal path. The second PSN stage can be implemented using discrete components that are electrically coupled to each other and to the supply voltage signal path. Thus, Figure 10 the circuit representation can include a hybrid circuit implementation of both integrated circuits (e.g., the PMC and the RF amplifier) and discrete components (e.g., the first and second PSN stages).

[0107] In an embodiment, the first PSN stage is physically close to the PMC. In an embodiment (and as shown and described in connection with Figure 11 ), the first PSN stage can be included as part of a PMC module (e.g., a single package including the PMC and the first stage of the PSN, regardless of how the PMC or the first PSN stage is implemented). In this illustrative embodiment, the first PSN stage 138a includes a reconfigurable filter circuit 139 that operates in a manner similar to the reconfigurable filter circuit 88 described above in connection with Figure 8C .

[0108] In an embodiment, the second PSN stage is physically close to the amplifier bias terminal. In an embodiment (and as Figure 11As shown in (), the second PSN stage may be included as part of an amplifier module (e.g., a single package including an RF amplifier and a second-stage PSN). Although the first PSN stage 138a includes active components (i.e., switches), the second PSN stage includes only passive components and is implemented as the circuit 80 described above in connection with Figure 8 described.

[0109] The supply voltage signal path 136 is coupled to the supply terminal 140a (or bias terminal) of the RF amplifier 140 disposed on the PCB. Thus, the supply voltage signal is provided from the PMC to the RF amplifier bias terminal through the supply voltage signal path 136.

[0110] The RF amplifier has: an RF input terminal 141a, which is coupled to the RF input signal path 142 disposed on the PCB; and an RF output terminal, which is coupled to the RF output signal path 144 disposed on the PCB. The RF amplifier may be the same as or similar to any of the RF amplifiers described above.

[0111] Now referring to Figure 10A this Figure 10A in which, similar elements with similar reference numerals are provided. In this illustrative embodiment, the first PSN stage 138a' includes all passive components, while the second PSN stage 138b' includes active components (i.e., switches). Figure 10

[0112] It should also be understood that in some applications, it may be desirable to provide both a first PSN stage and a second PSN stage with all passive components. In other applications, it may be desirable to provide both a first PSN stage and a second PSN stage with at least one active component (e.g., at least one switchable element such as a switch including a transistor or a diode).

[0113] Figure 11 Now referring to Figures 9 to 10A this the substrate 150 (which may be any of the types described above in connection with

[0114] described) has a PMC module 152 disposed thereon. The PMC module 152 includes a PMC and a first PSN stage (i.e., the PMC module is a single package including at least a part of the PMC and the first PSN stage, regardless of how the PMC or the first PSN stage is implemented). In an embodiment, one or both of the PMC and the first PSN stage or a part of any of the PMC and the first PSN stage may be implemented as an integrated circuit, or discrete components (i.e., discrete circuit components) may be used.The PMC module 152 includes an input terminal 152a that is coupled to an input signal path 154 disposed on the PCB (e.g., using an additive or subtractive process as is commonly known to etch the signal path or otherwise dispose the signal path as part of the PCB) and is configured to receive a control signal from a controller (such as the controller 14 described above in connection with Figure 1 . The PMC module also includes an output terminal 152b that is coupled to a supply voltage signal path 156 (e.g., using an additive or subtractive process as is commonly known to etch the signal path or otherwise dispose the signal path as part of the PCB) and provides a supply bias voltage at the output terminal 152b as discussed above.

[0115] Also disposed on the substrate is an RF amplifier module 158 that includes an RF amplifier and a portion of a second PSN stage (i.e., a single package that includes an RF amplifier and at least a portion of a second PSN stage, regardless of how the RF amplifier or the second PSN stage is implemented).

[0116] In Figure 11 illustrative embodiments, a first portion 159 of the second PSN stage includes a capacitor 160 and an inductor 161 serially coupled between a supply voltage signal path 156 and a reference potential (shown here as ground). The second PSN stage portion 159 is coupled near a bias terminal 158a of the RF amplifier module 158. A second portion of the second PSN stage is provided as part of the RF amplifier module and is thus not visible in Figure 11 .

[0117] It should be understood that in embodiments, the entire second PSN stage can be provided as part of a switch module. In embodiments, one or both of the RF amplifier and the second PSN stage (including all or part of the second PSN stage) can be implemented as an integrated circuit or can be implemented using discrete components (i.e., discrete circuit components).

[0118] As can be more clearly understood from Figure 11A , in embodiments, the RF amplifier module 158’ includes a switch that, together with a capacitor 165 and a resistor 167, forms a switchable signal path portion of a second PSN stage 159’. Thus, in this embodiment, the second PSN stage 159’ includes: a capacitor 160’; and a switchable signal path portion that includes a capacitor 165, a resistor 167, and a switch 163, and a portion of the second PSN stage is implemented as a switch module (i.e., is implemented as part of a switch module).

[0119] Accordingly, it should also be understood that similar methods can be used with the first PSN stage. That is, in embodiments where the first PSN stage includes switches, all of some of the one or more switches can be implemented as PMC modules (i.e., implemented as part of a PMC module).

[0120] It should also be understood that a supply voltage signal path (e.g., Figure 10 , Figure 10A path 136 in Figure 11 or path 156 in

[0121] Now referring to Figure 12A , the power management circuit (PMC) 1200 includes at least one multi-output supply generator (sometimes also simply referred to as a "multi-output power supply") 1204 having a plurality of output terminals 1206, at which one or more output signals (e.g., one or more voltage signals, or more simply, one or more voltages) are provided. The PMC 1200 also includes one or more supply modulators 1208a to 1208n, the one or more supply modulators 1208a to 1208n having input terminals configured to receive multi-output supply generator output signals (e.g., voltage signals or more simply, voltages). One or more PSNs 1202 can be coupled to the PMC 1200. In an embodiment, the PSN filters or modifies the traces of the signals provided to it and can be set as part of the PMC. In an embodiment, the PSN can include a filter network (i.e., a set of circuit components coupled to provide a filter function).

[0122] As described above, the PMC 1200 can include a multi-output supply generator 1204 having a plurality of output terminals 1206, at which voltages V1 to V m can be provided. The voltages V1 to V m can all be different, or some or all of the voltages can be the same.

[0123] The supply generator output terminals 1206 can be coupled to one or more supply modulators 1208a to 1208n. As Figure 12A shows, each of the supply modulators 1208a to 1208n receives voltages V1 to V mOne or more of. In an embodiment, the supply modulators 1208a to 1208n do not need to be coupled to each of the output terminals 1206. Instead, the supply modulators may be coupled to all or some of the output terminals 1206. Thus, the supply modulators 1208a to 1208n may receive one, some, or all of the voltages V1 to V m .

[0124] In an embodiment, the supply modulator 1208 may modulate the input voltages V1 to V provided thereto m , and generate an output voltage signal V x , as described above, the output voltage signal V x may be a switched voltage signal that includes variations and pulses in its voltage levels. The PSNs 1202a to 1202n receive the corresponding output voltage signals Vx provided thereto, and may apply filtering techniques or other pulse shaping techniques to the output voltage signals Vx to generate the corresponding supply voltage signals V SUPPLY . The supply voltage signals are provided to the RF power amplifiers among the RF power amplifiers 1210a to 1210n.

[0125] In different configurations, the PMC 1200 may supply power to multiple power amplifiers. That is, in this exemplary embodiment, the PMC 1200 is configured as a multi-output PMC. In Figure 12A the exemplary embodiment of, there is a second power amplifier 1210n that receives power from the PMC 1200. Thus, the PMC 1200 includes a second supply modulator 1208n and a second PCN1202n, and the second supply modulator 1208n and the second PCN 1202n are coupled to generate a voltage signal V’ that supplies power to the RF power amplifier 1210n SUPPLY .

[0126] Although Figure 1 only one multi-output power supply generator is shown, in an embodiment, the system may include multiple multi-output power supplies. Further, in an embodiment, in at least some of the multiple modulator circuits, one or more of the modulator circuits 1208a to 1208n may have an input terminal coupled to a corresponding multi-output power supply among the multiple multi-output power supplies, and a switching network is configured to selectively couple any one of the multiple modulator circuits 1208a to 1208n (e.g., one or more of the multiple modulator circuits 1208a to 1208n) to a bias terminal of one or more of the multiple RF amplifiers 1210a to 121. Thus, in an embodiment, one, some, or each supply modulator may be coupled to its own multi-output power supply.

[0127] Figure 12B is a circuit diagram of an exemplary PMC 1250, which can be functionally identical or similar to the PMC 1200 described above in combination Figure 12A The PMC 1250 includes a multi-output supply generator 1252 coupled to a supply modulator 1254. In this exemplary embodiment, the supply generator provides supply voltages V1, V2, and V3 to the supply modulator 1254. However, in general, the supply generator can provide any number of voltages to meet the needs of a particular application.

[0128] In this configuration, the multi-output supply generator 1252 functions as a boost converter that generates multiple outputs (e.g., at different voltage levels V1, V2, V3) from a voltage supply 1258. It includes one or more inductors L, one or more capacitors C1, C2, and C3, and one or more switches S1, S2, and S3 for charging the capacitors. A first terminal of the inductor L is coupled to the voltage supply 1258, and a second terminal of the inductor L is selectively coupled to a reference potential (e.g., for drawing current through the inductor L). In this exemplary embodiment, switch S0 can be opened / closed to selectively couple the inductor L to the reference potential (shown here as ground) to draw current through the inductor L. Then, a controller (not shown) opens S0 and selectively closes switches S1, S2, and S3 such that the current through L charges capacitors C1, C2, and C3 to the desired voltage levels. In other embodiments, instead of Figure 12B the boost circuit shown in Figure 12B or in addition to

[0129] It should be understood that although in this exemplary embodiment the reference potential is ground, in other embodiments, other reference potentials can be used to draw current through the inductor L. For example, the switches can be opened / closed such that switch S1 or S2 establishes a reference potential for drawing current through the inductor L.

[0130] In the Figure 12B example, the supply modulator 1254 includes a plurality of switches that are coupled or otherwise configured to operate as a multiplexer. A controller (not shown) selectively closes one of switches S m1 , S m2 or S m3 wherein the switches S m1 , S m2 or S m3One couples corresponding voltages V1, V2, V3 to node 1255, at which a voltage signal V is provided x .

[0131] As is known in the art, a sudden switching of a voltage signal may introduce undesired signal elements such as ringing, voltage peaks above or below an operating threshold, etc. These signal elements typically occur at frequencies above the modulation or switching frequency. Thus, in this example, PSN 1256 includes circuit elements arranged to act as a filter. In this exemplary embodiment, a PSN having low-pass filter characteristics is provided. In other embodiments, a PSN 1256 having other or additional filter characteristics (e.g., band-pass, high-pass, notch, or other filter characteristics) may be provided. In Figure 12B the example of, PSN1256 includes an LC low-pass filter configured to: remove high-frequency content from the switched voltage signal V x and smooth the edges of the switched voltage signal V x . The output V SUPPLY of the low-pass filter is coupled to RF power amplifier 1258, e.g., to the supply terminal of PA1258. In this way, PA1258 receives a modulated voltage at its supply terminal.

[0132] Now referring to Figure 13 , switch network 1300 has one or more input terminals, each of which may be coupled to one or more supply modulators, where, in Figure 13 the exemplary embodiment of, two supply modulators 1311a, 1311b are shown. In some implementations, switch network 1300 may be coupled to supply modulators 1311a, 1311b in a cascade configuration. In this exemplary embodiment, switch network 1300 includes two input terminals 1301a, 1301b that are coupled to the output terminals of corresponding supply modulators among supply modulators 1311a, 1311b. Supply modulators (A and B) supply modulated voltage signals V SMA and V SMB to switch network 1300 as inputs. Switch network 1300 includes a first plurality of output terminals 1302a to 1302N, each of which may be coupled to a second plurality of RF amplifiers ( Figure 13one or more of which are not shown in the figure). In an embodiment, the number of switch network output terminals may be the same as the number of RF amplifiers, such that there is a one-to-one correspondence between the number of switch network output terminals and the number of RF amplifiers. In this case, each RF amplifier may be coupled to a corresponding one of the switch network output terminals 1302a to 1302N. In Figure 13 an exemplary embodiment, the switch network 1300 is shown as being provided with N output terminals 1302a to 1302N (where N is any integer greater than 1), at which voltages V O1 , V O2 , V O3 , V O4 , V O5 , V ON can be provided. The switch network output terminals may be coupled to one or more bias terminals (e.g., supply terminals) of one or more RF power amplifiers, and thus the output voltages V O1 , V O2 , V O3 , V O4 , V O5 , V ON can be coupled to the bias terminals of one or more RF power amplifiers. In some embodiments, N may be equal to 2 (thus providing output voltages V O1 , V O2 ). In some embodiments, N may be equal to 4 (thus providing output voltages V O1 , V O2 , V O3 , V O4 ). In some embodiments, N may be equal to 6 (thus providing output voltages V O1 , V O2 , V O3 , V O4 , V O5 , V O6 ). In some embodiments, N may be equal to 8 (thus providing voltages V O1 , V O2 , V O3 , V O4 , V O5 , V O6 , V O7 , V O8 ). In some embodiments, N may be equal to 10 (thus providing voltages V O1 , V O2 , V O3 , V O4 , V O5 , V O6 , VO7 , V O8 , V O9 , V 10 ).

[0133] For example, in one embodiment, two or more output ports may be coupled to provide an output signal. In some cases, all N output signals (V O1 , V O2 , V O3 , V O4 , V O5 , V ON ) may be coupled to the bias terminals (e.g., supply terminals) of a single RF power amplifier. In other embodiments, one or more or each output signal V O1 , V O2 , V O3 , V O4 , V O5 , V ON may be coupled to its own respective RF power amplifier (i.e., the bias terminals of the respective RF amplifier). And in other embodiments, one or more output amplifiers may be coupled to a single output terminal of the switch network 1300, while other RF output amplifiers may be coupled to two or more output signals of the switch network 1300.

[0134] The switches S1 to S of the switch network 1300 11 may be coupled to a controller (not shown), which may open and close the switches S1 to S 11 to control the output signals V O1 , V O2 , V O3 , V O4 , V O5 , V ON . In this way, the switch network 1300 may be coupled across one or more PSNs (and in some cases, configured to provide a signal path that bypasses one or more of the PSNs). For example, when switch S1 is closed, the modulated voltage signal V SMA is coupled to the output terminal 1302a, where the voltage V O1 is provided. When switch S1 is open and switches S2 and S3 are closed, the modulated voltage signal V SMA is coupled to the output terminal 1302a through the PSN 1303 (also referred to as the filter network 1303). And when switches S1 and S3 are open, the output signal V O1 at the output terminal 1302a is not connected to the voltage signal V SMA, and can be floating or connected to some other potential, such as ground, via circuitry not shown. Thus, switches S1, S2, and S3 can be used to adaptively (or dynamically) enable or disable in real time for the output signal V O1 (Filtering performed by filter network 1303). It should be understood that filter circuit 1302 can be arranged in various different circuit configurations to provide filter characteristics selected to meet the needs of a particular application. Taking filter network (PSN) 1303 as an example to illustrate filter networks 1304 to 1310, filter network 1303 includes one or more electronic components. In Figure 13 the example of, filter network 1303 includes four electronic components, and the four electronic components are passive circuit elements (sometimes also referred to herein as "passive components"). Filter networks 1303 to 1310 can of course include any number of passive circuit elements or active circuit elements selected to meet the needs of a particular application. After reading the disclosure provided herein, those of ordinary skill in the art will understand how to design one or more filter networks to meet the needs of a particular application.

[0135] Whether to connect a given PSN (e.g., one or more of filter networks 1303 to 1310) between a supply modulator (e.g., one or more of modulators 1311a, 1311b) and an output terminal (e.g., one of output terminals 1302a to 1302N) can depend on various factors, including but not limited to: the rf band in which the RF signal at the RF input terminal of the power amplifier is located; the bandwidth of the RF signal at the RF input terminal of the power amplifier; the peak-to-average ratio of the RF signal at the RF input terminal of the power amplifier; the power level of the RF signal at the RF input terminal of the power amplifier; other aspects or characteristics of the RF signal to be provided to the RF input terminal of the PA; the supply modulation mode used (e.g., digital envelope tracking vs. average power tracking vs. fixed supply); and / or characteristics of the operating or application scenario (e.g., observed noise or amplifier behavior) and other factors.

[0136] Similarly, when switch S4 is closed, the modulated voltage signal V SMA is coupled to output terminal 1302b via filter network 1304, and voltage V O2 is provided at this output terminal 1302b. When switch S5 is closed, the modulated voltage signal V SMA is coupled to output terminal 1302c via filter network 1306. And when switch S6 is closed, the modulated voltage signal V SMB is coupled to output terminal 1302c via filter network 1306. Thus, switches S5 and S6 can be used to select which modulated voltage signal V to coupleSMA or V SMB (or in parallel therewith) to provide an output signal at output terminal 1302c.

[0137] When switch S7 is closed, the modulated voltage signal V SMB is coupled through filter network 1308 to a provided terminal 1302d. It should be understood that one, some, or all of filters 1303 to 1310 may be provided as reconfigurable filters. For example, filter 1308 includes switch S8. Switch S8 is configured to change the filtering parameters (or characteristics) of filter network 1308. In this case, closing switch S8 creates a short circuit signal path across inductor L8, thereby effectively removing inductor L8 from filter 1308, which will affect the transfer function of filter network 1308. In this way, the filter characteristics of filter 1308 can be changed (e.g., adaptively changed or "on-the-fly" or in real time) to accommodate the needs of a particular application or operating scenario. For example, it may be desirable to dynamically adjust the filter characteristics based on the rf band in which the signal will be transmitted by a power amplifier, the bandwidth of the signal to be transmitted, the peak-to-average ratio, the power level, or other aspects, and by the mode of supply modulation being used (e.g., digital envelope tracking vs. adaptive power tracking vs. fixed supply), or by the characteristics of the operating or application scenario (e.g., observed noise or amplifier behavior), and other factors.

[0138] Switch S9 can be switched between an open state and a closed state to selectively couple the modulated voltage signal V SMB through filter 1310 to node 1312. Switch S 10 、S 11 can be switched between an open state and a closed state to couple node 1312 to either or both of output terminals 1302 N-1 、1302 N to provide the corresponding voltage of V N-1 、1302 N at output terminals 1302 N-1 、V N at the respective output terminals. When switches S9 and S 10 are closed, the modulated voltage signal V SMB is coupled through filter network 1310 to output terminal 1302N-1, where voltage V O N-1 is provided. Similarly, when switches S9 and S 11 are closed, the modulated voltage signal V SMB is coupled through filter network 1310 to node 1312, where voltage V N-1When all three switches S9, S 10 and S 11 are closed, the modulated voltage signal V SMB is coupled through the filter network 1310 to the two output terminals 1302 N-1 and 1302 N .

[0139] As an example, the signal paths created by switches S1 to S Figure 13 are provided in 11 . Those skilled in the art will recognize that other configurations of the signal paths, as well as filtering parameters and characteristics, are possible by varying the number, arrangement, and control of the switches in the switch network 1300. For example, switches S1 to S11 can be operated or controlled (i.e., placed in an open or closed state) such that any one of the modulated voltage signals V SMA , V SMB can be coupled to any one of the terminals 1302a to 1302N. Generally, the switches within the switch network 1300 can be configured to: route the modulator outputs supplied on one or more die to one or more power amplifier supply terminals; adjust the filtering of the supplied modulator outputs (e.g., to provide a reconfigurable pulse shaping network); reconfigure how different (possibly spatially separated) filter stages are utilized when connecting one or more modulator outputs to one or more RF amplifiers via one or more filter stages; and turn off the switches such that the supplied modulator outputs can be disconnected from the power amplifiers and / or filters, or perform other tasks of modifying and / or controlling the output signals that supply power to the RF power amplifiers.

[0140] A particular way of implementing the switching network 1300 may depend on the power level, voltage level, and application space of the system (e.g., RF amplifier system) using the switching network. For some mobile device applications (e.g., cellular phones, smartphones, tablet computers with cellular communication capabilities), it may be desirable to monolithically integrate both the electronic components (e.g., circuit components) of the supply generator and the supply modulator, the switching elements, and parts of the auxiliary circuits on a single semiconductor die (e.g., in a CMOS process or a BCD process) or an IC. In some cases, it may be desirable to integrate electronic devices such as the modulator and the switching network 1300 with a power amplifier on a single die. Additionally, in some cases, it may be advantageous to package some of the modulator, switching, and filter components in a single module and locate other filter components and RF amplifiers in physically separate locations. In other applications, it may be advantageous to package the modulator and some of the switches on a first die and package additional switches on at least one additional die placed at a relative distance from the first die. The second die may also include one or more power amplifiers or be located physically close to a power amplifier, e.g., in a module or co-located on a circuit board. In these latter cases, the switches on the first die may be used for some of the functions described above and may be placed close to one or more first filter stages, while the second die may also implement some of the functions described above and may be placed closer to one or more second filter stages. Communication lines may also be provided between the first die and the second die (or between the controller and the second die) to allow for configuration changes.

[0141] Now referring to Figure 14 , the configurable filter network 1400 has: an input terminal 1400b configured to receive a signal; and an output terminal 1400b at which a filtered output signal may be provided. The filter network 1400 includes a switching network 1402 that includes one or more switches that can be operated (i.e., changed between its closed (or "on") state and its open (or "off") state) to change the filter characteristics of the configurable filter network. Thus, the switching network 1402 can operate in two states: (a) a first (or on) state in which the configurable filter network 1400 has a first filter characteristic; and (b) a second (or off) state in which the configurable filter network 1400 has a different second filter characteristic.

[0142] In this example embodiment, the configurable filter network 1400 has: a pair of capacitors C A1 , C A2 , the pair of capacitors CA1 and C A2 can represent the parasitic output capacitance of switches S A1 and S A2 ; and a pair of inductors L0, L1 A1 ; and a switch network 1402 that includes three switches S A1 、S A2 and S B . When switches S A1 and S A2 are off and switch S B is on, capacitors C A1 and C A2 form a pi network with inductor L1 A2 . In some implementations, capacitors C A1 and C A2 provide a relatively low capacitance across inductor L1 A2 . Switches S A1 、S A2 and S B are arranged within circuit 1400 such that when switches S A1 and S A2 are closed, there is a signal path with low impedance characteristics (and ideally short - circuit impedance characteristics) between terminals 1402a, 1402b (and thus across terminals 1407a, 1407b of inductor L1 A2 ). Thus, this signal path bypasses inductor L1 A2 . This change in the circuit configuration (i.e., adding a circuit path that removes (in an electrical sense) inductor L1 A2 from filter network 1400) changes the transfer function of the filter network by effectively removing inductor L1 A2 from the filter network (i.e., inductor L1 A2 does not contribute to the characteristics of filter 1400).

[0143] Conversely, when switches S A1 and S A2 are open, there is a signal path with high impedance characteristics (and ideally open - circuit impedance characteristics) between terminals 1402a, 1402b (and thus across inductor terminals 1407a, 1407b), so inductor L1 is included in filter network 1400 (i.e., inductor L1 contributes to the characteristics of filter 1400).

[0144] Each switch S A1 、S A2 and S B has an associated parasitic capacitance. As shown in Figure 14 , the parasitic capacitances are shown as being designated as C A1 、C A2 and CB capacitor. In Figure 14 an example embodiment, three switches S A1 , S A2 and S B are arranged in a T-shaped configuration (so-called "T-network"), wherein the switches S A1 and S A2 are coupled such that each switch S A1 , S A2 has a terminal coupled to node 1404 (i.e., a shared or common node), and the switch S B has a first terminal coupled to the common node 1404 and a second terminal coupled to a reference potential (ground in this case) at node 1406. When the switches S A1 , S A2 are open and the switch S B is closed, node 1404 is thus coupled to the reference potential. In this way, the T-shaped configuration of the switches can mitigate the effect of the parasitic capacitances of the switches S A1 , S A2 when bypassing the inductor L1 1407. This is desirable in some embodiments because the parasitic capacitances of the switches S A1 , S A2 may otherwise adversely affect the characteristics of the filter 1400.

[0145] Of course, it should be understood that in embodiments where capacitive coupling is not a problem, the T-network can be replaced by another arrangement of switches (i.e., a switch configuration other than the T-shaped configuration). After reading the disclosure provided herein, one of ordinary skill in the art will understand how to select a switch configuration to meet the needs of a particular application.

[0146] If either or both of the switches S A1 and S A2 are open, a low-impedance signal path is not formed across the inductor terminals 1407a, 1407b, and the inductor L1 is effectively inserted into the filter circuit. That is, the inductor L1 contributes to the filter characteristics of the filter 1400. However, the parasitic capacitances C A1 and C A2 can form a "bridge" across the open switches and affect the transfer function of the filter (i.e., affect one or more electrical characteristics of the filter 1400). To reduce (and ideally minimize or even prevent) the parasitic capacitances C A1 and C A2 from affecting the characteristics of the filter 1400, the switch S B can be closed.

[0147] Closing the switch S Bwill couple node 1404 to ground such that parasitic capacitances C A1 and C A2 do not form a bridge that affects the characteristics of filter network 1400.

[0148] Because the switch network having a T-configuration eliminates the effect of the parasitic capacitances of the switches on bridging filter inductor L1, this method results in improved filter performance as compared to the filter performance of a network that uses a single switch to provide a low impedance signal path (and ideally a short-circuit signal path) across inductor L1. Additionally, in an embodiment, switch S A1 、S A2 and / or S B can be a unidirectional voltage blocking switch.

[0149] This is in contrast to some single-switch implementations in which a single switch may need to provide bi-directional voltage blocking capabilities.

[0150] Generally, a T-network of switches can be used to short-circuit or otherwise bypass circuit elements within a filter network, thereby setting the filter network as a configurable filter network. For example, switches within a configurable filter network are arranged and operable to effectively bypass or include inductor L1 in the filter to alter the filter characteristics of the configurable filter. The T-network is configured such that two switches (S A1 and S A2 ) are coupled between a first terminal and a second terminal of the circuit element to be bypassed (e.g., across inductor terminals 1407a, 1407b in the Figure 14 example embodiment). Thus, the switches can be considered to be in the signal path across the circuit element. By appropriately controlling the switches, a signal path having an open-circuit impedance or a short-circuit impedance can be provided. A third switch (S B ) is coupled to a node formed between two serially-coupled switches (i.e., S A1 、S A2 ) and a reference node such as ground. In this document, when the T-network is “closed,” this means that the two serially-coupled switches (i.e., S A1 and S A2 ) are closed and the third switch (S B ) is open. In this state, the T-network acts like a closed switch. When the T-network is said to be “open,” this means that the two serially-coupled switches (i.e., S A1 and S A2 ) are open and the third switch (S B ) is closed. In this state, the T-network acts like an open switch.

[0151] Now refer to Figure 15 , a configurable filter network 1500 (which may also be referred to as a configurable PSN 1500) having a first terminal 1500a and a second terminal 1500b includes a filter (or PSN) stage 1502 and a switch stage 1504 having a first terminal 1504a and a second terminal 1504b (the switch stage may sometimes also be referred to herein as a configuration switch network). The switch stage 1504 includes a plurality of switches coupled in a T-shaped configuration, here three switches. The switch network 1504 has: a first terminal 1504a that is coupled to the first terminal 1500a of the first and second terminals of the configurable filter network 1500; and a second terminal 1504b that is coupled to the second terminal 1500b of the first and second terminals of the configurable filter network 1500. Thus, the switch network 1504 is coupled such that the filter stage 1502 can be bypassed by the T-shaped network of switches. It is noted that the T-shaped network of switches 1504 can be used to reduce noise injection and noise bypass in various situations. In addition to using it to insert and remove individual filter elements (e.g., an inductor L1 such as Figure 14 ), as Figure 15 shows, the configuration switch network can be used to include or bypass (or "short") one or more complete filter stages, where a single filter stage 1500 is shown in Figure 15 . In the example of Figure 15 , the filter stage 1500 can be configured to provide high-frequency attenuation. Thus, the parasitic capacitance that appears (or "bridges") across the switches used to bypass the filter state 1500 may affect its performance. As described above with respect to Figure 14 , when the filter stage is in use (i.e., when switches S A1 and S A2 are open and switch S B is closed), the T-shaped network of switches 1504 reduces the effect of the parasitic capacitance of the switches on the filter performance.

[0152] Now refer to Figure 16, the supply modulator circuit 1600 includes at least one supply modulator circuit (or simply a "supply modulator" or more simply a "modulator") and at least one configuration switching network. In this example embodiment, a pair of supply modulators 1602, 1604 and a configuration switching network 1605 are shown. The configuration switching network 1605 may include one or more switches (e.g., one or more switches), and the one or more switches include one or more T-network of switches. In this example embodiment, the configuration switching network 1605 includes a pair of switch T-networks 1606, 1608, and the pair of switch T-networks 1606, 1608 are coupled to isolate one or more of the supply modulators 1602, 1604. The circuit 1600 may optionally include a PSN 1610 coupled between the supply modulators 1602, 1604 and an RF amplifier (PA), such as an RF power amplifier (not explicitly shown in Figure 16 ). Thus, signals can be coupled from one or more modulators to one or more PAs (e.g., PA1 to PA X , where X is an integer greater than 1) through a configuration switching network such as the configuration switching network 1605 and a PSN (e.g., PSN 1610).

[0153] In this example embodiment, the PSN 1610 can be selectively coupled to either or both of the supply modulator circuits 1602, 1604 via the configuration switching network 1605. In particular, in this example embodiment, the T-network 1606 of switches is coupled between the power supply modulator circuit 1602 and the PSN 1610. Similarly, the second T-network 1608 of switches is coupled between the supply modulator circuit 1604 and the PSN 1610. The T-networks 1606, 1608 can be used to select which supply modulator circuit will be coupled to the PSN 1610. Thus, either or both of the supply modulator circuits 1602, 1604 can be coupled to the input of the PSN 1610 and thus provide a modulated signal (e.g., a voltage signal) to the input of the PSN 1610.

[0154] For example, to couple the supply modulator circuit 1602 to the PSN 1610, the switches S AA1 and S AA2 in the T-network 1606 can be closed (in which case the switch S AB is open), and the switches S BA1 and S BA2 in the T-network 1608 can be open (in which case the switch S BB is closed). Alternatively, to couple the PSN 1610 to the supply modulator circuit 1604, the switches S in the T-network 1608BA1 and S BA2 can be closed, and the switches S in the T-network 1606 AA1 and S AA2 can be opened.

[0155] In other configurations, both supply modulators 1606 and 1608 can provide modulated power to the PSN 1610 (and subsequently to the power amplifier) in parallel. In this case, the switches S in the respective T-networks 1606 and 1608 AA1 and S AA2 and the switch S BA1 and S BA2 can be closed (in which case, the switches S AB and S BB are open). Thus, in some embodiments, multiple supply modulators can be configured to operate in a synchronous mode to provide current to the same PA in parallel. By combining multiple supply modulators in parallel, a reduced total supply modulator resistance can be achieved.

[0156] Now referring to Figure 17 , a configurable supply modulation circuit 1800 provides power to multiple power amplifiers. Four power amplifiers PA1 to PA4 are shown here. Generally, a configurable power modulation circuit includes one or more supply modulators, one or more switch networks having a T-configuration (so-called "switched T-networks"), and one or more PSNs. In an embodiment, one or more supply modulators, one or more switched T-networks, and one or more PSNs can be provided as separate components (e.g., components or devices on a separate integrated circuit (IC) or on a separate IC die coupled via a signal path between the separate integrated circuit (IC) and the separate IC die). In an embodiment, one or more supply modulators, one or more switched T-networks, and one or more PSNs can be provided on a single IC (e.g., a monolithic IC or a single IC die), the single IC being coupled during the manufacturing process via a signal path directly included on the IC or the IC die.

[0157] In Figure 17 example embodiments, the circuit 1800 includes: three (3) supply modulators 1802, 1804, 1806; eleven (11) switched T-networks 1808 to 1828; and six (6) PSNs 1830 to 1840. Those skilled in the art will recognize that by opening and closing the T-networks in the switched T-networks 1808 to 1828, various signal paths can be created between the supply modulators in the supply modulators and the power amplifiers.

[0158] For example, closing T-shaped networks 1808 and 1810 and opening T-shaped network 1812 couples supply modulator 1802 to PA1 via PSN 1832. Similarly, closing T-shaped networks 1808, 1810, and 1812 couples supply modulator 1802 to both PA1 and PA2 via PSN 1832.

[0159] In addition to operating T-shaped networks 1808, 1810, 1812 as described above, closing T-shaped network 1814 couples supply modulator 1802 to PA3 via PSNs 1834, 1840. Further, closing T-shaped network 1816 bypasses PSN 1840 (PSN3) in the signal path between supply modulator 1802 and RF amplifier PA3. It should be understood that PSN stage 1834 has a first frequency response, PSN stage 1840 has a second frequency response, and the cascade of the two produces a third frequency response. By bypassing stage 1840, the response can be switched from the cascaded response to only the response of 1834. Shorting the stage gives the flexibility to achieve different responses. The response that should be used (e.g., whether to bypass stage 1840 or any other stage or component) is determined by the needs and / or requirements and / or operating conditions of a particular application (including but not limited to, for example, bandwidth, operating frequency band, RF requirements).

[0160] In addition to operating T-shaped networks 1808, 1810, 1812, 1814, 1816 as described above, closing T-shaped networks 1818 and 1820 couples supply modulator 1802 to PA4 via PSN 1836. Thus, by selectively opening and closing the T-shaped networks among T-shaped networks 1808 to 1820, supply modulator 1802 can be coupled to one, some, or all of RF amplifiers PA1 to PA4.

[0161] Similarly, by opening and closing the selected T-shaped networks among T-shaped networks 1808 to 1828, supply modulator 1804 can be coupled to one, some, or all of amplifiers PA1 to PA4.

[0162] Similarly, by opening and closing the selected T-shaped networks among T-shaped networks 1808 to 1828, supply modulator 1806 can be coupled to one, some, or all of amplifiers PA1 to PA4.

[0163] Additionally, as can now be understood from the above description, two or more of supply modulators 1802, 1804, 1806 can be simultaneously coupled to one of more of RF amplifiers PA1 to PA3.

[0164] One of ordinary skill in the art will recognize that by opening and closing Figure 18a T-shaped switch network therein to create various other signal paths. It will be understood that the configurations shown are only representative of some of the many possible circuit configurations that may be used. After reading the disclosure provided herein, one of ordinary skill in the art will understand how to select the configurations of the modulator, switch network, and PSN to suit the needs of a particular application. Although Figure 17 the example embodiments of Figure 17 show switches implemented in a T-shaped configuration, as described above, in scenarios where capacitive coupling is not a problem,

[0165] Now referring to Figure 18 , a block diagram of an example physical configuration of an RF power modulation circuit 1900 including a plurality of integrated circuit dies is shown. In this example, a configuration switch network 1902 may be disposed on a first integrated circuit (IC) die 1904. The first die may also include a multi-output power supply 1906 (which may be the same as or similar to Figure 12B the multi-output power supply 1252 in Figure 12B ) and one or more power modulator circuits 1908 (or more simply, modulator circuits or modulators), which may be the same as or similar to Figure 12B the power modulator circuit 1254 in Figure 12B . One or more switches within the configuration switch network 1902 may be operated (i.e., placed in their on / off states) to configure various signal paths to couple the multi-output power supply output signals to various input terminals of the modulator and / or PSN. In an embodiment, the configuration switch network 1902 may include one or more T-shaped networks of switches.

[0166] Passive power supply elements 1909 associated with the multi-output power supply 1906, such as capacitors, inductors, and resistors, may also be located on or near die 1904 (where "near" means physically close such that the inductance, capacitance, and resistance characteristics (including parasitic inductance, capacitance, and resistance characteristics) of any signal paths coupling one or more of the coupling elements 1909 do not substantially affect the operation of all or part of the power modulation circuit 1900 and / or do not substantially increase the size of the IC 1904).

[0167] Passive components 1910 (e.g., capacitors, inductors, resistors) including any PSN can also be located on or near die 1904 (where "near" means physical proximity such that the inductance, capacitance, and resistance characteristics (including parasitic inductance, capacitance, and resistance characteristics) of any signal path coupling one or more of the coupling components 1910 do not substantially affect the operation of all or part of the power modulation circuit 1900 and / or do not substantially increase the size of the IC 1904).

[0168] The control circuit 1912 can also be included on the IC die 1904. The control circuit 1912 can be configured to control one or more of the configuration switch network switches, the power modulator circuit, or other circuits (e.g., provide control signals to one or more of the configuration switch network switches, the power modulator circuit, or other circuits). For example, the control circuit 1912 can provide one or more control signals to one or more switches within the configuration switch network to set and / or change the state of the switch between its closed (or "on") state and its open (or "off") state.

[0169] The second configuration switch network 1914 (which can include one or more T-networks) can be located on one or more second integrated circuit dies 1916. Additional passive components 1918 including PSN can also be located on or near one or more second dies 1916. Optionally, the power amplifier circuit PA can also be located on or near one or more second integrated circuit dies 1916. One or more signal lines 1920 can convey control signals, communication signals, power signals, RF signals, etc. between dies 1904, 1916.

[0170] Die 1904, one or more dies 1916, or both can be implemented in a CMOS process, a BCD process, an SOI process, a GaAs process, etc. One or more power amplifiers can also be placed physically close to one or more second dies 1916 or can optionally be physically implemented on one or more second dies 1916. One or more second dies 1916 are placed in a module together with passive components and / or with one or more power amplifiers. Additional PSN stages or passive components can be physically separated from die 1904, one or more second dies 1916, or both. These components can still be electrically coupled to die 1904, one or more second dies 1916, or both.

[0171] In the foregoing description, various concepts, circuits, and techniques have been discussed in the context of a discrete supply modulation system for use with an RF transmitter operable to transmit signals via a wireless medium. The concepts, circuits, and techniques described herein are suitable for use in a handheld terminal (e.g., a mobile handheld terminal) operating in accordance with 6G, communication protocols, 5G communication protocols, and other connection protocols such as 802.11a / b / g / n / ac / ax / ad / ay, and are also suitable for use in multi-transmitter applications including, but not limited to, MIMO, uplink carrier aggregation (ULCA), and beamforming applications. It should be understood that these concepts, circuits, and techniques have applications in other contexts as well. For example, in some implementations, the features described herein may be implemented within a transmitter or driver for wired communication. In some other implementations, the features described herein may be implemented within other types of systems that require high-efficiency and high-linearity power amplification for data-carrying signals.

[0172] The various embodiments of the concepts, systems, devices, structures, and techniques for which protection is sought have been described above with reference to the relevant drawings. Alternative embodiments may be designed without departing from the scope of the described concepts, systems, devices, structures, and techniques. It should be noted that various connection and positional relationships (e.g., above, below, adjacent to, etc.) may be used to describe the elements in the specification and the drawings. Unless otherwise stated, these connection and / or positional relationships may be direct or indirect, and the described concepts, systems, devices, structures, and techniques are not intended to be limited in this regard. Thus, the coupling or connection of entities may refer to direct or indirect coupling or connection.

[0173] As an example of an indirect coupling relationship, as long as the relevant characteristics and functions of elements "A" and "B" are not substantially changed by the intermediate element, element "A" coupled to element "B" may include one or more intermediate elements (e.g., element "C") between element "A" and element "B".

[0174] In addition, the following definitions and abbreviations will be used to explain the claims and the specification. The terms "comprise", "comprises", "comprising", "include", "includes", "including", "has", "having", "contains", or "containing", or any other variations thereof, are intended to cover non-exclusive inclusion. For example, an apparatus, method, composition, mixture, or article that comprises a series of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such apparatus, method, composition, mixture, or article.

[0175] Additionally, the term "exemplary" means "serving as an example, instance, or illustration". Any embodiment or design described as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms "one or more" and "at least one" indicate any integer greater than or equal to one, i.e., one, two, three, four, etc. The term "plurality" indicates any integer greater than one. The term "connected" may include indirect "connection" and direct "connection".

[0176] References in the specification to "a plurality of embodiments", "one embodiment", "embodiment", "example embodiment", "example", "instance", "aspect", etc., indicate that the described embodiments may include a particular feature, structure, or characteristic, but each embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it may affect such features, structures, or characteristics in other embodiments whether or not expressly described.

[0177] Relative terms or positional terms include, but are not limited to, the terms "upper", "lower", "right", "left", "vertical", "horizontal", "top", "bottom", and derivatives of those terms, and are related to the described structures and methods as oriented in the accompanying drawings. The terms "overlap", "on top of", "on the top of", "positioned on", or "positioned on top of" mean that a first element, such as a first structure, is present on a second element, such as a second structure, where an intermediate element, such as an interface structure, may be present between the first element and the second element. The term "direct contact" means that a first element, such as a first structure, and a second element, such as a second structure, are joined without any intermediate element.

[0178] The use of ordinal terms such as "first", "second", "third", etc. in the claims to modify the claim elements themselves does not mean any precedence, priority or order of one claim element with respect to another claim element or the chronological order of acts of a method of implementation, but is merely used as a label to distinguish one claim element having a certain name from another element having the same name (except for the use of ordinal terms), thereby distinguishing the claim elements from each other.

[0179] The terms "about" and "approximately" can be used to mean: within ±20% of the target value in some embodiments, within ±10% of the target value in some embodiments, within ±5% of the target value in some embodiments, and within ±2% of the target value in some embodiments. The terms "about" and "approximately" can include the target value. The term "substantially equal" can be used to refer to: values within ±20% of each other in some embodiments, values within ±10% of each other in some embodiments, values within ±5% of each other in some embodiments, and values within ±2% of each other in some embodiments.

[0180] The term "substantially" can be used to refer to: values within ±20% of a comparative measure in some embodiments, values within ±10% of a comparative measure in some embodiments, values within ±5% of a comparative measure in some embodiments, and values within ±2% of a comparative measure in some embodiments. For example, a first direction that is "substantially" perpendicular to a second direction can refer to: a first direction within ±20% of a 90° angle with the second direction in some embodiments, a first direction within ±10% of a 90° angle with the second direction in some embodiments, a first direction within ±5% of a 90° angle with the second direction in some embodiments, and a first direction within ±2% of a 90° angle with the second direction in some embodiments.

[0181] The disclosed subject matter is not limited in its application to the details of construction and is not limited to the arrangement of components set forth in the following description or shown in the drawings. The disclosed subject matter can be other embodiments and can be practiced and implemented in various ways.

[0182] In addition, the words and terms used in this patent are for descriptive purposes and should not be considered restrictive. Thus, the concepts on which this disclosure is based can easily be used as a basis for other structures, methods and systems designed to achieve several purposes of the disclosed subject matter. Accordingly, the claims should be regarded as including such equivalent constructions as long as they do not depart from the spirit and scope of the disclosed subject matter.

[0183] Although the disclosed subject matter has been described and illustrated in the foregoing exemplary embodiments, the present disclosure is by way of example only. Accordingly, various changes may be made to the details of the implementations of the disclosed subject matter without departing from the spirit and scope of the disclosed subject matter.

[0184] Accordingly, the scope of this patent should not be limited to the described implementations, but should be limited only by the spirit and scope of the appended claims.

[0185] All publications and references cited in this patent are hereby expressly incorporated herein by reference in their entirety.

Claims

1. A circuit, comprising: A multi-output power supply having a first plurality of output terminals; A modulator circuit having an input terminal and an output terminal, wherein the input terminal is coupled to at least one of the plurality of output terminals of the multi-output power supply, and the modulator circuit is configured to: receive a control signal; and in response thereto, provide a modulated output signal at the output terminal of the modulator circuit; At least one pulse shaping network (PSN) having at least one passive element, the PSN having an input terminal coupled to the output terminal of the modulator circuit and having an output terminal, the PSN being configured to filter the modulated output signal provided from the modulator circuit to the PSN; A radio frequency (RF) amplifier having a bias terminal coupled to the output terminal of the PSN; and A switch network having one or more switches, the switch network being coupled to one or more of the following: the modulator circuit; and the pulse shaping circuit; and Wherein: The switch network is configured such that: in a first state, the switch network provides a first signal path having a first filter configuration between the modulator circuit and the bias terminal of the RF amplifier, and in a second state, the switch network provides a second signal path having a different second filter configuration between the modulator circuit and the bias terminal of the RF amplifier.

2. The circuit according to claim 1, wherein, The switch network is coupled to the modulator circuit in a cascaded configuration to connect or disconnect the modulated output signal provided from the modulator circuit to the RF amplifier.

3. The circuit according to claim 7, wherein, The switch network is coupled across the PSN and is configured to selectively provide a signal path that bypasses the PSN.

4. The circuit according to claim 7, wherein, The switch network is coupled in parallel with the passive element of the PSN and is configured to change the transfer function of the PSN by selectively shorting the passive element.

5. The circuit according to claim 1, wherein, The switch network includes a plurality of switches, and at least a first group of the plurality of switches is located on a first integrated circuit die, and at least a second group of the plurality of switches is located on a different second integrated circuit die.

6. The circuit according to claim 1, wherein: The modulator circuit is a first modulator circuit among a plurality of modulator circuits, and at least some of the plurality of modulator circuits have respective input terminals coupled to at least one of the plurality of output terminals of the multi-output power supply; and The switch network is configured to selectively couple the modulator circuit to the bias terminal of the RF amplifier.

7. The circuit according to claim 1, wherein: The multi-output power supply is a first multi-output power supply among a plurality of multi-output power supplies; The modulator circuit is a first modulator circuit among a plurality of modulator circuits, and at least some of the plurality of modulator circuits have input terminals coupled to respective multi-output power supplies among the plurality of multi-output power supplies; The RF amplifier is the first RF amplifier among a plurality of RF amplifiers, and the plurality of RF amplifiers have bias terminals coupled to the output terminal of the PSN; and The switch network is configured to selectively couple at least one of the plurality of modulator circuits to the bias terminals of one or more of the plurality of RF amplifiers.

8. The circuit according to claim 6, wherein: The modulator circuit is a supply modulator; and The bias terminal of the RF amplifier is the supply terminal of the RF power amplifier.

9. The circuit according to claim 1, wherein: The modulator circuit is the first modulator circuit among a plurality of modulator circuits, and each of the plurality of modulator circuits has an input terminal coupled to at least one of the plurality of output terminals coupled to the multi-output power supply; The radio frequency (RF) amplifier is the first RF amplifier among a plurality of RF amplifiers each having a bias terminal coupled to the output terminal of the PSN; And The switch network is configured to selectively couple one or more of the plurality of modulator circuits to the bias terminals of one or more of the RF amplifiers.

10. The circuit according to claim 9, wherein, Each of the plurality of modulator circuits has an input terminal coupled to each of the output terminals coupled to the multi-output power supply.

11. The circuit according to claim 1, wherein, The multi-output power supply includes a hybrid magnetic / switch capacitor converter.

12. The circuit according to claim 1, wherein, The switch network includes a plurality of switches.

13. The circuit according to claim 12, wherein, At least some of the plurality of switches in the switch network are configured as a T-network of switches.

14. The circuit according to claim 12, wherein, The T-network of switches has a first terminal and a second terminal and includes: A first switch having a first terminal corresponding to the first terminal of the T-network of switches and a second terminal coupled to a node; A second switch having a first terminal corresponding to the second terminal of the T-network of switches and a second terminal coupled to the node; and A third switch having a first terminal coupled to the node and a second terminal configured to be coupled to a reference voltage.

15. The circuit according to claim 10, wherein, The reference voltage is ground.

16. The circuit according to claim 13, wherein, The T-network of switches is coupled to the power modulator circuit in a cascaded configuration to connect the modulated power output signal to at least one power amplifier or to disconnect the modulated power output signal from the at least one power amplifier.

17. The circuit according to claim 13, wherein, The T-network of switches is coupled across the PSN and is configured to selectively short-circuit the PSN.

18. The circuit according to claim 13, wherein, The T-network of switches is coupled across the passive elements of the PSN and is configured to change the transfer function of the PSN by selectively short-circuiting the passive elements.

19. The circuit according to claim 1, wherein, At least a first group of the plurality of switches is located on a first integrated circuit die, and at least a second group of the plurality of switches is located on a second integrated circuit die.

20. A circuit having an input terminal and an output terminal in a mobile handheld terminal, the circuit comprising: A filter network having a first terminal and a second terminal; And A switch network having an input terminal coupled to the input terminal of the circuit and having an output terminal, the switch network comprising: One or more switches, the one or more switches being coupled to the filter network and configured such that: in a first state, the switch network provides a first signal path having a first filter configuration between an input terminal of the circuit and an output terminal of the circuit, and in a second state, the switch network provides a second signal path having a different second filter configuration between the input terminal of the circuit and the output terminal of the circuit.

21. The circuit according to claim 14, wherein, The filter network is provided as a pulse shaping network (PSN), the pulse shaping network (PSN) being configured to filter a modulated power signal provided to the pulse shaping network, the pulse shaping network having at least one passive component.

22. The circuit according to claim 20, wherein, The switch network is coupled across the filter network and is configured to selectively short-circuit the filter network.

23. The circuit according to claim 20, wherein, The switch network is coupled across at least one electronic component of the filter network and is configured to change a transfer function of the filter network by selectively short-circuiting the electronic component.

24. The circuit according to claim 20, wherein, The switch network is coupled between an input terminal of the circuit and an output terminal of the circuit to electrically connect or disconnect the input terminal of the circuit from the output terminal of the circuit.

25. The circuit according to claim 20, wherein, The switch network includes a plurality of switches, and at least a first group of the plurality of switches is located on a first integrated circuit die, and at least a second group of the plurality of switches is located on a different second integrated circuit die.

26. The circuit according to claim 20, wherein, At least some of the plurality of switches in the switch network are coupled in a T-shaped configuration.

27. The circuit according to claim 24, wherein, The T-shaped configuration of switches is coupled across the filter network and is configured to selectively short-circuit the filter network.

28. The circuit according to claim 26, wherein, The T-shaped configuration of switches is coupled across at least one electronic component of the filter network and is configured to change a transfer function of the filter network by selectively short-circuiting the electronic component.

29. The circuit according to claim 26, wherein, The T-shaped network of switches includes: A first switch having a first terminal forming an input terminal of the T-shaped network of switches and a second terminal coupled to a node; A second switch having a first terminal forming an output terminal of the T-shaped network of switches and a second terminal coupled to the node; and A third switch having a first terminal coupled to the node and a second terminal configured to be coupled to a reference potential.

30. The circuit according to claim 26, wherein, The T-shaped network of switches is coupled between an input terminal of the circuit and an output terminal of the circuit to electrically connect or disconnect the input terminal of the circuit from the output terminal of the circuit.

31. The circuit according to claim 20, wherein, At least a first group of the plurality of switches is located on a first integrated circuit die, and at least a second group of the plurality of switches is located on a second integrated circuit die.

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