Display device and driving method thereof

By applying voltage based on degradation information when the display device is not driven, the problem of degradation of image quality and shortening of service life due to changes in sub-pixel characteristics over time is solved, and the effect of extending the life of the display panel and simplifying circuit control is achieved.

CN120236479APending Publication Date: 2025-07-01LG DISPLAY CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411572201.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-29
Filing Date
2024-11-06
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

The characteristics of sub-pixels in the display device change over time, resulting in a decrease in image quality and a shortened service life, and the prior art is difficult to effectively compensate or prevent such deterioration when the display device is not driven.

Method used

By applying a voltage for compensating or preventing deterioration when the display panel is not driven based on the deterioration information related to the driving transistor, the bias voltage output circuit unit and the switching circuit unit are applied to the data line, and the controller generates a switch control signal to control the operation of the switching circuit unit.

Benefits of technology

The life of the display panel is extended, the configuration and control method of the circuit are simplified, and the driving voltage compensation margin can be set relatively freely.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120236479A_ABST
    Figure CN120236479A_ABST
Patent Text Reader

Abstract

A display device includes: a display panel including sub-pixels connected to data lines; a bias voltage output circuit configured to output a bias voltage; a switching circuit configured to apply the bias voltage output from the bias voltage output circuit to the data line; and a controller configured to output a switching control signal for controlling the switching circuit, in which the controller generates the switching control signal based on degradation information related to a driving transistor included in the sub-pixel.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority of Korean Patent Application No. 10 - 2023 - 0197233, filed on December 29, 2023, which is incorporated herein by reference as if fully set forth herein. Technical field

[0003] The present disclosure relates to a display device and a driving method thereof. Background art

[0004] With the progress of information technology, the market for display devices as a connection medium between users and information is continuously growing. Therefore, display devices such as light - emitting display devices, quantum dot display (QDD) devices, and liquid crystal display (LCD) devices are increasingly used.

[0005] The above - mentioned display device includes a display panel having a plurality of sub - pixels, a driver that outputs driving signals for driving the display panel, and a power supply that generates power to be provided to the display panel or the driver.

[0006] In such a display device, when driving signals (e.g., gate signals and data signals) are provided to each of the plurality of sub - pixels provided in the display panel, the selected sub - pixels can transmit light or can emit light by themselves, and thus, an image can be displayed.

[0007] However, the characteristics of the sub - pixels in the display device may change over time, which may deteriorate the image quality and shorten the service life of the display device. Therefore, a method capable of compensating for or preventing deterioration when the display device is not driven is required. In addition, a method capable of compensating for the deterioration of sub - pixels with a simple design and capable of being set relatively freely is also required. Summary of the invention

[0008] The present disclosure can apply a voltage for compensating for or preventing deterioration when the display panel is not driven based on deterioration information related to a driving transistor, and thus, the life of the display panel can be increased. Moreover, the present disclosure can compensate for or prevent deterioration in the driving transistor based on the voltage output from a shift register included in the display panel, and thus, the circuit configuration and control method can be simplified. In addition, the present disclosure can compensate for or prevent deterioration in the driving transistor when the display panel is not driven, and thus, the driving voltage compensation margin can be set relatively freely.

[0009] To achieve these objects and other advantages and in accordance with the purpose of the present disclosure, as embodied and broadly described herein, a display device includes: a display panel including sub-pixels connected to data lines; a bias voltage output circuit unit configured to output a bias voltage; a switch circuit unit configured to apply the bias voltage output from the bias voltage output circuit unit to the data lines; and a controller configured to output a switch control signal for controlling the switch circuit unit, wherein the controller generates the switch control signal based on degradation information related to driving transistors included in the sub-pixels.

[0010] The bias voltage may be applied to the gates of the driving transistors.

[0011] The controller may generate the switch control signal based on an average threshold voltage shift of the driving transistors calculated from the entire display panel.

[0012] The switch circuit unit may include a plurality of switches, and each of the plurality of switches may include a first electrode commonly connected to an output terminal of the bias voltage output circuit unit, a second electrode separately connected to the data lines of the display panel, and a control electrode connected to a control signal line to which the switch control signal is applied.

[0013] All conduction times of the plurality of switches may be equal to each other, or at least one conduction time of the plurality of switches may be different.

[0014] The conduction time of the switch circuit unit may vary based on the threshold voltage shift amount of the driving transistors.

[0015] The switch circuit unit may include a plurality of switches arranged corresponding to the data lines of red, green, white, and blue sub-pixels included in the display panel.

[0016] The controller may generate the switch control signal as an off signal for sub-pixels of a color less than the average threshold voltage shift of the driving transistors and may generate the switch control signal as an on signal for sub-pixels of a color greater than the average threshold voltage shift of the driving transistors.

[0017] The controller may calculate degradation information related to the driving transistors based on sensed values transmitted from a driver driving the display panel.

[0018] In another aspect of the present disclosure, a driving method of a display device includes: driving a display panel; outputting a bias voltage from a bias voltage output circuit unit; when the display panel is in a non-driving state, generating a switching control signal for controlling a switching circuit unit provided in the display panel based on degradation information related to driving transistors included in sub-pixels of the display panel; and controlling the switching circuit unit based on the switching control signal to apply the bias voltage output from the bias voltage output circuit unit to the sub-pixels through data lines of the display panel.

[0019] The switching circuit unit may include a plurality of switches, and all conduction times of the plurality of switches may be equal to each other, or at least one conduction time of the plurality of switches may be different. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings included to provide a further understanding of the present disclosure and incorporated in and constituting a part of this application illustrate embodiments of the present disclosure and, together with the specification, are used to explain the principles of the present disclosure. In the drawings:

[0021] Figure 1 is a block diagram schematically illustrating a light-emitting display device, Figure 2 and Figure 3 is a schematic diagram for describing a configuration of a gate-in-panel (GIP) type scan driver;

[0022] Figure 4 is a schematic diagram schematically illustrating a sub-pixel and a data driver according to a first embodiment of the present disclosure, Figure 5 is a schematic diagram schematically illustrating a sub-pixel and a data driver according to a second embodiment of the present disclosure, Figure 6 is a waveform diagram for describing a sensing period and a display period according to an embodiment;

[0023] Figure 7 is a schematic diagram illustrating some elements of a light-emitting display device according to a first embodiment, Figure 8 is a schematic diagram illustrating some elements included in a display panel according to a first embodiment, Figure 9 is a schematic diagram illustrating an example in which a negative bias voltage is applied to a sub-pixel according to a first embodiment, Figure 10 is a schematic diagram illustrating Figure 8 the arrangement of the sub-pixels shown in;

[0024] Figure 11 is a flowchart for describing a driving method of a light-emitting display device according to a first embodiment, Figure 12 is a schematic diagram for describing a method of generating a switching control signal by using a sensed value according to a first embodiment, Figure 13 and Figure 14It is a schematic diagram of a switch control signal;

[0025] Figure 15 It is a schematic diagram showing the data voltage applied to a sub-pixel in the image driving of a display panel according to the first embodiment, Figure 16 It is a schematic diagram showing the negative bias voltage applied to a sub-pixel in the compensation driving of a display panel according to the first embodiment, Figures 17 to 19 It is a schematic diagram for describing the advantages of the embodiment compared with the comparative example; and

[0026] Figure 20 It is a schematic diagram showing some elements of a light-emitting display device according to the second embodiment, Figure 21 It is a schematic diagram showing some elements included in a display panel according to the second embodiment, Figure 22 and Figure 23 It is a schematic diagram showing Figure 21 the arrangement of the sub-pixels shown in Detailed Embodiments

[0027] Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are shown. However, the present disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present disclosure to those skilled in the art.

[0028] The display device according to the present disclosure can be applied to a television (TV), a video player, a personal computer (PC), a home theater, an electronic device for a vehicle, and a smart phone, but the present invention is not limited thereto. The display device according to the present disclosure can be implemented as a light-emitting display device, a quantum dot display (QDD) device, or a liquid crystal display (LCD) device. Hereinafter, for the sake of convenience of description, for example, a light-emitting display device that emits self-emitted light by using an inorganic light-emitting diode or an organic light-emitting diode will be described.

[0029] In addition, the transistors described below can be implemented with n-type transistors, p-type transistors, or a combination of n-type transistors and p-type transistors. A transistor can be a three-electrode element including a gate, a source, and a drain. The source can be an electrode that provides carriers to the transistor. In the transistor, carriers can flow starting from the source. The drain can be an electrode through which carriers flow out of the transistor. That is, in the transistor, carriers flow from the source to the drain.

[0030] In a p-type transistor, since the carriers are holes, the source voltage can be higher than the drain voltage, causing the holes to flow from the source to the drain. In a p-type transistor, since the holes flow from the source to the drain, the current can flow from the source to the drain. On the other hand, in an n-type transistor, since the carriers are electrons, the source voltage can be lower than the drain voltage, causing the electrons to flow from the source to the drain. In an n-type transistor, since the electrons flow from the source to the drain, the current can flow from the drain to the source. However, the source and drain of a transistor can be switched between them based on the voltage applied thereto. On this basis, in the following description, one of the source and drain is described as the first electrode, and the other of the source and drain is described as the second electrode.

[0031] Figure 1 is a block diagram schematically illustrating a light-emitting display device, Figure 2 and Figure 3 is a schematic diagram for describing the configuration of a gate-in-panel (GIP) type scan driver.

[0032] As Figure 1 shown, a light-emitting display device according to an embodiment of the present disclosure may include a video supply unit 110, a timing controller 120, a gate driver 130, a data driver 140, a display panel 150, and a power supply 180.

[0033] The video supply unit 110 (a set or a host system) may output a video data signal provided from the outside or an image data signal stored in its internal memory. The video supply unit 110 may provide a data signal and various driving signals to the timing controller 120.

[0034] The timing controller 120 may output a gate timing control signal GDC for controlling the operation timing of the scan driver 130, a data timing control signal DDC for controlling the operation timing of the data driver 140, and various synchronization signals (a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync). The timing controller 120 may provide the data timing control signal DDC and the data signal DATA provided from the video supply unit 110 to the data driver 140. The timing controller 120 may be implemented in an integrated circuit (IC) type and may be mounted on a printed circuit board (PCB), but the present invention is not limited thereto.

[0035] The scan driver 130 may output a gate signal (or a gate voltage) in response to the gate timing control signal GDC provided from the timing controller 120. The scan driver 130 may provide the gate signal to a plurality of sub-pixels included in the display panel 150 through a plurality of gate lines GL1 to GLm. The scan driver 130 may be implemented in an IC type, or may be directly provided on the display panel 150 in a GIP type, but the present invention is not limited thereto.

[0036] In response to the data timing control signal DDC provided from the timing controller 120, the data driver 140 may sample and lock the data signal DATA, convert the digital data signal into an analog data voltage based on the gamma reference voltage, and output the analog data voltage. The data driver 140 may provide the data voltages to the sub-pixels of the display panel 150 through a plurality of data lines DL1 to DLn, respectively. The data driver 140 may be implemented as an IC type, or may be mounted on the display panel 150 or the PCB, but the present invention is not limited thereto.

[0037] The power supply 180 may generate a high voltage and a low voltage based on an externally provided external input voltage, and may output the high voltage and the low voltage through a high voltage line EVDD and a low voltage line EVSS. In addition to the high voltage and the low voltage, the power supply 180 may generate and output a voltage required to drive the scan driver 130 (e.g., a gate high voltage and a gate low voltage) or a voltage required to drive the data driver 140 (a drain voltage and a semi-drain voltage).

[0038] The display panel 150 may display an image based on the high voltage, the low voltage, and drive signals including a gate signal and a data voltage. The sub-pixels of the display panel 150 may each be self-emitting (e.g., without a backlight unit). The display panel 150 may be manufactured based on a substrate having rigidity or flexibility (e.g., glass, silicon, or polyimide). Moreover, the light-emitting sub-pixels may include pixels having red, green, and blue, or may include pixels having red, green, blue, and white.

[0039] In the above, each of the timing controller 120, the scan driver 130, and the data driver 140 is described as a single element. However, based on the implementation type of the light-emitting display device, one or more of the timing controller 120, the scan driver 130, and the data driver 140 may be integrated into one IC.

[0040] As Figure 2 and Figure 3 shown, the GIP type scan driver may include a shift register 131 and a level shifter 135. The level shifter 135 may generate a scan clock signal Clks and a start signal Vst based on signals and voltages output from the timing controller 120 and the power supply 180.

[0041] The shift register 131 may operate based on the clock signal Clks and the start signal Vst output from the level shifter 135, and may output gate signals Gate[1] to Gate[m] for turning on or off the gates of transistors formed in the display panel. The shift register 131 may be formed in the display panel in a thin film type based on the GIP type.

[0042] Unlike the shift register 131, the level shifter 135 can be independently set to an IC type or can be included in the power supply 180. However, this may be merely one embodiment, and the embodiments of the present disclosure are not limited thereto.

[0043] Figure 4 is a schematic diagram schematically illustrating a sub-pixel and a data driver according to a first embodiment of the present disclosure, Figure 5 is a schematic diagram schematically illustrating a sub-pixel and a data driver according to a second embodiment of the present disclosure, Figure 6 is a waveform diagram for describing a sensing period and a display period according to one embodiment.

[0044] As Figure 4 shown, according to the first embodiment, a sub-pixel SP may include a switching transistor T1, a driving transistor DT, a sensing transistor T2, a capacitor CST, and an organic light emitting diode OLED.

[0045] The driving transistor DT may include a gate connected to a first electrode of the capacitor CST, a first electrode connected to a first power line EVDD, and a second electrode connected to an anode of the organic light emitting diode OLED. The capacitor CST may include a first electrode connected to the gate of the driving transistor DT and a second electrode connected to the anode of the organic light emitting diode OLED. The organic light emitting diode OLED may include an anode connected to the second electrode of the driving transistor DT and a cathode connected to a second power line EVSS.

[0046] The switching transistor T1 may include a gate connected to a first scan line Gate1 included in a first gate line GL1, a first electrode connected to a first data line DL1, and a second electrode connected to the gate of the driving transistor DT. The sensing transistor T2 may include a gate connected to a second scan line Gate2 included in the first gate line GL1, a first electrode connected to a first reference line VREF1, and a second electrode connected to the anode of the organic light emitting diode OLED.

[0047] The sensing transistor T2 may be a type of compensation circuit added to compensate for deterioration (threshold voltage, mobility, etc.) in the driving transistor DT or the organic light emitting diode OLED. The sensing transistor T2 is capable of physically sensing a threshold voltage based on the source follower operation of the driving transistor DT. The sensing transistor T2 may operate to obtain a sensing voltage through a sensing node defined between the driving transistor DT and the organic light emitting diode OLED.

[0048] According to one embodiment, the data driver 140 may include a driving circuit unit 141 for driving the sub-pixels SP and a sensing circuit unit 145 for sensing the sub-pixels SP. The driving circuit unit 141 may be connected to the first data line DL1 through the first data channel DCH1. The driving circuit unit 141 may output a data voltage Vdata for driving the sub-pixels SP through the first data channel DCH1.

[0049] The sensing circuit unit 145 may be connected to the first reference line VREF1 through the first sensing channel SCH1. The sensing circuit unit 145 may obtain a sensing voltage Vsen sensed from the sub-pixels SP through the first sensing channel SCH1. The sensing circuit unit 145 may obtain the sensing voltage Vsen based on a current sensing scheme or a voltage sensing scheme. The sensing circuit unit 145 may convert the sensing voltage Vsen into a digital sensing value to be transmitted to the timing controller.

[0050] As Figure 5 shown, according to a second embodiment, the first gate line GL1 may be integrated into one. That is, different from the first embodiment, the first gate line GL1 may not distinguish between the first scan line and the second scan line. In this case, the switching transistor T1 and the sensing transistor T2 may be commonly connected to the first gate line GL1, and thus, may be turned on or off simultaneously.

[0051] As Figure 6 shown, in the operation of driving the display panel, an organic light emitting display device according to one embodiment may perform different driving schemes based on a first driving period PWR_ON (e.g., when the power of the display device is turned on), a second driving period DISPLAY, and a third driving period PWR_OFF (e.g., when the power of the display device is turned off).

[0052] The first driving period PWR_ON may correspond to a driving start period for applying power to the display panel, the second driving period DISPLAY may correspond to a panel driving period for performing driving such as displaying an image after applying power to the display panel, and the third driving period PWR_OFF may correspond to a driving end period for cutting off the power applied to the display panel. Moreover, the third driving period PWR_OFF may be a period for performing driving for a certain time while displaying black, thereby performing a sensing operation of the display panel. That is, this period may be based on the fact that the power applied to the display panel is not completely cut off during the third driving period PWR_OFF. In this way, the user may feel that the organic light emitting display device shuts down immediately in response to a shutdown instruction, but actually the organic light emitting display device displays black (displays nothing) before finally shutting down and remains powered on when performing the sensing operation.

[0053] The light-emitting display device according to an embodiment may sense the display panel in at least one of a first driving period PWR_ON, a second driving period DISPLAY, and a third driving period PWR_OFF. Taking the second driving period DISPLAY as an example, a blanking period BLK included in the vertical synchronization signal Vsync may be defined as a sensing period PSP, and an active period ACT included in the vertical synchronization signal Vsync may be positioned as a display period DSP.

[0054] Figure 7 is a schematic diagram illustrating some elements of a light-emitting display device according to a first embodiment, Figure 8 is a schematic diagram illustrating some elements included in a display panel according to a first embodiment, Figure 9 is a schematic diagram illustrating an example in which a negative bias voltage is applied to a sub-pixel according to a first embodiment, Figure 10 is a schematic diagram illustrating Figure 8 the arrangement of the sub-pixels shown in

[0055] As Figure 7 and Figure 8 shown, according to a first embodiment, the timing controller 120 may include a first degradation compensator 125. The first degradation compensator 125 may calculate degradation information based on a sensed value Dsen transmitted from the data driver 140, and based on this, the first degradation compensator 125 may compensate a data signal DATA provided from the outside to output a compensated data CDATA. Here, the sensed value Dsen may correspond to a sensed voltage Vsen sensed from the display panel 150 through sensing driving of the data driver 140. Moreover, the first degradation compensator 125 may output a switching control signal SWC for controlling a switching circuit unit SWG included in the display panel 150 based on the degradation information.

[0056] The display panel 150 may include a switching circuit unit SWG provided in a non-display area NA. The switching circuit unit SWG may operate based on a switching control signal SWC transmitted from the timing controller 120. The switching circuit unit SWG may apply a bias voltage output from an output terminal VGLO of a shift register 131 (bias voltage output circuit unit) provided in the non-display area NA of the display panel 150 to sub-pixels SP1 to SP8 provided in a display area AA. The bias voltage may use at least one of voltage levels output from the shift register 131.

[0057] The switching circuit unit SWG may include switches SW1 to SW8. The switches SW1 to SW8 may be provided to correspond to data lines DL1 to DL8. In other words, the number of switches SW1 to SW8 may be the same as the number of data lines DL1 to DL8.

[0058] One or more of switches SW1 to SW8 can be selectively turned on based on a switch control signal SWC. Each of switches SW1 to SW8 can include a first electrode connected to an output terminal VGLO of a shift register 131, a second electrode connected to a corresponding one of data lines DL1 to DL8, and a control electrode connected to a control signal line to which the switch control signal SWC is applied.

[0059] As Figure 8 and Figure 9 shown, according to the first embodiment, when a first switch SW1 connected to a first data line DL1 is turned on and a first switching transistor T1 is turned on, a negative bias voltage Nbias can be applied to a gate of a driving transistor DT.

[0060] In addition, in Figure 9 it, for example, a negative bias voltage Nbias can be applied to compensate for (prevention of Vth positive shift) degradation that occurs because a driving transistor DT included in a first sub-pixel SP1 is configured as an n-type transistor and a threshold voltage shifts in a positive direction due to a continuously applied positive voltage.

[0061] However, when a driving transistor DT included in a first sub-pixel SP1 is configured as a p-type transistor, voltage application conditions can be changed so as to apply a positive bias voltage. However, in the present disclosure, for example, a negative bias temperature stress (NBTS) effect can be used to compensate for degradation in an n-type driving transistor DT.

[0062] As Figure 10 shown, a display panel 150 can include a red sub-pixel SPR, a white sub-pixel SPW, a blue sub-pixel SPB, and a green sub-pixel SPG. The red sub-pixel SPR, the white sub-pixel SPW, the blue sub-pixel SPB, and the green sub-pixel SPG can be defined as one pixel.

[0063] The red sub-pixel SPR can be disposed on a first data line DL1 and a fifth data line DL5, the white sub-pixel SPW can be disposed on a second data line DL2 and a sixth data line DL6, the blue sub-pixel SPB can be disposed on a third data line DL3 and a seventh data line DL7, and the green sub-pixel SPG can be disposed on a fourth data line DL4 and an eighth data line DL. For example, red sub-pixels can be grouped in the same column, white sub-pixels can be grouped in the same column, blue sub-pixels can be grouped in the same column, and green sub-pixels can be grouped in the same column. However, this may be merely one embodiment, and embodiments of the present disclosure are not limited thereto.

[0064] Figure 11 is a flowchart for describing a driving method of a light-emitting display device according to the first embodiment,Figure 12 is a schematic diagram for describing a method of generating a switching control signal by using sensed values according to the first embodiment, Figure 13 and Figure 14 is a schematic diagram of the switching control signal.

[0065] As Figure 4 、 Figure 5 、 Figure 7 and Figure 11 shown, the light-emitting display device according to the first embodiment may generate a switching control signal based on the sensed values obtained through the sensing driving of the display panel 150, and based on this, the light-emitting display device may control the compensation amount of the driving transistor DT. This will be described below.

[0066] The display panel 150 may be driven by the timing controller 120 and the data driver 140 to display an image (S110). The display panel 150 may have a non-driving period (S120). The non-driving period may include an end-of-driving period (see PWR_OFF in Figure 6 ) and an idle period (for example, a screensaver operation period) performed when the display panel 150 is not used for a long time.

[0067] When the current period corresponds to the non-driving period (Y), the sensing operation of the display panel 150 may be performed (S130). The sensing operation of the display panel 150 may be performed by the data driver 140. The data driver 140 may obtain a sensing voltage Vsen from the display panel 150 through the sensing operation, and may convert the sensing voltage Vsen into a digital sensing value Dsen to transmit to the timing controller 120.

[0068] The timing controller 120 may confirm whether the sensing value Dsen exceeds a reference value set therein (S140), for example, is greater than or less than the reference value or exceeds a predetermined range. When the sensing value Dsen exceeds the reference value (Y), the timing controller 120 may calculate the amount of deterioration in the driving transistor DT based on the sensing value Dsen (S150).

[0069] The timing controller 120 may generate a switching control signal SWC based on the deterioration information related to the driving transistor DT (S160), and based on this, the timing controller 120 may apply a bias voltage to the data lines of the display panel and may control the compensation amount of the driving transistor DT (S170).

[0070] As Figure 7 and Figure 12As shown, the timing controller 120 can distinguish different colors, such as the red sub-pixel SPR, the white sub-pixel SPW, the blue sub-pixel SPB, and the green sub-pixel SPG, to calculate the degradation information related to the driving transistor DT based on the sensed value Dsen. In other words, the timing controller 120 can provide different amounts of compensation to the sub-pixels according to the color (for example, the sub-pixels of the first color can be processed differently from those of the second color, etc.).

[0071] In calculating the degradation information related to the driving transistor DT, the timing controller 120 can calculate the average threshold voltage shift (Vth shift AVG) of the driving transistors DT on the entire display panel based on the gate lines and the color-based sensed values. Moreover, the timing controller 120 can generate a switching control signal SWC based on the average threshold voltage shift (Vth shift AVG) of the driving transistor DT. In this case, a switching control signal SWC can be generated as an off signal SWC_Off for the sub-pixels of the color less than the average threshold voltage shift (Vth shift AVG) of the driving transistor DT, and a switching control signal SWC can be generated as an on signal SWC_On for the sub-pixels of the color greater than the average threshold voltage shift (Vth shift AVG) of the driving transistor DT.

[0072] In the case of calculating the average threshold voltage shift (Vth shift AVG) of the driving transistor DT as in Figure 12 , the switching control signal SWC can be generated as in Figure 13 or Figure 14 .

[0073] Figure 13 An example is illustrated where the switching control signal SWC is configured such that all the switches SW_SPR connected to the red sub-pixels, the switches SW_SPB connected to the blue sub-pixels, and the switches SW_SPW connected to the white sub-pixels are all turned on for the same time (for example, the pulse widths of the switching control signal SWC can be equal and synchronous).

[0074] Figure 14The figure illustrates an example in which the switch control signal SWC is configured such that the conduction time of the switch SW_SPB connected to the blue sub-pixel is longer than the conduction times of the switches SW_SPR connected to the red sub-pixel and SW_SPW connected to the white sub-pixel (e.g., the pulse width of the switch control signal SW_SPB can be greater than the pulse widths of the switch control signals SW_SPR and SW_WSPW). For example, the timing controller 120 can dynamically provide different amounts of compensation to sub-pixels according to their colors, such as in an example case where the white sub-pixel requires more compensation than the red and blue sub-pixels. In this way, the light-emitting display device can provide a finer control granularity by providing different amounts of compensation according to colors. For example, the blue sub-pixel may have different requirements from the red and white sub-pixels, and the green sub-pixel may not require any compensation yet.

[0075] From Figure 13 and Figure 14 of the figure, it can be seen that according to the first embodiment, the switch control signal SWC can be generated based on the average threshold voltage shift (Vth shift AVG) of the driving transistor DT, and based on the configuration of the switch circuit unit, a common control method ( Figure 13 ) in which sub-pixels of different colors can obtain the same amount of compensation in the case of needing compensation or a separate control method ( Figure 14 ) in which sub-pixels of different colors can obtain different amounts of compensation according to their specific requirements can be used to generate the switch control signal SWC.

[0076] In addition, in the separate control according to the first embodiment, the switch control signal SWC can be generated based on the average threshold voltage shift (Vth shift AVG) of the driving transistor DT, and thus, the conduction time of the switch based on the color can vary based on the offset amount of the driving transistor DT.

[0077] Figure 15 is a schematic diagram illustrating the data voltage applied to the sub-pixel in the image driving of the display panel according to the first embodiment, Figure 16 is a schematic diagram illustrating the negative bias voltage applied to the sub-pixel in the compensation driving of the display panel according to the first embodiment, Figures 17 to 19 is a schematic diagram for describing the advantages of the embodiment compared with the comparative example.

[0078] As Figure 15As shown, in the image driving of the display panel, the driving transistor included in the sub-pixel SP can operate based on the data voltage to apply a driving current. To this end, the data voltage Vdata can be applied to the data line DL1 of the sub-pixel SP. In this case, the data voltage Vdata can be output from the data driver and can have a level of about 2V to about 16.5V based on the gray scale. Moreover, in the image driving of the display panel, a high voltage of about 20V can be applied to the high voltage line EVDD of the sub-pixel SP, and a low voltage of about 0V can be applied to the low voltage line EVSS.

[0079] As Figure 16 shown, in the compensation driving of the display panel, the degradation of the driving transistor included in the sub-pixel SP can be compensated based on the bias voltage. To this end, the negative bias voltage Nbias can be applied to the data line DL1 of the sub-pixel SP. At this time, the negative bias voltage Nbias can be output from the shift register. Moreover, in the case where the gate low voltage output from the shift register is used as the negative bias voltage Nbias, the gate low voltage can have a level of about -10V to about -6V. In addition, in the compensation driving of the display panel, a low voltage of about 0V can be applied to the high voltage line EVDD and the low voltage line EVSS.

[0080] In Figure 16 and Figure 17 order to facilitate understanding, the levels of the data voltage Vdata, the negative bias voltage Nbias, the high voltage, and the low voltage can be illustrated.

[0081] As Figure 17 shown, in the light-emitting display device of the comparative example, the data driver may gradually and inevitably increase the driving voltage to compensate for the phenomenon that the threshold voltage Vth of the driving transistor shifts with time (e.g., according to a logarithmic growth curve).

[0082] As Figure 18 shown, according to an embodiment of the light-emitting display device, for each degradation period (positive bias temperature stress (PBTS)) of a certain time when the phenomenon that the threshold voltage Vth of the driving transistor shifts with time occurs, there can be a compensation period (negative bias temperature stress (NBTS)) of a certain time in which a negative bias voltage is provided to the driving transistor.

[0083] As a result, as Figure 19 shown, in one embodiment, the driving voltage can be gradually increased in the data driver to compensate for the degradation phenomenon, and compared with the comparative example, the increase width of the driving voltage can be reduced. Therefore, in one embodiment, the driving voltage compensation margin for compensating the threshold voltage Vth of the driving transistor can be set relatively freely.

[0084] Figure 20 FIG. is a schematic diagram showing some elements of a light-emitting display device according to a second embodiment, Figure 21 is a schematic diagram showing some elements included in a display panel according to a second embodiment, Figure 22 and Figure 23 is a schematic diagram showing Figure 21 in which the arrangement of sub-pixels is shown.

[0085] As Figure 20 and Figure 21 shown, according to the second embodiment, the timing controller 120 may include a second degradation compensator 127. The second degradation compensator 127 may predict the degradation of elements included in the display panel 150 based on data signals DATA provided from the outside, may calculate degradation information based on the predicted degradation, and may compensate the data signals DATA based on the degradation information to output compensated signals CDATA. Further, the second degradation compensator 127 may output a switching control signal SWC for controlling a switching circuit unit SWG included in the display panel 150 based on the degradation information.

[0086] The display panel 150 may include a switching circuit unit SWG provided in a non-display area NA. The switching circuit unit SWG may operate based on a switching control signal SWC transmitted from the timing controller 120. The switching circuit unit SWG may apply a bias voltage output from an output terminal VGLO of a shift register 131 (bias voltage output circuit unit) provided in the non-display area NA of the display panel 150 to sub-pixels SP1 to SP8 provided in a display area AA. The bias voltage may use at least one of voltage levels output from the shift register 131.

[0087] The switching circuit unit SWG may include switches SW1 to SW8. The switches SW1 to SW8 may be provided to correspond to data lines DL1 to DL8. In other words, the number of the switches SW1 to SW8 may be the same as the number of the data lines DL1 to DL8.

[0088] One or more of the switches SW1 to SW8 may be selectively turned on based on the switching control signal SWC. Each of the switches SW1 to SW8 may include a first electrode connected to the output terminal VGLO of the shift register 131, a second electrode connected to a corresponding data line of the data lines DL1 to DL8, and a control electrode connected to a control signal line to which the switching control signal SWC is applied.

[0089] As Figure 22 and Figure 23As shown, according to the second embodiment, the first sub-pixel SP may include a first switching transistor T1, a capacitor CST, a driving transistor DT, and an organic light-emitting diode OLED. Here, in the organic light-emitting diode OLED, the anode may be connected to the second electrode of the driving transistor DT, the cathode may be connected to the low-voltage line EVSS, or the anode may be connected to the high-voltage line EVDD, and the cathode may be connected to the first electrode of the driving transistor DT.

[0090] According to the second embodiment, when the first switch SW1 connected to the first data line DL1 is turned on and the first switching transistor T1 is turned on, a negative bias voltage Nbias may be applied to the gate of the driving transistor DT.

[0091] In addition, in the second embodiment, in the case of calculating the average value of the threshold voltage shift (Vth shift AVG) of the driving transistor DT as in Figure 12 , the switching control signal SWC may be generated as in Figure 13 or Figure 14 , so reference may be made to the relevant description.

[0092] The present disclosure may apply a voltage for compensating or preventing deterioration when the display panel is not driven based on the deterioration information related to the driving transistor, so the lifespan of the display panel can be increased. Moreover, the present disclosure may compensate or prevent deterioration in the driving transistor based on the voltage output from the shift register included in the display panel, so the circuit configuration and control method can be simplified. In addition, the present disclosure may compensate or prevent deterioration in the driving transistor when the display panel is not driven, so the driving voltage compensation margin can be set relatively freely.

[0093] The effects according to the present disclosure are not limited to the above examples, and various other effects may be included in the specification.

[0094] Although the present disclosure has been particularly shown and described with reference to the exemplary embodiments of the present disclosure, those of ordinary skill in the art will understand that various modifications in form and detail may be made therein without departing from the spirit and scope of the present disclosure defined by the appended claims.

Claims

1. A display device, comprising: a display panel comprising sub-pixels connected to data lines; a bias voltage output circuit configured to output a bias voltage; a switching circuit configured to apply the bias voltage output from the bias voltage output circuit to the data line; as well as a controller configured to output a switch control signal for controlling the switch circuit, The controller generates the switch control signal based on degradation information about a driving transistor included in the sub-pixel. 2 . The display device according to claim 1 , wherein the bias voltage is applied to a gate of the driving transistor. 3 . The display device according to claim 1 , wherein the controller generates the switch control signal based on an average value of a threshold voltage shift of the driving transistor calculated according to a total number of sub-pixels in the display panel.

4. The display device according to claim 3, wherein the controller is further configured to: generating the switch control signal having an off signal level for sub-pixels of a color less than the average value of the threshold voltage shift of the drive transistor, and The switch control signal is generated to have a turn-on signal level for sub-pixels of a color greater than an average value of the threshold voltage shift of the drive transistor.

5. The display device according to claim 1, wherein the switch circuit comprises a plurality of switches, and Each of the plurality of switches includes a first electrode commonly connected to an output terminal of the bias voltage output circuit, a second electrode dividedly connected to the data line of the display panel, and a control electrode connected to a control signal line to which the switch control signal is applied. 6 . The display device according to claim 5 , wherein all of the on-times of the plurality of switches are equal to each other, or at least one of the on-times of the plurality of switches is different. 7 . The display device according to claim 1 , wherein a turn-on time of the switch circuit varies based on a threshold voltage shift amount of the drive transistor. 8 . The display device according to claim 1 , wherein the switch circuit comprises a plurality of switches respectively corresponding to data lines of red, green, white, and blue sub-pixels included in the display panel.

9. The display device according to claim 3, wherein the controller generates the switch control signal as a turn-off signal for sub-pixels of colors whose threshold voltages are smaller than the average value of the threshold voltage offset of the driving transistor, and generates the switch control signal as a turn-on signal for sub-pixels of colors whose threshold voltages are larger than the average value of the threshold voltage offset of the driving transistor. 10 . The display device of claim 1 , wherein the controller calculates degradation information about the driving transistor based on a sensing value transmitted from a driver driving the display panel.

11. A method for driving a display device, the method comprising: driving the display panel; generating a switch control signal for controlling a switch circuit provided in the display panel based on degradation information about a drive transistor included in a sub-pixel of the display panel when the display panel is in a non-driving state; and Based on the switch control signal, the switch circuit is controlled to apply the bias voltage output from the bias voltage output circuit to the sub-pixel through the data line of the display panel.

12. The driving method according to claim 11, wherein the switch circuit comprises a plurality of switches, and All of the on-times of the plurality of switches are equal to each other, or at least one of the on-times of the plurality of switches is different.

13. The driving method according to claim 11, wherein the bias voltage is applied to a gate of the driving transistor. 14 . The driving method according to claim 11 , wherein the switch control signal is generated based on an average value of a threshold voltage shift of the driving transistor calculated according to a total number of sub-pixels in the display panel. 15 . The driving method according to claim 14 , wherein all of the on-times of the plurality of switches are equal to each other, or at least one of the on-times of the plurality of switches is different. 16 . The driving method according to claim 11 , wherein a turn-on time of the switch circuit varies based on a threshold voltage shift amount of the driving transistor.

17. The driving method according to claim 11, wherein the switch control signal is generated as a turn-off signal for sub-pixels of a color whose threshold voltage offset is smaller than the average value of the threshold voltage offset of the driving transistor, and the switch control signal is generated as a turn-on signal for sub-pixels of a color whose threshold voltage offset is larger than the average value of the threshold voltage offset of the driving transistor.