Display device and driving method thereof

Abstract

The present embodiment relates to a display device and a method for driving the same, and more particularly, to a display device and a method for driving the same, which can display a part of a unit frame image on one region of a display panel, and a touch input of a user may also be sensed on the remaining area of the display panel.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10 - 2023 - 0196746, filed on December 29, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical field

[0003] The present disclosure relates to a display device and a method for driving the display device. Background art

[0004] A user interface (UI) can enable a user to easily control various electronic devices by enabling communication between the user and the electronic device. User interface technology has advanced time and time again in the direction of improving user sensitivity and operation convenience, and has recently evolved into a touch UI, a voice UI, a 3D (dimensional) UI, etc.

[0005] Among them, the touch UI senses a user's touch input by implementing a touch screen on a display panel.

[0006] The touch UI has basically been adopted in portable information devices such as smart phones and has been widely applied to notebook computers, computer monitors, refrigerators, etc.

[0007] In a display device to which the above - mentioned touch UI is applied, a unit - frame period for displaying a unit - frame video can be divided into a display driving period and a touch driving period.

[0008] In other words, the display device displays one frame of a video during the display driving period of a unit - frame period and then senses a user's touch input during the touch driving period, which is the remaining period.

[0009] As described above, since a display device in which a unit - frame period is divided into a display driving period and a touch driving period has a shorter time for displaying a unit - frame video compared to a display device that does not apply a touch UI for displaying a unit - frame video, there are limitations in high - speed driving at a high frame frequency. Summary of the invention

[0010] The present disclosure provides a display device and a method for driving the display device, which can display a part of a unit - frame image on one area of a display panel and can also sense a user's touch input on the remaining area of the display panel.

[0011] The object of the present disclosure is not limited to the above - mentioned object, and other unmentioned objects will be clearly understood by those skilled in the art from the following description.

[0012] The present embodiment provides a method for driving a display device, the method including the following steps: when writing first pixel data to a first pixel in a first display area, sensing a touch input on a second display area; and when writing second pixel data to a second pixel in the second display area, sensing a touch input on the first display area.

[0013] In the step of sensing a touch input on the second display area, the display device may be configured to apply a first data voltage corresponding to the first pixel data to a first data line in the first display area.

[0014] The display device may be configured to apply a first noise compensation voltage having a phase opposite to that of the first data voltage to a second data line in the second display area, and may be configured to compensate for a noise component generated in the second display area by the first data voltage when writing the first pixel data to the first pixel.

[0015] The first data line and the second data line may be physically separated from each other, and the first noise compensation voltage may not be transmitted to the first data line.

[0016] In the step of sensing a touch input on the first display area, the display device may be configured to apply a second data voltage corresponding to the second pixel data to a second data line in the second display area.

[0017] The display device may be configured to apply a second noise compensation voltage having a phase opposite to that of the second data voltage to a first data line in the first display area, and may be configured to compensate for a noise component generated in the first display area by the second data voltage when writing the second pixel data to the second pixel.

[0018] The display device may be configured to electrically connect the second data line and the second pixel to each other, and may be configured to electrically separate the first data line and the first pixel from each other.

[0019] On the other hand, the present embodiment provides a display device, which includes: a display panel including a first display area in which a plurality of first pixels are provided and a second display area in which a plurality of second pixels electrically separated from the first pixels are provided; a first display area driver configured to write first pixel data on the first pixels in the first display area; a second display area driver configured to write second pixel data on the second pixels in the second display area; a first touch sensor provided on the first display area; a second touch sensor provided on the second display area; and a touch sensor driver configured to sense a touch input on the second display area by driving the second touch sensor when writing the first pixel data on the first pixels, and configured to sense a touch input on the first display area by driving the first touch sensor when writing the second pixel data on the second pixels.

[0020] The first display area driver may include: a first gate driving circuit configured to output a gate signal to the first display area; and a first data driving circuit configured to output a first data voltage corresponding to the first pixel data to a first data line provided in the first display area, and the second display area driver may include: a second gate driving circuit configured to output a gate signal to the second display area; and a second data driving circuit configured to output a second data voltage corresponding to the second pixel data to a second data line provided in the second display area.

[0021] When the touch sensor driver drives the second touch sensor, the second gate driving circuit may be configured not to output a gate signal to the second display area, and the second data driving circuit may be configured to output a first noise compensation voltage having a phase opposite to that of the first data voltage to the second data line, and compensate for a noise component generated in the second touch sensor by the first data voltage.

[0022] The first data line and the second data line may be physically separated from each other, and the first noise compensation voltage may not be transmitted to the first data line.

[0023] When the touch sensor driver drives the first touch sensor, the first gate driving circuit may be configured not to output a gate signal to the first display area, and the first data driving circuit may be configured to output a second noise compensation voltage having a phase opposite to that of the second data voltage to the first data line, and compensate for a noise component generated in the first touch sensor by the second data voltage.

[0024] The touch sensor driver may include: a first touch driving circuit configured to drive a first touch sensor when writing second pixel data to a second pixel; and a second touch driving circuit configured to drive a second touch sensor when writing first pixel data to a first pixel.

[0025] A part of a first period for writing first pixel data to a first pixel and a part of a second period for writing second pixel data to a second pixel may overlap each other.

[0026] The second touch driving circuit may be configured to drive the second touch sensor during a period in the first period that does not overlap with the second period, and not to drive the second touch sensor during a period that overlaps with the second period.

[0027] The first touch driving circuit may be configured to not drive the first touch sensor during a period in the second period that overlaps with the first period, and to drive the first touch sensor during a period that does not overlap with the first period.

[0028] As described above, according to the present disclosure, since the display device can display a part of a unit frame image in an area of the display panel during a period of a unit frame period, and can also sense a touch input of a user in the remaining area of the display panel, and can display the remaining part of the unit frame image in the remaining area of the display panel during the remaining period of the unit frame period, and can also sense a touch input of a user in an area of the display panel, it is possible to sufficiently ensure the time for displaying the unit frame image and the time for sensing the touch input of the user during the unit frame period, and because of this, high-speed driving of the display device becomes possible.

[0029] Various useful advantages and effects of the embodiments are not limited to the above, and will be more easily understood from the description of the specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] By referring to the drawings and describing in detail the exemplary embodiments of the present disclosure, the above and other objects, features, and advantages of the present disclosure will become more apparent to those of ordinary skill in the art. In the drawings:

[0031] Figure 1 is a block diagram showing a display device according to an embodiment of the present disclosure;

[0032] Figure 2 shows a unit frame period and a horizontal period;

[0033] Figure 3 is an illustration Figure 1 a diagram showing the configuration of a data driving circuit and data lines in the display device shown in

[0034] Figure 4 It is a diagram for explaining Figure 1 the configuration of the touch driving circuit in the display device shown;

[0035] Figure 5 and Figure 6 is a waveform diagram showing the waveforms of the signals output by the timing controller according to an embodiment of the present disclosure according to the first embodiment;

[0036] Figure 7 is a diagram for explaining the configuration for compensating for the noise generated in the touch area in the embodiment of the present disclosure;

[0037] Figure 8 is a diagram for explaining the noise improvement effect in the first touch area in the embodiment of the present disclosure;

[0038] Figure 9 is a diagram for explaining the noise improvement effect in the second touch area in the embodiment of the present disclosure;

[0039] Figure 10 and Figure 11 is a waveform diagram showing the waveforms of the signals output by the timing controller according to an embodiment of the present disclosure according to the second embodiment;

[0040] Figure 12 is a waveform diagram showing the waveforms of the signals output by the timing controller according to an embodiment of the present disclosure according to the third embodiment;

[0041] Figure 13 is a diagram for explaining the gamma curve characteristics of the data voltage and the gamma curve characteristics of the noise compensation voltage;

[0042] Figure 14 is a diagram exemplarily showing the distance reached by the noise compensation voltage in the first display area;

[0043] Figure 15 is a diagram exemplarily showing the slope changed according to the distance reached by the noise compensation voltage;

[0044] Figure 16 is a diagram for explaining the correlation between the distance reached by the noise compensation voltage and the gamma gain;

[0045] Figure 17 is a diagram exemplarily showing the gamma voltage generation circuit included in the data driving circuit;

[0046] Figure 18 is a diagram for explaining the gamma curve characteristics adjusted according to the gamma gain;

[0047] Figure 19A diagram exemplarily showing gamma voltages adjusted by gamma gain adjustment of a timing controller according to an embodiment of the present disclosure; and

[0048] Figure 20 and Figure 21 A diagram illustrating the configuration of a timing controller according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0049] Advantages and features of the present disclosure and methods for achieving them will be more clearly understood from the embodiments described below with reference to the accompanying drawings. However, the present disclosure is not limited to the following embodiments, but may be implemented in various different forms. On the contrary, the present embodiments will make the disclosure of the present disclosure complete and enable those skilled in the art to fully understand the scope of the present disclosure. The present disclosure is limited only within the scope of the appended claims.

[0050] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for describing the embodiments of the present disclosure are exemplary, and the present disclosure is not limited to the items shown. The same reference numerals always refer to the same elements. In addition, when describing the present disclosure, if it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present disclosure, the detailed description thereof will be omitted.

[0051] Terms such as "including", "comprising", "having", and "consisting of" used herein are generally intended to allow the addition of other components, unless the term is used together with the term "only". Any reference to the singular may include the plural unless otherwise explicitly stated.

[0052] Even if not explicitly stated, components are interpreted to include an ordinary error range.

[0053] To describe a positional relationship, for example, when the positional relationship and interconnection relationship between two parts are described as "on", "above", "below", "next to", "connected or coupled", "crossed or intersected", etc., one or more other parts may be inserted between the two parts, unless the terms "immediately" or "directly" are used in the expression.

[0054] Terms such as "first", "second", etc. may be used to distinguish components from each other, but the functions or structures of the components are not limited by the serial numbers or component names in front of the components. Since the claims are written around the essential components, the serial numbers in front of the component names in the claims may not match the serial numbers in front of the component names in the embodiments.

[0055] The following embodiments can be joined or combined with each other partially or entirely and can be linked and operated in various technical ways. The embodiments can be executed independently or in association with each other.

[0056] In the display device of the present disclosure, a display panel driver, a pixel circuit, a level shifter, etc. may include transistors. The transistors can be implemented by oxide transistors including an oxide semiconductor, LTPS transistors including low-temperature polycrystalline silicon (LTPS), etc. Here, the transistors can be thin-film transistors (TFTs).

[0057] A transistor is a three-terminal element including a gate, a source, and a drain. The source is a terminal that supplies carriers to the transistor. In a transistor, carriers flow starting from the source. The drain is a terminal through which carriers flow out of the transistor. The carrier flow in a transistor flows from the source to the drain. In the case of an N-channel transistor, since the carriers are electrons, the source voltage has a voltage lower than the drain voltage so that electrons can flow from the source to the drain. In an N-channel transistor, the direction of the current is from the drain to the source. In the case of a P-channel transistor, since the carriers are holes, the source voltage is higher than the drain voltage so that holes can flow from the source to the drain. In a P-channel transistor, since holes flow from the source to the drain, the current flows from the source to the drain. It should be noted that the source and drain of a transistor are not fixed. For example, the source and drain can change according to the applied voltage. Therefore, the present invention is not limited by the source and drain of the transistor. In the following description, the drain and source of the transistor are referred to as the first electrode and the second electrode.

[0058] The scan signal swings between a gate-on voltage and a gate-off voltage. The gate-off voltage can be interpreted as a first voltage, and the gate-on voltage can be interpreted as a second voltage. The transistor conducts in response to the gate-on voltage, while the transistor cuts off in response to the gate-off voltage. In the case of an N-channel transistor, the gate-on voltage can be a gate-high voltage (VGH), and the gate-off voltage can be a gate-low voltage (VGL). In the case of a P-channel transistor, the gate-on voltage can be a gate-low voltage (VGL), and the gate-off voltage can be a gate-high voltage (VGH).

[0059] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0060] Figure 1 is a block diagram of a display device according to an embodiment of the present disclosure.

[0061] A display device according to an embodiment of the present disclosure can sense a user's touch input on a second display area when writing first pixel data on a first pixel in a first display area.

[0062] In addition, the display device may sense a user's touch input on the first display area while writing second pixel data to the second pixels in the second display area.

[0063] To this end, the display device includes a display panel 100 and a display panel driver for writing pixel data to the pixels in the display panel 100.

[0064] The substrate of the display panel 100 may be a plastic substrate, a thin glass substrate, or a metal substrate, but is not limited thereto. The display panel 100 may be a panel having a rectangular structure with a length in the X-axis direction (or the first direction), a width in the Y-axis direction (or the second direction), and a thickness in the Z-axis direction (or the third direction), but is not limited thereto. For example, at least a part of the display panel 100 may have a curved outer portion.

[0065] The display panel 100 may be implemented as a non-transmissive display panel or a transmissive display panel. Here, the transmissive display panel may be applied to a transparent display device that displays an image on the screen and shows real things outside the display panel 100.

[0066] The display panel 100 may be manufactured as a flexible display panel. In addition, the display panel 100 may be manufactured as a stretchable panel.

[0067] The display area of the display panel 100 may be divided into a first display area AA1 and a second display area AA2.

[0068] In the first display area AA1, a first data line DL1 and a first gate line GL1 intersecting the first data line DL1 are provided, and first pixels 101 are arranged in a matrix form.

[0069] In addition, in the second display area AA2, a second data line DL2 and a second gate line GL2 intersecting the second data line DL2 are provided, and second pixels 102 are arranged in a matrix form.

[0070] The display panel 100 may further include a low-voltage power line (e.g., a ground line) commonly connected to the first pixel 101 in the first display area AA1 and the second pixel 102 in the second display area AA2. The low-voltage power line is commonly connected to the first pixel 101 in the first display area AA1 and the second pixel 102 in the second display area AA2, and supplies the cathode voltage ELVSS, which is one of the constant voltages required to drive the pixels 101 and 102, to the first pixel 101 and the second pixel 102. The low-voltage power line may be implemented as a strip-shaped line extending in the first direction or the second direction over the first display area AA1 and the second display area AA2, or may be implemented as a mesh line in which the lines in the first direction and the lines in the second direction are electrically connected. In some cases, the low-voltage power line may be implemented in the form of a thin film that is the same as or similar to the areas of the first display area AA1 and the second display area AA2.

[0071] The first pixel 101 in the first display area AA1 and the second pixel 102 in the second display area AA2 may include a liquid crystal cell containing liquid crystal molecules or a light-emitting element. For color implementation, each of the first pixel 101 and the second pixel 102 may be divided into a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Each of the pixels may further include a white sub-pixel. Each of the sub-pixels includes a pixel circuit for driving the light-emitting element. Each of the pixel circuits may be connected to a data line, a gate line, and a power line. Hereinafter, "pixel" may be interpreted as "sub-pixel".

[0072] Each of the first display area AA1 and the second display area AA2 includes a plurality of pixel rows L1 to Ln. Each of the pixel rows L1 to Ln includes 1 row of pixels arranged in the row direction (Z-axis direction) in each of the first display area AA1 and the second display area AA2 of the display panel 100. The first pixels 101 provided on 1 pixel row in the first display area AA1 share the first gate line GL1. In addition, the second pixels 102 provided on 1 pixel row in the second display area AA2 share the second gate line GL2.

[0073] The sub-pixels arranged in the column direction (Y) in the data line direction in the first display area AA1 share the same data line DL1. Here, 1 horizontal period is the time obtained by dividing the unit frame period by the total number of the pixel rows L1 to Ln.

[0074] The display panel driver writes the pixel data of the input image into the pixel circuits of the display panel 100 under the control of the timing controller 150.

[0075] The display panel driver includes a first display area driver for driving a first display area AA1. In addition, the display panel driver includes a second display area driver for driving a second display area AA2.

[0076] In other words, the display panel driver includes a first display area driver that writes first pixel data to first pixels 101 in the first display area AA1 and a second display area driver that writes second pixel data to second pixels 102 in the second display area AA2.

[0077] Here, the first display area driver may include a first data driving circuit 112 and a first gate driving circuit 122. In addition, the second display area driver may include a second data driving circuit 114 and a second gate driving circuit 124.

[0078] Meanwhile, in the present disclosure, a first touch sensor may be provided on the first display area AA1 of the display panel 100. In addition, a second touch sensor may be provided on the second display area AA2.

[0079] In other words, the first touch sensor may be provided on a first touch area ( Figure 4 TA1) corresponding to the first display area AA1, and the second touch sensor may be provided on a second touch area ( Figure 4 TA2) corresponding to the second display area AA2.

[0080] In this case, the display panel driver may include a touch sensor driver configured to drive the first touch sensor and the second touch sensor.

[0081] Here, when writing first pixel data to the first pixels 101 through the first display area driver, the touch sensor driver may drive the second touch sensor to sense a touch input on the second display area AA2.

[0082] In addition, when writing second pixel data to the second pixels 102 through the second display area driver, the touch sensor driver may drive the first touch sensor to sense a touch input on the first display area AA1.

[0083] The touch sensor driver as described above may include a first touch driving circuit 132, a second touch driving circuit 134, and a touch controller 140. The first touch driving circuit 132 is configured to drive the first touch sensor when writing second pixel data to the second pixels 102. The second touch driving circuit 134 is configured to drive the second touch sensor when writing first pixel data to the first pixels 101. The touch controller 140 is configured to control the driving of the first touch driving circuit 132 and the second touch driving circuit 134.

[0084] The first data driving circuit 112 and the first touch driving circuit 132 can be integrated into one driving integrated circuit (IC). In addition, the second data driving circuit 114 and the second touch driving circuit 134 can also be integrated into one driving IC.

[0085] The first data driving circuit 112 can write first pixel data corresponding to a first divided image displayed on the first display area AA1 in a unit frame image onto the first pixel 101.

[0086] In other words, the first data driving circuit 112 receives a first pixel data signal corresponding to the first pixel data from the timing controller 150, and converts the first pixel data signal into a first data voltage to apply the converted first data voltage to the first data line DL1.

[0087] The second data driving circuit 114 can write second pixel data corresponding to a second divided image displayed on the second display area AA2 in a unit frame image onto the second pixel 102.

[0088] In other words, the second data driving circuit 114 receives a second pixel data signal corresponding to the second pixel data from the timing controller 150, and converts the second pixel data signal into a second data voltage to apply the converted second data voltage to the second data line DL2.

[0089] The second data driving circuit 114 as described above can be implemented as one or more second source driver ICs SDIC2 as in Figure 3 . In addition, the first data driving circuit 112 can also be implemented as one or more first source driver ICs SDIC1. The first source driver IC SDIC1 and the second source driver IC SDIC2 can be connected to the bonding pads of the display panel 100 by a tape automated bonding (TAB) method or a chip on glass (COG) method. In addition, the first source driver IC SDIC1 and the second source driver IC SDIC2 can be implemented as a chip on film (COF) mounted on a film as in Figure 3 .

[0090] In an embodiment of the present disclosure, the first data line DL1 connected to the first data driving circuit 112 and the second data line DL2 connected to the second data driving circuit 114 are separated from each other. In other words, the first data line DL1 and the second data line DL2 are physically separated from each other. In addition, they are also electrically separated from each other.

[0091] Therefore, the first data voltage output by the first data driving circuit 112 to the first data line DL1 is not transmitted to the second data line DL2. In addition, the second data voltage output by the second data driving circuit 114 to the second data line DL2 is not transmitted to the first data line DL1.

[0092] The first gate driving circuit 122 and the second gate driving circuit 124 may be disposed in the non-display area of the display panel 100.

[0093] The first gate driving circuit 122 may be disposed in a non-display area NA located on the left or right side of the first display area AA1 as shown in Figure 3 and may supply gate signals to the first gate line GL1 by a single-feed method.

[0094] The first gate driving circuit 122 may be disposed in two non-display areas located on the left and right sides of the first display area AA1, and may supply gate signals to both sides of the first gate line GL1 by a double-feed method. Here, the first gate driving circuit 122 may be activated by receiving a first start pulse VST1 from the timing controller 150. In this state, the first gate driving circuit 122 may sequentially output gate signals to the first gate line GL1.

[0095] The second gate driving circuit 124 may be disposed in a non-display area located on the left or right side of the second display area AA2 as shown in Figure 3 and may supply gate signals to the second gate line GL2 by a single-feed method.

[0096] The second gate driving circuit 124 may be disposed in two non-display areas located on the left and right sides of the second display area AA2, and may supply gate signals to both sides of the second gate line GL2 by a double-feed method. Here, the second gate driving circuit 124 may be activated by receiving a second start pulse VST2 from the timing controller 150. In this state, the second gate driving circuit 124 may sequentially output gate signals to the second gate line GL2.

[0097] The first touch driving circuit 132 is connected to the first touch line TL1, and the second touch driving circuit 134 is connected to the second touch line TL2. The first touch line TL1 is connected to the first touch sensor disposed in Figure 4 the first touch area TA1, and the second touch line TL2 is connected to the second touch sensor disposed in Figure 4 the second touch area TA2.

[0098] The first touch line TL1 and the second touch line TL2 may include a TX line Tx through which a driving signal for driving a touch sensor is applied and an RX line Rx through which a touch sensing signal of the touch sensor is transmitted. Here, the touch sensor may be disposed on the display panel 100 in an on-cell type or an add-on type, or may be implemented in an in-cell type in which the touch sensor is built in the display panel 100. The touch sensor may be a touch sensor using capacitance, for example, a self-capacitance type touch sensor or a mutual-capacitance type touch sensor, but is not limited thereto.

[0099] The first touch driving circuit 132 may be activated or deactivated by the touch controller 140. The first touch driving circuit 132 activated by the touch controller 140 applies a TX signal to the first touch sensor through the TX line Tx of the first touch area TA1, and generates first touch raw data by converting the touch sensing signal received from the RX line Rx of the first touch area TA1 of the first touch sensor into digital data. In addition, the first touch driving circuit 132 may output the first touch raw data to the touch controller 140.

[0100] The second touch driving circuit 134 may also be activated or deactivated by the touch controller 140. The second touch driving circuit 134 activated by the touch controller 140 applies a TX signal to the second touch sensor through the TX line Tx of the second touch area TA2, and generates second touch raw data by converting the touch sensing signal received from the RX line Rx of the second touch area TA2 of the second touch sensor into digital data. In addition, the second touch driving circuit 134 may output the second touch raw data to the touch controller 140.

[0101] The touch controller 140 may activate or deactivate the second touch driving circuit 134 by using a first touch synchronization signal TSYNC1 input from the timing controller 150. In other words, the touch controller 140 may activate or deactivate the second touch area TA2 by using the first touch synchronization signal TSYNC1.

[0102] Here, the touch controller 140 may activate the second touch area TA2 when the voltage level of the first touch synchronization signal TSYNC1 is a first voltage level LV1, and may deactivate the second touch area TA2 when the voltage level of the first touch synchronization signal TSYNC1 is a second voltage level LV2.

[0103] In other words, when the voltage level of the first touch synchronization signal TSYNC1 is the first voltage level LV1, the touch controller 140 may activate the second touch driving circuit 134 so that the second touch sensors in the second touch area TA2 can sense a touch input from a user.

[0104] The touch controller 140 may activate or deactivate the first touch driving circuit 132 by using a second touch synchronization signal TSYNC2 input from the timing controller 150. In other words, the touch controller 140 may activate or deactivate the first touch area TA1 by using the second touch synchronization signal TSYNC2.

[0105] Here, the touch controller 140 may activate the first touch area TA1 when the voltage level of the second touch synchronization signal TSYNC2 is the first voltage level LV1, and may deactivate the first touch area TA1 when the voltage level of the second touch synchronization signal TSYNC2 is the second voltage level LV2.

[0106] In other words, when the voltage level of the second touch synchronization signal TSYNC2 is the first voltage level LV1, the touch controller 140 may activate the first touch driving circuit 132 so that the first touch sensors in the first touch area TA1 can sense a touch input from a user.

[0107] Meanwhile, the touch controller 140 may receive first touch raw data from the first touch driving circuit 132 and may compare the first touch raw data with a predetermined reference value.

[0108] First touch raw data that is equal to or greater than the reference value may be output as a logic value indicating a touch input from a user. The touch controller 140 may transmit first touch data including such a logic value to a host system (not shown).

[0109] The touch controller 140 may receive second touch raw data from the second touch driving circuit 134 and may compare the second touch raw data with a predetermined reference value.

[0110] Second touch raw data that is equal to or greater than the reference value may be output as a logic value indicating a touch input from a user. The touch controller 140 may transmit second touch data including such a logic value to a host system (not shown).

[0111] In Figure 4 , although the touch area on the display panel 100 is described as being divided into two touch areas, the present disclosure is not limited thereto, and the touch area may be divided into four or more touch areas.

[0112] For example, the first touch area TA1 can be further divided into two touch areas, and the second touch area TA2 can be further divided into two touch areas, so that the touch areas on the display panel 100 can be divided into four touch areas.

[0113] In this case, since a touch driving circuit should be provided for each of the four touch areas, the touch sensor driver may include four touch driving circuits.

[0114] Although the touch areas on the display panel 100 are divided into four or more touch areas as described above, the areas of the first touch area TA1 and the second touch area TA2 may be equal to or similar to the areas of the first display area AA1 and the second display area AA2.

[0115] The timing controller 150 receives video data and timing signals synchronized with the video data from a host system (not shown). The video data received by the timing controller 150 is a digital signal. The timing controller 150 may convert the video data into a data format suitable for use in the first data driving circuit 112 and the second data driving circuit 114, and may output the converted video data to the first data driving circuit 112 and the second data driving circuit 114. Here, the timing signals may include a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, etc.

[0116] Refer to Figure 2 , the vertical synchronization signal VSYNC defines a frame period, that is, a unit frame period. Here, the vertical synchronization signal VSYNC includes an active period AT and a vertical blanking period VB.

[0117] The horizontal synchronization signal HSYNC defines a horizontal period (1H). The data enable signal DE defines an effective data interval, which includes pixel data to be written on the pixels. The pulse of the data enable signal is synchronized with the pixel data to be written on the pixels of the display panel 100. One pulse period of the data enable signal DE is a horizontal period (1H).

[0118] Since the vertical period and the horizontal period can be known by a method for counting the data enable signal, the vertical synchronization signal and the horizontal synchronization signal may be omitted.

[0119] The timing controller 150 may control the operation timings of the first data driving circuit 112 and the second data driving circuit 114 based on the timing signals received from a host system (not shown).

[0120] In addition, the timing controller 150 may control the operation timings of the first gate driving circuit 122 and the second gate driving circuit 124 based on the timing signals.

[0121] In addition, the timing controller 150 may control the operation timings of the first touch driving circuit 132 and the second touch driving circuit 134 based on timing signals.

[0122] In an embodiment of the present disclosure, the timing controller 150 may distinguish unit frame periods by using a vertical synchronization signal VSYNC received from a host system (not shown).

[0123] The timing controller 150 may control the operation timings of the first data driving circuit 112, the second data driving circuit 114, the first gate driving circuit 122, and the second gate driving circuit 124 for each of the two sub-periods by subdividing the unit frame period into two sub-periods.

[0124] In other words, the timing controller 150 may determine whether to display images of the first display area AA1 and the second display area AA2 for each of the sub-periods. To this end, the timing controller 150 may divide a unit frame image displayed on the display panel 100 during a unit frame period into a first divided image and a second divided image.

[0125] In addition, the timing controller 150 may determine whether to activate the first touch area TA1 and the second touch area TA2 for each of the sub-periods.

[0126] Specifically, the timing controller 150 may subdivide a unit frame period (1 frame) into a first sub-period P1 and a second sub-period P2 as shown in Figure 5 In the first sub-period P1, the first gate driving circuit 122 is activated, and a first pixel data signal AA1_DISPLAY corresponding to the first divided image is output to the first data driving circuit 112. Here, the timing controller 150 may activate the first gate driving circuit 122 by outputting a first start pulse VST1 to the first gate driving circuit 122.

[0127] The first data driving circuit 112 that has received the first pixel data signal AA1_DISPLAY may convert the first pixel data signal AA1_DISPLAY into a first data voltage, and may apply the converted first data voltage to the first data line DL1. In other words, the first pixel data may be written on the first pixel 101.

[0128] Therefore, the first divided image may be displayed on the first display area AA1 during the first sub-period P1.

[0129] Meanwhile, in the first sub-period P1, the timing controller 150 may output a first touch synchronization signal TSYNC1 for driving the second touch sensor of the second touch area TA2 to the touch controller 140. In other words, in the first sub-period P1, the timing controller 150 may output the voltage level of the first touch synchronization signal TSYNC1 as a first voltage level LV1.

[0130] Here, the second touch area TA2 is a touch area corresponding to a second display area AA2 where no image is displayed in the first sub-period P1.

[0131] The touch controller 140 may activate the second touch driving circuit 134 through the first touch synchronization signal TSYNC1 of the first voltage level LV1.

[0132] In the first sub-period P1, the timing controller 150 may deactivate the second gate driving circuit 124 by not outputting a second gate start pulse VST2.

[0133] In addition, the first touch area TA1 corresponding to the first display area AA1 where the first divided image is displayed may also be deactivated. Here, the timing controller 150 may deactivate the first touch area TA1 by configuring the voltage level of the second touch synchronization signal TSYNC2 output to the touch controller 140 as a second voltage level LV2.

[0134] As described above, in the first sub-period P1 of the unit frame period, the timing controller 150 may control the first divided image to be displayed on the first display area AA1, and may control the user's touch input to be sensed on the second touch area TA2 corresponding to the second display area AA2.

[0135] Here, the frame frequency of the first display area AA1 may be higher than the frame frequency of the display panel 100.

[0136] For example, when the frame frequency of the display panel 100 is 120 Hz and the first sub-period P1 is half of the unit frame period, the frame frequency of the first display area AA1 may be 240 Hz.

[0137] In the second sub-period P2, the timing controller 150 may activate the second gate driving circuit 124, and may output a second pixel data signal AA2_DISPLAY corresponding to the second divided image to the second data driving circuit 114. Here, the timing controller 150 may activate the second gate driving circuit 124 by outputting a second start pulse VST2 to the second gate driving circuit 124.

[0138] The second data driving circuit 114 that has received the second pixel data signal AA2_DISPLAY may convert the second pixel data signal AA2_DISPLAY into a second data voltage and may apply the converted second data voltage to the second data line DL2. In other words, the second pixel data may be written on the second pixel 102.

[0139] Therefore, in the second sub-period P2, the second divided image may be displayed on the second display area AA2.

[0140] Meanwhile, in the second sub-period P2, the timing controller 150 may output a second touch synchronization signal TSYNC2 for driving the first touch sensor of the first touch area TA1 to the touch controller 140. In other words, in the second sub-period P2, the timing controller 150 may output the voltage level of the second touch synchronization signal TSYNC2 as a first voltage level LV1.

[0141] Here, the first touch area TA1 is a touch area corresponding to the first display area AA1 where no image is displayed in the second sub-period P2.

[0142] The touch controller 140 may activate the first touch driving circuit 132 through the second touch synchronization signal TSYNC2 of the first voltage level LV1.

[0143] In the second sub-period P2, the timing controller 150 may deactivate the first gate driving circuit 122 by not outputting the first gate start pulse VST1.

[0144] In addition, the second touch area TA2 corresponding to the second display area AA2 where the second divided image is displayed may also be deactivated. Here, the timing controller 150 may deactivate the second touch area TA2 by configuring the voltage level of the first touch synchronization signal TSYNC1 output to the touch controller 140 as a second voltage level LV2.

[0145] As described above, in the second sub-period P2 of the unit frame period, the timing controller 150 may control the second divided image to be displayed on the second display area AA2 and may control the user's touch input to be sensed on the first touch area TA1 corresponding to the first display area AA1.

[0146] Here, the frame frequency of the second display area AA2 may be higher than the frame frequency of the display panel 100.

[0147] For example, when the frame frequency of the display panel 100 is 120Hz and the second sub-period P2 is half of the unit frame period, the frame frequency of the second display area AA2 may be 240Hz.

[0148] As described above, since the display area and the touch area of the display panel 100 are divided into two or more areas, and the timing controller 150 divides the unit frame period into sub-periods so that the display area and the touch area operate separately for each sub-period without overlapping each other, there is no need to divide the unit frame period into a display driving period and a touch driving period.

[0149] For example, when the frame frequency of the display panel 100 is 120 Hz and the unit frame period is 8.4 milliseconds (ms), the unit frame period can be divided into a display driving period and a touch driving period such that the display driving period can be 5.4 ms and the touch driving period can be 3 ms. In other words, the time for displaying a unit frame image on the display panel 100 can be 5.4 ms, and the time for sensing a user's touch input on the display panel 100 can be 3 ms.

[0150] In contrast, when the display area and the touch area of the display panel 100 are divided into two areas and the timing controller 150 divides the unit frame period into two halves, one sub-period becomes 4.2 ms.

[0151] In addition, since for each sub-period, both the display area and the touch area operate in a separated and non-overlapping manner, the time for displaying a unit frame image on the display panel 100 can be increased to 8.4 ms (4.2 ms for the first display area AA1 and 4.2 ms for the second display area AA2).

[0152] In addition, the time for sensing a user's touch input on the first touch area TA1 or the second touch area TA2 can be increased to 4.2 ms.

[0153] Meanwhile, in an embodiment of the present disclosure, a low-voltage power line (e.g., a ground line) can be commonly provided in the first display area AA1 and the second display area AA2 of the display panel 100. In this case, when a first divided image is displayed on the first display area AA1 in the first sub-period P1, coupling may occur between the first data line DL1 and the low-voltage power line of the first display area AA1, and a first coupling voltage similar to or equal to the first data voltage output to the first data line DL1 may be transmitted to the low-voltage power line of the second display area AA2.

[0154] Here, since the second touch area TA2 corresponding to the second display area AA2 is in an active state in the first sub-period P1, the first coupling voltage transmitted to the low-voltage power line of the second display area AA2 may act as noise for the second touch area TA2 and may deteriorate the accuracy of touch sensing.

[0155] Actually, in the second sub-period P2, a second coupling voltage similar to or equal to the second data voltage may also act as noise in the first touch area TA1 and may deteriorate the accuracy of touch sensing.

[0156] To compensate for the noise in the touch area, in the first embodiment, when the first divided image is displayed on the first display area AA1 in the first sub-period P1, as Figure 6 shown, the timing controller 150 may output a first noise compensation signal AA1_REVERSAL to the second data driver circuit 114. Here, when the first noise compensation signal AA1_REVERSAL is output to the second data driver circuit 114, the timing controller 150 may deactivate the second gate driver circuit 124.

[0157] In other words, in a state where the second gate driver circuit 124 is deactivated, the timing controller 150 may output the first noise compensation signal AA1_REVERSAL to the second data driver circuit 114.

[0158] Meanwhile, when the second divided image is displayed on the second display area AA2 in the second sub-period P2, as Figure 6 shown, the timing controller 150 may output a second noise compensation signal AA2_REVERSAL to the first data driver circuit 112. Here, when the second noise compensation signal AA2_REVERSAL is output to the first data driver circuit 112, the timing controller 150 may deactivate the first gate driver circuit 122.

[0159] In other words, in a state where the first gate driver circuit 122 is deactivated, the timing controller 150 may output the second noise compensation signal AA2_REVERSAL to the first data driver circuit 112.

[0160] Here, the first noise compensation signal AA1_REVERSAL is a signal having a phase opposite to that of the first pixel data signal AA1_DISPLAY, and the second noise compensation signal AA2_REVERSAL is a signal having a phase opposite to that of the second pixel data signal AA2_DISPLAY.

[0161] If the first noise compensation signal AA1_REVERSAL is output to the second data driving circuit 114 during the first sub-period P1, the second data driving circuit 114 may generate a first noise compensation voltage by using the first noise compensation signal AA1_REVERSAL. Here, since the phase of the first noise compensation signal AA1_REVERSAL is opposite to the phase of the first pixel data signal AA1_DISPLAY, the phase of the first noise compensation voltage also becomes opposite to the phase of the first data voltage.

[0162] The second data driving circuit 114 may apply the first noise compensation voltage having a phase opposite to the phase of the first data voltage as described above to the second data line DL2. Here, since the second gate driving circuit 124 is in a deactivated state and the gate signal is not output to the second display area AA2, the first noise compensation voltage is not transmitted to the second pixel 102 connected to the second data line DL2. Accordingly, the second pixel 102 connected to the second data line DL2 does not emit light due to the first noise compensation voltage.

[0163] If the second noise compensation signal AA2_REVERSAL is output to the first data driving circuit 112 during the second sub-period P2, the first data driving circuit 112 may generate a second noise compensation voltage by using the second noise compensation signal AA2_REVERSAL. Here, since the phase of the second noise compensation signal AA2_REVERSAL is opposite to the phase of the second pixel data signal AA2_DISPLAY, the phase of the second noise compensation voltage also becomes opposite to the phase of the second data voltage.

[0164] The first data driving circuit 112 may apply the second noise compensation voltage having a phase opposite to the phase of the second data voltage as described above to the first data line DL1. Here, since the first gate driving circuit 122 is in a deactivated state and the gate signal is not output to the first display area AA1, the second noise compensation voltage is not transmitted to the first pixel 101 connected to the first data line DL1. Accordingly, the first pixel 101 connected to the first data line DL1 does not emit light due to the second noise compensation voltage.

[0165] Meanwhile, during the first sub-period P1, the low voltage power line of the second display area AA2 may be in a state where a first coupling voltage similar to or equal to the first data voltage is applied thereto. In this state, if the second data line DL2 and the low voltage power line of the second display area AA2 are coupled to each other, the first coupling voltage may be canceled by the first noise compensation voltage having a phase opposite to the phase of the first coupling voltage.

[0166] In the same manner, in the second sub-period P2, the low-voltage power line of the first display area AA1 may be in a state where a second coupling voltage similar to or equal to the second data voltage is applied thereto. In this state, if the first data line DL1 and the low-voltage power line of the first display area AA1 are coupled to each other, the second coupling voltage can be canceled by a second noise compensation voltage having a phase opposite to that of the second coupling voltage.

[0167] In other words, cancellation interference may occur between the coupling voltage V_coupling applied to the low-voltage power line by the divided video data signal DISPLAY DATA as in Figure 7 and the noise compensation voltage V_reversal applied to the data line by the noise compensation signal REVERSALDATA, and thus the noise in the touch area can be compensated.

[0168] For example, as in Figure 8 if the noise of the second touch area TA2 is compensated by the first noise compensation signal AA1_REVERSAL, the noise after compensation can be reduced by 50% or more compared to the noise before compensation. Here, the noise of the second touch area TA2 is the coupling voltage applied to the low-voltage power line of the second touch area TA2, and Figure 8 the waveform of Figure 8 is the voltage waveform obtained by measuring the coupling voltage applied to the low-voltage power line of the second touch area TA2 for a predetermined time. In

[0169] the time unit is microseconds (μs), and the voltage unit is millivolts (mV).

[0169] In the same manner, as in Figure 9 if the noise of the first touch area TA1 is compensated by the second noise compensation signal AA2_REVERSAL, the noise after compensation can be reduced by 50% or more compared to the noise before compensation. Here, the noise of the first touch area TA1 is the coupling voltage applied to the low-voltage power line of the first touch area TA1, and Figure 9 the waveform of Figure 9 is the voltage waveform obtained by measuring the coupling voltage applied to the low-voltage power line of the first touch area TA1 for a predetermined time. In Figure 9 the time unit is μs, and the voltage unit is mV.

[0170] Figure 10 and Figure 11 are waveform diagrams showing the waveforms of the signals output by the timing controller according to an embodiment of the present disclosure according to the second embodiment.

[0171] In the second embodiment, a part of the first sub-period P1 for writing the first pixel data on the first pixel and a part of the second sub-period P2 for writing the second pixel data on the second pixel may overlap with each other.

[0172] In addition, the second touch driving circuit 134 may drive the second touch sensor during a period in the first sub-period P1 that does not overlap with the second sub-period P2, and may not drive the second touch sensor during a period that overlaps with the second sub-period P2.

[0173] To this end, the timing controller 150 may divide the unit frame period (1 frame) into the first sub-period P1 and the second sub-period P2 in such a way that a part of the first sub-period P1 and a part of the second sub-period P2 overlap with each other. In other words, in order to extend the first sub-period P1 and the second sub-period P2 within the unit frame period (1 frame), parts of the first sub-period P1 and the second sub-period P2 may overlap with each other. To this end, the second sub-period P2 may start before the end of the first sub-period P1.

[0174] The timing controller 150 may activate the first gate driving circuit 122 by outputting a first start pulse VST1 to the first gate driving circuit 122 during the first sub-period P1.

[0175] In addition, the timing controller 150 may output a first pixel data signal AA1_DISPLAY to the first data driving circuit 112 during the first sub-period P1.

[0176] The first data driving circuit 112 that has received the first pixel data signal AA1_DISPLAY may convert the first pixel data signal AA1_DISPLAY into a first data voltage, and may apply the converted first data voltage to the first data line DL1.

[0177] Therefore, the first divided image may be displayed on the first display area AA1 during the first sub-period P1.

[0178] Meanwhile, the timing controller 150 may set the first touch synchronization signal TSYNC1 to a first voltage level LV1 during a period in the first sub-period P1 that does not overlap with the second sub-period P2, and may output the set first voltage level LV1 to the touch controller 140. This activates the second touch area TA2 by the touch controller 140. In other words, the second touch driving circuit 134 may be activated by the touch controller 140 to drive the second touch sensor.

[0179] Here, in the period of the first sub-period P1 that does not overlap with the second sub-period P2, the second gate driving circuit 124 is in an inactive state, and the second divided image is not displayed on the second display area AA2 corresponding to the second touch area TA2.

[0180] In the second embodiment, the timing controller 150 may start the second sub-period P2 during the first sub-period P1, and may activate the second gate driving circuit 124 by outputting a second start pulse VST2 to the second gate driving circuit 124.

[0181] In addition, the timing controller 150 may output a second pixel data signal AA2_DISPLAY to the second data driving circuit 114 during the second sub-period P2.

[0182] The second data driving circuit 114 that has received the second pixel data signal AA2_DISPLAY may convert the second pixel data signal AA2_DISPLAY into a second data voltage, and may output the converted second data voltage to the second data line DL2.

[0183] Therefore, the second divided image may be displayed on the second display area AA2 during the second sub-period P2. Here, in the period of the first sub-period P1 that overlaps with the second sub-period P2, the first gate driving circuit 122 is in an active state, and the first divided image is even displayed on the first display area AA1.

[0184] Meanwhile, in the period of the first sub-period P1 that overlaps with the second sub-period P2, the timing controller 150 may set the first touch synchronization signal TSYNC1 to the second voltage level LV2, and may output the set second voltage level LV2 to the touch controller 140. In this way, the second touch area TA2 may be deactivated by the touch controller 140. In other words, the second touch driving circuit 134 may be deactivated by the touch controller 140, and the second touch sensor may not be driven.

[0185] Here, the period of the first sub-period P1 that overlaps with the second sub-period P2 is the period when the first divided image is displayed on the first display area AA1 and the second divided image is even displayed on the second display area AA2. Therefore, in the period of the first sub-period P1 that overlaps with the second sub-period P2, the timing controller 150 may set the second touch synchronization signal TSYNC2 to the second voltage level LV2, and may output the set second voltage level LV2 to the touch controller 140. This also deactivates the first touch area TA1 together with the second touch area TA2.

[0186] During a period in the second sub-period P2 that does not overlap with the first sub-period P1, the timing controller 150 may set the second touch synchronization signal TSYNC2 to the first voltage level LV1 and output the set first voltage level LV1 to the touch controller 140. This causes an image not to be displayed on the first display area AA1 corresponding to the first touch area TA1.

[0187] As described above, in the second embodiment, the first sub-period P1 and the second sub-period P2 may be extended within a unit frame period (1 frame), and the first touch area TA1 or the second touch area TA2 may be activated during a period when the first sub-period P1 and the second sub-period P2 do not overlap with each other. Therefore, the time for displaying the first divided image and the time for displaying the second divided image on the unit frame image can be increased.

[0188] Meanwhile, in the second embodiment, as Figure 11 shown, when the first touch synchronization signal TSYNC1 of the first voltage level LV1 is output to the touch controller 140, the timing controller 150 may output the first noise compensation signal AA1_REVERSAL to the second data driver circuit 114.

[0189] In addition, when the second touch synchronization signal TSYNC2 of the first voltage level LV1 is output to the touch controller 140, the timing controller 150 may output the second noise compensation signal AA2_REVERSAL to the first data driver circuit 112.

[0190] Figure 12 is a waveform diagram showing waveforms of signals output by a timing controller according to an embodiment of the present disclosure according to a third embodiment.

[0191] Referring to Figure 12 , in the first sub-period P1, the timing controller 150 may activate all the gate driver circuits in the first gate driver circuit 122 and the second gate driver circuit 124 by outputting the first gate start pulse VST1 to the first gate driver circuit 122 and the second gate start pulse VST2 to the second gate driver circuit 124.

[0192] In addition, the timing controller 150 may output the first pixel data signal AA1_DISPLAY to the first data driver circuit 112 and also output the second pixel data signal AA2_DISPLAY to the second data driver circuit 114.

[0193] The first data driving circuit 112 that has received the first pixel data signal AA1_DISPLAY can convert the first pixel data signal AA1_DISPLAY into a first data voltage and output the converted first data voltage to the first data line DL1.

[0194] The second data driving circuit 114 that has received the second pixel data signal AA2_DISPLAY can convert the second pixel data signal AA2_DISPLAY into a second data voltage and output the converted second data voltage to the second data line DL2.

[0195] Therefore, in the first sub-period P1, the first divided image can be displayed on the first display area AA1, and the second divided image can be displayed on the second display area AA2. In other words, in the first sub-period P1, a unit frame image can be displayed.

[0196] Meanwhile, in the first sub-period P1, the timing controller 150 can output the first touch synchronization signal TSYNC1 of the second voltage level LV2 and the second touch synchronization signal TSYNC2 of the second voltage level LV2 to the touch controller 140 to deactivate the first touch area TA1 and the second touch area TA2.

[0197] In the second sub-period P2, the timing controller 150 can deactivate the first gate driving circuit 122 and the second gate driving circuit 124 by not outputting the first gate start pulse VST1 and the second gate start pulse VST2.

[0198] In addition, the timing controller 150 can not output the first pixel data signal AA1_DISPLAY and the second pixel data signal AA2_DISPLAY.

[0199] Therefore, in the second sub-period P2, no image is displayed on the first display area AA1 and the second display area AA2.

[0200] Meanwhile, in the second sub-period P2, the timing controller 150 can output the first touch synchronization signal TSYNC1 of the first voltage level LV1 and the second touch synchronization signal TSYNC2 of the first voltage level LV1 to the touch controller 140 to activate the first touch area TA1 and the second touch area TA2.

[0201] As described above, the timing controller 150 can control the display of the divided images on the first display area AA1 and the second display area AA2 in the first sub-period P1 of a unit frame period (1 frame), and can control the sensing of the user's touch input on the first touch area TA1 and the second touch area TA2 in the second sub-period P2.

[0202] In other words, the unit frame image can be displayed on the display panel 100 during the first sub-period P1, and the touch input of the user can be sensed on the display panel 100 during the second sub-period P2.

[0203] As described above, in the third embodiment, since the touch input of the user is sensed only on the first touch area TA1 and the second touch area TA2 during the second sub-period P2, no noise is caused by the divided image display on the first display area AA1 or the second display area AA2.

[0204] Therefore, during the second sub-period, the timing controller 150 does not need to output a noise compensation signal to the first data driving circuit 112 or the second data driving circuit 114.

[0205] Meanwhile, in the embodiments of the present disclosure, the first data driving circuit 112 can generate a first data voltage and a second noise compensation voltage by using a gamma voltage.

[0206] The second data driving circuit 114 can also generate a second data voltage and a first noise compensation voltage by using a gamma voltage.

[0207] Figure 13 is a diagram illustrating the gamma curve characteristics of the data voltage and the gamma curve characteristics of the noise compensation voltage.

[0208] Referring to Figure 13 , if the data voltage Vdata is a voltage having a negative gamma curve characteristic in which the voltage decreases as the gray level increases, the noise compensation voltage Vreversal is a voltage having a positive gamma curve characteristic in which the voltage increases as the gray level increases.

[0209] Here, as in Figure 15 , the slew rate of the second noise compensation voltage output to each point of the first display area AA1 changes according to the distances d1, d2, d3, d4, d5, and d6 from which the second noise compensation voltage output from the first data driving circuit 112 reaches each point of the first display area AA1 as in Figure 14 .

[0210] Specifically, at the shortest arrival distance d1, the slew rate of the second noise compensation voltage can be the highest, and at the longest arrival distance d6, the slew rate of the second noise compensation voltage can be the lowest. In other words, the slew rate of the second noise compensation voltage can be inversely proportional to the arrival distance.

[0211] Here, if the slope of the second noise compensation voltage, that is, the slope of the noise compensation voltage output from the first data driving circuit 112 or the second data driving circuit 114 changes for each arrival distance, the noise compensation effect of the corresponding touch area TA1 or TA2 may be reduced.

[0212] Therefore, in an embodiment of the present disclosure, the timing controller 150 may output a gain configuration signal for configuring a gamma gain for each arrival distance of the noise compensation voltage to the first data driving circuit 112 or the second data driving circuit 114 as Figure 16 shown in.

[0213] The first data driving circuit 112 or the second data driving circuit 114 may improve the slope change of the noise compensation voltage according to the arrival distance by increasing or decreasing the gamma curve characteristic according to the gain configuration signal.

[0214] Here, the timing controller 150 may store gamma gain configuration values for the arrival distance of the noise compensation voltage in the form of a look-up table.

[0215] Meanwhile, the first data driving circuit 112 or the second data driving circuit 114 may include a gamma voltage generation circuit for generating a gamma voltage.

[0216] Figure 17 FIG. is an exemplary diagram showing a gamma voltage generation circuit included in the data driving circuit.

[0217] Referring to Figure 17, the gamma voltage generation circuit 1700 may include: a digital-to-analog converter (DAC) 1710 configured to reflect a gamma gain corresponding to a gain configuration signal (gain config) output from the timing controller 150 in a reference voltage; a maximum / minimum gamma voltage output circuit 1720 configured to output a maximum gamma voltage VH and a minimum gamma voltage VL by using the reference voltage in which the gamma gain is reflected; a first resistor array 1730 configured to output a plurality of branch voltages by using the maximum gamma voltage VH and the minimum gamma voltage VL; a gamma buffer circuit 1740 configured to output a plurality of buffered voltages by receiving the plurality of branch voltages; and a second resistor array 1750 configured to output gamma voltages for each gray level by branching the plurality of buffered voltages. Here, the maximum / minimum gamma voltage output circuit 1720 may include a first buffer 1722 and a second buffer 1724. The first buffer 1722 is configured to output the maximum gamma voltage VH by using the reference voltage in which the gamma gain is reflected, and the second buffer 1724 is configured to output the minimum gamma voltage VL by using the reference voltage in which the gamma gain is reflected.

[0218] The above gamma voltage generation circuit 1700 may output gamma voltages for each gray level by changing the gamma gain according to the gain configuration signal (gain config) input from the timing controller 150.

[0219] For example, when the gain configuration signal (gain config) is a gain configuration signal (gainconfig) corresponding to a reference distance, the gamma voltage generation circuit 1700 may output the gamma voltage of the minimum gray level (e.g., G0) as the minimum gamma voltage VL as shown in Figure 18 by reflecting the gamma gain corresponding to the reference distance. In addition, the gamma voltage generation circuit 1700 may output the gamma voltage of the maximum gray level (e.g., G2047) as the maximum gamma voltage VH.

[0220] When the gain configuration signal (gain config) is a gain configuration signal (gain config) corresponding to a short distance, the gamma voltage generation circuit 1700 may output the gamma voltage of the minimum gray level (e.g., G0) as a voltage (VL-m) lower than the minimum gamma voltage VL as shown in Figure 18 by reflecting the gamma gain corresponding to the short distance. In addition, the gamma voltage generation circuit 1700 may output the gamma voltage of the maximum gray level (e.g., G2047) as a voltage (VH-m) lower than the maximum gamma voltage VH.

[0221] When the gain configuration signal (gain config) is the gain configuration signal (gain config) corresponding to a long distance, the gamma voltage generation circuit 1700 can output the gamma voltage of the minimum gray level (e.g., G0) as a voltage (VL + n) higher than the minimum gamma voltage VL by reflecting the gamma gain corresponding to the long distance. Figure 18 In addition, the gamma voltage generation circuit 1700 can output the gamma voltage of the maximum gray level (e.g., G2047) as a voltage (VH + n) higher than the maximum gamma voltage VH.

[0222] As described above, the gamma voltage of each gray level can be increased or decreased as a whole according to the gain configuration signal (gain config) of the timing controller 150. Therefore, as Figure 19 shown, the gamma curve characteristic of the noise compensation voltage can be increased or decreased according to the arrival distance of the noise compensation voltage, and thus the slope change of the noise compensation voltage can be improved.

[0223] Hereinafter, the configuration of the timing controller 150 according to an embodiment of the present disclosure will be described.

[0224] Figure 20 and Figure 21 are diagrams illustrating the configuration of the timing controller according to an embodiment of the present disclosure.

[0225] Referring to Figure 20 , the timing controller 150 may include a gate drive control circuit 2010, a video data output circuit 2020, and a touch timing control circuit 2030. In addition, as shown in Figure 21 , the timing controller 150 may further include a gain configuration circuit 2110.

[0226] The gate drive control circuit 2010 may activate the first gate drive circuit 122 in the first sub-period P1 of a unit frame period (1 frame). The first gate drive circuit 122 activated in the first sub-period P1 may sequentially output gate signals to the first display area AA1 of the display panel 100.

[0227] Here, the gate drive control circuit 2010 may activate the first gate drive circuit 122 by outputting a first start pulse VST1 to the first gate drive circuit 122 at the start point of the first sub-period P1.

[0228] In addition, the gate drive control circuit 2010 may activate the second gate drive circuit 124 in the second sub-period P2. The second gate drive circuit 124 activated in the second sub-period P2 may sequentially output gate signals to the second display area AA2 of the display panel 100.

[0229] Here, the gate drive control circuit 2010 can activate the second gate drive circuit 124 by outputting a second start pulse VST2 to the second gate drive circuit 124 at the start point of the second sub-period P2.

[0230] The gate drive control circuit 2010 can activate the first gate drive circuit 122 and the second gate drive circuit 124 in the first sub-period P1, and can deactivate the first gate drive circuit 122 and the second gate drive circuit 124 in the second sub-period P2.

[0231] Here, the gate drive control circuit 2010 can activate the first gate drive circuit 122 and the second gate drive circuit 124 by outputting a first start pulse VST1 to the first gate drive circuit 122 and a second start pulse VST2 to the second gate drive circuit 124 at the start point of the first sub-period P1.

[0232] The gate drive control circuit 2010 can include a level shifter, and can output the first start pulse VST1 and the second start pulse VST2 through the level shifter.

[0233] The video data output circuit 2020 can output a first pixel data signal AA1_DISPLAY corresponding to a first divided image displayed on the first display area AA1 in a unit frame image to the first data drive circuit 112 in the first sub-period P1.

[0234] In addition, the video data output circuit 2020 can output a second pixel data signal AA2_DISPLAY corresponding to a second divided image displayed on the second display area AA2 in a unit frame image to the second data drive circuit 114 in the second sub-period P2.

[0235] When the first divided image is displayed on the first display area AA1 in the first sub-period P1, the video data output circuit 2020 can output a first noise compensation signal AA1_REVERSAL having a phase opposite to that of the first pixel data signal AA1_DISPLAY to the second data drive circuit 114. Because of this, the noise component generated on the second touch area TA2 by the first divided image displayed on the first display area AA1 can be compensated. Here, the noise component of the second touch area TA2 can be a first coupling voltage of a low-voltage power line transmitted to the second display area AA2 corresponding to the second touch area TA2. The first coupling voltage can be a voltage equal to or similar to the first data voltage corresponding to the first divided image.

[0236] When the video data output circuit 2020 outputs the first noise compensation signal AA1_REVERSAL to the second data driving circuit 114 as described above, the gate driving control circuit 2010 may deactivate the second gate driving circuit 124.

[0237] Meanwhile, when the second divided image is displayed on the second display area AA2 during the second sub-period P2, the video data output circuit 2020 may output a second noise compensation signal AA2_REVERSAL having a phase opposite to that of the second pixel data signal AA2_DISPLAY to the first data driving circuit 112. Because of this, the noise component generated on the first touch area TA1 by the second divided image displayed on the second display area AA2 can be compensated. Here, the noise component of the first touch area TA1 may be a second coupling voltage of the low voltage power line transmitted to the first display area AA1 corresponding to the first touch area TA1. The second coupling voltage may be a voltage equal to or similar to the second data voltage corresponding to the second divided image.

[0238] When the video data output circuit 2020 outputs the second noise compensation signal AA2_REVERSAL to the first data driving circuit 112 as described above, the gate driving control circuit 2010 may deactivate the first gate driving circuit 122.

[0239] During the first sub-period P1, the video data output circuit 2020 may output the first pixel data signal AA1_DISPLAY to the first data driving circuit 112, and may output the second pixel data signal AA2_DISPLAY to the second data driving circuit 114.

[0240] During the second sub-period P2, the video data output circuit 2020 does not output the first pixel data signal AA1_DISPLAY and the second pixel data signal AA2_DISPLAY.

[0241] The touch timing control circuit 2030 may output a first touch synchronization signal TSYNC1 for activating the second touch area TA2 corresponding to the second display area AA2 during the first sub-period P1. In other words, the touch timing control circuit 2030 may output the first touch synchronization signal TSYNC1 of the first voltage level LV1 to the touch controller 140.

[0242] The touch timing control circuit 2030 may output a second touch synchronization signal TSYNC2 for activating the first touch area TA1 corresponding to the first display area AA1 during the second sub-period P2. In other words, the touch timing control circuit 2030 may output the second touch synchronization signal TSYNC2 of the first voltage level LV1 to the touch controller 140.

[0243] Here, the second sub-period P2 may start at the end point of the first sub-period P1 and may end at the end point of the unit frame period (1 frame).

[0244] The touch timing control circuit 2030 may output the second touch synchronization signal TSYNC2 of the second voltage level LV2 to the touch controller 140 in the first sub-period P1. Due to this, the first touch area TA1 may be deactivated in the first sub-period P1.

[0245] In addition, the touch timing control circuit 2030 may output the first touch synchronization signal TSTNC1 of the second voltage level LV2 to the touch controller 140 in the second sub-period P2. Due to this, the second touch area TA2 may be deactivated in the second sub-period P2.

[0246] Meanwhile, in the case where the second sub-period P2 starts before the end of the first sub-period and a part of the first sub-period P1 overlaps with a part of the second sub-period P2, the touch timing control circuit 2030 may output the first touch synchronization signal TSYNC1 having the first voltage level LV1 in the period of the first sub-period P1 that does not overlap with the second sub-period P2. Due to this, the touch controller 140 may activate the second touch area TA2.

[0247] In addition, in the period of the first sub-period P1 that overlaps with the second sub-period P2, the touch timing control circuit 2030 may output the first touch synchronization signal TSYNC1 having the second voltage level LV2 different from the first voltage level LV1. Due to this, the touch controller 140 may deactivate the second touch area TA2.

[0248] Meanwhile, in the case where the video data output circuit 2020 outputs the first pixel data signal AA1_DISPLAY to the first data driver circuit 112 and outputs the second pixel data signal AA2_DISPLAY to the second data driver circuit 114 in the first sub-period P1, the touch timing control circuit 2030 may output the first touch synchronization signal TSYNC1 of the second voltage level LV2 and the second touch synchronization signal TSYNC2 of the second voltage level LV2 to the touch controller 140 in the first sub-period. Due to this, the first touch area TA1 and the second touch area TA2 may be deactivated in the first sub-period P1.

[0249] In addition, in the second sub-period P2, the touch timing control circuit 2030 may output a first touch synchronization signal SYNC1 of the first voltage level LV1 and a second touch synchronization signal TSYNC2 of the first voltage level LV1 to the touch controller 140. Due to this, the first touch area TA1 and the second touch area TA2 may be activated in the second sub-period P2.

[0250] As described in Figure 21 , the gain configuration circuit 2110 included in the timing controller 150 may output a gain configuration signal (gain config) for configuring the gamma gain of each arrival distance for the noise compensation voltage to the first data driving circuit 112 or the second data driving circuit 114.

[0251] Here, the gain configuration circuit 2110 may store the gamma gain configuration values of each arrival distance of the noise compensation voltage in the form of a look-up table.

[0252] The objects to be achieved by the above-mentioned present disclosure, the means for achieving these objects, and the effects of the present disclosure do not specify the necessary features of the claims, and thus, the scope of the claims is not limited to the disclosure of the present disclosure.

[0253] Although the embodiments of the present disclosure have been described in more detail with reference to the drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed in the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above embodiments are illustrative in all aspects and do not limit the present disclosure. The protection scope of the present disclosure should be interpreted based on the appended claims, and all technical concepts within the equivalent scope should be interpreted as falling within the scope of the present disclosure.

[0254] [Description of Reference Numerals]

[0255] 100: Display panel 101: Pixel circuit

[0256] 112: First data driving circuit 114: Second data driving circuit

[0257] 122: First gate driving circuit 124: Second gate driving circuit

[0258] 132: First touch driving circuit 134: Second touch driving circuit 140: Touch controller 150: Timing controller 1700: Gamma voltage generation circuit 1710: DAC

[0259] 1720: Maximum / Minimum Gamma Voltage Output Circuit 1722: First Buffer

[0260] 1724: Second Buffer 1730: First Resistor Array

[0261] 1740: Gamma Buffer Circuit 1750: Second Resistor Array

[0262] 2010: Gate Drive Control Circuit 2020: Image Data Output Circuit

[0263] 2030: Touch Timing Control Circuit 2110: Gain Configuration Circuit

Claims

1. A method for driving a display device, comprising the following steps: When writing first pixel data on a first pixel in the first display area, sensing a touch input on a second display area; as well as When second pixel data is written on second pixels in the second display area, a touch input is sensed on the first display area.

2. The method according to claim 1, wherein: In the step of sensing a touch input on the second display area, the display device is configured to apply a first data voltage corresponding to the first pixel data to a first data line in the first display area.

3. The method according to claim 2, wherein: The display device is configured to apply a first noise compensation voltage having a phase opposite to that of the first data voltage to a second data line in the second display area, and is configured to compensate for a noise component generated in the second display area by the first data voltage when the first pixel data is written on the first pixel.

4. The method according to claim 3, wherein: The first data line and the second data line are physically separated from each other, and the first noise compensation voltage is not transmitted to the first data line.

5. The method according to claim 1, wherein: In the step of sensing a touch input on the first display area, the display device is configured to apply a second data voltage corresponding to the second pixel data to a second data line in the second display area.

6. The method according to claim 5, wherein: The display device is configured to apply a second noise compensation voltage having a phase opposite to that of the second data voltage to a first data line in the first display area, and is configured to compensate for a noise component generated in the first display area by the second data voltage when the second pixel data is written on the second pixel.

7. The method according to claim 6, wherein: The display device is configured to electrically connect the second data line and the second pixel to each other, and is configured to electrically separate the first data line and the first pixel from each other.

8. A display device, comprising: a display panel including a first display area in which a plurality of first pixels are disposed and a second display area in which a plurality of second pixels electrically separated from the first pixels are disposed; a first display area driver configured to write first pixel data on a first pixel in the first display area; a second display area driver configured to write second pixel data on second pixels in the second display area; a first touch sensor disposed on the first display area; a second touch sensor disposed on the second display area; as well as A touch sensor driver configured to sense a touch input on the second display area by driving the second touch sensor when the first pixel data is written on the first pixel, and configured to sense a touch input on the first display area by driving the first touch sensor when the second pixel data is written on the second pixel.

9. The display device according to claim 8, wherein: The first display area driver comprises: A first gate driving circuit configured to output a gate signal to the first display area; and A first data driving circuit is configured to output a first data voltage corresponding to the first pixel data to a first data line disposed in the first display area, and The second display area driver comprises: a second gate driving circuit configured to output a gate signal to the second display area; and The second data driving circuit is configured to output a second data voltage corresponding to the second pixel data to a second data line disposed in the second display area.

10. The display device according to claim 9, wherein: When the touch sensor driver drives the second touch sensor, the second gate driving circuit is configured not to output the gate signal to the second display area, and the second data driving circuit is configured to output a first noise compensation voltage having a phase opposite to that of the first data voltage to the second data line, and is configured to compensate for a noise component generated in the second touch sensor by the first data voltage.

11. The display device according to claim 10, wherein: The first data line and the second data line are physically separated from each other, and the first noise compensation voltage is not transmitted to the first data line.

12. The display device according to claim 9, wherein: When the touch sensor driver drives the first touch sensor, the first gate driving circuit is configured not to output the gate signal to the first display area, and the first data driving circuit is configured to output a second noise compensation voltage having a phase opposite to that of the second data voltage to the first data line and compensate for a noise component generated in the first touch sensor by the second data voltage.

13. The display device according to claim 8, wherein: The touch sensor driver comprises: a first touch driving circuit configured to drive the first touch sensor when writing the second pixel data on the second pixel; and The second touch driving circuit is configured to drive the second touch sensor when the first pixel data is written on the first pixel.

14. The display device according to claim 13, wherein: A portion of a first period during which the first pixel data is written on the first pixel and a portion of a second period during which the second pixel data is written on the second pixel overlap with each other.

15. The display device according to claim 14, wherein: The second touch driving circuit is configured to drive the second touch sensor in a period of the first period that does not overlap with the second period, and not drive the second touch sensor in a period of the first period that overlaps with the second period.

16. The display device according to claim 14, wherein: The first touch driving circuit is configured not to drive the first touch sensor in a period of the second period overlapping with the first period, and to drive the first touch sensor in a period of the second period not overlapping with the first period.

17. A display device, comprising: A display panel, the display panel comprising a first display area and a second display area, the first display area comprising a plurality of first pixels, and the second display area comprising a plurality of second pixels; a plurality of first data lines coupled to the plurality of first pixels; a plurality of second data lines coupled to the plurality of second pixels, the plurality of second data lines being each separated from the plurality of first data lines; a first data driver coupled to the plurality of first pixels via the plurality of first data lines, the first data driver configured to provide a first data voltage to the plurality of first pixels; A second data driver is coupled to the plurality of second pixels via the plurality of second data lines, the second data driver being configured to provide a first noise compensation voltage to the plurality of second pixels, the first noise compensation voltage having a phase opposite to that of the first data voltage.

18. The display device according to claim 17, wherein: The second data driver is configured to provide a second data voltage to the plurality of second pixels; as well as The first data driver is configured to provide a second noise compensation voltage to the plurality of first pixels, the second noise compensation voltage having a phase opposite to that of the second data voltage.

19. The display device according to claim 18, further comprising: A first touch sensor on the first display area and a first touch driver coupled to the first touch sensor, the first touch driver configured to activate the first touch sensor in response to the second data driver providing the second data voltage and the first data driver providing the second noise compensation voltage.

20. The display device according to claim 19, wherein: The first touch driver is configured to deactivate the first touch sensor in response to the second data driver providing the second data voltage and the first data driver providing the first data voltage.

Images