Polycrystalline oxide layer silicon wafer preparation method and injection machine stability monitoring method
By preparing polycrystalline oxide layer silicon wafers on bare silicon wafers and combining a single annealing monitoring method, the problems of insufficient sensitivity and feedback hysteresis of the ion implanter are solved, and the early detection of dose deviation is achieved, and the stability of the injection machine and the performance of semiconductor devices are improved.
Patent Information
- Application Number
- CN202510396349.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2025-07-01
AI Technical Summary
The monitoring methods of existing ion implanters have insufficient sensitivity and feedback lag, resulting in large deviations in the injection dose, affecting the performance and yield of semiconductor devices.
Preparing polycrystalline oxide silicon wafers includes growing silicon dioxide oxide layer on the bare silicon wafer and depositing polycrystalline silicon sensitive layer, forming polycrystalline oxide silicon wafers, and injecting them together with the bare silicon wafers in the same batch, performing single annealing and square resistance change rate measurements, and determining abnormalities in the injection machine.
It improves the sensitivity and response speed of the injection machine, can detect dose deviations in the early stage, reduce defect diffusion, and improves the stability and reliability of semiconductor devices.
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Figure CN120236995A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of injection machine monitoring, and relates to a method for preparing polycrystalline oxide layer silicon wafers and a method for monitoring the stability of injection machines. Background Art
[0002] As a core device in chip manufacturing, the ion implanter is responsible for implanting impurity ions such as boron (B) and phosphorus (P) into the silicon lattice with nanometer-level precision. The accuracy of its implantation dose directly determines electrical parameters such as the threshold voltage and carrier concentration of semiconductor devices. However, in actual production, the state of the implanter is easily affected by factors such as vacuum fluctuations and beam offset, resulting in a dose deviation that may reach ±5% or even higher. Such a deviation is like a millimeter-level mistake in a precision operation. Although small, it is sufficient to cause the failure of transistor performance. For example, the threshold voltage drift exceeds the design tolerance, causing the chip to malfunction in high-frequency or low-power scenarios.
[0003] The traditional monitoring system relies on P<100> type bare silicon wafers for dose verification, but there are two inherent defects: 1. Insufficient sensitivity: The bare silicon wafer lacks a signal amplification structure, and the change in sheet resistance after implantation is very small, making it difficult to capture early process drift. 2. Feedback lag: The monitoring process needs to wait for the entire batch of wafers to complete implantation, annealing, and wafer acceptance test (Wafer Acceptance Test), which takes 48 - 72 hours. By this time, the defects have spread to hundreds of wafers, and the resulting loss is similar to "half of the cabin has been flooded when the hole in the bottom of the ship is discovered". This "hindsight" monitoring mode forces the production line to constantly balance between "risk - cost". According to the International Technology Roadmap for Semiconductors (ITRS) statistics, the loss of good product rate caused by injection process fluctuations exceeds $3 billion annually. Summary of the Invention
[0004] The purpose of the present invention is to solve the technical problems of insufficient sensitivity and feedback lag in the monitoring method of the existing ion implanter, and to provide a method for preparing polycrystalline oxide layer silicon wafers and a method for monitoring the stability of injection machines.
[0005] To achieve the above purpose, the present invention adopts the following technical solutions: In the first aspect, the present invention discloses a method for preparing polycrystalline oxide layer silicon wafers, including the following steps: Clean the P<100> bare silicon wafer to atomic-level cleanliness, and then grow an oxide layer; Deposit a polycrystalline silicon sensitive layer on the oxide layer of the P<100> bare silicon wafer to form a polycrystalline oxide layer silicon wafer with a bare silicon wafer, an oxide layer, and a polycrystalline silicon sensitive layer in sequence.
[0006] A further improvement lies in: The oxide layer is a silicon dioxide oxide layer with a thickness of 800 Å - 1200 Å; the thickness of the polysilicon sensitive layer is 3000 Å - 6000 Å.
[0007] The growth of the oxide layer is achieved by thermal oxidation; the deposition of the polysilicon sensitive layer uses low-pressure chemical vapor deposition, and the deposition temperature is 600 °C - 630 °C.
[0008] The grain size of the polysilicon sensitive layer is distributed in the range of 30nm - 50nm.
[0009] The monitoring range of the injection energy for the deposited polysilicon sensitive layer is 30KeV - 150KeV.
[0010] In a second aspect, the present invention discloses a method for monitoring the stability of an ion implantation machine for a polysilicon oxide layer wafer prepared by the above method, including the following steps: Place the polysilicon oxide layer wafer and the bare silicon wafer in the same implantation batch and apply exactly the same ion implantation process parameters; Perform a single annealing on the implanted polysilicon oxide layer wafer and the bare silicon wafer; Measure the sheet resistance change rate of the annealed polysilicon oxide layer wafer and the bare silicon wafer. When the sheet resistance change rate of the polysilicon oxide layer wafer exceeds a preset value, it is determined that the ion implantation machine is abnormal.
[0011] A further improvement lies in: The annealing temperature of the single annealing is 1030 °C - 1070 °C, and the annealing time is 20 s - 40 s.
[0012] The ion implantation process parameters include: The implanted ion type is boron ion or phosphorus ion; The injection dose deviation < ±1.5%; The injection angle is 7° ± 0.5° with the normal of the silicon wafer.
[0013] The preset value is 5%.
[0014] After the polysilicon oxide layer wafer has been ion implanted once and the sheet resistance change rate has been measured, surface plasma cleaning and rapid single annealing are performed to restore the initial sheet resistance value for repeated use.
[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention discloses a method for preparing a polycrystalline oxide layer silicon wafer. The regrown oxide layer can uniformly cover the surface of the bare silicon wafer to form a high-quality insulating layer, effectively isolating the electrical and chemical interference between the polysilicon sensitive layer and the bare silicon wafer, and improving the stability and reliability of the device. The polysilicon sensitive layer deposited on the oxide layer can form a uniform and dense structure, having good electrical properties and mechanical stability. This high-quality polysilicon sensitive layer can significantly improve the sensitivity and response speed of the device, and is applicable to various high-precision sensors and semiconductor devices.
[0016] Further, the thickness of the polysilicon sensitive layer is 3000 Å - 6000 Å. 3000 Å ensures sufficient signal amplification factor, which can increase the sheet resistance detection sensitivity by 3 - 5 times compared to the bare silicon wafer. 6000 Å avoids abnormal grain growth. > 50 nm will reduce the defect capture efficiency and at the same time reduce the risk of film peeling.
[0017] The present invention discloses a method for monitoring the stability of an implantation machine. The polysilicon sensitive layer captures implanted ions through grain boundary defects, amplifying the sheet resistance change signal by 3 - 5 times, and can detect a dose deviation < 3%. Traditional bare silicon wafers require a deviation > 10% to be detected. The monitoring wafers are implanted in the same batch as the products. Combining with the rapid sheet resistance test after single annealing, it realizes the instant feedback of the implantation process window and avoids the defect diffusion to the batch of wafers. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0019] Figure 1 It is the overall flowchart of a method for preparing a polycrystalline oxide layer silicon wafer and a method for monitoring the stability of an implantation machine in the present invention; Figure 2 It is the structural schematic diagram of the polycrystalline oxide layer silicon wafer in the present invention; Wherein: 1 - bare silicon wafer; 2 - oxide layer; 3 - polysilicon sensitive layer. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0020] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.
[0021] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.
[0022] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0023] The present invention will be further described in detail below with reference to the accompanying drawings: See Figure 1 , an embodiment of the present invention discloses a method for preparing a polycrystalline oxide layer silicon wafer, including the following steps: Step 1, cleaning a P<100> bare silicon wafer to atomic-level cleanliness and then growing an oxide layer; the oxide layer is a silicon dioxide oxide layer with a thickness of 800 Å - 1200 Å; the growth of the oxide layer is achieved by thermal oxidation.
[0024] Step 2, depositing a polycrystalline silicon sensitive layer on the oxide layer of the P<100> bare silicon wafer to form a polycrystalline oxide layer silicon wafer successively composed of a bare silicon wafer, an oxide layer, and a polycrystalline silicon sensitive layer. The thickness of the polycrystalline silicon sensitive layer is 3000 Å - 6000 Å. 3000 Å ensures a sufficient signal amplification factor, which can increase the sheet resistance detection sensitivity by 4 - 6 times compared with the bare silicon wafer. 6000 Å avoids abnormal grain growth. >50 nm will reduce the defect capture efficiency and at the same time reduce the risk of film peeling. The deposition of the polycrystalline silicon sensitive layer is carried out by low-pressure chemical vapor deposition, and the deposition temperature is 590 °C - 610 °C. The grain size of the polycrystalline silicon sensitive layer is distributed in the range of 30 nm - 50 nm. The process parameters for depositing the polycrystalline silicon sensitive layer include controlling the flow ratio of silane to hydrogen at 1:5 - 1:8.
[0025] The present invention discloses a method for preparing a polycrystalline oxide layer silicon wafer. The regenerated oxide layer can uniformly cover the surface of the bare silicon wafer to form a high-quality insulating layer, effectively isolating the electrical and chemical interference between the polycrystalline silicon sensitive layer and the bare silicon wafer, and improving the stability and reliability of the device. The polycrystalline silicon sensitive layer deposited on the oxide layer can form a uniform and dense structure, having good electrical properties and mechanical stability. This high-quality polycrystalline silicon sensitive layer can significantly improve the sensitivity and response speed of the device and is applicable to various high-precision sensors and semiconductor devices.
[0026] See Figure 1 , an embodiment of the present invention also discloses a method for monitoring the stability of an injection machine tool, including the following steps: Step 1: Place the polysilicon oxide layer wafer and the bare silicon wafer in the same injection batch and apply exactly the same ion implantation process parameters. The ion implantation process parameters include: The implanted ion type is boron ion or phosphorus ion; The injection dose deviation is < ±1.5%; The injection angle is 7° ± 0.5° with respect to the normal of the wafer.
[0027] Step 2: Perform a single annealing on the implanted polysilicon oxide layer wafer and the bare silicon wafer. The annealing temperature of the single annealing is 1030 °C - 1070 °C, and the annealing time is 20 s - 40 s.
[0028] Step 3: Measure the sheet resistance change rate of the annealed polysilicon oxide layer wafer and the bare silicon wafer. When the sheet resistance change rate of the polysilicon oxide layer wafer exceeds the preset value, it is determined that the injection machine is abnormal. The preset value is 5%.
[0029] Step 4: After the polysilicon oxide layer wafer has been ion implanted once and the sheet resistance change rate has been measured, perform surface plasma cleaning and rapid single annealing to restore the initial sheet resistance value for reuse.
[0030] The present invention discloses a method for monitoring the stability of an injection machine. The polysilicon sensitive layer captures implanted ions through grain boundary defects, amplifies the sheet resistance change signal by 3 - 5 times, and can detect a dose deviation < 3%. Traditional bare silicon wafers require a deviation > 10% to be detected. The monitoring wafer is injected in the same batch as the product, and combined with the rapid sheet resistance test after single annealing, it realizes the instant feedback of the injection process window and avoids the spread of defects to batch wafers.
[0031] Example 1 Monitoring of the injection machine before and after the establishment of the monitoring method.
[0032] (1) Test conditions Substrate: P-type <100>, resistivity (15 - 25) Ω·cm bare silicon wafer Thickness of the silicon dioxide growth film: 1000 Å Thickness of the polysilicon growth film: 5000 Å Annealing temperature and time: 1050 °C 30S Number of tests: 3 times continuously (2) Test results Table 1 Data table of sheet resistance measurement before and after the establishment of the polysilicon injection monitoring method
[0033] As shown in Table 1, using the polysilicon substrate wafer to monitor the injection machine, the measurement of sheet resistance is effective and stable.
[0034] Example 2 Bias the implantation dose and measure the sheet resistance of the tests before and after establishing the polycrystalline implantation monitoring method.
[0035] (1) Test conditions Substrate: P-type <100>, resistivity (15 - 25) Ω·cm bare silicon wafer Thickness of the grown silicon dioxide film: 1000 Å Thickness of the grown polycrystalline silicon film: 5000 Å Annealing temperature and time: 1050°C for 30 s Number of test runs: 3 times for each biasing condition (2) Test results For the monitoring of the implantation machine, the key factors affecting the implantation process include implantation energy, dose, angle, and process vacuum. Any change in the state will affect the change in the monitored sheet resistance. In this embodiment, the implantation process is completed on the same disk using bare silicon substrates and polycrystalline substrates as monitoring wafers, and the implantation dose is slightly biased. The verification conditions and results are shown in Table 2.
[0036] Table 2 Data table of sheet resistance measurement under different implantation dose conditions
[0037] By comparing the measured sheet resistance values corresponding to different implantation doses before and after establishing the polycrystalline implantation monitoring method, the verification results show that when the implantation dose changes by 1%, the change in the monitored sheet resistance using the bare silicon wafer is less than 1%, but the change in the monitored sheet resistance using the polycrystalline substrate wafer is approximately 3%. Therefore, using the polycrystalline substrate monitoring method can more effectively monitor the change in the machine state.
[0038] The present invention has been implemented in the 6-inch wafer process. Using this method to monitor the state of the ion implantation machine, the current effect is good.
[0039] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A method for preparing a polycrystalline oxide layer silicon wafer, characterized in that: The following steps are involved: P <100> The bare silicon wafer is cleaned to atomic level and then the oxide layer is grown; In P <100> A polysilicon sensitive layer is deposited on the oxide layer of the bare silicon wafer to form a polycrystalline oxide layer silicon wafer which comprises a bare silicon wafer, an oxide layer and a polysilicon sensitive layer in sequence.
2. The method for preparing a polycrystalline silicon wafer with an oxide layer according to claim 1, characterized in that: The oxide layer is a silicon dioxide oxide layer with a thickness of 800 Å-1200 Å; the thickness of the polysilicon sensitive layer is 3000 Å-6000 Å.
3. The method for preparing a polycrystalline silicon wafer with an oxide layer according to claim 1, characterized in that: The growth of the oxide layer is achieved by thermal oxidation; the deposition of the polysilicon sensitive layer is carried out by low-pressure chemical vapor deposition at a deposition temperature of 600°C-630°C.
4. The method for preparing a polycrystalline silicon wafer with an oxide layer according to claim 1, characterized in that: The grain size of the polysilicon sensitive layer is distributed in the range of 30nm to 50nm.
5. The method for preparing a polycrystalline silicon wafer with an oxide layer according to claim 1, characterized in that: The deposited polysilicon sensitive layer monitors the implantation energy in a range of 30KeV to 150KeV.
6. A method for monitoring the stability of an implantation machine for a polycrystalline oxide layer silicon wafer prepared by the method according to any one of claims 1 to 5, characterized in that: The following steps are involved: The polycrystalline oxide silicon wafer and the bare silicon wafer are placed in the same implantation batch and the same ion implantation process parameters are applied; Performing a single annealing on the implanted polycrystalline oxide layer silicon wafer and the bare silicon wafer; The square resistance change rate of the polycrystalline oxide layer silicon wafer and the bare silicon wafer after annealing is measured, and when the square resistance change rate of the polycrystalline oxide layer silicon wafer exceeds a preset value, it is determined that the implantation machine is abnormal.
7. The implantation machine stability monitoring method according to claim 6, characterized in that: The annealing temperature of the single annealing is 1030°C-1070°C, and the annealing time is 20 s-40 s.
8. The implantation machine stability monitoring method according to claim 6, characterized in that: The ion implantation process parameters include: The implanted ion type is boron ion or phosphorus ion; Injection dose deviation <±1.5%; The implantation angle is 7°±0.5° with respect to the normal line of the silicon wafer.
9. The implantation machine stability monitoring method according to claim 4, characterized in that: The preset value is 5%.
10. The implantation machine stability monitoring method according to claim 4, characterized in that: After the polycrystalline oxide layer silicon wafer is subjected to one-time ion implantation and the square resistance change rate is measured, surface plasma cleaning and rapid single annealing are performed to restore the initial square resistance value for repeated use.