Balun, semiconductor device and communication device

Abstract

The invention provides a balun, a semiconductor device and a communication device, which are applied to the technical field of chips and are used for solving the problem of poor higher harmonic suppression effect of an existing communication circuit. The balun comprises a first inductor, a second inductor magnetically coupled with the first inductor, and two resonant circuits. Wherein the first end of the first inductor is coupled with the non-inverting input port of the balun, and the second end of the first inductor is coupled with the inverting input port of the balun. The first end of the second inductor is coupled with the inverted output port of the balun, and the second end of the second inductor is coupled with the normal output port of the balun. A resonant circuit is respectively coupled with the normal phase input port, the inverted phase output port, the first end of the first inductor and the first end of the second inductor. And the other resonant circuit is respectively coupled with the inverted input port, the normal phase output port, the second end of the first inductor and the second end of the second inductor. Based on this, the high-frequency signals with opposite phases can counteract each other to suppress higher harmonics.

Description

Technical Field

[0001] This application relates to the field of chip technology, and particularly to a balun, a semiconductor device, and a communication device. Background Art

[0002] In the process of communication, the high-order harmonics existing in the communication link will have a great impact on the communication quality. In order to reduce the impact of high-order harmonics on the communication quality, filter circuits need to be added to both the transmitting link and the receiving link of the communication signal to suppress the high-order harmonics. Among them, the current high-order harmonic suppression method usually requires a relatively complex harmonic suppression circuit to be set between the amplifier and the off-chip antenna. However, this method increases the cost and the wiring area. Therefore, some solutions have proposed a scheme for suppressing high-order harmonics by setting a harmonic suppression circuit inside the chip to reduce the impedance at the harmonic suppression frequency point. However, limited by the chip manufacturing process, the quality factors of passive devices such as on-chip inductors and capacitors are relatively low, resulting in poor suppression effect of high-order harmonics. Therefore, there is an urgent need to provide a solution to solve the above problems. Summary of the Invention

[0003] This application provides a balun, a semiconductor device, and a communication device to solve the problem of poor suppression effect of high-order harmonics existing in the existing communication circuit.

[0004] To solve the above problems, the embodiments of this application provide the following technical solutions.

[0005] In a first aspect, a balun is provided. The balun includes a differential positive-phase input port and an inverting output port, a differential positive-phase output port and an inverting input port, a first inductor, a second inductor, a first resonant circuit, and a second resonant circuit. Among them, the first end of the first inductor is coupled to the positive-phase input port, and the second end of the first inductor is coupled to the inverting input port. The first end of the second inductor is coupled to the inverting output port, and the second end of the second inductor is coupled to the positive-phase output port. The first end of the first resonant circuit is coupled to the positive-phase input port and the first end of the first inductor respectively, and the second end of the first resonant circuit is coupled to the inverting output port and the first end of the second inductor respectively. The first end of the second resonant circuit is coupled to the inverting input port and the second end of the first inductor respectively, and the second end of the second resonant circuit is coupled to the positive-phase output port and the second end of the second inductor respectively. Through the first inductor and the second inductor in the balun, the signal on the input side can be coupled to the output side in a magnetic coupling manner, that is, the signal input from the inverting input port (including the inverting low-frequency signal and the inverting high-frequency signal) can be coupled to the inverting output port through the first inductor and the second inductor, and the signal input from the positive-phase input port (including the positive-phase low-frequency signal and the positive-phase high-frequency signal) can be coupled to the inverting output port through the first inductor and the second inductor. At the same time, the first resonant circuit and the second resonant circuit can resonate at the frequency of the high-frequency signal that needs to be suppressed. Through the first resonant circuit, the positive-phase high-frequency signal input from the positive-phase input port can be transmitted to the inverting output port. Through the second resonant circuit, the inverting high-frequency signal input from the inverting input port can be transmitted to the positive-phase output port. Among them, because the inverting high-frequency signal input from the inverting input port and the positive-phase high-frequency signal input from the positive-phase input port have the same frequency but opposite phases, these two signals can cancel each other out, so that the signal output from the inverting output port only contains the inverting low-frequency signal, and at the same time, the signal output from the positive-phase output port only contains the positive-phase low-frequency signal. Based on this, the balun provided in this application can remove the useless signal by the way of signal cancellation and retain the useful signal. At the same time, by the way of signal cancellation, the first resonant circuit and the second resonant circuit in the balun only need to resonate at the frequency that needs to be suppressed. Compared with the method of reducing the impedance at the harmonic suppression frequency point, this method is not easily affected by the chip's own process and improves the suppression effect of high-order harmonics.

[0006] In a possible implementation, the first resonant circuit includes a third inductor and a first capacitor connected in series between the first end and the second end of the first resonant circuit. The second resonant circuit includes a fourth inductor and a second capacitor connected in series between the first end and the second end of the second resonant circuit. In this way, the LC series resonant circuit composed of an inductor and a capacitor can make the first resonant circuit and the second resonant circuit resonate at the required frequency. At the same time, since the LC series resonant circuit presents a high impedance state to the normally transmitted low-frequency signals, the normally transmitted low-frequency signals can only be transmitted in a magnetic coupling manner through the first inductor and the second inductor of the balun. In addition, since the high-frequency signals can also be transmitted in a magnetic coupling manner through the first inductor and the second inductor of the balun, there will be two high-frequency signals with opposite phases at both the inverting output port and the non-inverting output port of the balun. After these two high-frequency signals cancel each other out, only the normally transmitted low-frequency signals will be output at the inverting output port and the non-inverting output port of the balun.

[0007] In a possible implementation, the above-mentioned first capacitor and second capacitor are adjustable capacitors. In this way, the first capacitor and the second capacitor can be adjusted synchronously to adjust the resonant frequency, so as to meet more harmonic suppression requirements.

[0008] In a possible implementation, the third inductor and the fourth inductor are adjustable inductors. In this way, the third inductor and the fourth inductor can be adjusted synchronously to adjust the resonant frequency, so as to meet more harmonic suppression requirements.

[0009] In a second aspect, a balun is provided. The balun includes a differential non-inverting input port and an inverting output port, a differential non-inverting output port and an inverting input port, a first inductor, a second inductor, a first capacitor, a second capacitor and a third capacitor. Among them, the first end of the first inductor is coupled to the non-inverting input port, the second end of the first inductor is coupled to the inverting input port, and the first inductor has a first tap and a second tap. The first end of the second inductor is coupled to the inverting output port, the second end of the second inductor is coupled to the non-inverting output port, the first end of the first capacitor is coupled to the first tap on the first inductor, and the second end of the first capacitor is respectively coupled to the inverting output port and the first end of the second inductor. The first end of the second capacitor is coupled to the second tap on the first inductor, and the second end of the second capacitor is respectively coupled to the non-inverting output port and the second end of the second inductor. The third capacitor is coupled between the first tap and the second tap and is in parallel with the partial inductance of the first inductor between the first tap and the second tap. In this way, the first tap and the second tap can divide the first inductor into three parts, so as to use a partial coil of the first inductor in the balun as the inductor in the LC series resonant circuit, thereby reducing the usage of components and reducing the wiring area.

[0010] In a possible implementation, the first capacitor, the second capacitor, and the third capacitor are adjustable capacitors. In this way, the first capacitor, the second capacitor, and the third capacitor can be synchronously adjusted according to the actually required resonance frequency, so as to meet more harmonic suppression requirements.

[0011] In a third aspect, a semiconductor device is provided. The semiconductor device includes an amplifier and a balun in any one of the possible implementations in the first aspect or the second aspect above. The positive input terminal of the amplifier is coupled to the positive output port of the balun. The negative input terminal of the amplifier is coupled to the negative output port of the balun. Alternatively, the positive output terminal of the amplifier is coupled to the positive input port of the balun. The negative output terminal of the amplifier is coupled to the negative input port of the balun.

[0012] In a fourth aspect, a communication device is provided. The communication device includes the semiconductor device in the third aspect above, and a transceiver circuit coupled to the semiconductor device.

[0013] In a possible implementation, the communication device further includes: a baseband processor coupled to the transceiver circuit.

[0014] In a possible implementation, the communication device further includes: an antenna coupled to the semiconductor device.

[0015] For the technical effects brought by the second aspect to the fourth aspect and possible implementation manners, reference may be made to the description of the technical effects brought by the first aspect and possible implementation manners above, which will not be elaborated here. Description of the Drawings

[0016] Figure 1 It is a schematic structural diagram of a communication device provided by an embodiment of the present application;

[0017] Figure 2 It is a schematic structural diagram of a balun provided by an embodiment of the present application;

[0018] Figure 3 It is another schematic structural diagram of a balun provided by an embodiment of the present application;

[0019] Figure 4 It is a schematic structural diagram of a balun provided by an embodiment of the present application;

[0020] Figure 5 It is another schematic structural diagram of a balun provided by an embodiment of the present application;

[0021] Figure 6 It is another schematic structural diagram of a balun provided by an embodiment of the present application;

[0022] Figure 7Schematic structural diagram of a semiconductor device provided by an embodiment of the present application;

[0023] Figure 8 Schematic structural diagram of a communication device provided by an embodiment of the present application. Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0025] In the present application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B may be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item)" or its similar expression refers to any combination of these items, including any combination of a single item (item) or multiple items (items). For example, at least one (item) of a, b, or c may represent: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c may be single or multiple. In addition, in the embodiments of the present application, words such as "first" and "second" do not limit the quantity and order.

[0026] It should be noted that in the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations, or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly speaking, using words such as "exemplary" or "for example" aims to present relevant concepts in a specific manner.

[0027] The present application will be described in detail below with reference to the accompanying drawings and embodiments:

[0028] As Figure 1As shown in the figure, with the development of communication technology, many communication devices 100 are equipped with a baseband processor 110 (baseband processor), a transceiver circuit 120, a low noise amplifier (low noise amplifier, LNA), a power amplifier (power amplifier, PA), and an antenna 130. Among them, the transceiver circuit 120 includes a receiving circuit RX and a transmitting circuit TX. The antenna 130 includes a transmitting antenna ANT1 and a receiving antenna ANT2. The baseband processor 110 is coupled to the transmitting antenna ANT1 through the transmitting circuit TX and the power amplifier PA in sequence; at the same time, the baseband processor 110 is coupled to the receiving antenna ANT2 through the receiving circuit RX and the low noise amplifier LNA in sequence. Among them, the above-mentioned communication device 100 can be a chip, module, etc. in the application scenario of the Internet of Things (Internet of Things, IOT); or, it can be a device such as a mobile phone, a server, a computer, etc.; or it can be a radio frequency front-end module (radio frequency front-end, RFFE) in a device such as a mobile phone, a server, a computer, etc. In some application scenarios, such as the Internet of Things application scenario, the power amplifier PA and the low noise amplifier LNA can be integrated on the same chip with the transceiver circuit 120. In other scenarios, such as mobile phones, computers, servers, etc., the power amplifier PA and the low noise amplifier LNA can also be arranged on the same semiconductor device with the transceiver circuit 120, the antenna 130, etc., or arranged on different semiconductor devices. When the baseband processor 110 needs to send a signal to an external device, the signal output by the baseband processor 110 can be frequency synthesized by the transmitting circuit TX to obtain a transmitted intermediate frequency signal TXIF. This transmitted intermediate frequency signal TXIF is then amplified by the power amplifier PA and transmitted from the transmitting antenna ANT1. When the receiving antenna ANT2 receives a signal sent by an external device, it can be amplified by the low noise amplifier LNA first. Then, the amplified signal is subjected to processes such as mixing, filtering, and analog-to-digital conversion by the receiving circuit RX and then transmitted to the baseband processor 110 for subsequent processing. However, in the actual transmission process, the original signal transmitted normally is easily affected by high-frequency signals (i.e., higher harmonics) with frequencies higher than the frequency of the original signal, thereby affecting the communication quality. In order to suppress the higher harmonics in the signal, still as Figure 1 shown, it is possible to select to set a harmonic suppression circuit 140 between the transceiver circuit 120 and the antenna 130. Through this harmonic suppression circuit 140, the higher harmonics can be suppressed. However, using Figure 1 the harmonic suppression circuit 140 in it requires the use of many external devices, increasing the wiring area and cost of the circuit board.

[0029] To solve the above problems, a balun can be provided on the input side or the output side of an amplifier such as a power amplifier PA or a low-noise amplifier LNA, and an impedance transformation circuit can be provided on the balun to reduce the impedance at the harmonic suppression frequency point, thereby suppressing high-order harmonics. Exemplarily, as Figure 2 shown, the balun 200 includes a positive-phase input port INP, a negative-phase input port INN, a positive-phase output port OUTP, a negative-phase output port OUTN, a first inductor L1, and a second inductor L2. The first inductor L1 can be used as the input-side inductor, the second inductor L2 can be used as the output-side inductor, and the first inductor L1 and the second inductor L2 can transmit the signal on the input side to the output side through magnetic coupling. Among them, the first end of the first inductor L1 is coupled to the positive-phase input port INP. The second end of the first inductor L1 is coupled to the negative-phase input port INN. The first end of the second inductor L2 is coupled to the positive-phase output port OUTP. The second end of the second inductor L2 is coupled to the negative-phase output port OUTN. An LC series resonance circuit 210 composed of an inductor L3 and a capacitor C1 is also provided between the positive-phase input port INP and the negative-phase input port INN of the balun 200. The first end of the above LC series resonance circuit 210 is coupled to the positive-phase input port INP. The second end of the LC series resonance circuit 210 is coupled to the negative-phase input port INN. Through the above LC series resonance circuit 210, unwanted high-order harmonics can be filtered out on the input side of the balun by reducing the impedance at the harmonic suppression frequency point. However, in order to achieve adjustable frequency points, the capacitor C1 is usually made into a switched capacitor array, which has a large series resistance. Therefore, the equivalent series resistance of this LC series resonance circuit is large, the frequency selectivity is poor, the notch effect is limited, it is difficult to meet the system requirements, and off-chip filtering is still required. In addition, when the above balun 200 is provided inside the chip, due to the influence of the chip manufacturing process, the quality factors of existing on-chip inductors, capacitors and other passive devices are low, resulting in poor in-chip harmonic suppression effect.

[0030] In another solution, as Figure 3As shown, the balun 300 includes a positive-phase input port INP, a negative-phase input port INN, a positive-phase output port OUTP, a negative-phase output port OUTN, a first inductor L1 and a second inductor L2, a first parallel resonance circuit 310 and a second parallel resonance circuit 320. The first inductor L1 can be used as the input-side inductor, and the second inductor L2 can be used as the output-side inductor. Moreover, the first inductor L1 and the second inductor L2 can transmit the signal on the input side to the output side through magnetic coupling. The first parallel resonance circuit 310 is an LC parallel resonance circuit composed of an inductor L3 and a capacitor C1. The second parallel resonance circuit 320 is an LC parallel resonance circuit composed of an inductor L4 and a capacitor C2. The first end of the first inductor L1 is coupled to the positive-phase input port INP. The second end of the first inductor L1 is coupled to the negative-phase input port INN. The first end of the second inductor L2 is coupled to the positive-phase output port OUTP through the first parallel resonance circuit 310. The second end of the second inductor L2 is coupled to the negative-phase output port OUTN through the second parallel resonance circuit 320. Through the first parallel resonance circuit 310 and the second parallel resonance circuit 320, high-order harmonics can be filtered out on the output side of the balun by reducing the impedance at the harmonic suppression frequency point. However, in order to achieve adjustable frequency points in this solution, the capacitors C1 and C2 are usually made into a switched capacitor array, which has a large series resistance. Therefore, the equivalent series resistance of the above LC parallel resonance circuit is large, the frequency selectivity is poor, the notch effect is limited, it is difficult to meet the system requirements, and off-chip filtering is still required. In addition, when the above balun 300 is arranged inside the chip, affected by the chip manufacturing process, the quality factors of existing on-chip passive devices such as inductors and capacitors are low, resulting in poor on-chip harmonic suppression effect. At the same time, the LC parallel resonance circuit is connected in series on the signal path, resulting in large losses and affecting the circuit performance.

[0031] To further solve the above problems, as Figure 4As shown, an embodiment of the present application provides a balun 400. The balun 400 includes a differential positive-phase input port INP and an inverting output port OUTN, a differential positive-phase output port OUTP and an inverting input port INN, a first inductor L1, a second inductor L2, a first resonant circuit 410, and a second resonant circuit 420. The first end of the first inductor L1 is coupled to the positive-phase input port INP. The second end of the first inductor L1 is coupled to the inverting input port INN. The first end of the second inductor L2 is coupled to the inverting output port OUTN. The second end of the second inductor L2 is coupled to the positive-phase output port OUTP. The first end of the first resonant circuit 410 is coupled to the positive-phase input port INP and the first end of the first inductor L1 respectively, and the second end of the first resonant circuit 410 is coupled to the inverting output port OUTN and the first end of the second inductor L2 respectively. The first end of the second resonant circuit 420 is coupled to the inverting input port INN and the second end of the first inductor L1 respectively, and the second end of the second resonant circuit 420 is coupled to the positive-phase output port OUTP and the second end of the second inductor L2 respectively. Through the above balun 400, the first inductor L1 and the second inductor L2 can couple the signal on the input side to the output side in a magnetic coupling manner, that is, the signal input from the inverting input port INN (including the inverting low-frequency signal and the inverting high-frequency signal) can be coupled to the inverting output port OUTN through the first inductor L1 and the second inductor L2, and the signal input from the positive-phase input port INP (including the positive-phase low-frequency signal and the positive-phase high-frequency signal) can be coupled to the positive-phase output port OUTP through the first inductor L1 and the second inductor L2. The first resonant circuit 410 and the second resonant circuit 420 can resonate at the frequency of the high-frequency signal that needs to be suppressed. In this way, the positive-phase high-frequency signal input from the positive-phase input port INP of the balun 400 can be transmitted to the inverting output port OUTN through the first resonant circuit 410. The inverting high-frequency signal input from the inverting input port INN of the balun 400 can be transmitted to the positive-phase output port OUTP through the second resonant circuit 420. Among them, because the signal input from the inverting input port INN contains an inverting high-frequency signal. This inverting high-frequency signal has the same frequency as the positive-phase high-frequency signal input from the positive-phase input port INP but opposite in phase. Therefore, these two high-frequency signals can cancel each other out, so that the signal output from the inverting output port OUTN only contains the normal inverting low-frequency signal. Similarly, the signal output from the positive-phase output port OUTP also only contains the normal positive-phase low-frequency signal. Based on this, the useless signal can be removed by signal cancellation, while the useful signal is retained. At the same time, through the signal cancellation method, only the first resonant circuit 410 and the second resonant circuit 420 need to resonate at the frequency that needs to be suppressed. Compared with the method of reducing the impedance at the harmonic suppression frequency point, this method is not easily affected by the chip's own process and improves the suppression effect of high-order harmonics.

[0032] In one embodiment, asFigure 5 As shown, the first resonance circuit 410 includes a first LC series resonance circuit composed of a third inductor Lp and a first capacitor Cp connected in series between the first end and the second end of the first resonance circuit 410. The second resonance circuit 420 includes a second LC series resonance circuit composed of a fourth inductor Ln and a second capacitor Cn connected in series between the first end and the second end of the second resonance circuit 420. Among them, the third inductor Lp and the first capacitor Cp resonate at the frequency to be suppressed. The fourth inductor Ln and the second capacitor Cn also resonate at the frequency to be suppressed. Since the LC series resonance circuit presents a high impedance state to low-frequency signals and a low impedance state to high-frequency signals, the signal at the positive-phase output port OUTP not only includes the signal (including the positive-phase high-frequency signal and the positive-phase low-frequency signal) coupled from the positive-phase input port INP to the positive-phase output port OUTP through the first inductor L1 and the second inductor L2 of the balun, but also includes the inverted-phase high-frequency signal transmitted through the second LC resonance circuit composed of the fourth inductor Ln and the second capacitor Cn from the inverted-phase input port INN. The above-mentioned positive-phase high-frequency signal and inverted-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases, and the two can cancel each other out at the positive-phase output port OUTP, thereby realizing the function of harmonic suppression. Similarly, the signal at the inverted-phase output port OUTN not only includes the signal (including the inverted-phase high-frequency signal and the inverted-phase low-frequency signal) coupled from the inverted-phase input port INN to the inverted-phase output port OUTN through the first inductor L1 and the second inductor L2 of the balun, but also includes the positive-phase high-frequency signal transmitted through the first LC resonance circuit composed of the third inductor Lp and the first capacitor Cp from the positive-phase input port INP. Since the positive-phase high-frequency signal and the inverted-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases, the two can also cancel each other out at the inverted-phase output port OUTN, thereby realizing the function of harmonic suppression.

[0033] Exemplarily, assume that the frequency of the normally transmitted low-frequency signal is LO, and the frequency of the high-frequency signal to be suppressed is 3LO. Then the signals input to the inverting input port INN and the non-inverting input port INP both contain the low-frequency signal with a frequency of LO and the high-frequency signal with a frequency of 3LO, and the signals input to the two input ports are only opposite in phase. At this time, the non-inverting high-frequency signal with a frequency of 3LO can be transmitted to the inverting output port OUTN through the third inductor Lp and the first capacitor Cp. The signal input to the inverting input port INN (including the inverting low-frequency signal with a frequency of LO and the inverting high-frequency signal with a frequency of 3LO) is coupled to the inverting output port OUTN through the first inductor L1 and the second inductor L2. Since the frequencies of the two high-frequency signals are the same but the phases are opposite, these two high-frequency signals can cancel each other out, so that the signal at the inverting output port OUTN only remains the inverting low-frequency signal with a frequency of LO. Similarly, the inverting high-frequency signal with a frequency of 3LO can be transmitted to the non-inverting output port OUTP through the fourth inductor Ln and the second capacitor Cn. The signal input to the non-inverting input port INP (including the non-inverting low-frequency signal with a frequency of LO and the non-inverting high-frequency signal with a frequency of 3LO) is coupled to the non-inverting output port OUTP through the first inductor L1 and the second inductor L2. Since the frequencies of the two high-frequency signals are the same but the phases are opposite, these two high-frequency signals can cancel each other out, so that the signal at the non-inverting output port OUTP only remains the non-inverting low-frequency signal with a frequency of LO.

[0034] In one embodiment, considering that the resonance frequency of the LC resonance circuit is mainly affected by the inductor and the capacitor. Therefore, the above-mentioned first capacitor Cp and second capacitor Cn can be adjustable capacitors. For example, the first capacitor Cp and the second capacitor Cn can be made into the same switched capacitor array. Wherein, the switched capacitor array includes a plurality of switches and capacitors. By controlling the switches to be in the same conducting state, the capacitance values of the first capacitor Cp and the second capacitor Cn can be adjusted synchronously, so as to realize the adjustment of the resonance frequencies of the first LC series resonance circuit and the second LC series resonance circuit.

[0035] In the above implementation process, any kind of switched capacitor array can be selected for the above-mentioned switched capacitor array, and the embodiments of the present application do not make specific limitations on this.

[0036] Furthermore, the above-mentioned third inductor Lp and fourth inductor Ln can also be adjustable inductors. Wherein, the inductance values of the third inductor Lp and the fourth inductor Ln only need to be the same during the adjustment process. The adjustable inductor can further increase the diversity of the resonance frequencies of the resonance circuit to meet the harmonic suppression requirements in more application scenarios.

[0037] Further, based on the above, the balun 400 provided in the embodiment of the present application can also be coupled to a controller (not shown in the figure). The controller can control the tunable capacitor and the switched capacitor array to adjust the inductor and / or the tunable capacitor, so as to adjust the resonance frequency of the resonance circuit to a frequency that meets the requirements. Among them, the above-mentioned controller can be a central processing unit (CPU), a general-purpose processor, a network processor (NP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or can also be a system on chip (SoC), or any combination thereof. The embodiment of the present application does not make specific limitations on this.

[0038] In one implementation, as Figure 6 shown, the embodiment of the present application also provides a balun 600. The balun 600 includes a differential positive-phase input port INP and an inverting output port OUTN, a differential positive-phase output port OUTP and an inverting input port INN, a first inductor L1, a second inductor L2, a first capacitor Cp, a second capacitor Cn, and a third capacitor Cb. Among them, the first end of the first inductor L1 is coupled to the positive-phase input port INP, the second end of the first inductor L1 is coupled to the inverting input port INN, and the first inductor L1 has a first tap a and a second tap b. The first end of the second inductor L2 is coupled to the inverting output port OUTN, and the second end of the second inductor L2 is coupled to the positive-phase output port OUTP. The first end of the first capacitor Cp is coupled to the first tap a on the first inductor, and the second end of the first capacitor Cp is respectively coupled to the inverting output port OUTN and the first end of the second inductor L2. The first end of the second capacitor Cn is coupled to the second tap b on the first inductor, and the second end of the second capacitor Cn is respectively coupled to the positive-phase output port OUTP and the second end of the second inductor L2. The third capacitor Cb is coupled between the first tap a and the second tap b, and is in parallel with the partial inductor of the first inductor L1 between the first tap a and the second tap b. Among them, the first tap a and the second tap b can be a connection point or a connecting wire drawn from the first inductor L1 to divide the first inductor L1 into three parts (as Figure 6The first sub-inductor Lp, the second sub-inductor Lb, and the third sub-inductor Ln). In the above manner, the first sub-inductor Lp and the first capacitor Cp can form a first LC series resonance circuit. The third sub-inductor Ln and the second capacitor Cn can form a second LC series resonance circuit. The second sub-inductor Lb and the third capacitor Cb can form an LC parallel resonance circuit. Among them, because the LC parallel resonance circuit presents a high impedance state to high-frequency signals, the low-frequency signal at the first node a can be transmitted to the second node b through the LC parallel resonance circuit formed by the second sub-inductor Lb and the third capacitor Cb. The high-frequency signal at the first node a cannot be transmitted to the second node b through the LC parallel resonance circuit formed by the second sub-inductor Lb and the third capacitor Cb. The signal input at the inverting input port INN (including the inverting high-frequency signal and the inverting low-frequency signal) can normally pass through the first inductor L1 and the second inductor L2 and be coupled to the inverting output port OUTN. The signal input at the non-inverting input port INP (including the non-inverting high-frequency signal and the non-inverting low-frequency signal) can also normally pass through the first inductor L1 and the second inductor L2 and be coupled to the non-inverting output port OUTP. At the same time, because the LC series resonance circuit presents a high impedance state to low-frequency signals and a low impedance state to high-frequency signals, the signal at the non-inverting output port OUTP includes both the signal (including the non-inverting high-frequency signal and the non-inverting low-frequency signal) coupled from the non-inverting input port INP to the non-inverting output port OUTP through the first inductor L1 and the second inductor L2, and the inverting high-frequency signal transmitted through the second LC resonance circuit formed by the third sub-inductor Ln and the second capacitor Cn from the inverting input port INN. The above non-inverting high-frequency signal and inverting high-frequency signal are high-frequency signals with the same frequency but opposite phases, and the two can cancel each other out at the non-inverting output port OUTP, thereby realizing the function of harmonic suppression. Similarly, the signal at the inverting output port OUTN includes both the signal (including the inverting high-frequency signal and the inverting low-frequency signal) coupled from the inverting input port INN to the inverting output port OUTN through the first inductor L1 and the second inductor L2, and the non-inverting high-frequency signal transmitted through the first LC resonance circuit formed by the first sub-inductor Lp and the first capacitor Cp from the non-inverting input port INP. Because the non-inverting high-frequency signal and the inverting high-frequency signal are high-frequency signals with the same frequency but opposite phases, the two can also cancel each other out at the inverting output port OUTN, thereby realizing the function of harmonic suppression.

[0039] In the above manner, a part of the first inductor L1 can be used as the inductor in the resonance circuit, thereby reducing the wiring area and cost. Of course, in the above implementation process, the first inductor L1 can also be an equivalent inductor composed of three series-connected inductors, and the embodiments of the present application do not make specific limitations here.

[0040] Exemplarily, assume that the frequency of the normally transmitted low-frequency signal is LO, and the frequency of the high-frequency signal to be suppressed is 4LO. Then the signals input to the inverting input port INN and the non-inverting input port INP both contain the low-frequency signal with a frequency of LO and the high-frequency signal with a frequency of 4LO, and the signals input to the two input ports are only opposite in phase. At this time, the non-inverting high-frequency signal with a frequency of 4LO can be transmitted to the inverting output port OUTN through the first sub-inductor Lp and the first capacitor Cp. The signal input to the inverting input port INN (including the inverting low-frequency signal with a frequency of LO and the inverting high-frequency signal with a frequency of 4LO) is coupled to the inverting output port OUTN through the first inductor L1 and the second inductor L2. Since the two high-frequency signals have the same frequency but opposite phases, these two high-frequency signals can cancel each other out, so that the signal at the inverting output port OUTN only remains the inverting low-frequency signal with a frequency of LO. Similarly, the inverting high-frequency signal with a frequency of 4LO can be transmitted to the non-inverting output port OUTP through the third sub-inductor Ln and the second capacitor Cn. The signal input to the non-inverting input port INP (including the non-inverting low-frequency signal with a frequency of LO and the non-inverting high-frequency signal with a frequency of 4LO) is coupled to the non-inverting output port OUTP through the first inductor L1 and the second inductor L2. Since the two high-frequency signals have the same frequency but opposite phases, these two high-frequency signals can cancel each other out, so that the signal at the non-inverting output port OUTP only remains the non-inverting low-frequency signal with a frequency of LO.

[0041] In one embodiment, the above-mentioned first capacitor Cp, second capacitor Cn, and third capacitor Cb are adjustable capacitors. For example, the first capacitor Cp, second capacitor Cn, and third capacitor Cb can be selected to form a switched-capacitor array to meet the harmonic suppression requirements of different frequencies. Among them, the switched-capacitor array includes a plurality of switches and capacitors. By controlling the conduction state of the switches, the capacitance values of the first capacitor Cp, second capacitor Cn, and third capacitor Cb can be adjusted synchronously, so as to adjust the resonance frequencies of the above-mentioned first LC resonance circuit, second LC resonance circuit, and parallel LC circuit, so as to better meet the tuning requirements in the actual application scenario.

[0042] In the above implementation process, any switched-capacitor array can be selected for the above-mentioned switched-capacitor array, and the embodiments of the present application do not make specific limitations on this.

[0043] In one embodiment, as Figure 7 shown, the embodiments of the present application also provide a semiconductor device 700, which includes an amplifier 710 and the above-mentioned Figures 4 to 5The balun 400 in any one of the embodiments. The non-inverting input terminal of the amplifier 710 is coupled to the non-inverting output port OUTP of the differential balun 400. The inverting input terminal of the amplifier 710 is coupled to the inverting output port OUTN of the balun 400. Among them, the above amplifier 710 can be a low-noise amplifier, a power amplifier, a preamplifier or other types of differential amplifiers, and the embodiments of the present application do not make specific limitations on this.

[0044] In another embodiment, the non-inverting output terminal of the amplifier 710 can be coupled to the non-inverting input port INP of the balun 400. The inverting output terminal of the amplifier 710 is coupled to the inverting input port INN of the balun 400. Of course, the above two schemes can also be combined, that is, one balun 400 can be selected to be provided on each of the output side or the input side of the amplifier 710, and the embodiments of the present application will not elaborate on this here.

[0045] In one example, the above semiconductor device 700 can also include multiple different types of amplifiers 710 (such as a power amplifier PA, a low-noise amplifier LNA) and a balun 400 coupled to each amplifier 710.

[0046] Of course, the balun 400 in the semiconductor device 700 can also be selected as Figure 6 the balun in, and the embodiments of the present application will not elaborate on this here.

[0047] In one embodiment, as Figure 8 shown, the embodiments of the present application also provide a communication device 800, which includes a semiconductor device 700 and a transceiver circuit 810 coupled to the semiconductor device 700. Among them, the above communication device 800 can be a mobile terminal device (such as a mobile phone, a computer, a smart bracelet, a smart watch), a local area network device, a server and other devices, or a radio frequency front-end module in a mobile terminal device (such as a mobile phone, a computer, a smart bracelet, a smart watch), a local area network device, a server and other devices, or an integrated chip in an Internet of Things device. The embodiments of the present application do not make specific limitations on this. Among them, the semiconductor device 700 and the transceiver circuit 810 can be integrated on the same chip or can be separately provided.

[0048] In one embodiment, the above communication device 800 may further include a baseband processor 820. The baseband processor 820 may be a central processing unit (CPU), a general-purpose processor, a network processor (NP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or may also be a system on chip (SoC), or any combination thereof. The embodiments of the present application do not make specific limitations thereto. Further, the above communication device 800 may further include an antenna 830 coupled to the semiconductor device 700. Among them, the antenna 830 and the semiconductor device 700 may be disposed in the same chip or radio frequency front-end module, or may be disposed in different modules of the communication device 800. The embodiments of the present application do not make specific limitations thereto.

[0049] Further, in the above implementation process, the semiconductor device or the communication device in the above examples may also include other types of devices. The embodiments of the present application do not make specific limitations thereto.

[0050] Those of ordinary skill in the art can realize that the functions of the circuits of the various examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. A professional technician can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0051] In several embodiments provided in the present application, it should be understood that the disclosed circuits and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other may be through some interfaces. The indirect couplings or communication connections of devices or modules can be in an electrical, mechanical or other form.

[0052] In addition, the chips in the various embodiments of the present application can be integrated in one device, or each module can exist physically alone, or two or more modules can be integrated in one device.

[0053] As described above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claimed rights.

Claims

1. A balun, characterized in that, Comprising: Differential positive-phase input port and inverting output port, and differential positive-phase output port and inverting input port; A first inductor, a first end of the first inductor being coupled to the positive-phase input port, and a second end of the first inductor being coupled to the inverting input port; A second inductor, a first end of the second inductor being coupled to the inverting output port, and a second end of the second inductor being coupled to the positive-phase output port; A first resonant circuit, a first end of the first resonant circuit being respectively coupled to the positive-phase input port and the first end of the first inductor, and a second end of the first resonant circuit being respectively coupled to the inverting output port and the first end of the second inductor; A second resonant circuit, a first end of the second resonant circuit being respectively coupled to the inverting input port and the second end of the first inductor, and a second end of the second resonant circuit being respectively coupled to the positive-phase output port and the second end of the second inductor.

2. The balun according to claim 1, wherein The first resonant circuit includes a third inductor and a first capacitor connected in series between the first end and the second end of the first resonant circuit; the second resonant circuit includes a fourth inductor and a second capacitor connected in series between the first end and the second end of the second resonant circuit.

3. The balun according to claim 2, characterized in that, The first capacitor and the second capacitor are adjustable capacitors.

4. The balun according to claim 2 or 3, characterized in that, The third inductor and the fourth inductor are adjustable inductors.

5. A balun, characterized in that, Comprising: Differential positive-phase input port and inverting output port, differential positive-phase output port and inverting input port; A first inductor, a first end of the first inductor being coupled to the positive-phase input port, a second end of the first inductor being coupled to the inverting input port, and the first inductor having a first tap and a second tap; A second inductor, a first end of the second inductor being coupled to the inverting output port, and a second end of the second inductor being coupled to the positive-phase output port; A first capacitor, a first end of the first capacitor being coupled to the first tap on the first inductor, and a second end of the first capacitor being respectively coupled to the inverting output port and the first end of the second inductor; A second capacitor, a first end of the second capacitor being coupled to the second tap on the first inductor, and a second end of the second capacitor being respectively coupled to the positive-phase output port and the second end of the second inductor; A third capacitor, coupled between the first tap and the second tap, and in parallel with a portion of the inductance of the first inductor between the first tap and the second tap.

6. The balun according to claim 5, characterized in that, The first capacitor, the second capacitor and the third capacitor are adjustable capacitors.

7. A semiconductor device, characterized in that, Comprising an amplifier and the balun according to any one of claims 1-4, or the balun according to claim 5 or 6; a positive-phase input terminal of the amplifier being coupled to the positive-phase output port of the balun; a negative-phase input terminal of the amplifier being coupled to the negative-phase output port of the balun; or, a positive-phase output terminal of the amplifier being coupled to the positive-phase input port of the balun; a negative-phase output terminal of the amplifier being coupled to the negative-phase input port of the balun.

8. A communication device, characterized in that, Comprising the semiconductor device according to claim 7, and a transceiver circuit coupled to the semiconductor device.

9. The communication device according to claim 8, characterized in that, Further comprising: A baseband processor coupled to the transceiver circuit.

10. The communication device according to claim 8 or 9, characterized in that, Further comprising: An antenna coupled to the semiconductor device.

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