A charge-discharge control circuit and system for independently controlling a battery

Abstract

The application discloses an independent control battery charging and discharging control circuit and system, and relates to the technical field of battery charging. The control circuit adopts an independent control mode to perform closed-loop regulation on the charging current of a battery (BAT), thereby avoiding problems such as aging difference and capacity attenuation caused by the cycle number of consumed batteries. The control efficiency can be optimized according to the charging time constant of different battery parameters, and the adaptation range is increased. The control circuit comprises a control unit, the control unit comprises a plurality of operational amplifiers, a plurality of resistors, a plurality of digital potentiometers, a field effect transistor and an inverter. An operational amplifier U1 in the plurality of operational amplifiers is connected at a same-phase end to a third pin of a digital potentiometer U2 and one end of a resistor R3, connected at an inverse-phase end to one end of a resistor R2 and one end of a resistor R5, and connected at an output end to one end of a resistor R4. An operational amplifier U4 is connected at a same-phase end to a Vin1 end, connected at an inverse-phase end to a fifth pin and a sixth pin of a digital potentiometer U3 and a third pin of a digital potentiometer U6, and connected at an output end to a second pin of the digital potentiometer U3, an input end of the inverter U5 and a P1 end.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of battery charging, in particular to a charge-discharge control circuit for independently controlling batteries and a system thereof. BACKGROUND

[0002] In the market, high-voltage battery packs will face overcharging, over-discharging or overheating problems and safety hazards during the charging and discharging process of lithium-ion batteries, which may cause the lithium battery to malfunction or even cause the battery to heat up or explode when used improperly. This is because the single battery in the battery pack has a large pressure difference and overcharging or over-discharging occurs. To solve this problem, the prior art uses an equalization method to ensure that the battery is within a safe voltage range. Passive equalization is to connect a resistor in parallel to the battery with a higher voltage at the end of charging to dissipate excess energy in the form of heat, so that the voltages of the single batteries in the battery pack tend to be consistent. Active equalization is to transfer the energy of the high-energy single battery to the low-energy single battery through energy storage elements such as inductors, capacitors or transformers to achieve the redistribution of energy within the battery pack. Regardless of the method used, the cycle number of the battery is consumed to maintain the voltage safety range, which reduces the expected life of the battery. When a battery or a group of batteries reaches the full charge state, it will also suffer greater capacity decay due to continuous discharging. This not only increases the aging difference between the batteries in the battery pack, but also reduces the energy utilization efficiency of the entire battery system. Therefore, a charge-discharge control circuit for independently controlling batteries and a system thereof are proposed. SUMMARY

[0003] The application aims at providing a charge-discharge control circuit for independently controlling batteries, which comprises a control unit, the control unit comprising several operational amplifiers, several resistors, several digital potentiometers, a field effect transistor and an inverter, an operational amplifier U1 in the several operational amplifiers is connected with a digital potentiometer U2 third pin, one end of a resistor R3, one end of a resistor R2, one end of a resistor R5, and one end of a resistor R4, an operational amplifier U4 is connected with Vin1 end, a digital potentiometer U3 fifth pin, a digital potentiometer U6 third pin, a digital potentiometer U3 second pin, an inverter U5 input end, and P1 end, a digital potentiometer U2 second pin is connected with an inverter U5 output end and a digital potentiometer U6 second pin, a digital potentiometer U2 seventh pin is connected with a digital potentiometer U3 seventh pin, a digital potentiometer U6 seventh pin, and P2 end, a digital potentiometer U2 eighth pin, a digital potentiometer U3 third pin, one end of a resistor R1, the other end of a resistor R2, and the other end of a resistor R3 are connected with a power supply, a digital potentiometer U3 eighth pin is connected with a digital potentiometer U6 eighth pin, a field effect transistor Q1 gate is connected with the other end of a resistor R4, one end of a resistor R1, and Port1 end, a field effect transistor Q1 drain outputs a charging current, and the charging current is fed back to a battery BAT through a switching circuit, and a digital potentiometer U2 fourth pin, a digital potentiometer U2 fifth pin, a digital potentiometer U2 sixth pin, a digital potentiometer U3 fourth pin, a digital potentiometer U6 fourth pin, a digital potentiometer U6 fifth pin, a digital potentiometer U6 sixth pin, and the other end of a resistor R5 are connected with ground.

[0004] Further, the control unit further comprises several operational amplifiers, several inverters, several field effect transistors, several triodes, several diodes, several resistors, an AND gate, and a solid state relay, an operational amplifier U8 in the several operational amplifiers is connected with an operational amplifier U9 same phase end, a solid state relay K1 normally closed contact, a triode Q3 collector, a field effect transistor Q5 source, one end of a resistor R8, and one end of a resistor R14, and an output end is connected with an inverter U11 input end, an operational amplifier U9 opposite phase end is connected with a solid state relay K1 normally open contact, a field effect transistor Q4 source, a triode Q6 collector, one end of a resistor R9, and one end of a resistor R12, and an output end is connected with an inverter U10 input end, a first input end of an AND gate U7 is connected with an inverter U11 output end and a diode D2 anode, a second input end is connected with an inverter U10 output end and a diode D3 anode, and an output end is connected with P2 end and a digital potentiometer U6 seventh pin, a field effect transistor Q4 drain is connected with a diode D3 cathode, a field effect transistor Q5 drain is connected with a diode D2 cathode, a field effect transistor Q4 gate is connected with a field effect transistor Q5 gate and Vin2 end, one end of a coil of a solid state relay K1 is connected with P1 end, the other end of the coil is connected with a triode Q2 emitter, a triode Q2 base is connected with one end of a resistor R7, a common end of the solid state relay K1, the other end of a resistor R8, and the other end of a resistor R9 are connected with a power supply, a triode Q2 collector, a triode Q3 emitter, a triode Q6 emitter, and the other end of a resistor R7 are connected with ground.

[0005] Further, the control unit further comprises several resistors, one end of resistor R6 is connected to the seventh pin of digital potentiometer U2, one end of resistor R11 is connected to the second pin of digital potentiometer U2, the other end of resistor R6 and the other end of resistor R11 are connected to ground.

[0006] Further, the control unit further comprises a diode, the anode of diode D1 is connected to the other end of the coil of solid-state relay K1, and the cathode is connected to P1.

[0007] Further, the resistor R3 is an adjustable resistor.

[0008] Further, the control unit further comprises several resistors, one end of resistor R10 is connected to one end of resistor R13 and the same-phase end of operational amplifier U8, and the other end is connected to power supply; the other end of resistor R13 is connected to ground.

[0009] Further, the control unit further comprises a resistor, one end of resistor R15 is connected to the gate of field effect transistor Q4, and the other end is connected to ground.

[0010] Further, the application provides an independent control battery charging and discharging control system comprising the independent control battery charging and discharging control circuit.

[0011] Compared with the prior art, the application has the following beneficial effects:

[0012] The application adopts an independent control mode to perform closed-loop regulation on the charging current of the battery, avoids the problems of aging difference and capacity attenuation caused by the cycle number of the battery, and optimizes the control efficiency according to the charging time constant of different battery parameters, thereby increasing the adaptation range. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the prior art and embodiments. Obviously, the drawings in the following description only represent some embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort.

[0014] Figure 1 The application provides a circuit structure diagram. DETAILED DESCRIPTION

[0015] In order to make the objects and advantages of the application more clear, the following will specifically describe the application with embodiments, and it should be understood that the following description is only used to describe one or several specific embodiments of the application, and does not strictly limit the protection scope of the application.

[0016] The application discloses an independent control battery charging and discharging control circuit, which comprises a control unit, wherein the control unit comprises several operational amplifiers, several resistors, several digital potentiometers, a field effect transistor and a inverter; the operational amplifier U1 in the several operational amplifiers is connected with the third pin of the digital potentiometer U2, one end of the resistor R3, one end of the resistor R2 and one end of the resistor R5; the output end of the operational amplifier U1 is connected with one end of the resistor R4; the same phase end of the operational amplifier U4 is connected with the Vin1 end; the inverse phase end of the operational amplifier U4 is connected with the fifth pin and the sixth pin of the digital potentiometer U3, the third pin of the digital potentiometer U6; the output end of the operational amplifier U4 is connected with the second pin of the digital potentiometer U3, the input end of the inverter U5 and the P1 end; the second pin of the digital potentiometer U2 is connected with the output end of the inverter U5 and the second pin of the digital potentiometer U6; the seventh pin of the digital potentiometer U2 is connected with the seventh pin of the digital potentiometer U3, the seventh pin of the digital potentiometer U6 and the P2 end; the eighth pin of the digital potentiometer U2 is connected with the third pin of the digital potentiometer U3, one end of the resistor R1, the other end of the resistor R2 and the other end of the resistor R3; the eighth pin of the digital potentiometer U3 is connected with the eighth pin of the digital potentiometer U6; the gate of the field effect transistor Q1 is connected with the other end of the resistor R4; the source of the field effect transistor Q1 is connected with the other end of the resistor R1; the drain of the field effect transistor Q1 is connected with the Port1 end; the drain of the field effect transistor Q1 outputs a charging current, which is fed back to the battery BAT through a switching circuit; the fourth pin, the fifth pin and the sixth pin of the digital potentiometer U2, the fourth pin of the digital potentiometer U3, the fourth pin, the fifth pin and the sixth pin of the digital potentiometer U6 and the other end of the resistor R5 are connected with the ground.

[0017] Specifically, the control unit further comprises several operational amplifiers, several inverters, several field effect transistors, several triodes, several diodes, several resistors, an AND gate and a solid-state relay; the same phase end of the operational amplifier U8 is connected with the same phase end of the operational amplifier U9; the inverse phase end of the operational amplifier U8 is connected with the normally closed contact of the solid-state relay K1, the collector of the triode Q3, the source of the field effect transistor Q5, one end of the resistor R8 and one end of the resistor R14; the output end of the operational amplifier U8 is connected with the input end of the inverter U11; the inverse phase end of the operational amplifier U9 is connected with the normally open contact of the solid-state relay K1, the source of the field effect transistor Q4, the collector of the triode Q6, one end of the resistor R9 and one end of the resistor R12; the output end of the operational amplifier U9 is connected with the input end of the inverter U10; the first input end of the AND gate U7 is connected with the output end of the inverter U11 and the anode of the diode D2; the second input end of the AND gate U7 is connected with the output end of the inverter U10 and the anode of the diode D3; the output end of the AND gate U7 is connected with the P2 end and the seventh pin of the digital potentiometer U6; the drain of the field effect transistor Q4 is connected with the cathode of the diode D3; the drain of the field effect transistor Q5 is connected with the cathode of the diode D2; the gate of the field effect transistor Q4 is connected with the gate of the field effect transistor Q5 and the Vin2 end; one end of the coil of the solid-state relay K1 is connected with the P1 end; the other end of the coil of the solid-state relay K1 is connected with the emitter of the triode Q2; one end of the resistor R7 is connected with the base of the triode Q2; the common end of the solid-state relay K1, the other end of the resistor R8 and the other end of the resistor R9 are connected with the power supply; the collector of the triode Q2, the emitter of the triode Q3, the emitter of the triode Q6 and the other end of the resistor R7 are connected with the ground.

[0018] Specifically, the control unit further comprises several resistors, one end of resistor R6 of the several resistors is connected to the seventh pin of digital potentiometer U2, one end of resistor R11 is connected to the second pin of digital potentiometer U2, the other end of resistor R6 and the other end of resistor R11 are connected to ground.

[0019] Specifically, the control unit further comprises a diode, the anode of diode D1 is connected to the other end of the coil of solid-state relay K1, and the cathode is connected to P1.

[0020] Specifically, the resistor R3 is an adjustable resistor.

[0021] Specifically, the control unit further comprises several resistors, one end of resistor R10 of the several resistors is connected to one end of resistor R13 and the same-phase end of operational amplifier U8, and the other end is connected to a power supply; the other end of resistor R13 is connected to ground.

[0022] Specifically, the control unit further comprises a resistor, one end of resistor R15 is connected to the gate of field effect transistor Q4, and the other end is connected to ground.

[0023] Specifically, a charge-discharge control system for independently controlling a battery comprises the charge-discharge control circuit for independently controlling a battery according to any one of the preceding embodiments.

[0024] In an embodiment, considering that the way to maintain the voltage safety range by the number of cycles of consuming the battery will increase the battery aging difference and reduce the expected life of the battery, therefore in the scheme each battery or battery group BAT is first connected to the control unit through the switching circuit to control the charging and discharging, the battery voltage is fed back to Vin1, and the control unit inputs different charging current or discharging current to the battery according to different Vin1, the signal of Vin1 in the control unit is first input to the non-inverting terminal of operational amplifier U4, and the inverting terminal of operational amplifier U4 samples the series voltage between the fifth pin of digital potentiometer U3 and the third pin of digital potentiometer U6, after the circuit is powered on, operational amplifier U4 compares and outputs a control signal, one way of which is fed back to the second pin of digital potentiometer U3, and the other way is input to the second pin of digital potentiometer U6 and digital potentiometer U2 through inverter U5, assuming that the Vin1 input signal voltage is greater than the series voltage of the fifth pin of digital potentiometer U3 and the third pin of digital potentiometer U6, then the output signal of operational amplifier U4 is fed back to the second pin of U3 in one way, and the other way is input to the second pin of U6 after being inverted by U5, which controls the inner cursor of digital potentiometer U3 fifth pin to adjust to the third pin direction, reduces the resistance value from the third pin to the fifth pin of digital potentiometer U3, at the same time, the inner cursor of digital potentiometer U6 fifth pin adjusts to the sixth pin direction, which increases the resistance value from the third pin to the fifth pin of digital potentiometer U6, and converts the current Vin1 input voltage parameter into resistance value parameter and feeds back to digital potentiometer U2, and vice versa when the current Vin1 input signal voltage is less than the sampling voltage of the inverting terminal of operational amplifier U4, digital potentiometer U3 and digital potentiometer U6 adjust the resistance value of digital potentiometer U2 synchronously, the third pin of digital potentiometer U2 is connected with resistor R3, the voltage between resistor R3 and digital potentiometer U2 is sampled by the non-inverting terminal of operational amplifier U1, and the reference signal is input to the inverting terminal of operational amplifier U1, the resistance value of resistor R3 is used to control the initial charging current of battery BAT, the resistance value of resistor R3 in each unit is consistent, the greater the resistance value, the greater the voltage drop after synchronization of digital potentiometer U2, the lower the voltage fed back to the gate of field effect transistor Q1 through resistor R4, the lower the equivalent resistance value of field effect transistor Q1, the greater the charging current of BAT, and with the increase of BAT voltage, Vin1 is gradually pulled up, after the output regulation of operational amplifier U4, digital potentiometer U6 enters high resistance state, and the input voltage of the non-inverting terminal of operational amplifier U1 is pulled up after synchronization of digital potentiometer U2 until field effect transistor Q1 is cut off, and BAT completes charging, which ensures that the battery will not be overcharged in the same charging time, compared with dissipation and energy transfer, this way can actually reduce the charging and discharging cycle times of the battery, prevent aging difference, and the switching circuit is used to switch the connection between battery BAT and control circuit or load, which is not shown in the drawing.

[0025] In an embodiment, the problem of charging control efficiency caused by different battery parameters is solved. Due to different battery parameters and different number of series connection, the time constant of charging and discharging process is different. When the charging current of the battery BAT is closed-loop regulated under the same parameter, the circuit will continue to repeat calibration or calibration lag caused by low-speed clock when the charging current has been adjusted to the optimal value. Therefore, based on the above scheme, a charging scheme with detection function and controllable interface is proposed to adapt to different products. Vin2 is the control interface, and a high potential signal is input after power-on. The detection process is that the output signal of operational amplifier U4 is fed back to the coil of solid state relay K1 through P1 terminal during the synchronization process of digital potentiometer U2, the state switching of the output potential of operational amplifier U4 controls the auxiliary contact of solid state relay K1 to switch, and operational amplifier U8 and operational amplifier U9 detect the output of operational amplifier U4. Assuming that the current Vin1 input signal voltage is greater than the current sampling voltage at the inverting terminal of operational amplifier U4, the output signal of operational amplifier U4 is fed back to the coil of solid state relay K1 through the circuit of solid state relay K1 coil, transistor Q2 and resistor R7, the coil of solid state relay K1 is attracted, the normally open contact of solid state relay K1 is closed, the normally closed contact of solid state relay K1 is opened, one way of power supply is fed back to the inverting terminal of operational amplifier U9 through the normally open contact of solid state relay K1, and the other way is input to the base of transistor Q3 through resistor R12. The voltage at the base of transistor Q3 is greater than the conduction voltage, and the transistor Q3 is turned on after the conduction voltage. The voltage at the connection end of pull-down resistor R8 and resistor R14 is lower than the reference voltage potential set at the same phase terminal of operational amplifier U8 and operational amplifier U9. The reference voltage potential set at the same phase terminal of operational amplifier U8 and resistor R9 is divided by resistor R10 and resistor R13, or supplied directly by power supply. After comparison, operational amplifier U8 outputs a high potential signal to the inverter U11 inverting circuit for subsequent response. Diode D2 is connected in series between the output terminal of inverter U11 and the drain of field effect transistor Q5, so as to eliminate the oscillation caused by backflow when the output state of operational amplifier U4 is switched. At the same time, the conduction voltage of transistor Q6 is lower than the conduction voltage, and the transistor Q6 is cut off. At the same time, the low potential output of operational amplifier U9 is inverted by inverter U10 to output a high potential signal, one way of which is fed back to AND gate U7, and the other way is fed back to field effect transistor Q4 through diode D3. After the high potential is input to Vin2, field effect transistor Q4 is turned on as an anchor voltage input to the base of transistor Q6, and after the above circuit is adjusted, the Vin1 signal is less than one adjustment step voltage of digital potentiometer U3 and digital potentiometer U6 sampled at the inverting terminal of operational amplifier U4. After the output of operational amplifier U4 is flipped, the coil of solid state relay K1 is disconnected, the normally closed contact is closed again, one way of power supply is fed back to the inverting terminal of operational amplifier U8, and the other way is input to the base of transistor Q6 through resistor R14. The transistor Q6 is turned on, the voltage at the connection end of resistor R9 and resistor R12 is pulled down and loaded with an anchor voltage, the voltage potential is higher than the pull-down voltage at the connection end of resistor R8 and resistor R14 when the output of operational amplifier U4 is flipped before the high potential input of Vin2, and is greater than the reference voltage potential set by resistor R10 and resistor R13. When the power supply is fed back to the inverting terminal of operational amplifier U8,The low potential output of the operational amplifier U8 is input to the inverter U11 after being inverted, and the high potential signal output of the AND gate U7 is input to the seventh pin of the digital potentiometer U6, the digital potentiometer U3, and the digital potentiometer U2 through P2 to stop the adjustment, and the gate charge of the field effect transistor Q5 and the field effect transistor Q4 can be discharged through the resistance R15 connected in parallel to the gate to increase the response. Assuming that the current input signal voltage Vin1 is less than the sampling voltage at the inverting terminal of the operational amplifier U4, the low potential output of the operational amplifier U4 makes the coil of the solid state relay K1 disconnected, and the auxiliary contact of the solid state relay K1 is in the state shown in the drawing. After the power supply signal is fed back through the resistance R14, the transistor Q6, and the ground, the transistor Q6 is turned on, the voltage at the inverting terminal of the operational amplifier U8 is greater than that at the non-inverting terminal, the low potential output of the operational amplifier U8 is inverted by the inverter U10, and the high potential signal is fed back to the AND gate U7 in one way, and fed back to the field effect transistor Q5 through the diode D2 in another way. After the high potential Vin2 is input, the field effect transistor Q5 is turned on, and the high potential is input to the base of the transistor Q3 as the anchor voltage. At the same time, the power supply signal is fed back to the base of the transistor Q6, and the resistance R12 and the resistance R9 are connected to the low potential at the end of the resistance R9 after the transistor Q6 is turned on. The potential voltage is lower than the reference voltage set at the non-inverting terminal of the operational amplifier U8 and the operational amplifier U9, so that the operational amplifier U9 outputs the high potential inverted by the inverter U10, and waits for the response of the subsequent circuit. When the output of the operational amplifier U4 is flipped, the resistance R8 and the resistance R14 are connected to the low potential at the end of the resistance R14 and the anchor potential of the field effect transistor Q5 after the transistor Q3 is turned on through the above-mentioned circuit process. The potential voltage is higher than the low potential at the end of the resistance R12 and the resistance R9 after the operational amplifier U4 is flipped before the high potential Vin2 is input, and is greater than the reference voltage potential set by the resistance R10 and the resistance R13. At the same time, the high potential signal output of the AND gate U7 is input to the seventh pin of the digital potentiometer U6, the digital potentiometer U3, and the digital potentiometer U3 through P2 to stop the adjustment of the current of the BAT, so as to avoid repeated calibration. When the high potential Vin2 is converted to the low potential, the anchor potential is released, and the digital potentiometer U6, the digital potentiometer U3, and the digital potentiometer U3 quickly adjust and calibrate the charging current of the BAT under the high-speed clock signal clk to prevent lag. When the high potential is input to Vin2 again and detected through the above-mentioned circuit, it is stopped again. The diode D1 is used for the freewheeling of the coil of the solid state relay K1.

[0026] It is apparent to those skilled in the art that the present application is not limited to the details of the foregoing exemplary embodiments, and that the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the present application should be considered in all respects as illustrative and not restrictive, and the scope of the present application should be defined by the appended claims rather than the above description, and all changes coming within the meaning and equivalency range of the claims are intended to be embraced therein. Any mark in the claims should not be considered as limiting the claims involved.

Claims

1. A charge and discharge control circuit for independently controlling a battery, characterized in that: The control unit comprises several operational amplifiers, several resistors, several digital potentiometers, several field effect tubes and several inverters, the operational amplifier U1 of the several operational amplifiers is connected with the third pin of the digital potentiometer U2, one end of the resistor R3, one end of the resistor R2, one end of the resistor R5 and one end of the resistor R4, the non-inverting terminal of the operational amplifier U4 is connected with the Vin1 terminal, the fifth pin and the sixth pin of the digital potentiometer U3 and the third pin of the digital potentiometer U6, the output terminal is connected with the second pin of the digital potentiometer U3, the input terminal of the inverter U5 and the P1 terminal, the second pin of the digital potentiometer U2 is connected with the output terminal of the inverter U5 and the second pin of the digital potentiometer U6, the seventh pin is connected with the seventh pin of the digital potentiometer U3, the seventh pin of the digital potentiometer U6 and the P2 terminal, the eighth pin, the third pin of the digital potentiometer U3, one end of the resistor R1, the other end of the resistor R2, the other end of the resistor R3 are connected with the power supply, the eighth pin of the digital potentiometer U3 is connected with the eighth pin of the digital potentiometer U6, the gate of the field effect tube Q1 is connected with the other end of the resistor R4, the source is connected with the other end of the resistor R1, the drain is connected with the Port1 terminal, the drain of the field effect tube Q1 outputs a charging current, which is fed back to the battery BAT through the switching circuit, the fourth pin, the fifth pin and the sixth pin of the digital potentiometer U2, the fourth pin, the fifth pin and the sixth pin of the digital potentiometer U3 and the fourth pin, the fifth pin and the sixth pin of the digital potentiometer U6 are connected with the ground and the other end of the resistor R5.

2. The charge-discharge control circuit according to claim 1, wherein The control unit further comprises several transistors, several diodes, several resistors, an AND gate and a solid state relay, the operational amplifier U8 of the several operational amplifiers is connected with the same-phase terminal of the operational amplifier U9, the non-inverting terminal is connected with the normally closed contact of the solid state relay K1, the collector of the transistor Q3, the source of the field effect tube Q5, one end of the resistor R8 and one end of the resistor R14, and the output terminal is connected with the input terminal of the inverter U11, the non-inverting terminal of the operational amplifier U9 is connected with the normally open contact of the solid state relay K1, the source of the field effect tube Q4, the collector of the transistor Q6, one end of the resistor R9 and one end of the resistor R12, and the output terminal is connected with the input terminal of the inverter U10, the first input terminal of the AND gate U7 is connected with the output terminal of the inverter U11 and the anode of the diode D2, the second input terminal is connected with the output terminal of the inverter U10 and the anode of the diode D3, and the output terminal is connected with the P2 terminal and the seventh pin of the digital potentiometer U6, the drain of the field effect tube Q4 is connected with the cathode of the diode D3, the drain of the field effect tube Q5 is connected with the cathode of the diode D2, the gate of the field effect tube Q4 is connected with the gate of the field effect tube Q5 and the Vin2 terminal, one end of the coil of the solid state relay K1 is connected with the P1 terminal, the other end of the coil is connected with the emitter of the transistor Q2, the base of the transistor Q2 is connected with one end of the resistor R7, the common terminal of the solid state relay K1, the other end of the resistor R8 and the other end of the resistor R9 are connected with the power supply, the collector of the transistor Q2, the emitter of the transistor Q3 and the emitter of the transistor Q6 are connected with the ground and the other end of the resistor R7.

3. The charge-discharge control circuit for independently controlling a battery according to claim 1, wherein One end of the resistor R6 of the several resistors is connected with the seventh pin of the digital potentiometer U2, one end of the resistor R11 is connected with the second pin of the digital potentiometer U2, the other end of the resistor R6 and the other end of the resistor R11 are connected with the ground.

4. The charge-discharge control circuit according to claim 2, wherein The anode of the diode D1 of the several diodes is connected with the other end of the coil of the solid state relay K1, and the cathode is connected with the P1 terminal.

5. The charge-discharge control circuit for independently controlling a battery according to claim 1, wherein The resistance R3 is an adjustable resistance.

6. The charge-discharge control circuit for independently controlling a battery according to claim 2, wherein One end of the resistance R10 in the resistances is connected to one end of the resistance R13 and the non-inverting terminal of the operational amplifier U8, and the other end is connected to a power supply; the other end of the resistance R13 is connected to the ground.

7. The charge-discharge control circuit for independently controlling a battery according to claim 2, wherein One end of the resistance R15 in the resistances is connected to the gate of the field effect transistor Q4, and the other end is connected to the ground.

8. A charge and discharge control system for independently controlling a battery, characterized in that: The charge-discharge control circuit independently controls the battery according to any one of claims 1-7.

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