Zero-input current ripple wide-gain DC-DC converter and control method

Abstract

The invention discloses a zero-input current ripple wide-gain DC-DC converter and a control method, the zero-input current ripple wide-gain DC-DC converter comprises a zero-ripple boost unit and a voltage multiplication unit which are connected in sequence, and the zero-ripple boost unit comprises a first inductor, a second inductor, a third capacitor, a fourth capacitor, a first power switch and a third diode; the voltage multiplication unit comprises a first capacitor, a second capacitor, a first diode, a second diode, a third diode, a third inductor and a second power switch. By introducing the zero-ripple boost unit, the zero-input ripple characteristic is realized while the voltage gain is improved, and meanwhile, the voltage multiplication unit is introduced, so that the structure has a function similar to that of a switched capacitor and optimizes the energy circulation of the switched capacitor; therefore, the voltage gain of the converter is further improved, and the voltage and current stress of the semiconductor device is reduced.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to a zero-input current ripple wide-gain DC-DC converter and a control method therefor. Background Art

[0002] The statements in this section merely provide background technical information related to the present disclosure and do not necessarily constitute prior art.

[0003] In recent years, global warming and its resulting environmental effects have become major climate challenges. Carbon emissions generated by the combustion of fossil fuels (such as coal, oil, etc.) as the main cause have driven the rapid development of clean energy technologies such as solar energy, wind energy, and hydrogen fuel cells. Given the generally low output voltage characteristics of fuel cells and photovoltaic systems, it is necessary to achieve efficient boost conversion through a power electronic converter to meet the load terminal voltage requirements or grid connection conditions. In this energy conversion link, a DC-DC converter with a wide range of voltage regulation capabilities constitutes the core topology of the system.

[0004] Traditional boost converters face significant technical bottlenecks in actual operating conditions: the voltage stress borne by their switching devices is directly related to the output voltage level, resulting in the need to select power semiconductors with higher rated voltages for the devices. When operating in a large duty cycle mode to pursue high voltage gain, the system will face non-linear effects such as increased diode reverse recovery loss, increased conduction loss, and increased switching voltage spikes. According to the differences in electrical isolation characteristics, the currently developed high-gain DC-DC converters are mainly divided into two types: isolated type and non-isolated type.

[0005] Isolated converters (such as high-frequency transformer converters) and coupled inductor converters can flexibly achieve high voltage gain by adjusting the winding turns ratio, but there are problems of increased volume and voltage spikes caused by leakage inductance. Although the snubber circuit can alleviate the spike phenomenon, it will lead to an increase in system complexity, power consumption, and cost. In contrast, non-isolated converters are more favored due to their compact structure and low-cost advantages. However, affected by parasitic parameters, traditional non-isolated topologies are difficult to achieve ideal gain performance under large duty cycle operating conditions.

[0006] To achieve the high-gain and low-voltage stress characteristics of non-isolated DC-DC converters, various innovative topology solutions have been proposed. The current technical paths mainly include coupled inductors (CI), switched capacitors (SC), switched inductors (SL), and their combined structures. Although the quadratic boost converter (QBC) in the literature "Switching regulator using a quadratic boost converter for wide DC conversion ratios" achieves squared gain, the high-side power device bears a voltage stress equivalent to the output voltage. In response to this, the literature "Ultrahigh Step-Up DC–DC Converter Composed of Two Stages Boost Converter, Coupled Inductor, and Multiplier Cel" integrates a dual-boost structure, a coupled inductor, and a voltage multiplier unit (VM) to achieve leakage inductance energy recovery while increasing the gain. However, its large input current ripple restricts its application in ripple-sensitive scenarios. The literature "Synchronous Dual-Switch Ultrahigh Step-Up DC–DC Converter Based on Coupled Inductor and Voltage Multiplier for Photovoltaic Systems" uses a hybrid topology of a coupled inductor and a voltage multiplier unit to obtain squared gain, but it has the defect of excessive input current ripple in the continuous conduction mode (CCM). The literature "An Ultra-High Gain Quadratic Converter Based on Coupled Inductor and Switched Capacitor Techniques for DC Micro-Grid Applications" and "Quadratic-Extended-Duty-Ratio Boost Converters for Ultra High Gain Application With Low Input Current Ripple and Low Device Stress" respectively improve the quadratic boost structure: the former achieves high gain and low stress through the synergistic effect of quadratic boost, coupled inductor, and switched capacitor, and the latter's developed quadratic extended duty ratio (Q-EDR) boost converter combines traditional quadratic boost and extended duty ratio techniques to achieve ultra-high gain. However, both of them face the problems of high cost due to the large number of components and complex control.In the field of switched-capacitor technology, the independent SC structure in the literature "Switched-Capacitor / Switched-Inductor Structures for Getting Transformerless Hybrid DC–DC PWM Converters" needs to cooperate with other converters to achieve voltage regulation. Although the active network topology in the literature "A Switched-Capacitor-Based Active-Network Converter With High Voltage Gain" halves the device voltage stress and realizes capacitor self-balancing, it causes voltage spikes in the switching tubes due to the leakage inductance effect. The active switched inductor (A-SL) and switched capacitor composite quasi-Z-source converter proposed in the literature "A Novel High Step-Up Nonisolated Quasi-Z-Source DC–DC Converter With Active Switched Inductor and Switched Capacitor" alleviates the voltage spikes, but has the defects of insufficient gain and limited duty cycle regulation. The soft-switching quasi-Z-source converter in the literature "Soft Switching High Voltage Gain Quasi-Z-Source DC–DC Converter With Switched-Capacitor Technique" reduces the voltage stress and current ripple through coupled inductance and switched-capacitor technology, but the eight operating modes lead to a sharp increase in control complexity.

[0007] Recent prior art has made progress in the design of passive components: The literature "Nonisolated High Step-Up DC–DC Converter With Passive Switched-Inductor-Capacitor Network" uses a symmetric switched inductor-capacitor (SL-C) network to reduce the device voltage stress, but there are problems of current discontinuous and limited maximum gain duty cycle; The active switched inductor and switched capacitor combination structure of the literature "Hybrid Active Switched Inductor DC-DC Converter With Common Ground and Suppressed Voltage Oscillation for Fuel Cell VehiCIes" reduces the number of components and the voltage stress at the same time, but fails to break through the gain bottleneck and has a low voltage gain. For current ripple suppression, the literature "An Optimal Structure for High Step-Up Nonisolated DC–DC Converters With Soft-Switching Capability and Zero Input Current Ripple" proposes a fusion scheme of coupled inductor and multi-stage diode-capacitor voltage multiplier (DCVM) to achieve zero ripple, but faces three challenges of complex control, insufficient gain and high cost. The literature "Coupled Inductor-Based Current-Fed Ultra-High Step-Up DC-DC Converter Featuring Low Input Current Ripple" achieves high gain at low duty cycle based on two dual-winding coupled inductors and eliminates the current ripple at the same time, but the output-side diode bears too high voltage stress. Summary of the Invention

[0008] To overcome the deficiencies of the above prior art, the present invention provides a zero-input-current-ripple wide-gain DC-DC converter and a control method. The proposed converter realizes the zero-input-ripple characteristic while increasing the voltage gain by introducing a zero-ripple boost unit. At the same time, a voltage multiplier unit is introduced. This structure has a function similar to that of a switched capacitor and optimizes the energy circulation of the switched capacitor, so that the converter reduces the voltage and current stresses of semiconductor devices while further increasing the voltage gain.

[0009] To achieve the above object, one or more embodiments of the present invention provide the following technical solutions:

[0010] In a first aspect, the present invention provides a zero-input-current-ripple wide-gain DC-DC converter, which includes a zero-ripple boost unit and a voltage multiplier unit connected in sequence. The voltage multiplier unit includes a first capacitor, a second capacitor, a first diode, a second diode, a third diode, a third inductor, and a second power switch; the drain of the second power switch is respectively connected to the positive output terminal of the zero-ripple boost unit and the positive electrode of the second diode, the negative electrode of the second diode is respectively connected to the positive electrode of the third diode and the first end of the second capacitor, the negative electrode of the third diode is connected to the positive electrode of the output voltage, the second end of the second capacitor is connected to the negative electrode of the first diode; the negative electrodes of the diodes are respectively connected to the sources which are respectively connected to the first end of the third inductor, the negative electrode of the first diode, and the second end of the second capacitor, the second end of the third inductor is respectively connected to the negative output terminal of the zero-ripple boost unit and the first end of the first capacitor, the second end of the first capacitor is respectively connected to the positive electrode of the first diode and the negative electrode of the output voltage.

[0011] In a further technical solution, the zero-ripple boost unit includes a first inductor, a second inductor, a third capacitor, a fourth capacitor, a first power switch, and a third diode.

[0012] In a further technical solution, the drain of the first power switch is respectively connected to the second end of the second inductor and the positive electrode of the third diode, the first end of the second inductor is respectively connected to the second end of the first inductor and the first end of the third capacitor, the first end of the first inductor is connected to the positive electrode of the input voltage, the second end of the third capacitor is respectively connected to the negative electrode of the third diode and the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the negative electrode of the input voltage.

[0013] In a further technical solution, the second end of the third capacitor is further connected to the positive input terminal of the voltage multiplier unit, and the second end of the fourth capacitor is further connected to the negative input terminal of the voltage multiplier unit.

[0014] In a further technical solution, the source of the first power switch is respectively connected to the negative electrode of the input voltage and the second end of the fourth capacitor.

[0015] In a further technical solution, a fifth capacitor is further provided between the positive electrode and the negative electrode of the output voltage.

[0016] In a further technical solution, the first end of the fifth capacitor is respectively connected to the negative electrode of the third diode and the positive electrode of the output voltage, and the second end of the fifth capacitor is respectively connected to the positive electrode of the first diode, the second end of the first capacitor, and the negative electrode of the output voltage.

[0017] In a further technical solution, the selection of the capacitance of each capacitor in the converter is based on the capacitance of the fifth capacitor.

[0018] For a further technical solution, the magnitudes of the second inductor and the third inductor are related to the current ripple ratio of the second inductor, the current ripple ratio of the third inductor, the input voltage, the output voltage, the load resistance, and the switching frequency, and then the magnitude of the first inductor is obtained.

[0019] In a second aspect, the present invention provides a control method for a zero-input-current-ripple wide-gain DC-DC converter, including:

[0020] Obtain the output voltage of the converter and feedback it to the control system;

[0021] Compare the output voltage with a preset reference voltage to generate an error signal;

[0022] Input the error signal into a PI controller to generate a control signal;

[0023] Convert the control signal into a PWM waveform to drive the first power switch and the second power switch;

[0024] The control system repeatedly executes the above steps to maintain the stability of the output voltage.

[0025] The above one or more technical solutions have the following beneficial effects:

[0026] The converter proposed by the present invention realizes the zero-input-ripple characteristic while improving the voltage gain by introducing a zero-ripple boost unit. At the same time, a voltage multiplier unit is introduced, which has a function similar to that of a switched capacitor and optimizes the energy circulation of the switched capacitor, so that the voltage and current stresses of semiconductor devices are reduced while the voltage gain of the converter is further improved.

[0027] The converter proposed by the present invention has the characteristics of high voltage gain, zero input current ripple, wide input range, low voltage stress, and a simplified control strategy under a dual-switch architecture. Its topology has advantages in terms of voltage gain range, voltage stress, and input current ripple, and is particularly suitable for application scenarios of fuel cell power interfaces.

[0028] In order to verify the performance of the proposed converter topology, an experimental prototype with an output power of 500W, an output voltage of 250V, and an input voltage of 20 - 50V was built. The experimental results verified the characteristics of the converter, and it is suitable as an interface converter for fuel cells. Description of the Drawings

[0029] The specification drawings forming a part of the present invention are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention.

[0030] Figure 1It is the topology structure of the DC-DC converter in the embodiment of the present invention;

[0031] Figure 2 It is the topology structure diagram when the switch states S1S2 = 00 in the embodiment of the present invention;

[0032] Figure 3 It is the topology structure diagram when the switch states S1S2 = 11 in the embodiment of the present invention;

[0033] Figure 4 It is the key waveform diagram of the DC-DC converter in the embodiment of the present invention;

[0034] Figure 5 It is the voltage gain of the DC-DC converter and the voltage stresses of each component in the embodiment of the present invention;

[0035] Figure 6 It is the performance comparison diagram between the DC-DC converter in the embodiment of the present invention and the topology of the existing converter;

[0036] Figure 7 It is the experimental prototype of the DC-DC converter in the embodiment of the present invention;

[0037] Figure 8 It is the voltage stresses of each key component under the conditions of output power 500W and output voltage 250V in the embodiment of the present invention; among them, (a) is the voltage stress of the power switches Q i , Q, (b) is the voltage stress of the diodes D1, D2, (c) is the voltage stress of the diodes D o , D i , (d) is the voltage stress of the capacitors C1, C2, (e) is the voltage stress and phase relationship of the second power switch Q and the second diode D2, (f) is the waveform of the third diode D o and the output voltage V o ;

[0038] Figure 9 It is the waveforms of the second inductor current, the third inductor current and the input current under the conditions of output power 500W and output voltage 250V in the embodiment of the present invention; among them, (a) is the current waveform of the input current I in and the second inductor L i , (b) is the current waveform of the input current I in and the third inductor L, (c) is the voltage waveform of the second inductor L i and the first power switch Q i , (d) is the voltage waveform of the third inductor L and the second power switch Q;

[0039] Figure 10 It is the dynamic test diagram of the DC-DC converter in the embodiment of the present invention;

[0040] Figure 11 It is a flowchart of the voltage closed-loop control of the DC-DC converter according to an embodiment of the present invention. Detailed implementation manners

[0041] It should be noted that the following detailed description is exemplary and is intended to provide further illustration of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs.

[0042] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0043] In the case of no conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0044] Embodiment 1

[0045] As Figure 1 shown, this embodiment discloses a zero-input current ripple wide-gain DC-DC converter, which includes a zero-ripple boost unit and a voltage multiplier unit connected in sequence. The voltage multiplier unit includes a first capacitor, a second capacitor, a first diode, a second diode, a third diode, a third inductor, and a second power switch; the drain of the second power switch is respectively connected to the positive output terminal of the zero-ripple boost unit and the positive electrode of the second diode. The negative electrode of the second diode is respectively connected to the positive electrode of the third diode and the first end of the second capacitor. The negative electrode of the third diode is connected to the positive electrode of the output voltage. The second end of the second capacitor is connected to the negative electrode of the first diode; the negative electrodes of the diodes are respectively connected to the sources and are respectively connected to the first end of the third inductor, the negative electrode of the first diode, and the second end of the second capacitor. The second end of the third inductor is respectively connected to the negative output terminal of the zero-ripple boost unit and the first end of the first capacitor. The second end of the first capacitor is respectively connected to the positive electrode of the first diode and the negative electrode of the output voltage.

[0046] In this embodiment, the zero-ripple boost unit includes a first inductor L in , a second inductor L i , a third capacitor C i , a fourth capacitor C in , a first power switch Q i and a third diode D i , which realizes the zero-ripple characteristic of the input current while improving the voltage gain and effectively improves the service life of the fuel cell.

[0047] The drain of the first power switch Q i is respectively connected to the second end of the second inductor L i and the positive electrode of the third diode D i . The first end of the second inductor L i is respectively connected to the second end of the first inductor L in and the first end of the third capacitor C i . The first end of the first inductor L in is connected to the positive electrode of the input voltage, and the second end of the third capacitor C i is respectively connected to the negative electrode of the third diode D i and the first end of the fourth capacitor C in . The second end of the fourth capacitor C in is connected to the negative electrode of the input voltage; the source of the first power switch Q i is respectively connected to the negative electrode of the input voltage and the second end of the fourth capacitor C in .

[0048] Furthermore, the second end of the third capacitor C i is also connected to the positive input terminal of the voltage multiplier unit (i.e., the positive electrode of the second diode D2), and the second end of the fourth capacitor C in is also connected to the negative input terminal of the voltage multiplier unit (i.e., the first end of the first capacitor C1).

[0049] In this embodiment, the voltage multiplier unit includes the first capacitor C1, the second capacitor C2, the first diode D1, the second diode D2, the third diode D o , the third inductor L and the second power switch Q, and realizes the same efficiency as the switched capacitor through structural optimization: improving the voltage gain and reducing the device voltage stress, while improving the energy circulation problem between capacitors in the switched capacitor structure and avoiding the switching peak current.

[0050] The drain of the second power switch Q is respectively connected to the positive output terminal of the zero-ripple boost unit (i.e., the second end of the third capacitor C i ), and the positive electrode of the second diode D2. The negative electrode of the second diode D2 is respectively connected to the positive electrode of the third diode D o , and the first end of the second capacitor C2. The negative electrode of the third diode D o is connected to the positive electrode of the output voltage, and the second end of the second capacitor C2 is connected to the negative electrode of the first diode D1; the source of the second power switch Q is respectively connected to the first end of the third inductor L, the negative electrode of the first diode D1 and the second end of the second capacitor C2. The second end of the third inductor L is respectively connected to the negative output terminal of the zero-ripple boost unit (i.e., the second end of the fourth capacitor C in ), and the first end of the first capacitor C1. The second end of the first capacitor C1 is respectively connected to the positive electrode of the first diode D1 and the negative electrode of the output voltage.

[0051] A fifth capacitor C is also provided between the positive output voltage and the negative output voltage. o , the fifth capacitor C o The first ends of are respectively connected to the negative electrode of the third diode D o , the positive output voltage. The second ends of the fifth capacitor C o are respectively connected to the positive electrode of the first diode D1, the second end of the first capacitor C1 and the negative output voltage. The input voltage is marked as V in , and the output voltage is marked as V o .

[0052] The fifth capacitor C o is the output capacitor of the DC-DC converter. When the converter is working, the power switch will turn on and off at high speed. This capacitor will smooth the current through charging and discharging, reducing the output voltage ripple; at the same time, it prevents the output voltage from dropping suddenly, ensuring that the load obtains continuous energy supply within the switching period; at the same time, the current mutation during the turn-on and turn-off of the power switch may cause voltage spikes, and this capacitor can absorb these transient overvoltages to protect the load.

[0053] The DC-DC converter adopts a dual-module integrated converter topology. Under the assumption of ideal devices, it is set that the duty cycle parameters di = d = D of the first power switch Q i and the second power switch Q, and their gate drive signals S1, S2 remain in phase. The key waveforms of the proposed converter are as Figure 4 shown. According to the switch state combination of S1, S2, it can be divided into two working modes: the switch states S1S2 = {00 and 11}.

[0054] Working mode 1: Mode1: As Figure 2 shown, when the switch state S1S2 = 00, the first power switch Q i and the second power switch Q are both turned off. The third diode D i , the first diode D1, and the second diode D2 are forward-biased, while the third diode D o is reverse-biased. At this time, the second inductor L i , the third inductor L release energy, and the fourth capacitor C in , the second capacitor C2, and the first capacitor C1 enter the charging state. At the same time, the third capacitor C i completes a charge and discharge cycle. Since the third diode Do is in the cut-off state, the fifth capacitor C o delivers the stored energy directly to the load R. Correspondingly, the voltage of the first inductor L in is reduced by the ripple voltage of the fourth capacitor C in .

[0055] Furthermore, as Figure 4 shown, when Lin When the voltage is greater than zero, L in is charged and the current i Lin increases; when L in has a voltage less than zero, L in is discharged and the current i Lin decreases. If the capacitor voltage ripple is ignored, i Lin can be considered unchanged, that is, the inductor current has a zero-ripple characteristic.

[0056] Operating mode 2 (Mode2): As Figure 3 shown, when the switch states S1S2 = 11, the first power switch Q i and the second power switch Q are turned on synchronously, and the third diode D i , the first diode D1, and the second diode D2 are reverse-biased, while the third diode D o is forward-biased. During this stage, the fourth capacitor C in , the first capacitor C1, and the second capacitor C2 are discharged, and the fifth capacitor C o along with the first inductor L in and the third inductor L enter the charging and energy storage state, and the third capacitor C i completes the charge and discharge cycle again. Correspondingly, the voltage of the first inductor L in increases due to the influence of the ripple voltage of the fourth capacitor C in .

[0057] Furthermore, as Figure 4 shown, when the voltage of L in is less than zero, L in is discharged and the current i Lin decreases; when the voltage of L in is greater than zero, L in is charged and the current i Lin increases. If the capacitor voltage ripple is ignored, i Lin can be considered unchanged, that is, the inductor current has a zero-ripple characteristic.

[0058] In operating mode 1 and operating mode 2, the first power switch Q i and the second power switch Q adopt synchronous switch control, being turned on or off synchronously.

[0059] The zero-input-current-ripple wide-gain DC-DC converter proposed in this embodiment can also be called a novel non-isolated wide-gain-range boost DC-DC converter, which has the following characteristics: (1) high voltage gain characteristic; (2) zero input current ripple; (3) wide input range and low voltage stress; (4) no need for extreme duty cycle and adopting synchronous switch control, combining the advantages of simple control and low conduction loss.

[0060] Next, the steady-state characteristics analysis and topology comparison of the converter are carried out.

[0061] (1) Zero input current ripple

[0062] Assume that all components are ideal components, and the capacitors and inductors are large enough. It can be considered that the voltage of each capacitor is a constant value. Based on Figure 2 、 Figure 3 The ampere-second balance equations of each capacitor can be established as follows:

[0063]

[0064] where D represents the duty cycle; I Cia 、I C1a 、I C2a 、I Coa 、I Cina (abbreviated as I Cia ~I Cina ) represent the average currents of capacitors C i 、C1, C2, C o and C in (abbreviated as C i ~C in ) when the switch state is "11"; I Cib 、I C1b 、I C2b 、I Cob 、I Cinb (abbreviated as I Cib ~I Cinb ) represent the average currents of capacitors C i 、C1, C2, C o and C in (abbreviated as C i ~C in ) when the switch state is "00".

[0065] According to Figure 2 、 Figure 3 in the energy flow path and Kirchhoff's current law, we can obtain:

[0066]

[0067] where I L represents the current of the third inductor L, I o represents the output current, I Li represents the current of the second inductor Li, I Lin represents the current of the first inductor L in .

[0068] By combining (1) and (2), we can obtain:

[0069] I Cia =0, I Cib =0. (3)

[0070] Indicates the third capacitor C i Completes the charge and discharge cycle within each switch state, and the average working current is 0.

[0071] According to Kirchhoff's voltage law:

[0072] V Lin = V Cin - V Ci - V in (4)

[0073] Among them, V Lin represents the voltage of the first inductor L in , V Cin represents the voltage of the fourth capacitor C in , V Ci represents the voltage of the third capacitor C i , V in represents a constant voltage source. And it can be seen from Equation (3) that C i can be equivalent to a voltage source, and the current ripple expression of the first inductor L in can be derived:

[0074]

[0075] Among them, T s represents the time of one cycle, and fs represents the working frequency. Equation (5) shows that the current ripple of the second inductor L i is only related to the voltage ripple of the fourth capacitor C in : When V Lin > 0, the first inductor L in charges and I Lin increases; when V Lin < 0, the first inductor L in discharges and I Lin decreases. If the voltage ripple of the fourth capacitor C in is ignored, then I Lin can be regarded as a state without ripple, and at this time the input current I in = I Lin also exhibits the characteristic of zero ripple.

[0076] In the ideal case, the current ripple of I Lin is zero. However, in actual working conditions, when considering the voltage ripple of C in , the ripple amplitude of I Lin is jointly determined by the voltage ripple of the fourth capacitor C in and the inductance of the first inductor L in .

[0077] (2) Wide voltage gain

[0078] ​Under ideal conditions, the first inductor L in has a constant voltage. From the Figure 2 , Figure 3 , the volt-second balance formula of the second inductor L i and the third inductor L can be obtained:

[0079]

[0080] Also, according to Kirchhoff's voltage law, the capacitor voltage relationship can be obtained:

[0081]

[0082] From equations (6) and (7), the voltage gain M of the converter and the capacitor voltages are:

[0083]

[0084] Among them, V Ci , V C1 , V C2 , V Co , V Cin (abbreviated as V Ci ~V Co ) are the voltages of capacitors C i , C1, C2, C o , C in respectively, and V o represents the output voltage.

[0085] From equation (8), it can be seen that when the duty cycle D varies in the range of 0.2 to 0.8, the voltage gain range is 3.2 to 50.

[0086] (3) Low voltage stress

[0087] From equations (7) and Figure 2 , Figure 3 , the voltage stresses of each power semiconductor can be obtained:

[0088]

[0089] Among them, V D i, V D1 , V D2 , V Do represent the voltages of the third diode D i , the first diode D1, the second diode D2, and the third diode D o respectively.

[0090] From equation (9), as Figure 5 shown, the voltage stresses of all power semiconductor devices are less than the output voltage. Additionally, from equation (8), except for the fifth capacitor C oIn addition, the voltages of the remaining capacitors are also less than the output voltage, thus ensuring the reliability of the capacitors and reducing the capacitor failure rate.

[0091] (4) Comparison with other converter topologies

[0092] Table 1 and Figure 6Shows the performance comparison of the converter proposed in the present invention with existing topologies, including typical structures with the following characteristics: "Ultrahigh Step-Up DC–DC Converter Composed of Two Stages Boost Converter, Coupled Inductor, and Multiplier Cel" (denoted as [1]), the VM+CI topology of "Synchronous Dual-Switch Ultrahigh Step-Up DC–DC Converter Based on Coupled Inductor and Voltage Multiplier for Photovoltaic Systems" (denoted as [2]), the CI+SC+QBC architecture of "An Ultra-High Gain Quadratic Converter Based on Coupled Inductor and Switched Capacitor Techniques for DC Micro-Grid Applications" (denoted as [3]), "Quadratic-Extended-Duty-Ratio Boost Converters for Ultra High Gain Application With Low Input Current Ripple and Low Device Stress,The Q-EDR structure in "in IEEETransactions on IndustryApplications" (denoted as [4]), "A Novel High Step-Up Nonisolated Quasi-Z-Source DC–DC Converter With Active Switched Inductorand Switched Capacitor" (denoted as [5]), the A-SL+SC design in "HybridActive SwitchedInductorDC-DCConverter With Common Ground and Suppressed Voltage Oscillation for FuelCellVehiCIes" (denoted as [8]), the SC+CI combination in "Soft Switching HighVoltage Gain Quasi-Z-Source DC–DC ConverterWith Switched-CapacitorTechnique" (denoted as [6]), the SL-C network in "Nonisolated High Step-Up DC–DC Converter With Passive Switched-Inductor-CapacitorNetwork" (denoted as [7]), and the current ripple cancellation topologies in "An Optimal Structure for High Step-Up Nonisolated DC–DC Converters With Soft-Switching Capability and Zero InputCurrent Ripple" (denoted as [9]) and "Coupled Inductor-Based Current-Fed Ultra-High Step-Up DC-DC Converter Featuring Low Input Current Ripple" (denoted as

[10] ).,

[0093] As described above, [1] and [2] achieve squared gain through the synergistic effect of the voltage multiplier unit and the coupled inductor, and reduce the stress of power devices, but their input current ripple is relatively large; [3] and [4] both achieve squared gain. The former effectively improves the gain and reduces the voltage stress through multi-structure fusion, and the latter combines the secondary boost and extended duty cycle techniques to achieve ultra-high gain and low stress. However, both of them have problems of a large number of components and complex control strategies, resulting in an increase in system volume and cost. At the same time, if the latter adopts an interleaved configuration, 3 additional diodes and 1 inductor need to be introduced, further exacerbating the structural complexity; the quasi-Z-source converter of [5] combines the advantages of A-SL and SC, [7] adopts a symmetric switched-inductor-capacitor network to significantly reduce device stress and volume cost, and [8] eliminates voltage oscillation and reduces component stress through structural optimization, but as Figure 5 shown, the voltage gains of the three are low. Although [7] can obtain a relatively high gain when the duty cycle exceeds 0.25, its duty cycle upper limit is restricted to 0.295. At the same time, a small change in the duty cycle of this converter in the high-gain operating state will cause a large output voltage fluctuation; [6] combines the coupled inductor, switched capacitor and soft-switching technology to reduce the current ripple and voltage stress, and [9] integrates the coupled inductor and the diode-capacitor voltage multiplier to eliminate the current ripple while increasing the gain. However, the complex eight-mode operating mechanism of the two leads to an increase in control and maintenance costs;

[10] uses a dual-winding coupled inductor to adjust the turns ratio, effectively expanding the output voltage range and reducing the duty cycle dependence, but the diode on the output side bears too high voltage stress.

[0094] As shown in Table 1 and Figure 6 From the performance comparison between the converter proposed in the present invention and the existing topologies, the converter proposed in the present invention has the following characteristics: (1) Wide-range voltage gain adjustment ability; (2) Low voltage stress of power switches and diodes; (3) Zero input current ripple characteristic; (4) Simplified control strategy under the dual-switch architecture.

[0095] Comparative analysis shows that compared with various converters listed in Table 1, the topology of the present invention has advantages in terms of voltage gain range, voltage stress and input current ripple, and is particularly suitable for the application scenario of fuel cell power interface.

[0096] Table 1

[0097]

[0098] The following specifically describes the parameter design of each component in the converter.

[0099] All the following parameters are designed under the conditions of an output voltage of 250V, an output power of 500W, an input voltage range of 20V to 50V, and a frequency fs = 50KHz.

[0100] (1) Capacitor parameter design

[0101] The selection of capacitors should be based on the capacitors that withstand the maximum voltage stress and the maximum voltage ripple in the circuit, to ensure that all capacitors have sufficient margin while meeting the most stringent working conditions. This will not only reduce the complexity of spare parts management, but also improve the maintainability and consistency of the system, while avoiding potential reliability issues caused by parameter mismatch. In order to simplify later maintenance and improve system reliability, the capacitors in the converter use a unified capacitor model, namely C i =C in =C1=C2=C o The choice of capacitor can be determined by formula (8) o shall prevail.

[0102] Depend on Figure 3 It can be seen that when the switch state is at "11", the fifth capacitor C o During charging, the output voltage increases linearly. Therefore, the output voltage ripple can be calculated in the "11" state, and the formula (1) (2) can be obtained:

[0103]

[0104] Among them, I Coa Represents the current of the fifth capacitor when the switch state is "11".

[0105] From formula (10), we can get the fifth capacitor C o Value formula:

[0106]

[0107] The duty cycle range used in the experimental test is 0.368~0.6. When the duty cycle is 0.368, the capacitor value required by the converter is the largest. When the maximum value of the capacitor voltage ripple rate is set to 0.1%, the maximum capacitor ripple voltage is Δu Co =0.25V, under this condition, the fifth capacitor C can be obtained from formula (11): o The value is 101μF. To avoid large voltage ripple when the converter is overloaded, a certain margin is left, so all capacitors in the converter are selected to be 150μF.

[0108] (2) Inductor parameter design

[0109] From equation (1) and equation (2), we can get the second inductance L i And the current of the third inductor L:

[0110]

[0111] At the same time, you can get:

[0112]

[0113] From the volt - second balance of the inductor, the second inductor L i and the voltage V Lia 、V La at the switch state "11" of the third inductor L are:

[0114]

[0115] From Figure 3 it can be seen that when the switch state is "11", the currents of the second inductor L i and the third inductor L increase linearly, so the current ripples Δi Li 、Δi L can be expressed as:

[0116]

[0117] Among them, Δi Li 、Δi L are respectively the current ripples of the second inductor L i and the third inductor.

[0118] According to Equation (12) and Equation (15), the current ripple rate r i of the second inductor L Li 、the current ripple rate r L of the third inductor L are:

[0119]

[0120] From the above formula, it can be known that the size of the inductor is related to the allowable current ripple rate r Li 、the current ripple rate r L 、the input voltage V in 、the output voltage V o 、the load resistance R and the switching frequency f s It is expressed as:

[0121]

[0122] During the experiment, the duty cycle of the converter was set in the range of 0.368 - 0.6 for testing. Theoretical analysis shows that when the duty cycle is 0.368, the system's demand for the inductance value reaches its peak. Based on the comprehensive considerations of inductance volume optimization, capacitor current thermal effect control, and system efficiency balance, 0.4 is determined as the optimal design value for the inductance current ripple rate. Since this wide voltage gain converter cannot maintain a constant ripple rate across the entire operating range, a segmented design strategy is adopted to make the ripple rate in the main operating area approach the target value. Considering the DC bias effect of the magnetic core, the inductance characteristics under various operating conditions are measured experimentally. The characteristic duty cycle points D = 0.368 (lower limit), D = 0.484 (median), and D = 0.6 (upper limit) are selected as the core design benchmarks. The specific inductance parameters are shown in Table 2.

[0123] The magnetic flux linkage λ is given by the following formula:

[0124]

[0125] From Equation (16), the first inductor L can be obtained as: in as:

[0126]

[0127] From Equations (2) and (17), it can be further obtained that:

[0128]

[0129] According to the experimental parameters, when the ripple rate of the inductor is less than 1%, the value of L in is 11 μH. At the same time, to prevent excessive current ripple under light load, a certain margin is left, so the final value of L in is selected as 15 μH.

[0130] (3) Design of power semiconductor parameters

[0131] Under the condition that the output voltage is 250 V, when the duty cycle is 0.368, the voltage stress of each power semiconductor is the largest. From Equation (9), the voltage stresses of each power switch and diode are respectively:

[0132]

[0133] At the same time, from Figure 2 , Figure 3 and Equation (13), the current stresses (average current in the conducting state) of each power semiconductor can be obtained as:

[0134]

[0135] To improve device compatibility and maintenance convenience, the same type of standardized selection scheme is adopted for all diodes and power switch devices. At the same time, in view of the dynamic ripple effect during the operation of the converter, sufficient safety margins should be reserved in the device parameter design.

[0136] Experiments were conducted on the effectiveness of the converter proposed in the present invention, and the experiments will be specifically described below.

[0137] To verify the effectiveness of the proposed converter, an experimental prototype with a size of 22.24 cm × 9.78 cm was built in this embodiment, as Figure 7 shown. The specifications of the prototype are the same as those in Table 2. The drive signal is generated by TMS320F28335, the input power supply is replaced by a DC power supply of 20V - 50V, and the load is a resistive load.

[0138] Table 2 Experimental Parameters

[0139]

[0140]

[0141] Experimental tests show that under the conditions of an output power of 500W and an output voltage of 250V, the voltage stresses of each key component are as Figure 8 shown. Among them, V D1 = V D2 = V D o = V Q ≈ 125V, about of the output voltage. V Q i = V D i ≈ 50V, about of the output voltage. The voltages across the first capacitor C1 and the second capacitor C2 are 75V and 125V respectively. The measured voltage stresses of all power devices and capacitors are basically in line with the theoretical analysis results.

[0142] The inductor currents I L i, I L and the input current waveforms are as Figure 9 shown. (a) confirms that after introducing the zero - ripple unit, the input current ripple coefficient approaches zero. (c) - (d) respectively present the phase relationship between I Li - V Qi and IL - VQ : During the conduction periods of the power switch tubes Q i and Q, the currents of the second inductor L i and the third inductor L show a linear rising trend; during the turn - off stage, they show a linear decreasing characteristic, and the experimental waveforms are highly consistent with the theoretical derivation.

[0143] Under closed - loop control, the output voltage is stably maintained at 250V. AsFigure 10 As shown, dynamic tests show that under the condition of dynamic adjustment of the input voltage (20V → 50V), the system can still maintain a stable output of 250V, verifying that the proposed converter has a wide voltage gain adjustment ability of 12.5 - 5.

[0144] In summary, the present invention proposes a non-isolated DC-DC converter with a wide voltage gain range, having the characteristics of zero input current ripple, high voltage gain, and low voltage stress. To prove the feasibility of the converter, a 500W model is established in this embodiment, where the output voltage can be stabilized at 250V when the input voltage varies from 20V to 50V. Experimental results show that within an appropriate voltage gain range (5 - 12.5), the voltage stresses of all power semiconductor devices are relatively low (79V - 50V or 125V), and at the same time, zero ripple of the input current is achieved. In addition, the maximum efficiency of the converter is 96.2%. The above characteristics and experimental results indicate that the proposed converter is suitable as a fuel cell power interface converter.

[0145] Embodiment 2

[0146] This embodiment discloses a control method for a zero-input-current-ripple wide-gain DC-DC converter, including:

[0147] Obtain the output voltage of the converter and feedback it to the control system;

[0148] Compare the output voltage with a preset reference voltage to generate an error signal;

[0149] Input the error signal into a PI controller to generate a control signal;

[0150] Convert the control signal into a PWM waveform to drive the first power switch and the second power switch;

[0151] The control system executes the above steps in a loop to maintain the stability of the output voltage.

[0152] In this embodiment, as Figure 11 shown, to maintain the stability of the output voltage of the converter, a voltage closed-loop control system is designed, and the stable control of the output voltage is achieved through a PI controller. Through small-signal modeling, the controller can be conveniently designed.

[0153] The specific control process is as follows:

[0154] The output voltage V of the converter is sampled in real time through a voltage sensor o , and it is used as a feedback signal and input into the control system;

[0155] The sampled output voltage V o is compared with the preset reference voltage V refCompare to generate an error signal e;

[0156] Input the error signal e into a PI controller to generate a control signal d through proportional and integral operations for dynamically adjusting the duty cycle of the power switch;

[0157] Convert the control signal d into a PWM waveform to drive the first power switch Q of the zero-ripple boost unit i and the second power switch Q of the voltage multiplier unit;

[0158] The control system continuously and circularly executes the above steps to adjust the duty cycle in real time and maintain the stability of the output voltage.

[0159] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

[0160] Although the specific implementation manners of the present invention are described above in conjunction with the accompanying drawings, it is not a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications or deformations that can be made without creative efforts on the basis of the technical solutions of the present invention are still within the protection scope of the present invention.

Claims

1. A zero input current ripple wide gain DC-DC converter, characterized in that: It comprises a zero-ripple boost unit and a voltage multiplying unit connected in sequence, wherein the voltage multiplying unit comprises a first capacitor, a second capacitor, a first diode, a second diode, a third diode, a third inductor and a second power switch; the drain of the second power switch is respectively connected to the positive output terminal of the zero-ripple boost unit and the positive terminal of the second diode, the cathode of the second diode is respectively connected to the positive terminal of the third diode and the first end of the second capacitor, the cathode of the third diode is connected to the positive terminal of the output voltage, and the second end of the second capacitor is connected to the cathode of the first diode; the cathode of the diode is respectively connected to the first end of the third inductor, the cathode of the first diode and the second end of the second capacitor, the second end of the third inductor is respectively connected to the negative output terminal of the zero-ripple boost unit and the first end of the first capacitor, and the second end of the first capacitor is respectively connected to the positive terminal of the first diode and the negative terminal of the output voltage.

2. A zero input current ripple wide gain DC-DC converter as claimed in claim 1, characterized in that: The zero-ripple boost unit includes a first inductor, a second inductor, a third capacitor, a fourth capacitor, a first power switch and a third diode.

3. A zero input current ripple wide gain DC-DC converter as claimed in claim 2, characterized in that: The drain of the first power switch is respectively connected to the second end of the second inductor and the anode of the third diode, the first end of the second inductor is respectively connected to the second end of the first inductor and the first end of the third capacitor, the first end of the first inductor is connected to the positive electrode of the input voltage, the second end of the third capacitor is respectively connected to the negative electrode of the third diode and the first end of the fourth capacitor, and the second end of the fourth capacitor is connected to the negative electrode of the input voltage.

4. A zero input current ripple wide gain DC-DC converter as claimed in claim 3, characterized in that: The second end of the third capacitor is also connected to the positive input end of the voltage multiplication unit, and the second end of the fourth capacitor is also connected to the negative input end of the voltage multiplication unit.

5. A zero input current ripple wide gain DC-DC converter as claimed in claim 2, characterized in that: The source of the first power switch is connected to the negative electrode of the input voltage and the second end of the fourth capacitor respectively.

6. A zero input current ripple wide gain DC-DC converter as claimed in claim 1, characterized in that: A fifth capacitor is also provided between the output voltage positive electrode and the output voltage negative electrode.

7. A zero input current ripple wide gain DC-DC converter as claimed in claim 6, characterized in that: The first end of the fifth capacitor is respectively connected to the cathode of the third diode and the anode of the output voltage, and the second end of the fifth capacitor is respectively connected to the anode of the first diode, the second end of the first capacitor and the cathode of the output voltage.

8. The zero input current ripple wide gain DC-DC converter according to claim 1, characterized in that: The selection of the capacitance of each capacitor in the converter is based on the capacitance of the fifth capacitor.

9. The zero input current ripple wide gain DC-DC converter according to claim 1, characterized in that: The magnitudes of the second inductor and the third inductor are related to the current ripple rate of the second inductor, the current ripple rate of the third inductor, the input voltage, the output voltage, the load resistance and the switching frequency, thereby obtaining the magnitude of the first inductor.

10. A control method for a zero input current ripple wide gain DC-DC converter, characterized in that: include: Obtain the output voltage of the converter and feed it back to the control system; Comparing the output voltage with a preset reference voltage to generate an error signal; Inputting the error signal into a PI controller to generate a control signal; Convert the control signal into a PWM waveform to drive the first power switch and the second power switch; The control system executes the above steps cyclically to maintain a stable output voltage.

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