Power converter and electronic device

Abstract

The invention discloses a power converter and electronic equipment, the power converter comprises a power conversion circuit, the power conversion circuit comprises a switch assembly, a transformer, a first impedance circuit and a second impedance circuit, and the switch assembly converts a DC voltage into a first pulse voltage and a second pulse voltage for output. Moreover, the first pulse voltage and the second pulse voltage have a phase difference, and when the first pulse voltage and the second pulse voltage are the same at the same moment, the first impedance circuit and the second impedance circuit are respectively used for presenting sensibility, so that inductive current can pass through the first output end and the second output end, soft switching of the switch assembly is realized, and switching loss is reduced. And when the first pulse voltage and the second pulse voltage are different at the same moment, the transformer outputs the power to the load, the first impedance circuit is used for impedance matching, and the second impedance circuit is used for disconnecting the midpoint of the primary winding from the reference voltage end, so that a higher bandwidth is realized.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technologies, and particularly to a power converter and an electronic device. Background Art

[0002] In the processes of semiconductor production and material processing, plasma is usually generated in semiconductor process equipment to process target materials through the plasma. Semiconductor process equipment generally has a process chamber, a radio frequency power supply, etc. There is a reaction gas in the process chamber, and the radio frequency power supply generates high-frequency power and injects it into the process chamber to excite the reaction gas to generate plasma. In practical applications, multiple different process preparation processes are usually carried out in the same process chamber, and the output powers of the radio frequency power supplies required for different process preparation processes are different. Therefore, it is necessary to change the output power of the radio frequency power supply according to different process preparation processes. Currently, a switching topology is usually used to adjust the output power of the radio frequency power supply. However, as the switching frequency increases, the switching loss also increases. Summary of the Invention

[0003] Embodiments of this application provide a power converter and an electronic device to reduce switching loss.

[0004] In a first aspect, an embodiment of this application provides a power converter. The power converter includes a power conversion circuit. The power conversion circuit includes: a switching component, a transformer, a first impedance circuit, and a second impedance circuit. Among them, the first end of the switching component is used to receive a DC voltage. The first output end of the switching component is connected to the first end of the primary winding of the transformer through the first impedance circuit. The second output end of the switching component is connected to the second end of the primary winding of the transformer through the first impedance circuit. The midpoint of the primary winding of the transformer is connected to the first end of the second impedance circuit. The second end of the second impedance circuit is connected to a reference voltage terminal. The secondary winding of the transformer is used to connect to a load. With this setting, during operation, the switching component is used to convert the DC voltage into a first pulse voltage and output it to the transformer through the first output end, and convert the DC voltage into a second pulse voltage and output it to the transformer through the second output end. And the first pulse voltage and the second pulse voltage have a phase difference. Based on this, there will be a situation where the first pulse voltage and the second pulse voltage are the same at the same moment. Then, when the first pulse voltage and the second pulse voltage are the same at the same moment, the first impedance circuit and the second impedance circuit are respectively used to present inductance, which can enable the inductive current to pass through the first output end and the second output end, enabling the switching component to achieve soft switching and reducing the switching loss. And there will also be a situation where the first pulse voltage and the second pulse voltage are different at the same moment. Then, when the first pulse voltage and the second pulse voltage are different at the same moment, the transformer outputs power to the load, and the first impedance circuit is used for impedance matching, and the second impedance circuit is used to open the circuit between the midpoint of the primary winding and the reference voltage terminal to achieve a higher bandwidth.

[0005] In some embodiments, the power conversion circuit further includes a third impedance circuit. The first end of the third impedance circuit is connected to the first output terminal, the second end of the third impedance circuit is connected to the second output terminal, and the third end of the third impedance circuit is connected to the reference voltage terminal. Moreover, when the voltages of the first output terminal and the second output terminal are the same at the same moment, the third impedance circuit is used to present inductance, further enabling the inductive current to pass through the first output terminal and the second output terminal, enabling the switching component to achieve soft switching and reducing switching losses. And when the voltages of the first output terminal and the second output terminal are different at the same moment, the third impedance circuit is used for impedance matching to further increase the bandwidth. Further, in some application scenarios, if the heat dissipation capacity of the switch in the switching component is sufficient or the output capacitance (Coss) and output charge (Qoss) of the switch are very small, the third impedance circuit can also be not provided, reducing the number of components used and the cost.

[0006] In some embodiments, the third impedance circuit includes a first inductor and a second inductor. The first end of the first inductor is connected to the first output terminal, the second end of the first inductor is connected to the reference voltage terminal, the first end of the second inductor is connected to the second output terminal, and the second end of the second inductor is connected to the reference voltage terminal. With this arrangement, when the voltages of the first output terminal and the second output terminal are the same at the same moment, the inductive current further passes through the first output terminal and the second output terminal through the first inductor and the second inductor, enabling the switching component to achieve soft switching and reducing switching losses. And when the voltages of the first output terminal and the second output terminal are different at the same moment, impedance matching is achieved through the first inductor and the second inductor to further increase the bandwidth.

[0007] In some embodiments, the switching component can be formed by a bridge circuit. For example, the switching component includes a first half-bridge and a second half-bridge. The first end of the first half-bridge is used to receive a DC voltage, the midpoint of the bridge arm of the first half-bridge is connected to the first end of the primary winding of the transformer through a first impedance circuit, and the first half-bridge is used to output a first pulse voltage; the first end of the second half-bridge is used to receive a DC voltage, the midpoint of the bridge arm of the second half-bridge is connected to the second end of the primary winding of the transformer through a first impedance circuit, and the second half-bridge is used to output a second pulse voltage. Generally, there are differences in the losses between the leading arm and the lagging arm in the half-bridge. In order to further reduce the loss difference between the leading arm and the lagging arm during phase shift, the inductance values of the first inductor and the second inductor can be designed to be not completely the same in proportion. For example, if the first half-bridge is the leading arm and the second half-bridge is the lagging arm, the inductance value of the first inductor is made greater than the inductance value of the second inductor.

[0008] Exemplarily, the inductance value of the first inductor is 200 nH to 400 nH.

[0009] Exemplarily, the inductance value of the second inductor is 200 nH to 400 nH.

[0010] In some embodiments, the second impedance circuit includes a third inductor connected between the midpoint of the primary winding and the reference voltage terminal. With this arrangement, when the first pulse voltage is the same as the second pulse voltage at the same moment, the third inductor presents inductance, adjusting the branch current of the inductive current generated by the first impedance circuit. Also, when the first pulse voltage is different from the second pulse voltage at the same moment, combining the performance of the third inductor and the transformer can automatically open the circuit between the midpoint of the primary winding and the reference voltage terminal.

[0011] Generally, there will be parasitic inductance on the connection line. And to reduce the number of components and costs, the midpoint of the primary winding is directly connected to the reference voltage terminal through the connection line, and the third inductor includes the parasitic inductance in the path between the midpoint of the primary winding and the reference voltage terminal, that is, it is equivalent to setting the parasitic inductance of the connection line as the third inductor.

[0012] Of course, an external inductor can also be connected in series between the midpoint of the primary winding and the reference voltage terminal, so that the midpoint of the primary winding is connected to the reference voltage terminal through the external inductor, thereby making the third inductor include the external inductor and the parasitic inductance in the path between the midpoint of the primary winding and the reference voltage terminal. With this arrangement, the accuracy of adjusting the inductance of the third inductor can be improved by adjusting the inductance of the external inductor. And to ensure the inductive current generated by the first impedance circuit, the inductance value of the external inductor is set as small as possible.

[0013] To reduce the equivalent inductive reactance of the third inductor, the second impedance circuit further includes a first capacitor. Among them, the first capacitor can be connected between the midpoint of the primary winding of the transformer and the third inductor, or the first capacitor can also be connected between the third inductor and the reference voltage terminal. With this arrangement, a capacitive reactance is generated by the first capacitor to reduce the equivalent inductive reactance of the third inductor, achieving the purpose of increasing the inductive current. Further, in some application scenarios, if the inductive current is already sufficient, the first capacitor can also be removed, that is, the first capacitor is replaced by a short circuit.

[0014] Exemplarily, the inductance value of the parasitic inductance included in the third inductor can be set to 50 nH to 100 nH. For example, the inductance value of the parasitic inductance is set to 50 nH, 55 nH, 60 nH, 65 nH, 70 nH, 75 nH, 80 nH, 85 nH, 90 nH, 95 nH, 100 nH, etc.

[0015] Exemplarily, the capacitance value of the first capacitor is 680 pF. With this arrangement, all the switches in the switch assembly can work in zero-voltage turn-on, realizing soft switching and reducing the switching loss.

[0016] In some embodiments, the first impedance circuit includes a fourth inductor, a fifth inductor, and a second capacitor. The first end of the fourth inductor is connected to the first output terminal, and the second end of the fourth inductor is connected to the first end of the primary winding. The first end of the fifth inductor is connected to the second output terminal, and the second end of the fifth inductor is connected to the second end of the primary winding. The first end of the second capacitor is connected to the first end of the primary winding, and the second end of the second capacitor is connected to the second end of the primary winding. With this arrangement, the fourth inductor, the fifth inductor, and the second capacitor form an LC matching network. Moreover, when the first pulse voltage is the same as the second pulse voltage at the same moment, the transformer is equivalent to a short circuit, and the fourth inductor and the fifth inductor can provide inductive inductance to help extract the charge of the switch in the switching component to achieve soft switching and reduce switching losses. And when the first pulse voltage is different from the second pulse voltage at the same moment, the fourth inductor, the fifth inductor, and the second capacitor can achieve normal impedance matching.

[0017] According to the circuit structure design of the power converter, the inductance values of the fourth inductor and the fifth inductor are set to be the same. And according to the circuit structure design of the power converter, the parasitic capacitance of the primary winding of the transformer is absorbed by the second capacitor, so as to match the parasitic capacitance of the primary winding of the transformer through the second capacitor.

[0018] Exemplarily, the inductance value of the fourth inductor is set to 220 nH.

[0019] Exemplarily, the inductance value of the fifth inductor is set to 220 nH.

[0020] Exemplarily, the capacitance value of the second capacitor is 500 pF.

[0021] In some embodiments, the power conversion circuit further includes a third capacitor and a fourth capacitor. The first output terminal is connected to the first impedance circuit and the third impedance circuit through the third capacitor, and the second output terminal is connected to the first impedance circuit and the third impedance circuit through the fourth capacitor. With this arrangement, impedance matching is further achieved through the third capacitor and the fourth capacitor, and the purpose of blocking direct current and passing alternating current is achieved. Further, in some application scenarios, if the dead time ratio of the switch in the switching component is large and the duty cycle asymmetry degree is small, the third capacitor and the fourth capacitor can also not be set, reducing the number of components used and the cost.

[0022] In this application, impedance matching is achieved through the third capacitor and the fourth capacitor, and the purpose of blocking direct current and passing alternating current is achieved. In specific implementation, the capacitance values of the third capacitor and the fourth capacitor can be made the same.

[0023] Exemplarily, the capacitance value of the third capacitor is set to 100 pF.

[0024] Exemplarily, the capacitance value of the fourth capacitor is set to 100 pF.

[0025] In some embodiments, the reference voltage terminal presents a low impedance during AC, so that during AC, the reference voltage terminal is equivalent to an AC ground terminal.

[0026] Exemplarily, the reference voltage terminal has a DC reference voltage.

[0027] In some embodiments, the first ends of the switching components are respectively connected to the positive DC transmission line and the negative DC transmission line, and the voltage between the positive DC transmission line and the negative DC transmission line is the DC voltage input to the switching components. Among them, the reference voltage terminal is connected to the positive DC transmission line, and the voltage on the positive DC transmission line is used as the DC reference voltage, which can enable the reference voltage terminal to have the characteristic of presenting a low impedance during AC. Or, the reference voltage terminal is connected to the negative DC transmission line, and the voltage on the negative DC transmission line is used as the DC reference voltage, which can also enable the reference voltage terminal to have the characteristic of presenting a low impedance during AC.

[0028] Or, a first bus capacitor and a second bus capacitor are further provided in the power conversion circuit. Among them, the first end of the first bus capacitor is connected to the positive DC transmission line, the second end of the first bus capacitor is connected to the first end of the second bus capacitor, and the second end of the second bus capacitor is connected to the negative DC transmission line. And, the reference voltage terminal is connected to the second end of the first bus capacitor and the first end of the second bus capacitor, and the voltage at the midpoint of the bus capacitors is used as the DC reference voltage, which can also enable the reference voltage terminal to have the characteristic of presenting a low impedance during AC.

[0029] Or, the reference voltage terminal is connected to the output terminal of an external DC-DC conversion circuit to load a DC reference voltage to the reference voltage terminal through the DC-DC conversion circuit.

[0030] In some embodiments, a matching circuit is further provided in the power conversion circuit, and the matching circuit is connected between the secondary winding of the transformer and the load. With this setting, impedance matching can be further performed through the matching circuit.

[0031] In some embodiments, a filtering circuit is further provided in the power conversion circuit, and the filtering circuit is connected between the secondary winding of the transformer and the load. With this setting, filtering processing can be performed through the filtering circuit. Exemplarily, the filtering circuit includes but is not limited to a high-pass filter, a low-pass filter, a CLC filter, an LCL filter, and a band-pass filter.

[0032] In some embodiments, the switching components can also adjust the phase difference between the first pulse voltage and the second pulse voltage from the current phase difference to the target phase difference, so that the output power of the power converter is adjusted from the current power to the target power. With this setting, the output power can be quickly and arbitrarily accurately switched by adjusting the phase, so as to meet the power requirements of the load (such as the load in the process chamber) during different process preparation processes.

[0033] In some embodiments, the switching component is further capable of adjusting the phase difference between the first pulse voltage and the second pulse voltage from a current phase difference to a target phase difference in response to a change in the load parameter of the load. With this setting, it is possible to switch the output power by adjusting the phase according to the demand of the load, so as to meet the power demand of the load.

[0034] In some embodiments, if the switching component includes a first half-bridge and a second half-bridge, the phase difference between the first pulse voltage and the second pulse voltage can be adjusted by controlling the phase difference when the upper switches in the first half-bridge and the second half-bridge are turned on. For example, adjusting the phase difference between the first pulse voltage and the second pulse voltage from a current phase difference to a target phase difference includes: controlling the upper switch and the lower switch of the first half-bridge to conduct alternately, controlling the upper switch and the lower switch of the second half-bridge to conduct alternately, and controlling the phase difference when the upper switches of the first half-bridge and the second half-bridge are turned on to be adjusted from the current phase difference to the target phase difference, so that the phase difference between the first pulse voltage and the second pulse voltage is adjusted from the current phase difference to the target phase difference.

[0035] In some embodiments, a switch controller is further provided in the power conversion circuit to control the switching component to control the switching component to output the first pulse voltage and the second pulse voltage. Exemplarily, the switch controller may not be provided in the power conversion circuit, but may be provided outside the power conversion circuit.

[0036] In some embodiments, the power converter includes a plurality of power conversion circuits and a power combiner. The output ends of the plurality of power conversion circuits are respectively connected to the input end of the power combiner, and the output end of the power combiner is used to connect to the load. With this setting, the output power of the power converter can be increased through the power combiner. Exemplarily, the power combiner includes, but is not limited to, a bridge combiner, a Wilkinson combiner, etc.

[0037] The secondary winding of the transformer in the power converter in some embodiments of the present application can output an alternating voltage, so that the DC-AC conversion process can be realized. In still other embodiments, the power converter can also realize the DC-DC conversion process. Based on this, the power conversion circuit further includes a rectifying circuit, and the secondary winding of the transformer is connected to the output end of the power conversion circuit through the rectifying circuit, so as to convert the alternating voltage output by the secondary winding of the transformer into a DC voltage through the rectifying circuit and then output it.

[0038] Second aspect, embodiments of the present application further provide an electronic device, which includes a radio frequency power supply. The radio frequency power supply includes: an AC-DC converter, a DC-DC converter, a radio frequency power amplifier, and a directional coupler. The input end of the AC-DC converter is used to receive an AC voltage. The output end of the AC-DC converter is connected to the input end of the DC-DC converter. The output end of the DC-DC converter is connected to the input end of the radio frequency power amplifier. The output end of the radio frequency power amplifier is connected to the input end of the directional coupler. The output end of the directional coupler is connected to a load. Among them, the radio frequency power can be set as the power converter that realizes the DC-AC conversion process in the first aspect or any one of the embodiments in the first aspect. And / or, the DC-DC converter can be set as the power converter that realizes the DC-DC conversion process in the first aspect or any one of the embodiments in the first aspect. In addition, the technical effects of the corresponding solutions in the second aspect can be referred to the technical effects that can be obtained from the corresponding solutions in the first aspect, and the repeated parts will not be described in detail. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 Schematic diagram of the system architecture of the electronic device provided by the embodiment of the present application;

[0040] Figure 2 Block diagram of a structure of the power converter provided by the embodiment of the present application;

[0041] Figure 3 Signal timing diagram of the power converter provided by the embodiment of the present application;

[0042] Figure 4 Circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0043] Figure 5a Schematic diagram of the simulation result when the capacitance value of the first capacitor provided by the embodiment of the present application is 0 pF;

[0044] Figure 5b Schematic diagram of the simulation result when the capacitance value of the first capacitor provided by the embodiment of the present application is 940 pF;

[0045] Figure 5c Schematic diagram of the simulation result when the capacitance value of the first capacitor provided by the embodiment of the present application is 680 pF;

[0046] Figure 6 Schematic diagram of the power converter provided by the embodiment of the present application when outputting different powers;

[0047] Figure 7a Signal timing diagram corresponding to when the output power of the power converter provided by the embodiment of the present application is zero;

[0048] Figure 7bThe signal timing diagram corresponding to the output power P1 of the power converter provided by the embodiment of the present application;

[0049] Figure 7c The signal timing diagram corresponding to the output power P2 of the power converter provided by the embodiment of the present application;

[0050] Figure 7d The signal timing diagram corresponding to the output power P3 of the power converter provided by the embodiment of the present application;

[0051] Figure 8a is Figure 4 The equivalent circuit diagram corresponding to the case where the first pulse voltage and the second pulse voltage are the same at the same moment of the power converter shown;

[0052] Figure 8b is Figure 4 The equivalent circuit diagram corresponding to the case where the first pulse voltage and the second pulse voltage are different at the same moment of the power converter shown;

[0053] Figure 9a and Figure 9b are respectively a signal timing diagram of the power converter provided by the embodiment of the present application during phase adjustment;

[0054] Figure 10a The schematic diagram of the simulation result when the phase difference between the first pulse voltage and the second pulse voltage provided by the embodiment of the present application is 180°;

[0055] Figure 10b The schematic diagram of the simulation result when the phase difference between the first pulse voltage and the second pulse voltage provided by the embodiment of the present application is reduced from 180°;

[0056] Figure 10c The schematic diagram of the simulation result of the voltage output by the power converter provided by the embodiment of the present application;

[0057] Figure 11 The schematic diagram of the simulation result of the maximum loss value of a single switch in the first half-bridge or the second half-bridge when realizing fast power switching by adjusting the phase provided by the embodiment of the present application;

[0058] Figure 12 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0059] Figure 13 is Figure 12 The equivalent circuit diagram corresponding to the case where the first pulse voltage and the second pulse voltage are different at the same moment of the power converter shown;

[0060] Figure 14 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0061] Figure 15 For Figure 14 The equivalent circuit diagram of the power converter shown when the first pulse voltage and the second pulse voltage do not correspond at the same time;

[0062] Figure 16 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0063] Figure 17 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0064] Figure 18 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0065] Figure 19a Another structural block diagram of the power converter provided by the embodiment of the present application;

[0066] Figure 19b For Figure 19a A circuit schematic diagram of the power converter shown;

[0067] Figure 20a For Figure 19b The equivalent circuit diagram of the power converter shown when the first pulse voltage and the second pulse voltage are the same at the same time;

[0068] Figure 20b For Figure 19b The equivalent circuit diagram of the power converter shown when the first pulse voltage and the second pulse voltage do not correspond at the same time;

[0069] Figure 21a Another structural block diagram of the power converter provided by the embodiment of the present application;

[0070] Figure 21b For Figure 21a A circuit schematic diagram of the power converter shown;

[0071] Figure 22a For Figure 21b The equivalent circuit diagram of the power converter shown when the first pulse voltage and the second pulse voltage are the same at the same time;

[0072] Figure 22b For Figure 21b The equivalent circuit diagram of the power converter shown when the first pulse voltage and the second pulse voltage do not correspond at the same time;

[0073] Figure 23 Another circuit schematic diagram of the power converter provided by the embodiment of the present application;

[0074] Figure 24a Another structural block diagram of the power converter provided by the embodiment of the present application;

[0075] Figure 24b is Figure 24a A circuit schematic diagram of the power converter shown;

[0076] Figures 25a to 25d Respectively, a partial circuit structure schematic diagram of the power converter provided by the embodiment of the present application;

[0077] Figure 26 Another partial circuit structure schematic diagram of the power converter provided by the embodiment of the present application.

[0078] Reference numerals:

[0079] 10 - RF power supply; 11 - AC-DC converter; 12 - DC-DC converter; 13 - RF power amplifier; 14 - directional coupler; 15 - main controller; 20 - impedance matcher; 30 - process chamber; 100 - power converter; 110 / 110a / 110b - power conversion circuit; 111 - first impedance circuit; 112 - second impedance circuit; 113 - third impedance circuit; 114 - switch assembly; 115 - transformer; 116 - switch controller; 117 - matching circuit; 118 - filtering circuit; 119 - rectifying circuit; 120 - power combiner; Oa - first output terminal; Ob - second output terminal; Va - first pulse voltage; Vb - second pulse voltage; L1 - first inductor; L2 - second inductor; L3 - third inductor; L4 - fourth inductor; L5 - fifth inductor; C1 - first capacitor; C2 - second capacitor; C3 - third capacitor; C4 - fourth capacitor; ZL - load; Uac / Uout - AC voltage; Ubus - DC voltage; Bus+- positive DC transmission line; Bus-- negative DC transmission line; Vm - reference voltage terminal. Detailed implementation manners

[0080] In order to make the objectives, technical solutions, and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings. The specific operation methods in the method embodiments can also be applied to the device embodiments or system embodiments. It should be noted that in the description of the present application, "a plurality of" can be understood as "at least two". In addition, it should be understood that in the description of the present application, words such as "first" and "second" are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0081] It should be noted that the same reference numerals in the drawings of the present application denote the same or similar structures, and thus repeated descriptions thereof will be omitted. The words expressing positions and directions described in the present application are illustrated by way of example with reference to the drawings, but may be changed as needed, and all such changes are included within the scope of protection of the present application. The drawings of the present application are only used to illustrate the relative positional relationship and do not represent the true scale.

[0082] To facilitate the understanding of the technical solutions provided by the embodiments of the present application, the application scenarios of the solutions of the present application will be described first below. The power converter provided by the embodiments of the present application can be applied to electronic devices with power conversion. For example, the electronic device is a power supply or a device with a power supply, and the fields in which it can be applied include semiconductor processing, medical beauty, material coating, etc. For example, the power supply includes, but is not limited to, a radio frequency power supply. It can be understood that the power converter provided by the embodiments of the present application is intended to include, but is not limited to, being applied in these and any other suitable types of electronic devices. Below, the power converter provided by the embodiments of the present application being applied to an electronic device with a radio frequency power supply will be taken as an example for detailed description. For the working process of the power converter provided by the embodiments of the present application being applied to other devices, reference may be made to the following working process of the power converter applied, and the repeated parts will not be elaborated.

[0083] Figure 1 It is a schematic diagram of the system architecture of the electronic device provided by the embodiments of the present application. Refer to Figure 1, the electronic device includes: a radio frequency power supply 10, an impedance matcher 20, and a process chamber 30. The radio frequency power supply 10 includes: an AC-DC converter 11, a DC-DC converter 12, a radio frequency power amplifier 13, a directional coupler 14, and a main controller 15. Among them, the input end of the AC-DC converter 11 is used to receive an AC voltage Uac. The output end of the AC-DC converter 11 is connected to the input end of the DC-DC converter 12. The output end of the DC-DC converter 12 is connected to the input end of the radio frequency power amplifier 13. The output end of the radio frequency power amplifier 13 is connected to the input end of the directional coupler 14. The output end of the directional coupler 14 is connected to the process chamber 30 through the impedance matcher 20. For example, the process chamber 30 is a plasma process chamber 30, so that the target material can be processed by plasma in the process chamber 30. During specific operation, there is a reaction gas in the process chamber 30. The directional coupler 14 can collect the output power or voltage value of the radio frequency power amplifier 13 as a feedback signal and feed it back to the main controller 15. The impedance matcher 20 is used to match the plasma impedance in the process chamber 30 to the designed impedance value of the radio frequency power supply 10. The main controller 15 can control the AC-DC converter 11, the DC-DC converter 12, and the radio frequency power amplifier 13 to work according to the settings of the operator and / or the feedback signal of the directional coupler 14. Specifically, the main controller 15 controls the AC-DC converter 11 to convert the input AC voltage into a first target DC voltage and output it to the DC-DC converter 12. The main controller 15 controls the DC-DC converter 12 to convert the first target DC voltage into a second target DC voltage and output it to the radio frequency power amplifier 13. The main controller 15 controls the radio frequency power amplifier 13 to convert the second target DC voltage into an AC voltage with a target power, target frequency, and amplitude, and input it into the process chamber 30 through the directional coupler 14 and the impedance matcher 20, so as to excite the reaction gas to generate plasma, and process the target material through the plasma.

[0084] Currently, a switching topology is usually adopted to adjust the output power of the radio frequency power supply. However, as the switching frequency increases, the switching loss also increases accordingly. For this reason, the embodiment of the present application provides a power converter that can reduce the switching loss and improve the conversion efficiency. Based on this, the power converter provided by the embodiment of the present application can be applied to the radio frequency power supply to reduce the switching loss of the radio frequency voltage and improve its conversion efficiency.

[0085] Figure 2 is a structural block diagram of the power converter provided by the embodiment of the present application. Refer to Figure 2, the power converter 100 includes a power conversion circuit 110, and the power conversion circuit 110 includes: a switching component 114, a transformer 115, a first impedance circuit 111, a second impedance circuit 112, a third impedance circuit 113, a third capacitor C3, and a fourth capacitor C4. Among them, the first end of the switching component 114 is used to receive a DC voltage Ubus (such as the second target DC voltage described above). The first output terminal Oa of the switching component 114 is connected to the first end of the primary winding of the transformer 115 through the first impedance circuit 111, and the second output terminal Ob of the switching component 114 is connected to the second end of the primary winding of the transformer 115 through the first impedance circuit 111. The midpoint of the primary winding of the transformer 115 is connected to the first end of the second impedance circuit 112, and the second end of the second impedance circuit 112 is connected to the reference voltage terminal Vm. The secondary winding of the transformer 115 is used to connect to the load ZL. The first output terminal Oa is connected to the first impedance circuit 111 and the third impedance circuit 113 through the third capacitor C3, and the second output terminal Ob is connected to the first impedance circuit 111 and the third impedance circuit 113 through the fourth capacitor C4. The first end of the third impedance circuit 113 is connected to the first output terminal Oa, the second end of the third impedance circuit 113 is connected to the second output terminal Ob, and the third end of the third impedance circuit 113 is connected to the reference voltage terminal Vm. With such a setting, during operation, the switching component 114 can convert the DC voltage into a first pulse voltage Va and output it to the transformer 115 through the first output terminal Oa, and convert the DC voltage into a second pulse voltage Vb and output it to the transformer 115 through the second output terminal Ob, and output an AC voltage Uout through the transformer 115. It can be understood that the power converter 100 provided by the embodiments of the present application can implement the DC-AC conversion process, and thus can be applied to the RF power amplifier 13. Then, the above load may include Figure 1 the directional coupler 14, the impedance matcher 20, and the process chamber 30 in

[0086] Figure 3 is a signal timing diagram of the power converter provided by the embodiments of the present application. Refer to Figure 3 , Va represents the first pulse voltage output from the first output terminal Oa, Vb represents the second pulse voltage output from the second output terminal Ob. The first pulse voltage Va and the second pulse voltage Vb have the same frequency and the same amplitude (the amplitude is equal to the amplitude of the DC voltage). And, the first pulse voltage Va and the second pulse voltage Vb have a phase difference PD, so that the first pulse voltage Va and the second pulse voltage Vb are out of phase. Among them, when the first pulse voltage Va and the second pulse voltage Vb have a phase difference PD, there will be a situation where the first pulse voltage Va and the second pulse voltage Vb are at the same moment (for example Figure 3In the case where they are different at any same moment in the T1 time period and the T3 time period (e.g., any same moment in the T2 time period and the T4 time period), the first impedance circuit 111 and the third impedance circuit 113 respectively achieve normal impedance matching. The second impedance circuit 112 can open the circuit between the midpoint of the primary winding and the reference voltage terminal Vm. The third capacitor C3 and the fourth capacitor C4 also achieve impedance matching and the purpose of blocking direct current and passing alternating current, so as to input power to the power input transformer 115, enable the transformer 115 to output power to the load, and achieve a higher bandwidth. Moreover, when there is a phase difference PD between the first pulse voltage Va and the second pulse voltage Vb, there is also a case where the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment (e.g., Figure 3 any same moment in the T2 time period and the T4 time period). In this case, the transformer 115 will be equivalent to a short circuit. The third capacitor C3 and the fourth capacitor C4 also achieve impedance matching and the purpose of blocking direct current and passing alternating current. And the first impedance circuit 111, the second impedance circuit 112, and the third impedance circuit 113 respectively present inductance, which can enable the inductive current to pass through the first output terminal Oa and the second output terminal Ob, so that the switching component 114 realizes soft switching and reduces the switching loss.

[0087] It can be understood that the disconnection of the circuit between the midpoint of the primary winding and the reference voltage terminal Vm by the second impedance circuit 112 is automatically realized in combination with the performance of the transformer 115, rather than being realized based on a switching device. And the fact that the first pulse voltage Va and the second pulse voltage Vb are different at the same moment means that the amplitudes and / or phases of the first pulse voltage Va and the second pulse voltage Vb are different at this moment. The fact that the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment means that the phases and amplitudes of the first pulse voltage Va and the second pulse voltage Vb are the same at this moment.

[0088] In practical applications, usually multiple different process preparation processes are carried out in the same process chamber 30, and the output powers required by different process preparation processes for the radio frequency power supply 10 are different. Therefore, it is necessary to change the output power of the radio frequency power supply 10 according to different process preparation processes. The power converter 100 in the embodiment of the present application can also achieve fast and arbitrary precise switching of the output power by adjusting the phase. Moreover, during the process of adjusting the phase or during the process of not adjusting the phase, the switching loss is reduced and the conversion efficiency is improved. Based on this, the switching component 114 can also adjust the phase difference between the first pulse voltage Va and the second pulse voltage Vb from the current phase difference to the target phase difference, so that the output power of the power converter 100 is adjusted from the current power to the target power, thereby meeting the power requirements of the load (e.g., the load in the process chamber 30) in different process preparation processes. Exemplarily, referring to Figure 2, a switch controller 116 is further provided in the power conversion circuit. By controlling the switch assembly 114 through the switch controller 116, the switch assembly 114 can be controlled to output the first pulse voltage Va and the second pulse voltage Vb. Of course, the switch controller 116 may not be provided in the power conversion circuit, but outside the power conversion circuit.

[0089] In some examples, an operator can, according to the change of load parameters in the load (such as parameters corresponding to the reaction gas in the process chamber 30, parameters corresponding to the target material, parameters corresponding to the process preparation process), manually input the value of the target power (which can be a numerical range or a specific value), communicate with the main controller 15, and cause the main controller 15 to generate a power adjustment instruction. Alternatively, the main controller 15 can also detect the load parameters in the load (such as parameters corresponding to the reaction gas in the process chamber 30, parameters corresponding to the target material, parameters corresponding to the process preparation process), and generate a power adjustment instruction when detecting a change in the load parameters. Based on this, the power adjustment instruction is output to the switch controller 116, causing the switch controller 116 to control the switch assembly 114 to operate in response to the power adjustment instruction, and further adjusting the phase difference between the first pulse voltage Va and the second pulse voltage Vb from the current phase difference to the target phase difference, so as to achieve power adjustment and target power output.

[0090] In still other examples, the switch controller 116 can also detect the load parameters in the load (such as parameters corresponding to the reaction gas in the process chamber 30, parameters corresponding to the target material, parameters corresponding to the process preparation process), and when detecting a change in the load parameters, control the switch assembly 114 to adjust the phase difference between the first pulse voltage Va and the second pulse voltage Vb from the current phase difference to the target phase difference, so as to achieve power adjustment and target power output.

[0091] The following combines specific embodiments to detail the structure and working process of the power converter provided in the present application. It should be noted that the following embodiments are for better explaining the present application, but do not limit the present application.

[0092] Figure 4 is a circuit schematic diagram of a power converter provided in an embodiment of the present application. Refer to Figure 4, the first ends of the switch assembly 114 are respectively connected to the positive DC transmission line Bus+ and the negative DC transmission line Bus-. The voltage between the positive DC transmission line Bus+ and the negative DC transmission line Bus- is the DC voltage Ubus input to the switch assembly 114. Exemplarily, the switch assembly can be formed by a bridge circuit. For example, the switch assembly 114 includes a first half-bridge and a second half-bridge. The first end of the first half-bridge is respectively connected to the positive DC transmission line Bus+ and the negative DC transmission line Bus- for receiving the DC voltage. The midpoint of the bridge arm of the first half-bridge is connected to the first end of the primary winding of the transformer 115 through the first impedance circuit 111. The first end of the second half-bridge is respectively connected to the positive DC transmission line Bus+ and the negative DC transmission line Bus- for receiving the DC voltage. The midpoint of the bridge arm of the second half-bridge is connected to the second end of the primary winding of the transformer 115 through the first impedance circuit 111. And the first half-bridge is used to output the first pulse voltage Va, and the second half-bridge is used to output the second pulse voltage Vb. In a specific implementation, the first half-bridge includes an upper switch S1 and a lower switch S2. The first end of the upper switch S1 is connected to the positive DC transmission line Bus+. The position where the second end of the upper switch S1 and the first end of the lower switch S2 are connected to each other is used as the midpoint of the bridge arm of the first half-bridge. The second end of the lower switch S2 is connected to the negative DC transmission line Bus-. The second half-bridge includes an upper switch S3 and a lower switch S4. The first end of the upper switch S3 is connected to the positive DC transmission line Bus+. The position where the second end of the upper switch S3 and the first end of the lower switch S4 are connected to each other is used as the midpoint of the bridge arm of the second half-bridge. The second end of the lower switch S4 is connected to the negative DC transmission line Bus-. In a specific implementation, the switch controller 116 outputs signals Φ1, Φ2, Φ3, Φ4. Φ1 controls the conduction and cutoff of the upper switch S1, Φ2 controls the conduction and cutoff of the lower switch S2, Φ3 controls the conduction and cutoff of the upper switch S3, and Φ4 controls the conduction and cutoff of the lower switch S4. Based on this, the switch controller 116 controls the first half-bridge and the second half-bridge to work to output the first pulse voltage Va and the second pulse voltage Vb, and adjust the phase difference between the first pulse voltage Va and the second pulse voltage Vb.

[0093] In this application, the switching frequency of the switch assembly 114 is not limited, and its switching frequency can be adjusted according to the application scenario. Since in actual applications, the switching frequency corresponding to the switch assembly 114 is usually greater than 10 MHz, the switch assembly 114 in the embodiments of this application can be applied at a switching frequency greater than 10 MHz to reduce switching losses. In addition, the DC voltage received by the switch assembly 114 can be adjusted and controlled in combination with the switch controller 116. And this DC voltage is not limited to a stable DC voltage. It can superimpose an AC voltage or fluctuations / ripples on the basis of the DC voltage, and then achieve the output of the target power by adjusting the phase difference in real time. This control can reduce the design requirements of the power supply or increase the power density (reduce the volume of the power supply output filter).

[0094] It is understandable that this application is described by taking the switching component 114 including the first half-bridge and the second half-bridge as an example. In actual applications, the structure of the switching component 114 required by different application scenarios will be different. Therefore, the specific structure of the switching component 114 can also be determined according to the requirements of the actual application scenario, which is not limited herein. In addition, the upper switch S1, the lower switch S2, the upper switch S3, and the lower switch S4 can be respectively one or more of various types of switching devices such as metal oxide semiconductor field effect transistors (MOSFETs), bipolar junction transistors (BJTs), insulated gate bipolar transistors (IGBTs), and silicon carbide (SiC) MOSFETs. The embodiments of this application will not list them one by one. And each switch can include a first electrode, a second electrode, and a control electrode. Among them, the control electrode is used to control the closing or opening of the switch. When the switch is closed, current can be transmitted between the first electrode and the second electrode of the switch. When the switch is open, current cannot be transmitted between the first electrode and the second electrode of the switch. Taking the MOSFET as an example, the control electrode of the switch is the gate, the first electrode of the switch can be the source, the second electrode can be the drain, or the first electrode can be the drain and the second electrode can be the source.

[0095] Continue to refer to Figure 4 , the first impedance circuit 111 includes: a fourth inductor L4, a fifth inductor L5, and a second capacitor C2. Among them, the first end of the fourth inductor L4 is connected to the first output terminal Oa (i.e., the midpoint of the bridge arm of the first half-bridge), and the second end of the fourth inductor L4 is connected to the first end of the primary winding. The first end of the fifth inductor L5 is connected to the second output terminal Ob (i.e., the midpoint of the bridge arm of the second half-bridge), and the second end of the fifth inductor L5 is connected to the second end of the primary winding. The first end of the second capacitor C2 is connected to the first end of the primary winding, and the second end of the second capacitor C2 is connected to the second end of the primary winding. With this setting, the fourth inductor L4, the fifth inductor L5, and the second capacitor C2 can form an LC matching network. And when the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment, the transformer 115 will be equivalent to a short circuit, and the fourth inductor L4 and the fifth inductor L5 can provide inductive inductance to help extract the charge of the switch in the switching component 114 to achieve soft switching and reduce switching losses. And when the first pulse voltage Va and the second pulse voltage Vb are different at the same moment, the fourth inductor L4, the fifth inductor L5, and the second capacitor C2 can achieve normal impedance matching.

[0096] According to the circuit structure design of the power converter, the inductance values of the fourth inductor L4 and the fifth inductor L5 are set to be the same. For example, the inductance values of both the fourth inductor L4 and the fifth inductor L5 are set to 220 nH. Of course, the inductance values of the above-mentioned fourth inductor L4 and fifth inductor L5 are only for illustration. Since different application scenarios have different requirements for the inductance values of the fourth inductor L4 and the fifth inductor L5, the inductance values of the fourth inductor L4 and the fifth inductor L5 can also be determined according to the requirements of the actual application scenario.

[0097] According to the circuit structure design of the power converter, the second capacitor C2 can absorb the parasitic capacitance of the primary winding of the transformer 115, so as to match the parasitic capacitance of the primary winding of the transformer 115 through the second capacitor C2. Exemplarily, the capacitance value of the second capacitor C2 can be set to 500 pF. Of course, the capacitance value of the above-mentioned second capacitor C2 is only for illustration. Since different application scenarios have different requirements for the capacitance value of the second capacitor C2, the capacitance value of the second capacitor C2 can also be determined according to the parasitic capacitance of the primary winding of the transformer 115 in the actual application scenario.

[0098] Continue to refer to Figure 4 , the second impedance circuit 112 includes a third inductor L3 connected between the midpoint of the primary winding and the reference voltage terminal Vm. With this setting, when the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment, it presents inductance through the third inductor L3 to adjust the branch current of the inductive current generated by the first impedance circuit 111. And when the first pulse voltage Va and the second pulse voltage Vb are different at the same moment, combining the performance of the third inductor L3 and the transformer 115, the midpoint of the primary winding can be automatically disconnected from the reference voltage terminal Vm.

[0099] Generally, there will be parasitic inductance on the connection line. And in order to reduce the number of components and costs, the midpoint of the primary winding can be directly connected to the reference voltage terminal Vm through the connection line, and the parasitic inductance in the path between the midpoint of the primary winding and the reference voltage terminal Vm is set as the third inductor L3, that is, it is equivalent to setting the parasitic inductance of the connection line as the third inductor L3. Exemplarily, the inductance value of the parasitic inductance can be set to 50 nH to 100 nH. For example, the inductance values of the parasitic inductance are set to 50 nH, 55 nH, 60 nH, 65 nH, 70 nH, 75 nH, 80 nH, 85 nH, 90 nH, 95 nH, 100 nH, etc. Of course, the inductance values of the above-mentioned parasitic inductance are only for illustration. Since different application scenarios have different requirements for the inductance value of the parasitic inductance, the inductance value of the parasitic inductance can also be determined according to the requirements of the actual application scenario.

[0100] Of course, an external inductor can also be connected in series between the midpoint of the primary side winding and the reference voltage terminal Vm, so that the midpoint of the primary side winding is connected to the reference voltage terminal Vm through the external inductor, thereby setting the parasitic inductance in the path between the external inductor and the midpoint of the primary side winding to the reference voltage terminal Vm as the third inductor L3. With this setting, the accuracy of adjusting the inductance of the third inductor L3 can be improved by adjusting the inductance of the external inductor. Moreover, in order to ensure the inductive current generated by the first impedance circuit 111, the inductance value of the external inductor can be set as small as possible. In addition, different application scenarios have different requirements for the inductance value of the external inductor, so the inductance value of the external inductor can be determined according to the requirements of the actual application scenario.

[0101] Further, referring to Figure 4 , the second impedance circuit 112 further includes a first capacitor C1 connected between the midpoint of the primary side winding of the transformer 115 and the third inductor L3. By generating a capacitive reactance through the first capacitor C1, the inductive reactance equivalent to the third inductor L3, the fourth inductor L4, and the fifth inductor L5 is reduced, so as to achieve the purpose of increasing the inductive current. Exemplarily, if the third inductor L3 is the parasitic inductance of the connection line between the midpoint of the primary side winding and the reference voltage terminal Vm, the first capacitor C1 is equivalent to being connected between the midpoint of the primary side winding and the reference voltage terminal Vm. If the third inductor L3 includes the external inductor and the parasitic inductance in the path between the midpoint of the primary side winding and the reference voltage terminal Vm, the first capacitor C1 can be connected between the midpoint of the primary side winding and the external inductor or between the midpoint of the external inductor and the reference voltage terminal Vm. Of course, in some application scenarios, if the inductive current is already sufficient, the first capacitor C1 can also be removed, that is, the first capacitor C1 is replaced by a short circuit.

[0102] This application takes Figure 4 the structure of the power converter 100 shown and the voltage difference between the first pulse voltage Va and the second pulse voltage Vb being zero as an example to simulate the capacitance value of the first capacitor C1, and the simulation results are as shown in Figures 5a to 5c . Among them, Figure 5a is a schematic diagram of the simulation result when the capacitance value of the first capacitor provided in the embodiment of this application is 0 pF, Figure 5b is a schematic diagram of the simulation result when the capacitance value of the first capacitor provided in the embodiment of this application is 940 pF, Figure 5c is a schematic diagram of the simulation result when the capacitance value of the first capacitor provided in the embodiment of this application is 680 pF. Referring to Figures 5a to 5c, SL1 represents the first pulse voltage Va obtained by simulation, SL2 represents the second pulse voltage Vb obtained by simulation, and SL3 represents the current at the midpoint of the arm of the first half-bridge or the second half-bridge. Based on this, it can be known that additional current flows into the midpoint of the arm of the first half-bridge or the second half-bridge, and by adjusting the capacitance value of the first capacitor C1, the operating states of the switches in the first half-bridge and the second half-bridge and the output current of the first half-bridge or the second half-bridge can be adjusted. Also, when the capacitance value of the first capacitor C1 is 680 pF, the switches in the first half-bridge and the second half-bridge both operate in zero-voltage turn-on, realizing soft switching and reducing switching losses. It can be understood that the capacitance value of the first capacitor C1 required for the switches in the first half-bridge and the second half-bridge to achieve soft switching may be different in different application scenarios, so the capacitance value of the first capacitor C1 can be determined according to the requirements of the actual application scenario. It can be understood that a capacitance value of 0 pF for the first capacitor C1 represents replacing the first capacitor C1 with a short circuit.

[0103] Continue to refer to Figure 4 , the third impedance circuit 113 includes: a first inductor L1 and a second inductor L2. The first end of the first inductor L1 is connected to the first output terminal Oa (i.e., the midpoint of the arm of the first half-bridge), the second end of the first inductor L1 is connected to the reference voltage terminal Vm, the first end of the second inductor L2 is connected to the second output terminal Ob (i.e., the midpoint of the arm of the second half-bridge), and the second end of the second inductor L2 is connected to the reference voltage terminal Vm. With this setting, when the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment, the first inductor L1 and the second inductor L2 can also provide inductive inductance to help extract the charge in the switch component 114 to achieve soft switching and reduce switching losses. Also, when the first pulse voltage Va and the second pulse voltage Vb are different at the same moment, the first inductor L1 and the second inductor L2 can achieve normal impedance matching, thereby achieving a higher bandwidth. It can be understood that the first inductor L1 and the second inductor L2 can be external inductors.

[0104] Generally, there are differences in the losses between the leading arm and the lagging arm in a half-bridge. To further reduce the loss difference between the leading arm and the lagging arm during phase shift, the inductance values of the first inductor L1 and the second inductor L2 can be designed to be not exactly the same proportionally. For example, if the first half-bridge is the leading arm and the second half-bridge is the lagging arm, then the inductance value of the first inductor L1 is greater than that of the second inductor L2. With this setting, the inductive current of the lagging arm can be increased during phase shift, reducing the loss difference between the leading arm and the lagging arm of the half-bridge during phase shift. Moreover, the inductance values of the first inductor L1 and the second inductor L2 also need to add the values required for impedance matching. For example, the inductance value of the first inductor L1 is 200 nH to 400 nH, and the inductance value of the second inductor L2 is 200 nH to 400 nH. Of course, the requirements for the inductance values of the first inductor L1 and the second inductor L2 are different in different application scenarios, so the inductance values of the first inductor L1 and the second inductor L2 can be determined according to the requirements of the actual application scenario.

[0105] In specific implementation, the reference voltage terminal Vm has the characteristic of presenting a low impedance during alternating current, so that during alternating current, the reference voltage terminal Vm is equivalent to an alternating current ground terminal. Exemplarily, the reference voltage terminal Vm can have a DC reference voltage. To load a DC reference voltage to the reference voltage terminal Vm, the reference voltage terminal Vm can be connected to the output terminal of an external DC-DC conversion circuit, so as to load a DC reference voltage to the reference voltage terminal Vm through the DC-DC conversion circuit. It can be understood that since the requirements for the specific value of the impedance presented by the reference voltage terminal Vm are different in different application scenarios, the specific value of the impedance presented by the reference voltage terminal Vm can be determined according to the requirements of the actual application scenario.

[0106] In this application, impedance matching is achieved through the third capacitor C3 and the fourth capacitor C4, and the purpose of blocking direct current and passing alternating current is realized. In specific implementation, the capacitance values of the third capacitor C3 and the fourth capacitor C4 can be the same. For example, the capacitance values of the third capacitor C3 and the fourth capacitor C4 are respectively set to 100 pF. It can be understood that since the requirements for the capacitance values of the third capacitor C3 and the fourth capacitor C4 are different in different application scenarios, the specific values of the capacitance values of the third capacitor C3 and the fourth capacitor C4 can be determined according to the requirements of the actual application scenario.

[0107] The power converter 100 provided by the embodiment of this application can achieve fast (microsecond level) and arbitrary precise switching of the output power. For example, Figure 6 is a schematic diagram of the power converter provided by the embodiment of this application when outputting different powers. Refer to Figure 6, when there are changes in the load parameters of the load or plasma processing is required in the process chamber 30, the output power of the power converter 100 is switched from zero to P1. After that, when there are changes in the load parameters of the load, the required power changes, and the output power of the power converter 100 is switched from P1 to P2. After that, when there are again changes in the load parameters of the load, the required power changes again, and the output power of the power converter 100 is switched from P2 to P3. It can be understood that this application takes P1 < P3 < P2 and P2 as the maximum output power as an example. In actual applications, P2 can also be less than the maximum output power, and the magnitude relationship among P1, P2, and P3 can be determined according to the requirements of actual applications.

[0108] The following takes Figure 4 the structure shown as an example, and in combination with Figures 7a to 8b , the working process of the power converter provided by the embodiments of this application will be described in detail. Among them, Figure 7a is the signal timing diagram corresponding to when the output power of the power converter provided by the embodiments of this application is zero, Figure 7b is the signal timing diagram corresponding to when the output power of the power converter provided by the embodiments of this application is P1, Figure 7c is the signal timing diagram corresponding to when the output power of the power converter provided by the embodiments of this application is P2, Figure 7d is the signal timing diagram corresponding to when the output power of the power converter provided by the embodiments of this application is P3, Figure 8a is Figure 4 the equivalent circuit diagram corresponding to when the first pulse voltage and the second pulse voltage are the same at the same moment in the power converter shown, Figure 8b is Figure 4 the equivalent circuit diagram corresponding to when the first pulse voltage and the second pulse voltage are different at the same moment in the power converter shown.

[0109] Referring to Figure 7a , the upper switch S1 and the lower switch S2 are alternately turned on by the signals Φ1 and Φ2 respectively, and the upper switch S3 and the lower switch S4 are alternately turned on by the signals Φ3 and Φ4 respectively. And, by controlling the phase difference between the signals Φ1 and Φ3 to be 0, that is, the signals Φ1 and Φ3 are in phase, and the signals Φ2 and Φ4 are also in phase, the phase difference between the first pulse voltage Va and the second pulse voltage Vb is 0, so that the first pulse voltage Va and the second pulse voltage Vb can be the same at any same moment. Then, the equivalent circuit diagram when the power converter 100 works in combination with Figure 7a the signal timing diagram shown is Figure 8a, wherein, the primary winding of the transformer 115 is equivalently short-circuited, the loads corresponding to the first half-bridge and the second half-bridge present inductance, and inductive currents flowing through the midpoints of the arms of the first half-bridge and the midpoints of the arms of the second half-bridge are generated through the first inductor L1 to the fifth inductor L5, so that it is possible to pump in part or completely extract the Coss charge before the switches of the first half-bridge and the second half-bridge are turned on, reducing the switching loss. Moreover, since the primary winding of the transformer 115 is equivalently short-circuited, the power converter 100 has no power output, making its output power zero. Also, since the additional inductive current is not affected by the load, the problem of huge losses during impedance mismatch can be solved.

[0110] Refer to Figure 7b , the upper switch S1 and the lower switch S2 are alternately turned on by the signals Φ1 and Φ2 respectively, and the upper switch S3 and the lower switch S4 are alternately turned on by the signals Φ3 and Φ4 respectively. Moreover, by controlling the phase difference between the control signals Φ1 and Φ3 to be PD1, and PD1 is in the interval (0°, 180°), that is, the signals Φ1 and Φ3 are out of phase, and the signals Φ2 and Φ4 are also out of phase, then the phase difference between the first pulse voltage Va and the second pulse voltage Vb is also PD1. Based on this, the first pulse voltage Va and the second pulse voltage Vb can be different at any same moment in the time periods T1 and T3, and the first pulse voltage Va and the second pulse voltage Vb can be the same at any same moment in the time periods T2 and T4. Among them, the equivalent circuit diagram corresponding to the power converter 100 when working in the time periods T2 and T4 is Figure 8a , since the primary winding of the transformer 115 is equivalently short-circuited, the power converter 100 has no power output in the time periods T2 and T4. Moreover, in the time periods T2 and T4, the loads corresponding to the first half-bridge and the second half-bridge present inductance, so that inductive currents flowing through the midpoints of the arms of the first half-bridge and the midpoints of the arms of the second half-bridge are generated through the first inductor L1 to the fifth inductor L5, and further it is possible to pump in part or completely extract the Coss charge before the switches of the first half-bridge and the second half-bridge are turned on, reducing the switching loss. Also, since the additional inductive current is not affected by the load, the problem of huge losses during impedance mismatch can be solved. In addition, the equivalent circuit diagram corresponding to the power converter 100 when working in the time periods T1 and T3 is Figure 8b , the first inductor L1, the second inductor L2, the fourth inductor L4, the fifth inductor L5, and the second capacitor C2 present normal impedance matching. Based on the performance of the transformer 115, the third inductor L3 opens the circuit between the midpoint of the primary winding and the reference voltage terminal Vm, so that power is output through the transformer 115 in the time periods T1 and T3, and further the output power of the power converter 100 is P1.

[0111] Refer to Figure 7c, the upper switch S1 and the lower switch S2 are alternately turned on by signals Φ1 and Φ2 respectively, and the upper switch S3 and the lower switch S4 are alternately turned on by signals Φ3 and Φ4 respectively. Moreover, by controlling the phase difference between signals Φ1 and Φ3 to be PD2 and PD2 = 180°, that is, signals Φ1 and Φ3 are out of phase, signals Φ2 and Φ4 are also out of phase, and the phase difference between the first pulse voltage Va and the second pulse voltage Vb is also PD2. Based on this, the first pulse voltage Va and the second pulse voltage Vb can be different at any same moment, and the power converter 100 combines Figure 7c The equivalent circuit diagram when working according to the signal timing diagram shown in Figure 8b is such that the first inductor L1, the second inductor L2, the fourth inductor L4, the fifth inductor L5, and the second capacitor C2 exhibit normal impedance matching. Based on the performance of the transformer 115, the third inductor L3 opens the circuit between the midpoint of the primary winding and the reference voltage terminal Vm, so that power is output through the transformer 115 at any same moment, and thus the output power of the power converter 100 is P2.

[0112] Referring to Figure 7d , the upper switch S1 and the lower switch S2 are alternately turned on by signals Φ1 and Φ2 respectively, and the upper switch S3 and the lower switch S4 are alternately turned on by signals Φ3 and Φ4 respectively. Moreover, by controlling the phase difference between signals Φ1 and Φ3 to be PD3, and PD3 is in the interval (0°, 180°), that is, signals Φ1 and Φ3 are phase-shifted, signals Φ2 and Φ4 are also phase-shifted, then the phase difference between the first pulse voltage Va and the second pulse voltage Vb is also PD3. Among them, PD1 < PD3 < PD2. Referring to the working process of the power converter 100 combined with Figure 7b the signal timing diagram shown in Figure 7d When the power converter 100 works according to the signal timing diagram shown, power can also be output through the transformer 115 during time periods T1 and T3, and thus the output power of the power converter 100 is P3.

[0113] The embodiment of the present application can achieve fast and arbitrary precise switching of the output power of the power converter 100 by adjusting the phase. For example, the rising and falling slopes, power (or voltage / current) levels can be adjusted. For example, taking the adjustment of power P2 to power P3 as an example, referring to 7c and Figure 7d , when the output power of the power converter 100 is P2, the phase difference between signals Φ1 and Φ3 is PD2. When the output power of the power converter 100 is P3, the phase difference between signals Φ1 and Φ3 is PD3. Therefore, in order to adjust power P2 to power P3, the phase difference between signals Φ1 and Φ3 can be adjusted from PD2 to PD3, so that the phase difference between the first pulse voltage Va and the second pulse voltage Vb can also be adjusted from PD2 to PD3, thereby realizing the power switching process. Specifically, referring toFigure 7c , Figure 7d , Figure 9a With Figure 9b , when the switch controller 116 reduces the phase difference between the signals Φ1 and Φ3 by PD2, for example, when reducing it to the phase difference PD21, the output power P21 of the power converter 100 at this time is obtained, and it is determined whether P21 is within the target power threshold range [Pm - ΔP, Pm + ΔP]. Among them, Pm is the target power (since the power P2 needs to be adjusted to the power P3, then Pm = P3 at this time), and ΔP represents the allowable range of power fluctuation error. If P21 is not within [Pm - ΔP, Pm + ΔP], it means that P21 ≠ P3, and then the phase difference between the signals Φ1 and Φ3 needs to be further reduced from PD21. If the phase difference between the signals Φ1 and Φ3 is further reduced to PD22, then the output power P22 of the power converter 100 at this time is obtained again, and it is determined again whether P22 is within the target power threshold range [Pm - ΔP, Pm + ΔP]. If P22 is not within [Pm - ΔP, Pm + ΔP], it means that P22 ≠ P3, and then the phase difference between the signals Φ1 and Φ3 needs to be further reduced from PD22. After that, the above process is repeated until the output power of the power converter 100 is within the target power threshold range [Pm - ΔP, Pm + ΔP], which means that the phase difference between the signals Φ1 and Φ3 is adjusted to PD3 at this time, and the output power of the power converter 100 is adjusted to P3. It can be understood that the above is an example of reducing the phase difference between the signals Φ1 and Φ3. In actual applications, the phase difference between the signals Φ1 and Φ3 can also be increased to adjust the current phase difference to the target phase difference.

[0114] In specific implementation, the switch controller 116 can reduce or increase the phase difference between the signals Φ1 and Φ3 according to the set phase difference adjustment step. And the output power of the power converter 100 can be obtained through the directional coupler 14. For example, the directional coupler 14 feeds back the collected output power to the main controller 15, and then the main controller 15 transmits the output power to the switch controller 116. The switch controller 116 determines the relationship between the output power and the target power threshold range [Pm - ΔP, Pm + ΔP] to output the signals Φ1 to Φ4. Or the main controller 15 directly determines the relationship between the output power and the target power threshold range [Pm - ΔP, Pm + ΔP], and then according to the judgment result, sends a power adjustment instruction to the switch controller 116, so that the switch controller 116 outputs the signals Φ1 to Φ4 according to the power adjustment instruction.

[0115] During the process of adjusting the phase of the power converter 100 provided in the embodiment of the present application, the switching loss can also be reduced. For example, referring to Figure 9a With Figure 9b, in time periods T21 and T41, if the first pulse voltage Va and the second pulse voltage Vb are the same at any same moment, the equivalent circuit diagram of the power converter 100 when operating in time periods T21 and T41 is Figure 8a , the primary winding of the transformer 115 is equivalently short-circuited, the loads corresponding to the first half-bridge and the second half-bridge present inductance, and inductive currents flowing through the midpoints of the bridge arms of the first half-bridge and the midpoints of the bridge arms of the second half-bridge are generated through the first inductor L1 to the fifth inductor L5, so that part or all of the Coss charges can be pumped in or completely pumped away before the switches of the first half-bridge and the second half-bridge are turned on, reducing the switching loss. And, since the primary winding of the transformer 115 is equivalently short-circuited, the power converter 100 has no power output in time periods T21 and T41. Also, in time periods T11 and T31, if the first pulse voltage Va and the second pulse voltage Vb are different at any same moment, the equivalent circuit diagram of the power converter 100 when operating in time periods T11 and T31 is Figure 8b , the first inductor L1, the second inductor L2, the fourth inductor L4, the fifth inductor L5, and the second capacitor C2 present normal impedance matching, and in combination with the performance of the transformer 115, the third inductor L3 opens the circuit between the midpoint of the primary winding and the reference voltage terminal Vm.

[0116] It can be understood that by realizing the fast and arbitrarily precise switching of the output power of the power converter, the power supply ripple can also be suppressed, and better power flatness can be achieved.

[0117] This application takes Figure 4 the structure of the power converter shown as an example, and simulates the process of realizing power switching by adjusting the phase. The simulation results are as Figures 10a to 10c shown. Among them, Figure 10a is a schematic diagram of the simulation result when the phase difference between the first pulse voltage and the second pulse voltage provided by the embodiment of this application is 180°, Figure 10b is a schematic diagram of the simulation result when the phase difference between the first pulse voltage and the second pulse voltage provided by the embodiment of this application is reduced from 180°, Figure 10c is a schematic diagram of the simulation result of the voltage output by the power converter provided by the embodiment of this application. Referring to 10a to Figure 10c , SL1 represents the first pulse voltage obtained by simulation, SL2 represents the second pulse voltage obtained by simulation, and SL4 represents the voltage output by the power converter. Based on this, it can be known that the power converter provided by the embodiment of this application can realize power switching by adjusting the phase.

[0118] This application takes Figure 4Taking the structure of the power converter shown as an example, when using different circuit structures based on the same impedance matching value and the same power derating under the Voltage Standing Wave Ratio (VSWR), the maximum loss value of a single switch in the first half-bridge or the second half-bridge was simulated when achieving fast power switching by adjusting the phase. The simulation results are as follows Figure 11 shown. Among them, LZ1 represents Figure 4 when the first impedance circuit 111, the second impedance circuit 112, and the third impedance circuit 113 are not set in Figure 4 the maximum loss value of a single switch. LZ2 represents Figure 4 when the third impedance circuit 113 is not set in Figure 4 the maximum loss value of a single switch. LZ3 represents Figure 11 when the inductance values of the first inductor L1 and the second inductor L2 are not changed in

[0119] Figure 12 the maximum loss value of a single switch. LZ4 represents Figure 12 when the inductance values of the first inductor L1 and the second inductor L2 are changed according to the leading arm and the lagging arm in Figure 4 the maximum loss value of a single switch. Referring to Figure 4 shown, it can be seen that the power converter 100 provided by the embodiment of the present application can effectively reduce the loss of the switch, achieve better efficiency, and can also greatly reduce the requirements for the switch when switching the power by adjusting the phase. Figure 12 Figure 8a is the equivalent circuit diagram corresponding to the case where the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment for the power converter shown in Figure 8a Figure 12 while Figure 13 is the equivalent circuit diagram corresponding to the case where the first pulse voltage Va and the second pulse voltage Vb are different at the same moment for the power converter shown in Figure 13 and Figure 8b compared with

[0120] Figure 14 , there is an additional matching circuit 117, and the remaining structures are the same. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, which will not be elaborated here specifically.Another circuit schematic diagram of the power converter provided by the embodiment of the present application. Refer to Figure 14 , the power converter in the embodiment of the present application is deformed based on the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiments will be described below, and the same parts will not be elaborated here. The difference between this embodiment and the Figure 4 illustrated embodiment is that: a filter circuit 118 is further provided between the secondary winding of the transformer 115 and the load in the power conversion circuit, and filtering is performed through the filter circuit 118. And, Figure 14 the equivalent circuit diagram corresponding to the power converter shown when the first pulse voltage Va and the second pulse voltage Vb are the same at the same time is Figure 8a . And Figure 14 the equivalent circuit diagram corresponding to the power converter shown when the first pulse voltage Va and the second pulse voltage Vb are different at the same time is Figure 15 , and Figure 15 compared with Figure 8b , there is an additional filter circuit 118, and the rest of the structures are the same. Exemplarily, the filter circuit 118 includes but is not limited to a high-pass filter, a low-pass filter, a CLC filter, an LCL filter, and a band-pass filter. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, which will not be elaborated here specifically.

[0121] Figure 16 Another circuit schematic diagram of the power converter provided by the embodiment of the present application. Refer to Figure 16 , the power converter in the embodiment of the present application is deformed based on the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiments will be described below, and the same parts will not be elaborated here. The difference between this embodiment and the Figure 4 illustrated embodiment is that: the reference voltage terminal Vm is connected to the negative DC transmission line Bus-, that is, the second end of the third inductor L3 is connected to the negative DC transmission line Bus-, and the reference voltage terminal Vm can also have the characteristic of presenting a low impedance during AC. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, which will not be elaborated here specifically.

[0122] Figure 17 Another circuit schematic diagram of the power converter provided by the embodiment of the present application. Refer to Figure 17 , the power converter in the embodiment of the present application is deformed based on the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiments will be described below, and the same parts will not be elaborated here. The difference between this embodiment and the Figure 4The difference of the illustrated embodiment is as follows: The reference voltage terminal Vm is connected to the positive DC transmission line Bus+, that is, the second terminal of the third inductor L3 is connected to the positive DC transmission line Bus+, and the reference voltage terminal Vm can also have the characteristic of presenting a low impedance during AC. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated herein specifically.

[0123] Figure 18 Another circuit schematic diagram of the power converter provided by the embodiment of the present application is shown in reference to Figure 18 , and the power converter in the embodiment of the present application is a variation of the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiment will be described below, and the same parts will not be elaborated herein. The difference between this embodiment and the Figure 4 illustrated embodiment is as follows: The power conversion circuit 110 is further provided with a first bus capacitor C01 and a second bus capacitor C02. The first terminal of the first bus capacitor C01 is connected to the positive DC transmission line Bus+, the second terminal of the first bus capacitor C01 is connected to the first terminal of the second bus capacitor C02, and the second terminal of the second bus capacitor C02 is connected to the negative DC transmission line Bus-. And, the reference voltage terminal Vm is connected to the second terminal of the first bus capacitor C01 and the first terminal of the second bus capacitor C02, that is, the second terminal of the third inductor L3 is connected to the second terminal of the first bus capacitor C01 and the first terminal of the second bus capacitor C02, and the reference voltage terminal Vm can also have the characteristic of presenting a low impedance during AC. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated herein specifically.

[0124] Figure 19a Another structural block diagram of the power converter provided by the embodiment of the present application is Figure 19b for Figure 19a a circuit schematic diagram of the illustrated power converter. Referring to Figure 19a and Figure 19b , the power converter in the embodiment of the present application is a variation of the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiment will be described below, and the same parts will not be elaborated herein. The difference between this embodiment and the Figure 4The difference of the illustrated embodiment is that: instead of providing the third capacitor C3 and the fourth capacitor C4, the first output terminal Oa (i.e., the midpoint of the arm of the first half-bridge) is directly connected to the first end of the fourth inductor L4, and the second output terminal Ob (i.e., the midpoint of the arm of the second half-bridge) is directly connected to the first end of the fifth inductor L5. Specifically, in some application scenarios, if the dead time ratio of the switches in the first half-bridge and the second half-bridge is large and the duty cycle asymmetry degree is small, the third capacitor C3 and the fourth capacitor C4 can be not provided, reducing the number of components used and the cost. And, Figure 19b The equivalent circuit diagram corresponding to the case where the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment of the illustrated power converter is Figure 20a , and Figure 20a compared with Figure 8a , does not include the third capacitor C3 and the fourth capacitor C4, and the remaining structures are the same. And Figure 19b The equivalent circuit diagram corresponding to the case where the first pulse voltage Va and the second pulse voltage Vb are different at the same moment of the illustrated power converter is Figure 20b , and Figure 20b compared with Figure 8b , does not include the third capacitor C3 and the fourth capacitor C4, and the remaining structures are the same. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated herein specifically.

[0125] Figure 21a This is another structural block diagram of the power converter provided by the embodiment of the present application, Figure 21b is Figure 21a a circuit schematic diagram of the illustrated power converter. Referring to Figure 21a and Figure 21b , the power converter in the embodiment of the present application is a deformation of the implementation manner in the Figure 4 illustrated embodiment. Only the differences between this embodiment and the above embodiment will be described below, and the same parts will not be elaborated herein. The difference between this embodiment and the Figure 4 illustrated embodiment is that: the third impedance circuit 113, the third capacitor C3 and the fourth capacitor C4 are not provided. Specifically, in some application scenarios, if the heat dissipation capacity of the switches in the first half-bridge and the second half-bridge is sufficient or the Coss and Qoss of the switches are very small, the third impedance circuit 113, the third capacitor C3 and the fourth capacitor C4 can be not provided, reducing the number of components used and the cost. And, Figure 21b The equivalent circuit diagram corresponding to the case where the first pulse voltage Va and the second pulse voltage Vb are the same at the same moment of the illustrated power converter is Figure 22a , and Figure 22a compared with Figure 8a , does not include the third impedance circuit 113, the third capacitor C3 and the fourth capacitor C4, and the remaining structures are the same. AndFigure 21b The equivalent circuit diagram of the power converter shown when the first pulse voltage Va and the second pulse voltage Vb do not correspond at the same time is Figure 22b , and Figure 22b compared with Figure 8b , it does not include the third impedance circuit 113, the third capacitor C3 and the fourth capacitor C4, and the remaining structures are the same. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated here specifically.

[0126] Figure 23 Another circuit schematic diagram of the power converter provided by the embodiment of the present application, referring to Figure 23 , the power converter in the embodiment of the present application is deformed with respect to the implementation manner in the above embodiment. Only the differences between this embodiment and the above embodiment will be described below, and the same parts will not be elaborated here. The difference between this embodiment and the above embodiment is that: the power converter 100 includes: power conversion circuits 110a, 110b and a power combiner 120. The output ends of the power conversion circuits 110a, 110b are respectively connected to the input end of the power combiner 120, and the output end of the power combiner 120 is used to connect to a load. The power combiner 120 can add the output powers of the output ends of the power conversion circuits 110a, 110b and then output them to the load. With this setting, the output power of the power converter 100 can be increased through the power combiner 120. In specific implementation, the number of power conversion circuits can also be three, four or more, which is not limited here. Exemplarily, the power combiner 120 includes but is not limited to a bridge combiner, a Wilkinson combiner, etc. Of course, the power combiner 120 can also be set as a combiner with other structures and functions, which is not limited here. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated here specifically.

[0127] The power converter in some other embodiments of the present application can also implement the DC-DC conversion process. Based on this, the power converter in this embodiment can be applied to the DC-DC conversion circuit in a radio frequency power supply. Of course, the power converter in this embodiment can also be applied to other application scenarios, which is not limited here. The power converter capable of implementing the DC-DC conversion process will be described in detail below with reference to the accompanying drawings.

[0128] Figure 24a Another structural block diagram of the power converter provided by the embodiment of the present application Figure 24b is Figure 24a a circuit schematic diagram of the power converter shown, referring to Figure 24a compared with Figure 24b, in the embodiment of the present application, the power converter is deformed based on the implementation manner in the above embodiment. Only the differences between this embodiment and the above embodiment will be described below, and the same parts will not be elaborated here. The difference between this embodiment and the above embodiment is that: a rectification circuit 119 is further provided in the power converter 100, and the secondary winding of the transformer 115 is connected to the output end of the power conversion circuit 110 through the rectification circuit 119. The rectification circuit 119 converts the AC voltage output by the secondary winding of the transformer 115 into a DC voltage and then outputs it. In addition, the working process of the power converter in this embodiment can refer to the working process of the power converter in the above embodiment, and will not be elaborated here specifically.

[0129] In specific implementation, the rectification circuit 119 includes but is not limited to a bridge rectifier, a diode bridge rectifier, a voltage multiplier rectifier, etc., and this embodiment is not limited. The following will be described in conjunction with Figures 25a to 25d for illustration. Figures 25a to 25d are respectively a partial circuit structure diagram of a power converter provided by an embodiment of the present application. Referring to Figure 25a , the rectification circuit 119 may include a diode bridge rectifier with the structure of diodes D11, D12, D13, D14 and capacitor CZ1. Referring to Figure 25b , the rectification circuit 119 may also include a diode bridge rectifier with the structure of diodes D11, D12, D13, D14 and capacitors CZ1, CZ2, CZ3. Referring to Figure 25c , the rectification circuit 119 may also include a diode bridge rectifier with the structure of diodes D21, D22 and capacitor CZ4. Referring to Figure 25d , the rectification circuit 119 may also include a bridge rectifier with the structure of switching tubes Q1, Q2, Q3, Q4 and capacitor CZ5.

[0130] In addition, referring to Figure 26 , Figure 26 is another partial circuit structure diagram of a power converter provided by an embodiment of the present application. A matching circuit 117 may be added between the rectification circuit 119 and the secondary winding of the transformer or between the rectification circuit 119 and the output end of the power conversion circuit 110 according to the application scenario. For example, in some high-frequency wireless charging application scenarios, a capacitor is connected in series at the output of the transformer 115 to compensate for the leakage inductance of the transformer 115 and increase the output capacity, or a matching circuit 117 is added to compensate for the parasitic capacitance in the rectification circuit 119, etc.

[0131] It can be understood that the structures in the embodiments shown in the above respective drawings can be combined with each other without conflict, and will not be elaborated here specifically.

[0132] The above content is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application.

Claims

1. A power converter, characterized in that, Including: A power conversion circuit, which includes a switching component, a transformer, a first impedance circuit, and a second impedance circuit; The first end of the switching component is used to receive a DC voltage. The first output end of the switching component is connected to the first end of the primary winding of the transformer through the first impedance circuit. The second output end of the switching component is connected to the second end of the primary winding of the transformer through the first impedance circuit. The midpoint of the primary winding of the transformer is connected to the first end of the second impedance circuit. The second end of the second impedance circuit is connected to a reference voltage terminal. The secondary winding of the transformer is used to connect to a load; The switching component is configured to: convert the DC voltage into a first pulse voltage and output it to the transformer through the first output end, and convert the DC voltage into a second pulse voltage and output it to the transformer through the second output end; wherein, the first pulse voltage and the second pulse voltage have a phase difference, and when the first pulse voltage and the second pulse voltage are the same at the same moment, the first impedance circuit and the second impedance circuit are respectively configured to present inductance; when the first pulse voltage and the second pulse voltage are different at the same moment, the first impedance circuit is used for impedance matching, and the second impedance circuit is used to open the circuit between the midpoint of the primary winding and the reference voltage terminal.

2. The power converter according to claim 1, wherein Further including: A third impedance circuit, the first end of the third impedance circuit is connected to the first output end, the second end of the third impedance circuit is connected to the second output end, and the third end of the third impedance circuit is connected to the reference voltage terminal; When the voltages at the first output end and the second output end are the same at the same moment, the third impedance circuit is configured to present inductance; When the voltages at the first output end and the second output end are different at the same moment, the third impedance circuit is used for impedance matching.

3. The power converter according to claim 2, wherein, The third impedance circuit includes a first inductor and a second inductor. The first end of the first inductor is connected to the first output end, the second end of the first inductor is connected to the reference voltage terminal, the first end of the second inductor is connected to the second output end, and the second end of the second inductor is connected to the reference voltage terminal.

4. The power converter according to claim 3, wherein, The switching component includes a first half-bridge and a second half-bridge. The first end of the first half-bridge is used to receive the DC voltage. The midpoint of the bridge arm of the first half-bridge is connected to the first end of the primary winding of the transformer through the first impedance circuit. The first half-bridge is used to output the first pulse voltage; the first end of the second half-bridge is used to receive the DC voltage. The midpoint of the bridge arm of the second half-bridge is connected to the second end of the primary winding of the transformer through the first impedance circuit. The second half-bridge is used to output the second pulse voltage; the first half-bridge is the leading arm, the second half-bridge is the lagging arm, and the inductance value of the first inductor is greater than the inductance value of the second inductor; and / or, The inductance value of the first inductor is 200 nH to 400 nH; and / or, The inductance value of the second inductor is 200 nH to 400 nH.

5. The power converter according to any one of claims 1-4, characterized in that, The second impedance circuit includes: a third inductor connected between the midpoint of the primary winding and the reference voltage terminal.

6. The power converter according to claim 5, characterized in that, The midpoint of the primary winding and the reference voltage terminal are connected by a connecting wire, and the third inductor includes a parasitic inductor in the path between the midpoint of the primary winding and the reference voltage terminal; or, The midpoint of the primary winding is connected to the reference voltage terminal through an external inductor, and the third inductor includes the external inductor and a parasitic inductor in the path between the midpoint of the primary winding and the reference voltage terminal.

7. The power converter according to claim 5 or 6, characterized in that, The second impedance circuit further includes: a first capacitor; The first capacitor is connected between the midpoint of the primary winding of the transformer and the third inductor; or, The first capacitor is connected between the third inductor and the reference voltage terminal.

8. The power converter according to claim 6 or 7, characterized in that, The inductance value of the parasitic inductor is 50 nH to 100 nH; or, The capacitance value of the first capacitor is 680 pF.

9. The power converter according to any one of claims 1-8, characterized in that, The first impedance circuit includes: a fourth inductor, a fifth inductor, and a second capacitor; The first end of the fourth inductor is connected to the first output terminal, and the second end of the fourth inductor is connected to the first end of the primary winding; The first end of the fifth inductor is connected to the second output terminal, and the second end of the fifth inductor is connected to the second end of the primary winding; The first end of the second capacitor is connected to the first end of the primary winding, and the second end of the second capacitor is connected to the second end of the primary winding.

10. The power converter according to claim 9, characterized in that, The inductance values of the fourth inductor and the fifth inductor are the same; or, The inductance value of the fourth inductor is 220 nH; or, The inductance value of the fifth inductor is 220 nH; or, The capacitance value of the second capacitor is 500 pF.

11. The power converter according to any one of claims 1-10, characterized in that, It further includes: a third capacitor and a fourth capacitor; The first output terminal is connected to the first impedance circuit and the third impedance circuit through the third capacitor; The second output terminal is connected to the first impedance circuit and the third impedance circuit through the fourth capacitor.

12. The power converter according to claim 11, wherein The capacitance values of the third capacitor and the fourth capacitor are the same; or, The capacitance value of the third capacitor is 100 pF; or, The capacitance value of the fourth capacitor is 100 pF.

13. The power converter according to any one of claims 1-12, characterized in that, The reference voltage terminal presents a low impedance during AC.

14. The power converter according to claim 13, wherein The first end of the switch component is respectively connected to the positive DC transmission line and the negative DC transmission line; The reference voltage terminal is connected to the positive DC transmission line; or, The reference voltage terminal is connected to the negative DC transmission line; Or, The power conversion circuit further includes: a first bus capacitor and a second bus capacitor. The first end of the first bus capacitor is connected to the positive DC transmission line, the second end of the first bus capacitor is connected to the first end of the second bus capacitor, and the second end of the second bus capacitor is connected to the negative DC transmission line; the reference voltage terminal is connected to the second end of the first bus capacitor and the first end of the second bus capacitor; or, The reference voltage terminal is connected to the output terminal of an external DC-DC conversion circuit.

15. The power converter according to any one of claims 1 to 14, characterized in that It further includes a matching circuit or a filtering circuit; The matching circuit is connected between the secondary winding of the transformer and the load; The filter circuit is connected between the secondary winding of the transformer and the load.

16. The power converter according to any one of claims 1 to 15, characterized in that, The switching component is further configured to: Adjust the phase difference between the first pulse voltage and the second pulse voltage from a current phase difference to a target phase difference, so that the output power of the power converter is adjusted from a current power to a target power.

17. The power converter according to claim 16, wherein The switching component is further configured to: In response to a change in the load parameters of the load, adjust the phase difference between the first pulse voltage and the second pulse voltage from a current phase difference to a target phase difference.

18. The power converter according to claim 16 or 17, characterized in that, The switching component includes: a first half-bridge and a second half-bridge; The first end of the first half-bridge is configured to receive the DC voltage. The midpoint of the bridge arm of the first half-bridge is connected to the first end of the primary winding of the transformer through the first impedance circuit. The first half-bridge is configured to output the first pulse voltage; The first end of the second half-bridge is configured to receive the DC voltage. The midpoint of the bridge arm of the second half-bridge is connected to the second end of the primary winding of the transformer through the first impedance circuit. The second half-bridge is configured to output the second pulse voltage; Adjusting the phase difference between the first pulse voltage and the second pulse voltage from a current phase difference to a target phase difference includes: Controlling the upper switch and the lower switch of the first half-bridge to conduct alternately, and the upper switch and the lower switch of the second half-bridge to conduct alternately, and controlling the phase difference when the upper switches of the first half-bridge and the second half-bridge conduct to be adjusted from the current phase difference to the target phase difference, so that the phase difference between the first pulse voltage and the second pulse voltage is adjusted from the current phase difference to the target phase difference.

19. The power converter according to any one of claims 1 to 18, characterized in that, It further includes a switch controller. The switching component outputs the first pulse voltage and the second pulse voltage in response to the control of the switch controller.

20. The power converter according to any one of claims 1-19, characterized in that, The power converter includes a plurality of the power conversion circuits and a power combiner; The output ends of the plurality of power conversion circuits are respectively connected to the input end of the power combiner. The output end of the power combiner is configured to be connected to the load.

21. The power converter according to any one of claims 1-20, characterized in that, It further includes: A rectifier circuit; The secondary winding of the transformer is connected to the output end of the power conversion circuit through the rectifier circuit.

22. An electronic device, characterized in that, It includes a radio frequency power supply, and the radio frequency power supply includes: an AC-DC converter, a DC-DC converter, a radio frequency power amplifier, and a directional coupler. The input end of the AC-DC converter is configured to receive an AC voltage. The output end of the AC-DC converter is connected to the input end of the DC-DC converter. The output end of the DC-DC converter is connected to the input end of the radio frequency power amplifier. The output end of the radio frequency power amplifier is connected to the input end of the directional coupler. The output end of the directional coupler is connected to the load; The radio frequency power amplifier is the power converter according to any one of claims 1-20; and / or, The DC-DC converter is the power converter according to claim 21.

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