Control method of magnetic integration topology circuit and vehicle-mounted charger

Abstract

The invention discloses a control method of a magnetic integration topology circuit and a vehicle-mounted charger, and the magnetic integration topology circuit comprises a primary side bidirectional active bridge module, a transformer, a secondary side high-voltage bidirectional active bridge module, a secondary side low-voltage bidirectional active bridge module and a controller. The secondary side low-voltage bidirectional active bridge module is connected with the voltage regulating module through a low-voltage bus, the voltage regulating module is connected with a low-voltage load, and the buffer module is connected between the positive low-voltage bus and the negative low-voltage bus; the control method comprises the following steps: controlling the buffer module to absorb the voltage stress of the low-voltage bus according to the voltage VEF of the low-voltage bus; according to the invention, the OBC and DCDC efficiency problem in magnetic integrated control can be solved, the resonant cavity current can be adjusted, and the stress problem of a low-voltage loop device when OBC and DCDC work together in a magnetic integrated state can be solved, so that the maximum output power of DCDC when OBC and DCDC work together can be improved; and in combination with topology and a control method, non-inductive switching of mode switching is realized.

Description

Technical Field

[0001] The present invention relates to a power supply circuit, and more particularly to a control method for a magnetic integration topology circuit and an on-vehicle charger. Background Art

[0002] In new energy vehicles, OBC and DCDC are important components. The function of OBC is to convert alternating current into high-voltage direct current to charge the high-voltage battery of the electric vehicle. The function of DCDC is to convert the electrical energy of the high-voltage battery into low-voltage electricity to charge the low-voltage battery. At the same time, OBC also needs to convert the alternating current energy into high-voltage direct current to directly supply power to high-voltage devices such as heaters and air-conditioning compressors in the electric vehicle; when necessary, OBC also needs to convert the energy in the high-voltage battery into alternating current for in-vehicle and out-of-vehicle AC electrical appliances to use, realizing the in-vehicle and out-of-vehicle inversion functions. DCDC needs to reverse-transmit the energy of the low-voltage battery to the high-voltage battery terminal capacitor when necessary to realize the reverse pre-charge function; in addition, OBC and DCDC cooperate with each other to release the energy on the high-voltage battery terminal capacitor to a safe voltage to realize the active discharge function. In addition to power conversion, OBC and DCDC need to realize other additional functions, such as some functions described above.

[0003] Among the functions realized by OBC and DCDC, there are 3 power transmission ports: 1. AC port, which inputs AC energy during charging and outputs AC energy during discharging; 2. HV port, which is connected to the high-voltage battery and high-voltage electrical equipment of the electric vehicle. The battery serves as a load during charging and an energy source during discharging; 3. LV port, which is connected to the low-voltage battery and low-voltage electrical equipment. During charging, the energy of the HV high-voltage battery is transmitted to the LV port, and it can also reversely transmit energy from the LV to the HV port; as Figure 1 shown is a topology of OBC and DCDC.

[0004] The OBC industry has conducted extensive research on PFC components, and there are many topologies and control methods that can achieve bidirectional energy flow, so no more description will be given; for the subsequent DC-DC part, there are many new solutions in the industry; among them, the magnetic integrated circuit topology is repeatedly mentioned, which is a solution with low cost, high efficiency, and small volume, and the key function of realizing it is the DC-DC part, as Figure 2 shown, its core is to achieve lower cost and higher energy density by sharing a transformer and an S2 rectifier component.

[0005] Existing magnetic integration solutions, such as Figure 3As shown, the magnetic integration control method mentioned in 201710917389.X can meet the above requirements and has been mass-produced on a large scale. However, the above solution has inherent defects: 1. There is a problem of excessive voltage stress on the switch tube on the low-voltage side (V3 side) under large current; 2. Limited by the low-voltage side stress, the power of DCDC is limited when OBC and DCDC work simultaneously. 3. Under the requirement of wide input and output, when the input-output pressure difference is large, the reactive current in the resonant cavity is large, the loss is high, and the efficiency is low. 4. In the existing magnetic integration control scheme, when switching between different working modes, compared with the separate operation of non-magnetic integration OBC+DCDC, there is a power-off restart process; Generally speaking, the DCDC power is small in the OBC mode of the current magnetic integration scheme, the device reliability is slightly low, the control is complex, and there is a power-off during mode switching. Due to the above defects, there is an urgent need for a better magnetic integration solution in the industry. Summary of the Invention

[0006] In order to solve the above defects existing in the prior art, the present invention proposes a control method for a magnetic integration topology circuit and an on-vehicle charger.

[0007] The technical solution adopted by the present invention is to design a control method for a magnetic integration topology circuit. The magnetic integration topology circuit includes a primary bidirectional active bridge module, a transformer, a secondary high-voltage bidirectional active bridge module, and a secondary low-voltage bidirectional active bridge module, as well as a controller. The secondary low-voltage bidirectional active bridge module is connected to a voltage regulation module through a low-voltage bus, and a buffer module is connected between the positive low-voltage bus E and the negative low-voltage bus F; the control method includes controlling the buffer module to absorb the voltage stress of the low-voltage bus according to the low-voltage bus voltage VEF.

[0008] Optionally, the buffer module includes a fourth capacitor C4 and a first diode D1 connected in series between the positive low-voltage bus and the negative low-voltage bus. A first resistor R1 and a thirteenth switch Q13 are connected in series between the connection point of the fourth capacitor C4 and the anode of the first diode D1 and the negative low-voltage bus; the controlling the buffer module to absorb the voltage stress of the low-voltage bus according to the low-voltage bus voltage VEF specifically includes: the controller controls the on-off of the thirteenth switch Q13 to control the discharge time and discharge duration of the fourth capacitor C4, so as to absorb the voltage stress of the low-voltage bus.

[0009] Optionally, the voltage regulation module includes: an eleventh switch Q11 and a first inductor L1 connected in series between the positive low-voltage bus and the positive pole of the low-voltage load, a twelfth switch Q12 is connected between the connection point of the eleventh switch Q11 and the first inductor L1 and the negative pole of the low-voltage load, and a third capacitor C3 is connected between the positive pole and the negative pole of the low-voltage load.

[0010] Optionally, the secondary-side high-voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm. The voltage between the midpoint D of the fourth bridge arm and the midpoint C of the third bridge arm is the secondary-side midpoint voltage VDC. When the secondary-side midpoint voltage VDC is at a high level and the eleventh switch Q11 is turned on, the following control is performed on the thirteenth switch Q13: PWM control is performed on the eleventh switch Q11, and the eleventh switch Q11 is turned on after the secondary-side midpoint voltage VDC changes from the zero level to the high level. And the thirteenth switch Q13 is turned on after the eleventh switch Q11 is turned on and is turned off before the secondary-side midpoint voltage VDC changes from high to zero; When PWM control is performed on the eleventh switch Q11, and the eleventh switch Q11 is turned on before the secondary-side midpoint voltage VDC changes from the zero level to the high level, or the eleventh switch Q11 is at a constant high level, the thirteenth switch Q13 is turned on after the secondary-side midpoint voltage VDC changes from the zero level to the high level and is turned off before the secondary-side midpoint voltage VDC changes from the high level to the zero level.

[0011] Optionally, when the thirteenth switch Q13 is turned on and the duration for which the secondary-side midpoint voltage VDC remains at a high level is short, to maintain the minimum on-time of the thirteenth switch Q13, the thirteenth switch Q13 is turned on before the eleventh switch Q11 is turned on and is turned off before the secondary-side midpoint voltage VDC becomes zero.

[0012] Optionally, the voltage regulation module includes a first mode and a second mode. In the first mode, PWM control is performed on the eleventh switch Q11, and in the second mode, the eleventh switch Q11 is controlled to be always on; The controller selects the first mode or the second mode according to the energy requirement of the low-voltage load connected to the voltage regulation module, or selects the first mode or the second mode according to the electric energy transmitted by the secondary-side high-voltage module.

[0013] Optionally, when PWM control is performed on the eleventh switch Q11 in the voltage regulation module, the turn-off moment of the eleventh switch Q11 is within the stage where the low-voltage bus voltage VEF is at zero voltage; The thirteenth switch Q13 is turned on when the eleventh switch Q11 is turned on and the low-voltage bus voltage VEF is stable.

[0014] Optionally, the third bridge arm includes a fifth switch Q5 and a sixth switch Q6, and the fifth switch Q5 and the sixth switch Q6 are complementary; The fourth bridge arm includes a seventh switch Q7 and an eighth switch Q8, and the seventh switch Q7 and the eighth switch Q8 are complementary; The maximum duty ratios of the fifth to eighth switches (Q5 to Q8) are set to a fixed value. During the period when the fifth switch Q5 and the seventh switch Q7 are turned on and the sixth switch Q6 and the eighth switch Q8 are turned off, or during the period when the fifth switch Q5 and the seventh switch Q7 are turned off and the sixth switch Q6 and the eighth switch Q8 are turned on, the turn-off of the eleventh switch Q11 is controlled.

[0015] Optionally, selecting the first mode or the second mode according to the energy demand of the low-voltage load includes: setting a duty cycle threshold of the secondary midpoint voltage VDC, when the duty cycle of the secondary midpoint voltage VDC is lower than the duty cycle threshold, the voltage regulation module adopts the first mode; when the duty cycle of the secondary midpoint voltage VDC is higher than the duty cycle threshold, the voltage regulation module adopts the second mode.

[0016] Optionally, the primary bidirectional active bridge module includes a first bridge arm and a second bridge arm, and the voltage between the midpoint A of the first bridge arm and the midpoint B of the second bridge arm is the primary midpoint voltage VAB; the secondary high-voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm, and the voltage between the midpoint D of the fourth bridge arm and the midpoint C of the third bridge arm is the secondary midpoint voltage VDC; there is a phase difference Φ between the voltage waveforms of the primary midpoint voltage VAB and the secondary midpoint voltage VDC, and the positive and negative phase difference Φ is adjusted to control the flow direction and power of the current between the primary bidirectional active bridge module and the secondary high-voltage bidirectional active bridge module; the duty cycle of the primary midpoint voltage VAB and the secondary midpoint voltage VDC is adjusted to adjust the resonant current of the primary bidirectional active bridge module and the secondary high-voltage bidirectional active bridge module.

[0017] The present invention also provides a vehicle-mounted charger, which includes the magnetic integrated topology circuit. The magnetic integrated topology circuit adopts the control method of the magnetic integrated topology circuit.

[0018] The beneficial effects of the technical solution provided by the present invention are:

[0019] The present invention can solve the OBC and DCDC efficiency problems existing in magnetic integration control, adjust the resonant cavity current, and can also solve the stress problem of low-voltage loop components when OBC+DCDC work together in the magnetic integration state, so that the maximum output power of DCDC when OBC+DCDC work together is improved; combined with the topology and control method, the mode switching is realized without sense switching. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The present invention is described in detail below with reference to the embodiments and accompanying drawings, wherein:

[0021] Figure 1 It is an existing OBC and DCDC topology diagram;

[0022] Figure 2 It is an existing magnetic integration topology diagram;

[0023] Figure 3 yes Figure 2 Circuit diagram of topology;

[0024] Figure 4 is a topological diagram of an embodiment of the present invention;

[0025] Figure 5 is Figure 4 a circuit diagram of a topology and a control principle block diagram;

[0026] Figure 6 is Figure 5 a voltage comparison diagram of the BuckSN transistor in the buffer circuit and voltages at various parts of the buffer circuit;

[0027] Figure 7 is Figure 5 a circuit Buck control timing comparison diagram;

[0028] Figure 8 is Figure 5 a duty cycle control waveform diagram between the primary - side bidirectional active bridge module and the secondary - side high - voltage bidirectional active bridge module;

[0029] Figure 9 is Figure 5 another duty cycle control waveform diagram between the primary - side bidirectional active bridge module and the secondary - side high - voltage bidirectional active bridge module;

[0030] Figure 10 is a variation form when the first mode of the present invention switches to the second mode,

[0031] Figure 11 is a control timing comparison diagram when the first mode of the present invention switches to the second mode;

[0032] Figure 12 is a circuit diagram of an embodiment;

[0033] Figure 13 is Figure 12 a duty cycle control waveform diagram between the primary - side bidirectional active bridge module and the secondary - side high - voltage bidirectional active bridge module;

[0034] Figure 14 is a voltage stress comparison diagram before and after adding the control of the BuckSN transistor when the Buck transistor operates in the second mode;

[0035] Figure 15 is a voltage stress comparison diagram before and after adding the control of the BuckSN transistor when the Buck transistor operates in the first mode;

[0036] Figure 16 is the optimization effect diagram of the voltage stress of the low - voltage switch transistor after adding the buffer module. Detailed implementation manners

[0037] In order to make the objectives, technical solutions and advantages of the present invention clearer, the following further elaborates on the present invention in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0038] The control method of the magnetic integration topology circuit proposed by the present invention can solve the stress problem of low-voltage loop devices when the OBC + DCDC work together under magnetic integration, thereby increasing the maximum output power of the DCDC; it can solve the efficiency problems of OBC and DCDC in magnetic integration control; the present invention combines the topology and control method to achieve seamless switching between modes.

[0039] For the convenience of subsequent description, some terms are pre-explained: The Buck tube / Qbuck is the common name for the Q11 tube in the following text, and BuckSN is the common name for the Q13 in the following text. DutyVAB is the duty cycle obtained by dividing the positive voltage time of the square wave at point A relative to point B by the period in the following figure, and dutyVDC is the duty cycle obtained by dividing the positive voltage time of the square wave at point C relative to point D by the period in the attached figure. Phase is the lag / lead time of the midpoint of the VAB square wave relative to the midpoint of the VDC square wave.

[0040] The present invention discloses a control method of a magnetic integration topology circuit. The magnetic integration topology circuit includes a primary bidirectional active bridge module S1, a transformer T1, a secondary high-voltage bidirectional active bridge module S2, a secondary low-voltage bidirectional active bridge module S3, and a controller. The secondary low-voltage bidirectional active bridge module is connected to a voltage regulation module through a low-voltage bus, the voltage regulation module is connected to a low-voltage load, and a buffer module is connected between the positive low-voltage bus E and the negative low-voltage bus F; the control method includes controlling the buffer module to absorb the voltage stress of the low-voltage bus according to the low-voltage bus voltage VEF.

[0041] The topology block diagram of the present invention is as Figure 4 shown. The primary bidirectional active bridge module S1, the secondary high-voltage bidirectional active bridge module S2, and the secondary low-voltage bidirectional active bridge module S3 are active bridge circuits. Z1 and Z2 are resonant impedance circuits. The same-name terminals of the transformer T1 are only for illustration; the voltage regulation module S4 is a circuit composed of switching devices, inductors, capacitors, wires, etc. to realize the function of voltage increase and decrease. This module can also not adjust the voltage and only directly output by inductors and capacitors; Sn1 is a buffer module, and its function is to absorb the device stress in the low-voltage circuits S3 and S4 modules.

[0042] Refer to Figure 5 a circuit diagram of a preferred embodiment shown. The primary bidirectional active bridge module S1 includes a first switch Q1, a second switch Q2, a third switch Q3, and a fourth switch Q4. The secondary high-voltage bidirectional active bridge module S2 includes a fifth switch Q5, a sixth switch Q6, a seventh switch Q7, and an eighth switch Q8. The secondary low-voltage bidirectional active bridge module S3 includes a ninth switch Q9 and a tenth switch Q10. L r and C r constitute the resonant network Z1, and C dcA resonant network Z2 is formed. The voltage regulation module S4 includes an eleventh switch Q11, a twelfth switch Q12, a first inductor L1, and a third capacitor C3; the buffer module Sn1 includes a fourth capacitor C4 and a first diode D1 connected in series between the positive low-voltage bus E and the negative low-voltage bus F, and a first resistor R1 and a thirteenth switch Q13 are connected in series between the connection point of the fourth capacitor C4 and the anode of the first diode D1 and the negative low-voltage bus F; the control of the buffer module to absorb the voltage stress of the low-voltage buses E and F according to the low-voltage bus voltage VEF specifically includes: the controller controls the on / off of the thirteenth switch Q13 to control the discharge time and discharge duration of the fourth capacitor C4, so as to absorb the voltage stress of the low-voltage buses E and F, and solve the stress problem under the maximum power of DCDC when OBC and DCDC work together. Figure 5 The circuit in [description] is just one form. Q13 in the Sn1 circuit is a PMOS in the figure example, and it can also be an NMOS.

[0043] See Figure 5 Referring to the preferred embodiment shown, the voltage regulation module includes: an eleventh switch Q11 and a first inductor L1 connected in series between the positive low-voltage bus E and the positive pole of the low-voltage load, a twelfth switch Q12 is connected between the connection point of the eleventh switch Q11 and the first inductor L1 and the negative pole of the low-voltage load, and a third capacitor C3 is connected between the positive pole and the negative pole of the low-voltage load.

[0044] In the preferred embodiment, the secondary high-voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm, and the voltage between the midpoint D of the fourth bridge arm and the midpoint C of the third bridge arm is the secondary midpoint voltage VDC; when the secondary midpoint voltage VDC is at a high level and the eleventh switch Q11 is turned on, the thirteenth switch Q13 is controlled as follows: PWM control is performed on the eleventh switch Q11, and the eleventh switch Q11 is turned on after the secondary midpoint voltage VDC changes from the zero level to the high level, and the thirteenth switch Q13 is turned on after the eleventh switch Q11 is turned on and turned off before the secondary midpoint voltage VDC changes from high to zero; when PWM control is performed on the eleventh switch Q11, and the eleventh switch Q11 is turned on before the secondary midpoint voltage VDC changes from the zero level to the high level, or the eleventh switch Q11 is at a constant high level, the thirteenth switch Q13 is turned on after the secondary midpoint voltage VDC changes from the zero level to the high level and turned off before the secondary midpoint voltage VDC changes from the high level to the zero level.

[0045] In the preferred embodiment, when the thirteenth switch Q13 is turned on and the high-level maintenance time of the secondary midpoint voltage VDC is short, to maintain the minimum on-time of the thirteenth switch Q13, the thirteenth switch Q13 is turned on before the eleventh switch Q11 and turned off before the secondary midpoint voltage VDC becomes zero.

[0046] Appendix Figure 6 is Figure 5 Figure 6 is a comparison diagram of the voltages at various points of the BuckSN transistor in the buffer circuit and the buffer circuit. In this example, the thirteenth switch Q13 is a PMOS transistor, which conducts when the input is low; an NMOS transistor can also be used, in which case it conducts when the input is high. The principle of reducing the low-voltage stress of this circuit is as follows: When the switch is turned off, the voltage on the low-voltage bus VEF generates a voltage oscillation due to the leakage inductance, loop inductive reactance, and junction capacitance of the switch in the low-voltage loop, Figure 6 Figure 6 shows a situation in the SN circuit. The working principle of the SN active absorption circuit will be analyzed and described in combination with this operating condition. The initial voltage on the fourth capacitor C4 is the stress platform voltage with the upper side positive and the lower side negative. The voltage VGF at the midpoint of the fourth capacitor C4 and the first diode D1 is VEF - VEG0 (VEG0 is the initial voltage of the fourth capacitor C4 and also the platform value of the VEF voltage); due to the presence of the diode, the voltage VGF at the midpoint of the fourth capacitor C4 and the first diode D1 can only be less than or equal to 0 (diode voltage drop is not considered in theoretical analysis); when the VEF voltage starts to rise, VEF - VEG0 < 0; during this stage, the voltage of C4 remains unchanged. When the VEF voltage is greater than the VEF platform value, VEF - VEG0 > 0; therefore, the first diode D1 conducts; the fourth capacitor C4 is charged by VEF, and the energy of the voltage oscillation at the low-voltage end is absorbed by V4. However, there is no discharge path for C4 during this stage. When the SN is driven, that is, when Q13 is driven to turn on, since VGF is a negative voltage; at this time, C4 discharges through the Q11 / Q10 loop to Q13 and R1 to the output or returns to the transformer. During this stage, C4 discharges to VEF through R1, and the voltage of C4 discharges the voltage spike to the VEF platform. When Q13 is driven to turn off, the voltage of VC4 is equal to the VEF voltage platform value; when the VEF voltage starts to decline, the voltage of VGF = VEF - VEG0 < 0; during the stage from t3 to t0, VGF is less than 0; therefore, the voltage of C4 remains unchanged.

[0047] Analyzing this absorption process, the charging process of capacitor C4 starts when the VEF voltage is higher than the VEF voltage platform, which is the stage from t0 to t1. The discharging stage occurs when BuckSN is turned on, that is, the stage from t2 to t3, and the energy is released to the output, and part of it is consumed by the resistor R1; when the discharging is completed, the voltage of capacitor C4 is the VEF platform value. During this discharging stage, the capacitor only absorbs the voltage when the VEF voltage is higher than the platform. This type of absorption has the following advantages: 1. The capacitor only absorbs the voltage when the VEF voltage is higher than the platform, and the charging loss of the capacitor is small. 2. When the leakage inductance starts to resonate with capacitor C4, the voltage generated by the resonance is small due to the initial voltage. 3. When the capacitor discharges, part of the energy is released to the output, so the efficiency is high.

[0048] Combined with the analysis of the working state of the SN circuit, there are two requirements for the SN drive. 1. The SN drive is turned on after the VEF voltage is higher than the initial value of the C4 capacitor, that is, the VEF voltage platform value. Therefore, there should be a dead zone between the turn-on of the SN drive and the rise of VEF, usually a fixed dead zone, to ensure the first requirement. 2. The SN drive is turned off before the VEF voltage is less than the platform. It should be noted that under the above requirements, there is no power switch switching during the turn-on process of the SN, which will reduce the power consumption of the SN circuit. Additionally, it should be noted that when the SN drive is turned on, C4 and R1 discharge. In Figure 6 it can be seen that the capacitor C4 is discharged. Combining the time constant τ = R1 * C4 and the turn-on time of the SN drive determines the discharge situation of the C4 capacitor. The voltage of the C4 capacitor should be released to the platform voltage of VEF as much as possible during the SN turn-on stage. Figure 16 After adding the Sn circuit, for the optimization effect of the voltage stress of the low-voltage switch tube, the left figure shows the situation without the SN1 circuit, and the right figure shows the voltage stress after adding the SN1 circuit.

[0049] No SN With SN and controlled according to the above control method Q11DS 85.000V 49.000V Q10DS 72.800V 72.800V

[0050] The working timing of the S4 voltage regulation module. The purpose of this circuit is to adjust through the S4 voltage regulation module to meet the requirements when the VEF voltage does not match the required voltage of V3. In Figure 5 the example, S4 is a Buck circuit, and the purpose is to reduce the VEF voltage. As shown in the appendix Figure 7 ( Figure 7 is Figure 5 the timing comparison diagram of the Buck control circuit of the circuit), Vdc is the square wave on the high-voltage side of the transformer, and Q11 is used as the Buck tube to step down again, resulting in oscillations in the low-voltage bus voltage VEF. When the Buck tube, that is, Q13, is turned off, the inductor current is very large at this time, and a voltage spike is generated on the low-voltage bus VEF. This voltage will be superimposed on VEF. To reduce the voltage stress when the Buck is turned off, the method of the present invention is that Qbuck is turned off in the zero-voltage stage of VEF, and the Buck tube is turned on when Qbuck is turned on and in the stable stage of VEF, which can absorb the electrical stress, reduce the loss, and improve the efficiency. In the present invention, Qbuck is turned off when the VEF voltage is zero, and QSN is turned on when Qbuck is turned on and the low-voltage bus VEF is stable.

[0051] The voltage of VEF is obtained by converting the Vdc voltage according to the turns ratio. In traditional full-bridge control, the Vdc voltage is obtained by controlling the duty cycle of the high-side Q5 - Q8 drive. The Vdc duty cycle is the duty cycle of Q5 - Q8. Q5 and Q6 are complementary upper and lower transistors, and Q7 and Q8 are complementary upper and lower transistors; the phases of Q5 / Q6 and Q7 / Q8 differ by 180°; that is, there is a state where Q5 - Q8 are all turned off. In this state, points C and D have high impedance to both V2 positive and V2 negative. At this time, the Cdc voltage is uncertain whether it is high level or low level. In this control timing, the turn-off position of Qbuck cannot be reliably guaranteed, especially when the VDC duty cycle is relatively large, that is, the duty cycle of Q5 - Q8 is relatively large and the dead time is relatively small.

[0052] To solve the low-voltage stress problem and ensure that Qbuck turns off at the zero-voltage stage of VEF, the solution proposed by the present invention is as Figure 7 shown; the duty cycles of Q5 - Q8 are all maintained at 50%; Q5 and Q6 are complementary upper and lower transistors, and Q7 and Q8 are complementary upper and lower transistors; the phase difference value between Q5 / Q6 and Q7 / Q8 is the Vdc duty cycle;

[0053] The stage from t0 to t1 is the dead time of the Q5 / Q6 upper and lower transistors. In this state, only Q8 is conducting, and the VDC voltage is not controlled;

[0054] In the stage from t1 to t2, Q5 and Q8 are at high level, then point C is at low level, point D is at high level, and the VDC level is negative;

[0055] The stage from t2 to t3 is the dead time of the Q7 / Q8 upper and lower transistors. In this state, only Q7 is conducting, and the VDC voltage is not controlled;

[0056] In the stage from t3 to t4, Q5 and Q7 are conducting, then point C is at V2 positive voltage, point D is at V2 positive voltage, and the VDC voltage is clamped to 0V;

[0057] The stage from t4 to t5 is the dead time of the Q5 / Q6 upper and lower transistors. In this state, only Q7 is conducting, and the VDC voltage is not controlled;

[0058] In the stage from t5 to t6, Q6 and Q7 are conducting, then point C is at high level, point D is at low level, and the VDC level is positive;

[0059] The stage from t6 to t7 is the dead time of the Q7 / Q8 upper and lower transistors. In this state, only Q6 is conducting, and the VDC voltage is not controlled;

[0060] In the stage from t7 to t8, Q6 and Q8 are conducting, then point C is at V2 negative voltage, point D is at V2 negative voltage, and the VDC voltage is clamped to 0V;

[0061] In the above timing analysis, during the t3 - t4 stage and the t7 - t8 stage, the VDC voltage is short - circuited by the switching transistor, and the voltage is clamped to 0V. Then the input voltage of the VEF is 0V during this stage. When Qbuck is turned off during this stage, the input voltage is 0V, and the voltage stress is minimized at this time.

[0062] Therefore, the maximum value of the VDC duty cycle is limited to a fixed value. At this fixed value, the short - circuit time t3 - t4 and t7 - t8 are maintained at the minimum value, which can ensure that Qbuck is definitely turned off within this interval.

[0063] When transferring energy between V1 and V2, the energy transfer is achieved through the duty cycles of VAB and VDC and the phases of the mid - points of VAB and VDC; there is no limit to the implementation method of VAB. It can use the same control method as VDC or use duty - cycle control. When transferring energy, the duty cycles of VAB and VDC can be different. Figure 8 and Figure 9 respectively, the schematic diagrams of the typical waveforms that can be transferred between V1 and V2 Figure 8 is Figure 5 a duty - cycle control waveform diagram between the primary - side bidirectional active - bridge module and the secondary - side high - voltage bidirectional active - bridge module Figure 9 is Figure 5 another duty - cycle control waveform diagram between the primary - side bidirectional active - bridge module and the secondary - side high - voltage bidirectional active - bridge module.

[0064] The voltage - regulating module includes a first mode and a second mode. In the first mode, PWM control is performed on the eleventh switch Q11, and in the second mode, the eleventh switch Q11 is controlled to be always on; the controller selects the first mode or the second mode according to the energy demand of the low - voltage load connected to the voltage - regulating module, or selects the first mode or the second mode according to the electrical energy transmitted by the secondary - side high - voltage module. The first mode and the second mode can be switched with each other. The energy demand of the low - voltage load refers to the power demand that the on - vehicle low - voltage load needs to consume during operation.

[0065] When performing PWM control on the eleventh switch Q11 in the voltage - regulating module, the turn - off moment of the eleventh switch Q11 is within the stage when the low - voltage bus voltage VEF is at zero voltage; the thirteenth switch Q13 is turned on when the eleventh switch Q11 is turned on and the low - voltage bus voltage VEF is stable.

[0066] The third bridge arm includes a fifth switch Q5 and a sixth switch Q6, and the fifth switch Q5 and the sixth switch Q6 are complementary; the fourth bridge arm includes a seventh switch Q7 and an eighth switch Q8, and the seventh switch Q7 and the eighth switch Q8 are complementary; the maximum duty cycle of the fifth to eighth switches (Q5-Q8) is set to a fixed value, and during the period when the fifth switch Q5 and the seventh switch Q7 are conducting and the sixth switch Q6 and the eighth switch Q8 are cut off, or during the period when the fifth switch Q5 and the seventh switch Q7 are cut off and the sixth switch Q6 and the eighth switch Q8 are conducting, the eleventh switch Q11 is controlled to turn off.

[0067] The selection of the first mode or the second mode according to the energy requirement of the low-voltage load includes: setting a duty cycle threshold of the secondary side midpoint voltage VDC, and when the duty cycle of the secondary side midpoint voltage VDC is lower than the duty cycle threshold, the voltage regulation module adopts the first mode; when the duty cycle of the secondary side midpoint voltage VDC is higher than the duty cycle threshold, the voltage regulation module adopts the second mode.

[0068] The control method proposed by the present invention is attached Figure 5 as shown in the control block diagram below: Through sampling the voltages and currents of ports V1 and V2 and the set value, the Phase closed-loop control is obtained through loop calculation. Phase is the mutual phase difference between the midpoint of Vab and the midpoint of Vcd. At the same time, the duty ratios of VAB / VCD are set according to the voltages and currents (or target voltages and currents) of ports V1 and V2, and the current in the resonant cavity is reduced by adjusting the duty ratios of VAB / VCD to improve the efficiency.

[0069] When V2 > Vset1, DutyVCD = V2 / Vset * dutyVCDset1; (Vset1 is less than V2max, dutyVCDset1 < 50%);

[0070] When V2 < Vset2, DutyVABset = V2 * n / V1 * 50% (V2 is the voltage of port V2, V1 is the voltage of port V1, and n is the transformer turns ratio);

[0071] When Vset2 ≤ V2 ≤ Vset1, DutyVAB = 50%; DutyVCDset = DutyVCDMax (DutyVCDMax = 50% - to ensure the duty cycle required for the Buck to turn off when Qbuck is a legal PWM; DutyVCDMax = 50%, when Qbuck is always high or always low), Figure 14 and Figure 15 respectively compare the optimization effects on the resonant cavity current after using the above control under the same input and output conditions. Figure 14 is a comparison diagram of the voltage stress before and after adding the BuckSN tube control when the Buck tube operates in the second mode; Figure 15It is a comparison chart of voltage stress before and after adding the BuckSN tube control when the Buck tube works in the first mode. The energy transfer of V3 is obtained by sampling the voltage and current of the V3 port and calculating the duty cycle through the loop with the set value, and the energy transfer of V3 is controlled by controlling Qbuck or VCD to the calculated duty cycle.

[0072] In the above description, two working modes are involved, namely the Qbuck is in the constant high mode and the Qbuck is in the PWM mode; the first mode is that the Buck works in the PWM mode, and the second mode is that the Buck works in the constant high mode (direct control mode); the first mode is commonly used when the energy of the V1 / V2 port is large. At this time, the duty cycle of VCD is relatively large, and it is necessary to let the Buck work in the PWM mode to close-loop control the voltage and current of V3. In this mode, due to the large energy of the V1 and V2 ports, the duty cycle of Vcd is relatively large, and it is easy to meet the energy requirements of V1 and V2. At this time, the voltage and current of V3 can be controlled by closing the loop when the Buck works in the PWM mode; the second mode is commonly used when the energy of the V1 / V2 port is small. At this time, dutyVCD is controlled by the V3 loop, and the Buck works in the constant high mode at this time. In this mode, the high-power requirement of V3 can be easily met, and the loss is small and the low voltage stress is low at this time.

[0073] V1 or V2 energy V3 energy First mode Large Small Second mode Small Large

[0074] The first mode and the second mode are switched by the energy of the V1 / V2 port and the energy requirement of V3. When the mode is switched, dutyVcd and DutyBuck are controlled by different mechanisms, combined with Figure 5 a shown circuit diagram and the control principle block diagram and Figure 11 a shown control timing comparison diagram when switching from the first mode to the second mode. Loop 1 is to sample the voltage and current of V1 and V2, and combine the requested power size and energy direction to control the energy flow between V1 and V2 through the loop. Loop 2 is to control the size of the energy from V1 or V2 to V3 through the loop by combining the voltage and current of the V3 port with the requested voltage and current of V3.

[0075] When the mode is switched, the values of DutyVcd and DutyBuck need to be switched, and the switching method is to perform power conversion according to Figure 11 the control block diagram and the parameter switching table marked 2. Figure 10 It is a variation form when switching from the first mode to the second mode of the present invention. When switching, DutyVCD changes from the output of Loop 2 to DutyVcdset; Buck changes from 100% duty cycle to the duty cycle corresponding to the output of Loop 2 at this time, and the duty cycle of DutyVab is adjusted accordingly to achieve continuous energy transfer.

[0076] DutyVCD DutyBuck Mode 1 DutyVcdset Loop 2 output Mode 2 Loop 2 output PWM = 100%

[0077] Figure 11 When switching from the first mode to the second mode, in combination with the above scheme, a wave - generating method is achieved. The first mode is the Q11 direct - connection control mode, and the second mode is the Q11 PWM working mode. Under the two working modes, the control methods are different, which can solve the stress problem under large current in the V3 loop. For example Figure 14 , when Q11 works in the PWM mode, the low - voltage stress comparison after adding Q13 control is shown. After adding Q13 control, the DS of Q11 drops from 85V to 43V under the same working conditions.

[0078] It should be noted that the voltage - regulating module can be composed of combinations of inductors, capacitors, resistors, switching tubes, wires, etc.; specifically, when the voltage - regulating module is directly connected by wires, the present invention proposes a topology, such as Figure 12 shown, which is equivalent to the Qbuck in the PWM always - high working state, and the working mode is similar to the second mode. At this time, DutyVcd needs to have a smaller duty cycle to meet the high power of V1 / V2. The control method is as Figure 13 shown. The loop 2 outputs to control DutyVcd, and the loop 1 outputs to control the Phase of VAB and VCD. Under this topology, the device materials are reduced, the control method is simplified, and the energy transfer efficiency from V2 to V3 is improved.

[0079] In a preferred embodiment, the primary - side bidirectional active - bridge module includes a first bridge arm and a second bridge arm, and the voltage between the mid - point A of the first bridge arm and the mid - point B of the second bridge arm is the primary - side mid - point voltage VAB; the secondary - side high - voltage bidirectional active - bridge module includes a third bridge arm and a fourth bridge arm, and the voltage between the mid - point D of the fourth bridge arm and the mid - point C of the third bridge arm is the secondary - side mid - point voltage VDC; there is a phase difference Φ between the voltage waveforms of the primary - side mid - point voltage VAB and the secondary - side mid - point voltage VDC. Adjusting the positive and negative of the phase difference Φ can control the flow direction and power magnitude of the current between the primary - side bidirectional active - bridge module and the secondary - side high - voltage bidirectional active - bridge module; adjusting the duty cycles of the primary - side mid - point voltage VAB and the secondary - side mid - point voltage VDC can adjust the resonant current of the primary - side bidirectional active - bridge module and the secondary - side high - voltage bidirectional active - bridge module.

[0080] The control method proposed by the present invention can reduce the resonant - cavity current under the same working conditions, as Figure 10 、 11 shown. Figure 8 For the same input and output voltages and output power conditions, after adjusting VCD by the present invention, the resonant - cavity current decreases and the magnetic loss decreases; Figure 9 For the condition of adjusting the duty cycle of VAB, under the same input voltage, output voltage and current conditions, the resonant - cavity current decreases, the loss can be reduced, and thus the efficiency is improved.

[0081] The present invention also discloses a vehicle-mounted charger, which includes the magnetic integration topology circuit, and the magnetic integration topology circuit adopts the control method of the above-mentioned magnetic integration topology circuit.

[0082] The above embodiments are only for illustrative purposes and not for limitation. Any equivalent modifications or changes made without departing from the spirit and scope of the present application shall be included in the scope of the claims of the present application.

Claims

1. A control method for a magnetic integrated topology circuit, the magnetic integrated topology circuit comprising a primary bidirectional active bridge module, a transformer, a secondary high-voltage bidirectional active bridge module, a secondary low-voltage bidirectional active bridge module, and a controller, characterized in that: The secondary low-voltage bidirectional active bridge module is connected to the voltage regulating module via the low-voltage busbars (E, F), and a buffer module is connected between the positive low-voltage busbar (E) and the negative low-voltage busbar (F); The control method comprises controlling the buffer module to absorb the voltage stress of the low-voltage bus (E, F) according to the low-voltage bus voltage VEF.

2. The control method of the magnetic integrated topology circuit according to claim 1, characterized in that: The buffer module includes a fourth capacitor C4 and a first diode D1 connected in series between the positive low-voltage bus (E) and the negative low-voltage bus (F), and a first resistor R1 and a thirteenth switch Q13 are connected in series between the connection point between the fourth capacitor C4 and the anode of the first diode D1 and the negative low-voltage bus (F); The controlling of the buffer module to absorb the voltage stress of the low-voltage bus (E, F) according to the low-voltage bus voltage VEF specifically includes: the controller controlling the on and off of the thirteenth switch Q13 to control the discharge time and discharge duration of the fourth capacitor C4, thereby absorbing the voltage stress of the low-voltage bus (E, F).

3. The control method of the magnetic integrated topology circuit according to claim 2, characterized in that: The voltage regulating module includes: an eleventh switch Q11 and a first inductor L1 connected in series between the positive low-voltage bus (E) and the positive electrode of the low-voltage load, a twelfth switch Q12 is connected between the connection point of the eleventh switch Q11 and the first inductor L1 and the negative electrode of the low-voltage load, and a third capacitor C3 is connected between the positive electrode of the low-voltage load and the negative electrode of the low-voltage load.

4. The control method of the magnetic integrated topology circuit according to claim 3, characterized in that: The secondary high-voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm, and the voltage between the midpoint D of the fourth bridge arm and the midpoint C of the third bridge arm is the secondary midpoint voltage VDC; when the secondary midpoint voltage VDC is at a high level and the eleventh switch Q11 is turned on, the thirteenth switch Q13 is controlled as follows: The eleventh switch Q11 is PWM controlled, and the eleventh switch Q11 is turned on after the secondary midpoint voltage VDC changes from zero level to high level, and the thirteenth switch Q13 is turned on after the eleventh switch Q11 is turned on, and is turned off before the secondary midpoint voltage VDC changes from high level to zero; When the eleventh switch Q11 is PWM controlled and turned on before the secondary midpoint voltage VDC changes from zero level to high level, or the eleventh switch Q11 is normally at a high level, the thirteenth switch Q13 is turned on after the secondary midpoint voltage VDC changes from zero level to high level, and is turned off before the secondary midpoint voltage VDC changes from high level to zero level.

5. The control method of the magnetic integrated topology circuit according to claim 4, characterized in that: When the thirteenth switch Q13 is turned on and the secondary midpoint voltage VDC is at a high level for a short time, in order to maintain the minimum on-time of the thirteenth switch Q13, the thirteenth switch Q13 is turned on before the eleventh switch Q11 is turned on and is turned off before the secondary midpoint voltage VDC becomes zero.

6. The control method of the magnetic integrated topology circuit according to claim 3, characterized in that: The voltage regulating module includes a first mode and a second mode. In the first mode, the eleventh switch Q11 is PWM controlled, and in the second mode, the eleventh switch Q11 is controlled to be normally on; the controller selects the first mode or the second mode according to the energy demand of the low-voltage load connected to the voltage regulating module, or selects the first mode or the second mode according to the electrical energy transmitted by the secondary high-voltage module.

7. The control method of the magnetic integrated topology circuit according to claim 6, characterized in that: When the eleventh switch Q11 in the voltage regulating module is subjected to PWM control, the turn-off moment of the eleventh switch Q11 is in the stage where the low-voltage bus voltage VEF is zero voltage; the thirteenth switch Q13 is turned on when the eleventh switch Q11 is turned on and the low-voltage bus voltage VEF is stable.

8. The control method of the magnetic integrated topology circuit according to claim 3, characterized in that: The secondary side high voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm, the third bridge arm includes a fifth switch Q5 and a sixth switch Q6, and the fifth switch Q5 and the sixth switch Q6 are complementary; the fourth bridge arm includes a seventh switch Q7 and an eighth switch Q8, and the seventh switch Q7 and the eighth switch Q8 are complementary; The maximum duty cycle of the fifth to eighth switches (Q5-Q8) is set to a fixed value, and the eleventh switch Q11 is controlled to be turned off during the period when the fifth switch Q5 and the seventh switch Q7 are turned on and the sixth switch Q6 and the eighth switch Q8 are turned off, or during the period when the fifth switch Q5 and the seventh switch Q7 are turned off and the sixth switch Q6 and the eighth switch Q8 are turned on.

9. The control method of the magnetic integrated topology circuit according to claim 6, characterized in that: The selecting of the first mode or the second mode according to the energy demand of the low-voltage load includes: setting a duty cycle threshold of the secondary midpoint voltage VDC; when the duty cycle of the secondary midpoint voltage VDC is lower than the duty cycle threshold, the voltage regulating module adopts the first mode; when the duty cycle of the secondary midpoint voltage VDC is higher than the duty cycle threshold, the voltage regulating module adopts the second mode.

10. The control method of the magnetic integrated topology circuit according to claim 1, characterized in that: The primary bidirectional active bridge module includes a first bridge arm and a second bridge arm, and the voltage between the midpoint A of the first bridge arm and the midpoint B of the second bridge arm is the primary midpoint voltage VAB; the secondary high-voltage bidirectional active bridge module includes a third bridge arm and a fourth bridge arm, and the voltage between the midpoint D of the fourth bridge arm and the midpoint C of the third bridge arm is the secondary midpoint voltage VDC; There is a phase difference Φ between the voltage waveforms of the primary midpoint voltage VAB and the secondary midpoint voltage VDC, and the phase difference Φ is adjusted to be positive or negative to control the flow direction and power of the current between the primary bidirectional active bridge module and the secondary high-voltage bidirectional active bridge module; The duty ratio of the primary midpoint voltage VAB and the secondary midpoint voltage VDC is adjusted to adjust the resonant current of the primary bidirectional active bridge module and the secondary high-voltage bidirectional active bridge module.

11. A vehicle-mounted charger, characterized in that: The on-board charger includes the magnetic integrated topology circuit, and the magnetic integrated topology circuit adopts the control method of the magnetic integrated topology circuit according to any one of claims 1 to 10.

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