Non-isolated half-bridge structure impedance source inverter

Abstract

The invention discloses an impedance source inverter with a non-isolated half-bridge structure. The impedance source inverter comprises a direct-current power supply, a high-gain Y-source impedance network, a half-bridge network, a signal conditioning circuit, an optocoupler isolation driving circuit and a load, the input end of the high-gain Y-source impedance network is connected with a direct-current power supply to realize a function of increasing the output voltage of the direct-current power supply; the input end of the half-bridge network is connected with the output end of the Y-source impedance network, so that the function of converting direct current output by the Y-source impedance network into alternating current is realized; the signal conditioning circuit generates a control signal and realizes driving control on the power MOSFET device through the optical coupling isolation driving circuit; a power electronic conversion technology based on a non-isolated half-bridge structure impedance source network is adopted, direct current of a direct-current power supply is converted into alternating current, the number of capacitor high-voltage stress devices and needed devices is reduced, better response and control capacity is achieved when high-frequency signals are processed, and especially in high-power application, the power electronic conversion device has a good application prospect. And the conversion efficiency can be obviously improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronic converter control, and particularly relates to a non-isolated half-bridge structure impedance source inverter. Background Art

[0002] With the wide application of renewable energy and the rapid development of power electronic technology, as a key energy conversion device, the inverter faces severe challenges in high-frequency, high-power, and applications sensitive to volume and cost. Traditional inverters usually have problems such as relatively complex circuit structures, large volumes, and low conversion efficiencies. Especially in application scenarios that require high performance and stability, they cannot meet the requirements of the system for high efficiency, compactness, and low cost. Specifically, traditional inverters generally have the following problems: First, due to the large stress on capacitors and power devices, the reliability and stability of the system are insufficient; second, due to the complex circuit structure and large volume, it is difficult to meet the requirements for miniaturization and light weight; finally, in dynamic load and high-frequency, high-power applications, the conversion efficiency and response speed of the inverter are insufficient, and stable output cannot be guaranteed. Therefore, it is necessary to design a non-isolated half-bridge structure impedance source inverter to solve the above problems. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a non-isolated half-bridge structure impedance source inverter, aiming to solve the problems of poor reliability and stability, complex circuit structure, large volume, poor adaptability, and insufficient response speed in high-intensity application scenarios of existing inverters. It has the characteristics of making full use of the advantages of the impedance source network and the half-bridge topology, optimizing the power conversion efficiency, reducing the system volume, and at the same time reducing the stress on capacitors and switching elements.

[0004] To solve the above technical problem, the technical solution adopted by the present invention is: A non-isolated half-bridge structure impedance source inverter includes a DC power supply, a high-gain Y-source impedance network, a half-bridge network, a signal conditioning circuit, an opto-isolated drive circuit, and a load; the input end of the high-gain Y-source impedance network is connected to the DC power supply, and the function of raising the output voltage of the DC power supply is realized through the high-gain Y-source impedance network; the input end of the half-bridge network is connected to the output end of the Y-source impedance network to realize the function of converting the direct current output by the Y-source impedance network into alternating current; the signal conditioning circuit generates a control signal and controls the switching of the power MOSFET devices in the half-bridge structure through the opto-isolated drive circuit to realize the drive control of the power MOSFET devices; the positive pole of the input end of the high-gain Y-source impedance network is connected to the positive pole of the output end of the DC power supply, and the negative pole of the input end of the high-gain Y-source impedance network is connected to the negative pole of the output end of the DC power supply.

[0005] Preferably, the high-gain Y-source impedance network includes an inductor L connected to the positive pole of the DC power supply and a fourth capacitor connected to the negative pole of the DC power supply. , the fourth capacitor is connected in parallel to the cathode of the second diode and the N3 terminal of the Y-type coupled inductor. ; The high-gain Y-source impedance network further includes a first diode and a third capacitor , the third capacitor is connected in parallel to the anode of the first diode and the N3 terminal of the Y-type coupled inductor. .

[0006] Preferably, the high-gain Y-source impedance network further includes the N1 terminal of the Y-type coupled inductor connected to the first diode , the first capacitor connected to the N2 terminal of the Y-type coupled inductor, the second capacitor connected to the first capacitor , the N2 terminal of the Y-type coupled inductor connected to the second capacitor , and the second diode connected to the N1 terminal of the Y-type coupled inductor . , and the second diode connected to the N1 terminal of the Y-type coupled inductor . Preferably, the half-bridge network of the high-gain Y-source impedance network includes a first power device connected to the N3 terminal of the Y-type coupled inductor .

[0007] Preferably, the half-bridge network of the high-gain Y-source impedance network includes a second power device connected to the N3 terminal of the Y-type coupled inductor . connected to the N3 terminal of the Y-type coupled inductor .

[0008] Preferably, the positive pole of the load connected to the half-bridge network is connected between the negative pole of the first capacitor and the positive pole of the second capacitor , and the negative pole of the load connected to the half-bridge network is connected between the first power device and the second power device .

[0009] Preferably, the signal conditioning circuit generates a control signal by using a carrier , a reference level and a step waveform .

[0010] Preferably, the signal conditioning circuit is connected to the opto-isolated drive circuit.

[0011] Preferably, the signal conditioning circuit includes a penetration signal , reference signal P1, comparator COMP1, comparator COMP2, carrier wave , logical OR module , logical OR module , logical NOT module , subtraction module SUM and step signal .

[0012] Preferably, the penetration signal in the signal conditioning circuit is connected to the a terminal of comparator COMP1 and the negative terminal of subtraction module SUM, reference signal P1 is connected to the positive terminal of subtraction module SUM, the output terminal of subtraction module SUM is connected to the b terminal of comparator COMP2, and the carrier wave is connected to the b terminal of comparator COMP1 and the terminal of comparator COMP2, and the step signal is connected to the negative electrode of the logical OR module and the input terminal of the logical NOT module , the output terminal of comparator COMP1 is connected to the positive electrode of the module , the output terminal of the logical NOT module is connected to the negative electrode of comparator COMP2, and the output terminal of the logical OR module is connected to the gate of power MOSFET SW1 in the half-bridge network to provide a switching control signal, and the output terminal of the logical OR module is connected to the gate of power MOSFET SW2 in the half-bridge network to provide a switching control signal.

[0013] Preferably, the non-isolated half-bridge structure impedance source inverter includes four different operating modes. The first and third operating modes are short-circuit crossing ST states, in which two switches are turned on simultaneously; the second and fourth operating modes are non-short-circuit crossing nST states, in which only or the switches are turned on separately; the circuit states of each operating mode are as follows: The first operating mode: , in this mode, both switches are closed, both diodes are in the off state, and there is a negative voltage across the diodes; the output voltage is zero in the symmetric ST state; the capacitor is in the discharging state, which causes the inductor to start charging; the switches bear the maximum current stress in this stage; The second operating mode: , switch is closed, switch is in the off state, and both diodes are in the on state; the voltage that switch S2 can block is twice the amplitude of the output voltage, which is the maximum voltage that this switch can withstand; The third operating mode: , the equivalent circuit of this mode is the same as that of the first operating mode; The fourth operating mode: ), this mode is similar to the second operating mode, and the fourth operating mode is in the nST state, where is in the on state, is in the off state; in this mode, both diodes are in the on state, and the inductor and capacitor are in the discharging and charging states respectively.

[0014] The beneficial effects of the present invention are as follows: 1. The non-isolated half-bridge structure impedance source inverter in the present invention can more effectively control the switching state of the inverter, resulting in lower losses during the energy conversion process, enabling higher conversion efficiency, reducing the number of capacitor high-voltage stress devices and required devices, and effectively reducing the volume of the device.

[0015] 2. The present invention makes full use of the advantages of the impedance source network and the half-bridge topology, optimizes the power conversion efficiency, reduces the system volume, and at the same time reduces the stress on the capacitor and the switching element. Compared with the traditional inverter, the non-isolated half-bridge structure impedance source inverter significantly improves the conversion efficiency of the DC power supply without additional transformers and complex control systems by adopting a high-gain network design, and reduces the volume and cost by simplifying the circuit structure. In addition, the design of the present invention reduces the burden on the high-voltage capacitor and the power switching element by optimizing the impedance matching, improving the reliability and stability of the system. Description of the Drawings

[0016] Figure 1 is the structural diagram of the present invention; Figure 2 is the circuit diagram of the present invention; Figure 3 is the circuit diagram of the half-bridge network and the load of the present invention; Figure 4 is the signal conditioning circuit diagram of the present invention; Figure 5 is the equivalent circuit diagram of the present invention; Figure 6 is the comparison diagram of the efficiency of the present invention with the existing scheme; Figure 7 is the steady-state output voltage waveform diagram of the present invention. Detailed Embodiments

[0017] Embodiment 1: As Figure 1As shown in the figure, a non-isolated half-bridge structure impedance source inverter includes a DC power supply, a high-gain Y-source impedance network, a half-bridge network, a signal conditioning circuit, an opto-isolated drive circuit, and a load. The input end of the high-gain Y-source impedance network is connected to the DC power supply, and the function of raising the output voltage of the DC power supply is realized through the high-gain Y-source impedance network. The input end of the half-bridge network is connected to the output end of the Y-source impedance network to realize the function of converting the direct current output by the Y-source impedance network into alternating current. The signal conditioning circuit generates a control signal and controls the switching of the power MOSFET device in the half-bridge structure through the opto-isolated drive circuit to realize the drive control of the power MOSFET device. The positive pole of the input end of the high-gain Y-source impedance network is connected to the positive pole of the output end of the DC power supply, and the negative pole of the input end of the high-gain Y-source impedance network is connected to the negative pole of the output end of the DC power supply.

[0018] Preferably, the high-gain Y-source impedance network includes an inductor L connected to the positive pole of the DC power supply and a fourth capacitor connected to the negative pole of the DC power supply , the fourth capacitor is connected in parallel between the cathode of the second diode and the N3 terminal of the Y-type coupled inductor ; the high-gain Y-source impedance network further includes a first diode connected to the inductor L and a third capacitor , the third capacitor is connected in parallel between the anode of the first diode and the N3 terminal of the Y-type coupled inductor .

[0019] Preferably, the high-gain Y-source impedance network further includes the N1 terminal of the Y-type coupled inductor connected to the first diode , the first capacitor connected to the N2 terminal of the Y-type coupled inductor , the second capacitor connected to the first capacitor , the N2 terminal of the Y-type coupled inductor connected to the second capacitor and the second diode connected to the N1 terminal of the Y-type coupled inductor .

[0020] Preferably, in the half-bridge network of the high-gain Y-source impedance network, it includes a first power device connected to the N3 terminal of the Y-type coupled inductor and a second power device connected to the N3 terminal of the Y-type coupled inductor .

[0021] Preferably, the positive pole of the load connected to the half-bridge network is connected to the first capacitor the negative electrode and the second capacitor between the positive electrode of, the load connected by the half-bridge network the negative electrode of is connected to the first power device and the second power device therebetween.

[0022] Preferably, the signal conditioning circuit generates a control signal by using a carrier wave , a reference level and a step waveform .

[0023] Preferably, the signal conditioning circuit is connected to an opto-isolated drive circuit.

[0024] Preferably, the signal conditioning circuit includes a penetration signal , a reference signal P1, a comparator COMP1, a comparator COMP2, a carrier wave , a logic OR module , a logic OR module , a logic NOT module , a subtraction module SUM and a step signal .

[0025] Preferably, in the signal conditioning circuit, the penetration signal is connected to the a terminal of the comparator COMP1 and the negative terminal of the subtraction module SUM, the reference signal P1 is connected to the positive terminal of the subtraction module SUM, the output terminal of the subtraction module SUM is connected to the b terminal of the comparator COMP2, the carrier wave is connected to the b terminal of the comparator COMP1 and the terminal of the comparator COMP2, the step signal is connected to the negative electrode of the logic OR module and the input terminal of the logic NOT module , the output terminal of the comparator COMP1 is connected to the positive electrode of the module , the output terminal of the logic NOT module is connected to the negative electrode of the comparator COMP2, the output terminal of the logic OR module is connected to the gate of the power MOSFET SW1 in the half-bridge network to provide a switching control signal, and the output terminal of the logic OR module is connected to the gate of the power MOSFET SW2 in the half-bridge network to provide a switching control signal.

[0026] Preferably, the non-isolated half-bridge structure impedance source inverter includes four different operating modes. The first and third operating modes are short-circuit crossing ST states, in which two switches are turned on simultaneously; the second and fourth operating modes are non-short-circuit crossing nST states, in which only or the switches are turned on separately; the circuit states of each operating mode are as follows: The first operation mode: In this mode, both switches are closed, both diodes are in the off state, and there is a negative voltage on the diodes; the output voltage is zero in the symmetrical ST state; the capacitor is in a discharged state, causing the inductor to start charging; in this stage, the switch is subject to the maximum current stress; Second operating mode: ,switch Close, switch In the disconnected state, both diodes are in the on state; the voltage that switch S2 can block is twice the output voltage amplitude, which is the maximum voltage that the switch can withstand; The third operation mode: , the equivalent circuit of this mode is the same as that of the first operation mode; Fourth operating mode: ), which is similar to the second operating mode. The fourth operating mode is in the nST state, where In the on state, In the off state; in this mode, both diodes are in the on state, and the inductor and capacitor are in the discharging and charging states respectively.

[0027] Embodiment 2: A non-isolated half-bridge structure impedance source inverter, comprising the following contents: A non-isolated half-bridge structure impedance source inverter comprises a direct current power supply, a high-gain Y source impedance network, a half-bridge network, a signal conditioning circuit, an optocoupler isolation drive circuit, and a load.

[0028] like Figure 2 As shown in the system circuit diagram, the input end of the high-gain Y source impedance network is connected to the DC power supply, and the function of increasing the output voltage of the DC power supply is realized through the high-gain Y source impedance network; the input end of the half-bridge network is connected to the output end of the Y source impedance network, and the function of converting the DC power output by the Y source impedance network into AC power is realized; the signal conditioning circuit is connected to the signal conditioning circuit by using (Carrier), (reference level) and (Step waveform) generates a control signal and controls the switching of the power MOSFET device in the half-bridge structure through an optocoupler isolation drive circuit to achieve drive control of the power MOSFET device.

[0029] The positive electrode of the input terminal of the high-gain Y source impedance network is connected to the positive electrode of the output terminal of the DC power supply, and the negative electrode of the input terminal of the high-gain Y source impedance network is connected to the negative electrode of the output terminal of the DC power supply.

[0030] The described high-gain Y-source impedance network includes an inductor L connected to the positive pole of the DC power supply and a fourth capacitor connected to the negative pole of the DC power supply (connected in parallel to the cathode of the second diode and the N3 terminal of the Y-type coupled inductor ), a first diode connected to the inductor L and a third capacitor (connected in parallel to the anode of the first diode and the N3 terminal of the Y-type coupled inductor ), the N1 terminal of the Y-type coupled inductor connected to the first diode , the first capacitor connected to the N2 terminal of the Y-type coupled inductor , the second capacitor connected to the first capacitor , the N2 terminal of the Y-type coupled inductor connected to the second capacitor , the second diode connected to the N1 terminal of the Y-type coupled inductor . . . . .

[0031] As Figure 3 shown, the half-bridge network of the high-gain Y-source impedance network includes a first power device connected to the N3 terminal of the Y-type coupled inductor , and a second power device connected to the N3 terminal of the Y-type coupled inductor .

[0032] As Figure 3 shown, the positive pole of the load connected to the half-bridge network is connected between the negative pole of the first capacitor and the positive pole of the second capacitor , and the negative pole of the load connected to the half-bridge network is connected between the first power device and the second power device .

[0033] As Figure 4 shown, the signal conditioning circuit generates a control signal by using (carrier), (reference level) and (step waveform).

[0034] The signal conditioning circuit is connected to the optocoupler isolation drive circuit

[0035] The opto - isolator drive circuit is used to drive the switch of the power MOSFET device in the drive circuit control half - bridge structure, realizing the drive control of the power MOSFET device.

[0036] As Figure 4 shown, the signal conditioning circuit includes a penetration signal , a reference signal P1, a comparator COMP1, a comparator COMP2, a carrier , a logic - OR module , a logic - OR module , a logic - NOT module , a subtraction module SUM, and a step signal .

[0037] In the signal conditioning circuit, the penetration signal is connected to the a - terminal of the comparator COMP1 and the negative terminal of the subtraction module SUM. The reference signal P1 is connected to the positive terminal of the subtraction module SUM. The output terminal of the subtraction module SUM is connected to the b - terminal of the comparator COMP2. The carrier is connected to the b - terminal of the comparator COMP1 and the c - terminal of the comparator COMP2. The step signal is connected to the negative electrode of the logic - OR module and the input terminal of the logic - NOT module . The output terminal of the comparator COMP1 is connected to the positive electrode of the module . The output terminal of the logic - NOT module is connected to the negative electrode of the comparator COMP2. The output terminal of the logic - OR module is connected to the gate of the power MOSFET SW1 in the half - bridge network, providing a switching control signal. The output terminal of the logic - OR module is connected to the gate of the power MOSFET SW2 in the half - bridge network, providing a switching control signal.

[0038] As Figure 5 shown, it can be obtained that there are four different operating modes within one switching period. The first and third operating modes are short - circuit traversal (ST) states, in which both switches are turned on simultaneously. In addition, the second and fourth operating modes are non - short - circuit traversal (nST) states, in which only or switches are turned on respectively. Each operating mode can be analyzed as follows: The first operating mode ( ): In this mode, both switches are closed (ON), as Figure 3As shown, it can be considered that both diodes are in the off state (OFF), and this assumption holds if there is a negative voltage across the diodes. Additionally, due to the occurrence of a symmetric ST state, the output voltage will be zero. In this mode, the capacitor is in a discharging state, which causes the inductor to start charging. Moreover, at this stage, the switch bears the maximum current stress.

[0039] The second operating mode ( ): According to Figure 3 , switch is closed (ON), while switch is in the open state (OFF). Additionally, it is assumed that in this operating mode, both diodes are in the conducting state (ON). This assumption can be verified by the current passing through these diodes. The voltage that switch S2 can block is twice the amplitude of the output voltage, which is the maximum voltage that this switch can withstand.

[0040] The third operating mode ( ): Since the equivalent circuits of the first and third operating modes are the same.

[0041] The fourth operating mode ( ): Similar to the second operating mode, the fourth operating mode is in the nST state, where is in the conducting state and is in the off state. Similar to the second operating mode, it is assumed that both diodes are in the conducting state, and their currents will be used to verify this assumption. In this operating mode, the inductor and capacitor are in the discharging and charging states respectively.

[0042] When the DC voltage source voltage is 5V DC, in the Y-source impedance network, the inductance L is 2.6mH, the capacitances of C1 and C2 are 100μF, the capacitance values of C3 and C4 are 33μF, the load resistance R is 100Ω, the switching frequency is 100kHz, and the coupled inductor is designed in the ratio of N1:N2:N3 = 2:1:2. The steady-state output of the system is as Figure 7 shown. As can be seen from Figure 7 , under steady state, the output voltage stabilizes at approximately 40V AC, indicating that the proposed system can effectively convert the DC electrical energy with a relatively low amplitude from the DC power supply into stable AC electricity with a high voltage ratio.

[0043] As Figure 6As shown in FIG. 1 , the efficiency of the non-isolated half-bridge impedance source inverter in the present invention is compared with the non-isolated scheme of the same type using a half-bridge structure for boosting in other existing documents, wherein document 1 is X. Zhu, B. Zhang and D. Qiu, “A new half-bridge impedance source inverter with high voltage gain,” IEEE Trans. Power Electron. , vol. 34, no. 4, pp. 3001-3008, April 2019. Document 2 is M.Aalami, E. Babaei, SG Zadeh, ES Asl, “A new type of half-bridge trans-Z - source inverter with continuous input current,” Iran J. Sci. Technol. Trans. Electr. Eng. , vol. 46, pp. 461- 479, March 2022; Figure 6 It can be seen that the efficiency of the non-isolated half-bridge impedance inverter of the present invention is better than that of the technologies in Document 1 and Document 2.

Claims

1. A non-isolated half-bridge impedance source inverter, characterized in that: The invention comprises a direct current power supply, a high-gain Y source impedance network, a half-bridge network, a signal conditioning circuit, an optocoupler isolation driving circuit and a load; the input end of the high-gain Y source impedance network is connected to the direct current power supply, the input end of the half-bridge network is connected to the output end of the Y source impedance network, the signal conditioning circuit generates a control signal, and controls the switch of a power MOSFET device in a half-bridge structure through the optocoupler isolation driving circuit to realize driving control of the power MOSFET device; the positive electrode of the input end of the high-gain Y source impedance network is connected to the positive electrode of the output end of the direct current power supply, and the negative electrode of the input end of the high-gain Y source impedance network is connected to the negative electrode of the output end of the direct current power supply.

2. The non-isolated half-bridge impedance source inverter according to claim 1, characterized in that: The high-gain Y source impedance network includes an inductor L connected to the positive electrode of the DC power supply and a fourth capacitor connected to the negative electrode of the DC power supply. , the fourth capacitor Connect a second diode in parallel Cathode and Y-type coupled inductor N3 terminal The high gain Y source impedance network also includes a first diode connected to the inductor L and the third capacitor , the third capacitor Connect the first diode in parallel Anode and Y-type coupled inductor N3 terminal .

3. The non-isolated half-bridge impedance source inverter according to claim 2, characterized in that: The high gain Y source impedance network also includes a first diode Connect the Y-type coupled inductor N1 terminal , and the Y-type coupled inductor N2 end The first capacitor connected to the Connect the second capacitor , and the second capacitor Connect the Y-type coupled inductor N2 to the and the Y-type coupling inductor N1 terminal Connect the second diode .

4. The non-isolated half-bridge impedance source inverter according to claim 3, characterized in that: The high gain Y source impedance network half-bridge network includes the N3 terminal of the Y-type coupled inductor First power device connected and the N3 terminal of the Y-type coupled inductor The second power device connected .

5. The non-isolated half-bridge impedance source inverter according to claim 4, characterized in that: The half-bridge network is connected to the positive electrode of the load connected to the first capacitor The negative electrode and the second capacitor The half-bridge network connects the load The negative terminal is connected to the first power device and the second power device between.

6. The non-isolated half-bridge impedance source inverter according to claim 1, characterized in that: The signal conditioning circuit uses a carrier , Reference Level and step waveform Generate a control signal.

7. The non-isolated half-bridge impedance source inverter according to claim 6, characterized in that: The signal conditioning circuit is connected to the optocoupler isolation driving circuit.

8. The non-isolated half-bridge impedance source inverter according to claim 6, characterized in that: The signal conditioning circuit includes a through signal , reference signal P1, comparator COMP1, comparator COMP2, carrier , logic or module , logic or module , Logical NOT module , subtraction module SUM and step signal .

9. The non-isolated half-bridge impedance source inverter according to claim 8, characterized in that: The signal conditioning circuit penetrates the signal The reference signal P1 is connected to the positive terminal of the subtraction module SUM, and the output terminal of the subtraction module SUM is connected to the b terminal of the comparator COMP2. Connected to the b terminal of comparator COMP1 and the end of comparator COMP2, the step signal AND logic OR module The negative pole and logical NOT module The input terminal of the comparator COMP1 is connected to the output terminal of the module The positive connection of the logic NOT module The output of the comparator COMP2 is connected to the negative terminal of the logic OR module. The output terminal is connected to the gate of the power MOSFET SW1 in the half-bridge network to provide the switch control signal, logic or module The output terminal is connected to the gate of the power MOSFET SW2 in the half-bridge network to provide a switch control signal.

10. A method for a non-isolated half-bridge impedance source inverter according to any one of claims 1 to 9, characterized in that: There are four different operation modes. The first and third operation modes are short-circuit ride-through ST state, in which both switches are turned on at the same time; the second and fourth operation modes are non-short-circuit ride-through nST state, in which only or The switches are turned on respectively; the circuit status of each operation mode is as follows: The first operation mode: In this mode, both switches are closed, both diodes are off, and there is a negative voltage on the diodes; the output voltage is zero in the symmetrical ST state; the capacitor is in a discharged state, causing the inductor to start charging; in this stage, the switch is subject to the maximum current stress; Second operating mode: ,switch Close, switch In the off state, both diodes are in the on state; The voltage that switch S2 can block is twice the output voltage amplitude, which is the maximum voltage that the switch can withstand; The third operation mode: , the equivalent circuit of this mode is the same as that of the first operation mode; Fourth operating mode: ), which is similar to the second operating mode. The fourth operating mode is in the nST state, where In the on state, In the off state; in this mode, both diodes are in the on state, and the inductor and capacitor are in the discharging and charging states respectively.

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