Pulse width modulation generation strategy

Abstract

The invention relates to a pulse width modulation (PWM) generation method for a converter of an electric machine (1) of an electric or hybrid vehicle, the converter operating with a phase shift having a duty cycle dependent on the phase shift, the converter (16) providing a voltage (20) to a transformer (6) of the electric machine (1), the pulse width modulation generation method comprising operating the converter (16) with a duty cycle change requirement, a subdivision period (22) is defined between two requirements for duty cycle changes, characterized in that half of the duty cycle is applied at the beginning of the subdivision period (22) and half of the duty cycle is applied at the end of the subdivision period (22).

Description

Technical Field

[0001] The present invention relates to the fields of electronics and electrical engineering, and more particularly to the field of electric motors. Background Art

[0002] Electric motors can be used in electric and hybrid vehicles to provide torque to the vehicle's wheels. For example, the motor can be an electrically excited synchronous motor or an EESM. The EESM is an alternative to the permanent magnet synchronous motor because the latter requires the use of rare earth materials.

[0003] In an EESM, energy must be transferred from a non-rotating component, i.e., the stator of the motor, to a rotating component, i.e., the rotor. This power transfer can be conductive or inductive, but nowadays inductive power transfer seems to be preferred because it causes no mechanical losses and requires no maintenance.

[0004] In an inductively excited synchronous motor or iEESM, the stator and rotor are associated with a converter, a transformer, and a rectifier. The converter supplies voltage to the transformer, and the rectifier is connected between the transformer and the rotor to supply the desired positive voltage to the rotor winding.

[0005] To perform dynamic and efficient torque control of an iEESM, it is necessary to change the rotor current according to the required torque and further boundary conditions (e.g., DC voltage, current limit, motor speed). The torque requirement usually follows the driver's requirement for the vehicle's accelerator pedal / or brake pedal. Therefore, the torque requirement varies over time, and it is necessary to quickly change the torque of the motor. Therefore, the voltage supplied to the rotor winding of the iEESM must also change quickly, which is why it is very important to operate the converter correctly.

[0006] There are various pulse width modulation (PWM) generation strategies for operating the converter in the prior art. For example, it is known to generate voltage pulses such that they are centered within the PWM half-cycle. However, this produces a DC offset under dynamic operating conditions (i.e., when the duty cycle of the converter changes), and thus causes transformer saturation under dynamic conditions. This saturation is due to the transformer current not being kept within certain limits, e.g., due to flux imbalance, which results in less energy being transferred from the primary side of the transformer to the secondary side.

[0007] Other PWM generation strategies may correct the saturation problem but result in a duty cycle error under dynamic conditions. This duty cycle error causes an undesirable limitation on the output voltage of the transformer. This will lead to a reduced dynamic response in the current control loop, which must be avoided due to the strict requirements for transient torque response characteristics. Summary of the Invention

[0008] The present invention provides a PWM generation strategy to adapt to this situation. In this strategy, the saturation problem is corrected and duty cycle errors are avoided by aligning half of the given duty cycle of the converter with the start of a given time period and the other half of the duty cycle with the end of the said time period.

[0009] In this case, the present invention relates to a method for generating pulse width modulation (PWM) of a converter for an electric or hybrid vehicle motor, the converter operating with a phase shift associated with a duty cycle, the converter supplying voltage to a transformer of the motor, the method for generating pulse width modulation comprising operating the converter with a requirement for a change in duty cycle, defining a subdivision period between two requirements for a change in duty cycle, characterized in that half of the duty cycle is applied at the start of the said subdivision period and half of the duty cycle is applied at the end of the said subdivision period.

[0010] The pulse width modulation or PWM generation strategy according to the present invention is used to operate a DC / AC converter, which is integrated in the motor here. More precisely, such a motor is an inductively electrically excited synchronous motor or iEESM. In addition to the converter, it also includes various other components, including a transformer and a rectifier.

[0011] The converter is a phase shift full bridge converter (PSFBC), operating by a PWM generation method with a phase shift associated with the duty cycle. The converter provides a bipolar rectangular voltage applied to the transformer, more precisely, to the primary side of the transformer. The secondary side of the transformer includes a rectifier, which needs to supply a desired positive voltage to the rotor winding. The primary side of the transformer is on the non-rotating part of the motor, while the secondary side of the transformer is on the rotating part of the motor.

[0012] The PWM generation method includes operating the converter with a requirement for a change in duty cycle. The change in duty cycle is a duty cycle update. The duty cycle requirement changes with time. Two consecutive requirements for a change in duty cycle define a subdivision period. In this subdivision period, half of the duty cycle is applied at the start and the other half at the end. Thus, the duty cycle is aligned with the start and end of a given subdivision period.

[0013] With this PWM generation method, flux balance is achieved under both steady-state and dynamic operating conditions, thus avoiding saturation in the transformer.

[0014] Furthermore, since the duty cycle starts simultaneously with the subdivision period, no duty cycle error is generated; in other words, the duty cycle and the subdivision period are coordinated, and the required duty cycle matches the actual duty cycle under dynamic operating conditions without any correction or special treatment for PWM generation.

[0015] According to an optional feature of the present invention, the subdivision period corresponds to a multiple of a PWM half - period.

[0016] As an example, the subdivision period can be equal to a PWM half - period. In other words, the PWM half - period corresponds to the interval between the first duty - cycle change requirement and the second duty - cycle change requirement. Of course, other integer multiples of a PWM half - period can also be used to define the subdivision period.

[0017] According to an optional feature of the present invention, the converter generates at least one positive voltage pulse and at least one negative voltage pulse over a given subdivision period.

[0018] This allows for the redistribution of the converter's magnetic flux over a given subdivision period.

[0019] According to an optional feature of the present invention, over a PWM half - period, the magnetic flux of the positive voltage pulse is equal to the magnetic flux of the negative voltage pulse.

[0020] As an example, within a given PWM half - period, there are as many positive voltage pulses as negative voltage pulses. Over a PWM period, the additional value of the positive voltage pulses and the additional value of the negative voltage pulses cancel each other out. Thus, the magnetic flux of the converter is balanced.

[0021] According to an optional feature of the present invention, when the subdivision period corresponds to a PWM half - period, over a given PWM half - period, a positive pulse corresponding to half of the duty - cycle is generated at the start of the PWM half - period, and a negative pulse corresponding to half of the duty - cycle is generated at the end of the PWM half - period.

[0022] In this case, the positive pulse corresponds to a left - aligned pulse within the given PWM half - period, and the negative pulse corresponds to a right - aligned pulse.

[0023] According to an optional feature of the present invention, when the subdivision period corresponds to a PWM half - period, over a given PWM half - period, a negative pulse corresponding to half of the duty - cycle is generated at the start of the PWM half - period, and a positive pulse corresponding to half of the duty - cycle is generated at the end of the PWM half - period.

[0024] In this case, the negative pulse corresponds to a left - aligned pulse within the given PWM half - period, and the positive pulse corresponds to a right - aligned pulse.

[0025] According to an optional feature of the present invention, when the subdivision period corresponds to a PWM period, over a given PWM period, a first negative pulse corresponding to half of the duty - cycle is generated at the start of the PWM period, a positive pulse corresponding to the duty - cycle is generated in the middle of the PWM period, and a second negative pulse corresponding to half of the duty - cycle is generated at the end of the PWM period.

[0026] Thus, the first negative pulse corresponds to a left-aligned pulse within a given PWM period, while the second negative pulse corresponds to a right-aligned pulse. When added together, the duty cycles corresponding to the first and second negative pulses are equal to the duty cycle corresponding to the positive pulse.

[0027] According to an alternative feature of the invention, when the subdivision period corresponds to one PWM period, on a given PWM period, a first positive pulse corresponding to half of the duty cycle is generated at the start of the PWM period, a negative pulse corresponding to the duty cycle is generated in the middle of the PWM period, and a second positive pulse corresponding to half of the duty cycle is generated at the end of the PWM period.

[0028] In this alternative, the first and second positive pulses correspond respectively to a left-aligned pulse and a right-aligned pulse within a given PWM period. The combination of the duty cycle corresponding to the first positive pulse and the duty cycle corresponding to the second positive pulse is equal to the duty cycle corresponding to the negative pulse.

[0029] According to an alternative feature of the invention, the voltage pulse starts when the primary transformer current of the transformer is equal to zero.

[0030] This is the result of the transformer flux being balanced, which itself is the result of the positive and negative voltage pulses being balanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Other features, details, and advantages of the invention will become more apparent by reading the following description on the one hand and referring to the multiple embodiments given by way of illustration and not limitation in the attached schematic diagrams, in which:

[0032] Figure 1 is a schematic diagram of an electric or hybrid vehicle motor, which includes a rotor, a stator, and a transmitter including a rectifier and a transformer;

[0033] Figure 2 is Figure 1 another schematic diagram of a part of the motor, further including a converter;

[0034] Figure 3 is a schematic diagram of the output voltage control of the converter;

[0035] Figure 4 is a schematic diagram of a first embodiment of the PWM generation method according to the invention;

[0036] Figure 5 is a schematic diagram of the corresponding waveform from the first embodiment;

[0037] Figure 6 is a schematic diagram of a second embodiment of the PWM generation method according to the invention. DETAILED DESCRIPTION

[0038] The features, variants, and different embodiments of the present invention can be related to each other in various combinations, provided that they are not incompatible or mutually exclusive. In particular, it is envisaged that a variant of the present invention includes only a selected set of the features described subsequently, which selected set of features does not include other features, if the selected set of features is sufficient to confer a technical advantage and / or to distinguish the present invention from the prior art.

[0039] In all the figures, the same numerals refer to the same elements.

[0040] Figure 1 and Figure 2 is a schematic view of the electric machine 1 or a part of said electric machine 1. The electric machine 1 is intended to be installed in a vehicle, such as an electric or hybrid vehicle, in which the electric machine 1 can be used to provide torque to the vehicle's wheels. Here, the electric machine 1 is an inductively excited synchronous machine, also known by its acronym iEESM.

[0041] As Figure 1 shown, the electric machine 1 includes a rotor 2 and a stator 4. In this example, the stator 4 is positioned around the rotor 2, but in other embodiments, the rotor 2 can be positioned around the stator 4. In an inductively excited synchronous machine such as the electric machine 1, a transformer 6 is used to transfer electrical power to a winding mounted on the rotor 2. The transformer 6 is more precisely a rotating high-frequency transformer. The transformer 6 includes a primary side 8 and a secondary side 10, the difference between these two sides 8, 10 being that the primary side 8 is on the non-rotating part of the electric machine 1, i.e., on the stator, while the secondary side 10 is on the rotating part of said electric machine 1, i.e., on the rotor. In Figure 1 it, the gap between the non-rotating part and the rotating part is shown by a dashed line.

[0042] A rectifier 12 is associated with the transformer 6. The rectifier 12 is a rotating rectifier and is thus positioned on the secondary side 10 of the transformer 6, i.e., on the rotating part of the electric machine 1. The function of the rectifier 12 is to supply only a positive voltage to the rotor 2. The rectifier 12 is implemented together with the transformer 6 in a transmitter 14, here an inductive transmitter.

[0043] As Figure 2 shown, a converter 16 is connected to the primary side 8 of the transformer 6. The converter 16 is a phase-shifted full-bridge converter or PSFBC. It operates at a variable pulse-width modulation frequency, or PWM frequency. Depending on the design of the converter 16 and / or the transformer 6 and / or the current required in the rotor 2, the PWM frequency of the converter 16 can actually vary over a wide range, for example from 5 kHz to 100 kHz.

[0044] Converter 16 is controlled by the electronic control unit of the electric machine, such as a microcontroller, a field-programmable gate array (FPGA), or a digital signal processor (DSP), to convert the direct current from the vehicle battery into an alternating current in order to provide an appropriate voltage to the primary side 8 of the transformer 6. Converter 16 may also include an input capacitor 17. As shown here, converter 16 includes four transistors 18, having two top transistors 18A and two bottom transistors 18B. Each top transistor 18A is associated with a bottom transistor 18B, and they are controlled in reverse. To avoid short circuits, especially short circuits of the input capacitor 17, an additional interlock time is introduced in the electric machine 1. Compared with the turn-off instruction of the top transistor 18A or the bottom transistor 18B of a half-bridge, this additional interlock time causes a delay in the switching instruction of the top transistor 18A or the bottom transistor 18B of a half-bridge.

[0045] Converter 16 operates according to the PWM generation method or PWM generation strategy according to the present invention in order to implement dynamic and efficient torque control of the electric machine 1. To this end, converter 16 operates by phase shift, each phase shift being between 0° and 180°. In addition, the duty cycle is associated with each phase shift of converter 16, and such duty cycle includes a range from 0 to 1.

[0046] Figure 3 The relationship between the phase shifts, the duty cycles associated with these phase shifts, and the voltage pulses applied in relation to these duty cycles is shown. To this end, Figure 3 Five consecutive PWM cycles are shown, wherein the phase shift is modified as each PWM cycle changes. During the first PWM cycle T PWM 1, the 180° phase shift between the first top transistor 18A and the second top transistor 18A corresponds to a duty cycle of 1, and the application duration of the voltage pulse corresponds to the entire duration of this first PWM cycle T PWM 1. During the second PWM cycle T PWM 2, the 135° phase shift between the first top transistor 18A and the second top transistor 18A corresponds to a duty cycle of 0.75. During the third PWM cycle T PWM 3, the 90° phase shift between the first top transistor 18A and the second top transistor 18A corresponds to a duty cycle of 0.5, and the application duration of the voltage pulse corresponds to half of the duration of this third PWM cycle T PWM 3. During the fourth PWM cycle T PWM 4, the 45° phase shift between the first top transistor 18A and the second top transistor 18A corresponds to a duty cycle of 0.25. During the fifth PWM cycle T PWMDuring the 5 period, a 0° phase shift between the first top transistor 18A and the second top transistor 18A corresponds to a duty cycle of 0 and no voltage pulse is applied.

[0047] Converter 16 generates a voltage waveform 20, and such a waveform 20 is visible at Figure 3 , Figure 4 and Figure 6 . The voltage waveform 20 can be divided into multiple PWM cycles. Generally speaking, for a duty cycle equal to 1, a positive voltage or a negative voltage is continuously applied during all given PWM cycles, there is no zero voltage value, and the application time of each positive voltage or negative voltage is half of the PWM cycle. For a duty cycle equal to 0, for example, a positive voltage and a negative voltage are applied for a shorter duration during a given PWM cycle, the voltage value between the positive voltage and the negative voltage is zero, and the application time of each positive voltage or negative voltage is half of that for a duty cycle equal to 1.

[0048] To change the duty cycle, converter 16 operates in accordance with the duty cycle change requirement. Such a duty cycle change requirement is indicated by the white arrows in Figure 4 and Figure 6 , Figure 4 and Figure 6 representing the first embodiment and the second embodiment respectively. In these two figures, the upper part represents the required duty cycle, and the lower part represents the voltage pulses implemented according to the PWM generation method of the present invention to obtain the said duty cycle.

[0049] Two consecutive duty cycle change requirements define a subdivision period 22. This subdivision period 22 corresponds to the PWM cycle in the first embodiment of Figure 4 , while it corresponds to the PWM half-cycle in the second embodiment of Figure 6 . In other words, in the first embodiment, the duty cycle change requirement occurs at each PWM cycle, while in the second embodiment, it occurs at each PWM half-cycle. More generally, the subdivision period 22 can correspond to any integer multiple of a PWM half-cycle, which means that the duty cycle change requirement can occur once at each multiple of a PWM half-cycle. Preferably, the subdivision period 22 corresponds to the control period. Such a control period is defined by the time period for obtaining a specific voltage. Therefore, the control period can be equal to the PWM cycle according to the first embodiment or equal to the PWM half-cycle according to the second embodiment. The duty cycle change requirement thus occurs between two consecutive control periods.

[0050] According to the present invention, the PWM generation method is such that half of the duty cycle is applied at the start of a given subdivision period 22 and half of the duty cycle is applied at the end of the said subdivision period 22.

[0051] In two embodiments, it should be noted that the converter 16 generates at least one positive voltage pulse 24 and at least one negative voltage pulse 26 for each subdivision period 22. More specifically, in the first embodiment, for each subdivision period 22 corresponding to one PWM period, the converter 16 generates one positive voltage pulse 24 and two negative voltage pulses 26. On the other hand, in the second embodiment, for each subdivision period 22 corresponding to one PWM half-period, the converter 16 generates exactly one positive voltage pulse 24 and one negative voltage pulse 26.

[0052] As previously mentioned, in Figure 4 the first embodiment, that is, for the subdivision period 22 equal to one PWM period, the requirement for duty cycle change occurs in each such PWM period. For the duty cycle of 0.25 required at the first time t0.5, half of the duty cycle, that is, 0.125, is achieved at the start of the PWM period at the first time t0.5; the other half of the duty cycle, also 0.125, is achieved at the end of the PWM period at the second time t1.5. Similarly, for the duty cycle of 0.5 required at the second time t1.5, half of the duty cycle, that is, 0.25, is achieved at the start of the PWM period at the second time t1.5; the other half of the duty cycle, that is, 0.25, is achieved at the end of the PWM period at the third time t2.5.

[0053] In addition, in the first embodiment, since the subdivision period 22 is one PWM period, there is an additional pulse in the middle of the PWM period in order to provide an appropriate voltage during the PWM period to obtain the required duty cycle. As Figure 4 shown, for each PWM period, there is a first pulse 26A, here a negative pulse 26A, corresponding to half of the duty cycle generated at the start of the PWM period, then an additional pulse 24 of the opposite sign, here a positive pulse 24, corresponding to the duty cycle generated in the middle of the PWM period, and a second pulse 26B, here a second negative pulse 26B, corresponding to half of the duty cycle generated at the end of the PWM period. Thus, after the first duty cycle change requirement in the first embodiment, the first negative pulse 26A corresponding to a 0.125 duty cycle starts at the first time t0.5, generates a positive pulse 24 corresponding to a 0.25 duty cycle such that it is centered at the fourth time t1, and generates a second negative pulse 26B corresponding to a 0.125 duty cycle such that it ends at the second time t1.5.

[0054] By considering two consecutive subdivision periods 22, where the first subdivision period 22 is related to a duty cycle requirement of 0.25 and the second subdivision period 22 is related to a duty cycle requirement of 0.5, it follows from the strategy of the present invention that a first pulse, here a negative pulse 26A, corresponding to a duty cycle of 0.125, is generated at the start of the first subdivision period 22; then a second pulse, here a positive pulse 24, corresponding to a duty cycle of 0.25, is generated in the middle of the first subdivision period 22; then a third pulse, here another negative pulse 26B, is generated, the third pulse corresponding to a duty cycle of 0.325, which corresponds to a duty cycle of 0.125 at the end of the first subdivision period 22 and a duty cycle of 0.25 at the start of the second subdivision period 22.

[0055] Although not shown here, there may be a variant of the first embodiment of the present invention, where a first positive pulse 24A corresponding to half of the duty cycle is generated at the start of the subdivision period 22, a negative pulse 26 corresponding to the duty cycle is generated in the middle of the subdivision period 22, and a second positive pulse 24B corresponding to half of the duty cycle is generated at the end of the subdivision period 22.

[0056] In Figure 6 the second embodiment, i.e., for a subdivision period 22 equal to one PWM half - period, the requirement for duty - cycle change occurs in each such PWM half - period; in other words, it occurs twice as many times as in the first embodiment. As Figure 6 shown, for a duty cycle of 0.25 required at a first time t0.5, half of the duty cycle, i.e., 0.125, is achieved at the start of the PWM half - period at the first time t0.5, and the other half of the duty cycle, also 0.125, is achieved at the end of the PWM half - period at a fourth time t1. Similarly, for a subsequent duty cycle of 0.5 required at the fourth time t1, half of the duty cycle, i.e., 0.25, is achieved at the start of the PWM half - period at the fourth time t1, and the other half of the duty cycle, also 0.25, is achieved at the end of the PWM half - period at a second time t1.5.

[0057] As Figure 6 shown, for a subdivision period 22 of one PWM half - period, for each such PWM half - period, there is only one negative pulse 26 corresponding to half of the duty cycle generated at the start of the PWM half - period and one positive pulse 24 corresponding to half of the duty cycle generated at the end of the PWM half - period. Thus, after the first duty - cycle change requirement in the second embodiment, the negative pulse 26 corresponding to a 0.125 duty cycle starts at the first time t0.5 and the positive pulse 24 corresponding to a 0.125 duty cycle ends at the fourth time t1. In the second embodiment, no voltage pulse occurs in the middle of the PWM half - period.

[0058] Similar to the description of the first embodiment, the second embodiment may alternatively include a positive pulse 24 corresponding to half of the duty cycle generated at the start of the subdivision period 22 and a negative pulse 26 corresponding to half of the duty cycle generated at the end of the subdivision period 22, without departing from the scope of the present invention.

[0059] As a result of the above, whether it is Figure 4 the first embodiment of Figure 6 or the second embodiment of

[0060] For a given subdivision period 22, the positive voltage pulse 24 and the negative voltage pulse 26 are balanced. In other words, within the PWM period or PWM half-period corresponding to the first embodiment and the second embodiment respectively, the magnetic flux of the positive voltage pulse 24 is equal to the magnetic flux of the negative voltage pulse 26. Figure 5 Different waveforms are shown in

[0061] with respect to the first embodiment (where the subdivision period 22 is equal to one PWM period). Figure 5 These waveforms correspond from top to bottom to the transformer input voltage waveform 28, the converter input current waveform 30, and the primary transformer current waveform 32 generated in the transformer 6. Here, "correspond" means observing the transformer input voltage waveform 28, the converter input current waveform 30, and the primary transformer current waveform 32 within the same PWM period.

[0062] As shown, there is no deflection in the waveforms; the positive and negative pulses in the transformer input voltage waveform 28, the converter input current waveform 30, and the primary transformer current waveform 32 are balanced. More precisely, the primary transformer current waveform 32 is symmetric about the 0 current line, which is characteristic of the balanced primary transformer current. This balanced primary transformer current is required because it means preventing saturation and / or flux imbalance of the transformer 6.

[0063] Furthermore, there is no duty cycle offset in the waveforms, especially no error between the required duty cycle and the achieved duty cycle; since the primary transformer current is balanced, the voltage pulse starts when the primary transformer current of the transformer 6 is equal to zero. Therefore, a reduction in the dynamic response of torque control is avoided.

[0064] Benefiting from the teachings presented in the foregoing description and the associated drawings, those skilled in the art to which this invention pertains will envision many modifications and other embodiments of the invention set forth herein. Accordingly, it is to be understood that the invention is not limited to the specific embodiments disclosed, and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. A pulse width modulation (PWM) generation method for a converter (16) for an electric or hybrid vehicle motor (1), the converter (16) being operated with a phase shift having a duty cycle associated with the phase shift, the converter (16) supplying a voltage (20) to a transformer (6) of the motor (1), the pulse width modulation generation method comprising operating the converter (16) with a duty cycle change requirement, defining a subdivision period (22) between two duty cycle change requirements, the pulse width modulation generation method being characterized in that half of the duty cycle is applied at the beginning of the subdivision period (22) and half of the duty cycle is applied at the end of the subdivision period (22).

2. The pulse width modulation generation method according to claim 1, wherein: The subdivided period (22) corresponds to a multiple of a PWM half period.

3. A pulse width modulation generation method according to any one of the preceding claims, wherein: The converter (16) generates at least one positive voltage pulse (24) and at least one negative voltage pulse (26) over a given subdivided period (22).

4. A pulse width modulation generation method according to any one of the preceding claims, wherein: Over a PWM half cycle, the magnetic flux of the positive voltage pulse (24) is equal to the magnetic flux of the negative voltage pulse (26).

5. A pulse width modulation generation method according to any one of the preceding claims in combination with claim 2, wherein: When the subdivided period (22) corresponds to a PWM half cycle, at a given PWM half cycle, a positive pulse (24) corresponding to half of the duty cycle is generated at the beginning of the PWM half cycle, and a negative pulse (26) corresponding to half of the duty cycle is generated at the end of the PWM half cycle.

6. The pulse width modulation generation method according to any one of claims 1 to 4 in combination with claim 2, wherein: When the subdivided period (22) corresponds to a PWM half cycle, at a given PWM half cycle, a negative pulse (26) corresponding to half of the duty cycle is generated at the beginning of the PWM half cycle, and a positive pulse (24) corresponding to half of the duty cycle is generated at the end of the PWM half cycle.

7. A pulse width modulation generation method according to any one of the preceding claims in combination with claim 2, wherein: When the subdivided period (22) corresponds to a PWM period, at a given PWM period, a first negative pulse (26A) corresponding to half of the duty cycle is generated at the beginning of the PWM period, a positive pulse (24) corresponding to the duty cycle is generated in the middle of the PWM period, and a second negative pulse (26B) corresponding to half of the duty cycle is generated at the end of the PWM period.

8. The pulse width modulation generation method according to any one of claims 1 to 6 in combination with claim 2, wherein: When the subdivided period (22) corresponds to a PWM period, at a given PWM period, a first positive pulse (24A) corresponding to half of the duty cycle is generated at the beginning of the PWM period, a negative pulse (26) corresponding to the duty cycle is generated in the middle of the PWM period, and a negative pulse (24B) corresponding to half of the duty cycle is generated at the end of the PWM period.

9. A pulse width modulation generation method according to any one of the preceding claims, wherein: The voltage pulses (24, 26) start when the primary transformer current of the transformer (6) is equal to zero.

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