Power amplifier system with interference cancellation

Abstract

Aspects of the present disclosure relate to cancelling interference at an output of a power amplifier. An interference sensing circuit in a signal path between the power amplifier and the antenna may generate an interference power signal. The interference cancellation loop may receive an interfering power signal and provide a cancellation signal to a transmit signal path that includes a power amplifier, thereby suppressing interference at an output of the power amplifier. In some embodiments, the interference cancellation loop includes an amplifier and a phase shifter. Related systems and methods are disclosed.

Description

Technical Field

[0001] The disclosed technology relates to radio frequency systems and power amplifiers. Embodiments of the present disclosure relate to reducing interference in systems including power amplifiers. Background Art

[0002] Radio systems can transmit and receive signals in the form of electromagnetic waves having frequencies in the range of approximately 30 kilohertz (kHz) to 300 gigahertz (GHz). Radio systems can be used for wireless communication, such as cellular communication and / or other wireless network communication.

[0003] Radio systems that transmit signals typically include power amplifiers for amplifying radio frequency signals for transmission through one or more antennas. In some such systems, multiple power amplifiers can drive the antennas of an antenna array. In systems associated with driving antennas with independent streams simultaneously, there can be challenges related to meeting technical specifications. Summary of the Invention

[0004] The innovations described in the claims have several aspects, none of which are solely responsible for their desirable attributes. Without limiting the scope of the claims, some of the prominent features of the present disclosure will now be briefly described.

[0005] One aspect of the present disclosure is a power amplifier system having interference cancellation. The power amplifier system includes a transmit signal path, an interference sensing circuit, and an interference cancellation loop. The transmit signal path includes a power amplifier. The interference sensing circuit is connected to the output of the power amplifier. The interference sensing circuit is configured to output an interference power signal. The interference cancellation loop includes an amplifier. The interference cancellation loop is configured to receive the interference power signal and provide a cancellation signal to the transmit signal path to suppress interference at the output of the power amplifier.

[0006] The interference cancellation loop may further include a phase shifter. The interference cancellation loop may be configured to generate the cancellation signal by at least amplifying and phase shifting the interference power signal using the amplifier and the phase shifter. In some cases, the phase shifter is connected to the interference sensing circuit through the amplifier. The interference cancellation loop may have a controllable gain, and the interference cancellation loop is capable of setting the controllable gain to control the amplitude of the cancellation signal.

[0007] The interference sensing circuit may include a radio frequency coupler. The radio frequency coupler can be configured in a first state and a second state. The radio frequency coupler can be configured to couple interference power in the first state. The radio frequency coupler can be configured to couple forward power in the second state.

[0008] The power amplifier system may also include an antenna array. The antenna array may include a first antenna connected to the power amplifier through an interference sensing circuit. The interference may include interference related to the coupling of a second antenna of the antenna array and the first antenna. The interference may include reflected power related to the first antenna. In some cases, the power amplifier system does not include an antenna array, and interference may be generated due to impedance mismatch at the output of the power amplifier.

[0009] The power amplifier system may also include an interference power monitoring circuit configured to enable an interference cancellation loop based on the power level of an interference power signal.

[0010] The interference cancellation loop may be configured to apply a cancellation signal to the output side of the power amplifier.

[0011] The interference cancellation loop may be configured to apply a cancellation signal to the input side of the power amplifier. The power amplifier system may also include a non - linear cancellation loop configured to provide a non - linear cancellation signal at the input side of the power amplifier.

[0012] The power amplifier system may also include a radio frequency coupler and a digital pre - distortion circuit, wherein the second radio frequency coupler is configured to provide a coupled power signal to the digital pre - distortion circuit. The coupled power signal may be related to the power propagating from the output of the power amplifier to the antenna. The digital pre - distortion circuit may be configured to reduce the non - linearity of the power amplifier output.

[0013] Another aspect of the present disclosure is a power amplifier system with interference cancellation. The power amplifier system includes an antenna array, a transmit signal path including a power amplifier, a radio frequency coupler, and an interference cancellation loop. The antenna array includes a first antenna and a second antenna. The power amplifier is configured to drive the first antenna. The radio frequency coupler is located in the signal path between the power amplifier and the first antenna. The radio frequency coupler is configured to generate an interference power signal. The interference cancellation loop includes an amplifier and a phase shifter. The interference cancellation loop is configured to receive the interference power signal and provide a cancellation signal to the transmit signal path to suppress interference at the output of the power amplifier. The interference includes an aggressor signal related to the second antenna.

[0014] The power amplifier system may also include an interference power monitoring circuit configured to enable an interference cancellation loop based on the power level of an interference power signal.

[0015] The interference cancellation loop may be configured to apply a cancellation signal at the output side of the power amplifier.

[0016] Another aspect of the present disclosure is a method for interference cancellation in a power amplifier system. The method includes sensing interference in a signal path between a power amplifier and a first antenna, generating a cancellation signal based on the sensing, and applying the cancellation signal to a transmit signal path including the power amplifier to suppress interference at the output of the power amplifier. The interference propagates in a direction towards the output of the power amplifier. The interference includes an aggressor signal associated with a second antenna.

[0017] Sensing the interference may include generating a coupled power signal using a radio frequency coupler. Generating the cancellation signal may include amplifying and phase-shifting the coupled power signal. The method may further include enabling a circuit to generate the cancellation signal based on a power level of the coupled power signal.

[0018] Applying the cancellation signal may include applying the cancellation signal at an output side of the power amplifier.

[0019] To summarize the present disclosure, certain aspects, advantages, and novel features of the innovation are described herein. It should be understood that not all of these advantages may be achieved in accordance with any particular embodiment. Thus, the innovation may be embodied or implemented in a manner that achieves or optimizes one or a group of the advantages taught herein, without necessarily achieving other advantages taught or suggested herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Embodiments of the present disclosure will be described by way of non-limiting examples with reference to the accompanying drawings.

[0021] Figure 1 is a schematic diagram of a radio frequency system having an antenna array and signal flow according to an embodiment.

[0022] Figure 2 is a diagram illustrating intermodulation generated by mixing between a main stream and an aggressor stream.

[0023] Figure 3 is a schematic diagram of a power amplifier system having interference cancellation according to an embodiment.

[0024] Figure 4A is according to an embodiment Figure 3 schematic diagram of an example of a power amplifier system.

[0025] Figure 4B is a schematic diagram of a power amplifier system having a configurable radio frequency coupler according to an embodiment.

[0026] Figure 4C is a schematic diagram of a power amplifier system having interference cancellation for multiple power amplifier stages according to an embodiment.

[0027] Figure 5 is a schematic diagram of a power amplifier system having interference power monitoring and interference cancellation according to an embodiment.

[0028] Figure 6 It is a graph showing the variation of the output power of a power amplifier system showing no aggression signal, a power amplifier with an interference cancellation loop enabled, and a power amplifier with an interference cancellation loop disabled with respect to frequency.

[0029] Figure 7 It is a graph showing the relationship between the intermodulation of aggression and the signal power of the main power amplifier with respect to the power output.

[0030] Figure 8 It is a schematic diagram of a power amplifier system with interference cancellation applied on the input side of a power amplifier according to an embodiment.

[0031] Figure 9 It is a schematic diagram of a power amplifier system with an interference cancellation loop and a nonlinear cancellation loop according to an embodiment.

[0032] Figure 10 It is a schematic diagram of a power amplifier system with an interference cancellation loop and a nonlinear cancellation path for digital predistortion according to an embodiment. Detailed Description of Specific Embodiments

[0033] The following detailed description of certain embodiments presents various descriptions of specific embodiments. However, the innovations described herein can be embodied in many different ways, for example, as defined and covered by the claims. In this specification, reference is made to the accompanying drawings, in which like reference numerals may represent like or functionally similar elements. It should be understood that the elements shown in the drawings are not necessarily drawn to scale. Additionally, it should be understood that some embodiments may include more elements and / or subsets of the elements shown in the drawings. Further, some embodiments may incorporate any suitable combination of features from two or more of the drawings.

[0034] A power amplifier is an important component of a wireless transmitter. The power amplifier can make a significant contribution to the overall system efficiency, linearity, and / or output power. In certain applications, the power amplifier can drive an individual antenna of an antenna array.

[0035] High-efficiency power amplifiers, such as Doherty power amplifiers, outphasing power amplifiers, or segmented power amplifiers, are suitable for various applications. Such power amplifiers may be more nonlinear than some other power amplifiers. Digital predistortion (DPD) can be used to linearize such power amplifiers.

[0036] Modern communication systems can employ multiple antennas for spatial diversity and / or spatial multiplexing modes. The multiple antennas can be included in an antenna array for beamforming and / or for multiple-input multiple-output (MIMO) communication. In such an antenna array, the antennas can support independent streams simultaneously. The independent streams can be at the same or different frequencies. Due to limited antenna isolation in some applications, adjacent streams can modulate the output of a power amplifier. Such modulation can result in a decrease in error vector magnitude (EVM) and / or out-of-band (OOB) emissions. Imperfect matching can cause reflections, which reduce the nonlinearity of the power amplifier.

[0037] In some systems, using isolators at the power amplifier output can reduce or eliminate the coupling between adjacent streams. This also helps to achieve the desired power amplifier impedance matching. In such applications, DPD can compensate for the nonlinearity of the power amplifier under a fixed load.

[0038] With the move towards higher frequencies and / or large-scale MIMO systems, arrays with more antennas are required. As the frequency increases, the antenna size may decrease, and challenges may be encountered in placing isolators. Using isolators in these systems with a relatively large number of antennas significantly increases the cost and may be impractical due to limited antenna spacing and the large size of the isolators.

[0039] The present invention provides new architectures to eliminate interference caused by undesired coupling between the power amplifier output and one or more adjacent streams. Additionally, the reflected signals of the antennas can be eliminated before modulating the PA output. The architectures disclosed herein can relax the DPD specifications to achieve the required system linearity without using isolators at each power amplifier output. The systems disclosed herein can provide a relatively low-cost and compact solution to reduce and / or eliminate the linear degradation of adjacent streams of the power amplifier without using isolators at each power amplifier output.

[0040] In spatial multiplexing, independent streams can be transmitted simultaneously through different antennas sharing the same frequency to improve spectral efficiency. Due to the limited distance between adjacent antennas, the isolation between antennas transmitting different streams may be limited. For example, adjacent antennas can be spaced λ / 2 apart, where λ is the wavelength of the transmitted signal.

[0041] Figure 1Schematic diagram of a radio frequency system 10 with an antenna array 12 according to an embodiment. The antenna array 12 includes an antenna array 14. Each antenna 14 can be referred to as an antenna element. The antenna array 12 can be a phased antenna array. The antenna array 12 can include a relatively large number of antennas 14. For example, in some applications, the antenna array 12 can include more than 1000 antennas. In some such applications, the antenna array 12 can include 1000 to 3000 antennas 14. The antenna array 12 can be used for sixth generation (6G) technology applications.

[0042] The radio frequency system 10 includes a plurality of processing channels, each processing channel associated with a corresponding antenna 14. Each processing channel can include a transmit path 15 and a receive path 16. Switches 17A and 17B can selectively electrically couple the transmit path 15 or the receive path 16 to the antenna 14 and the transceiver ( Figure 1 not shown). Each transmit path 15 includes a power amplifier 18. The power amplifier 18 can include any suitable power amplifier transistor, such as but not limited to a field effect transistor (FET) (e.g., a metal oxide semiconductor FET (MOSFET), a p-type FET (PFET), an n-type FET (NFET), or a pseudomorphic high electron mobility transistor (pHEMT)) or a bipolar transistor. For example, the radio frequency system 10 can use the antenna 14 to perform beam scanning.

[0043] The antenna 14 is driven by the power amplifier 18 in the transmit path 15. For example, a power detection circuit 19 for the transmit path can detect an indication of reflected power propagating from the antenna 14 to the power amplifier 18. The power detection circuit 19 can include a radio frequency coupler and a power detector.

[0044] Reference Figure 1 , the limited isolation between the antennas 14 may introduce coupling and mutual crosstalk between adjacent streams. For example, an antenna processing stream 2-1 driving an antenna 14 at position 2-1 in the antenna array 12 can be coupled to one or more adjacent streams from one or more adjacent antennas 14. In some cases, the streams associated with eight adjacent antennas 14 can be coupled to a single antenna 14.

[0045] One or more adjacent stream couplings can mix and modulate the power amplifier output. This generates one or more new intermodulation components that reduce the linearity of the desired power amplifier output stream (e.g., EVM and / or adjacent channel power (ACP)). Figure 2 Is a diagram illustrating the new intermodulation generated by the mixing of the main stream and the aggressive stream.

[0046] In order to use Figure 2The output of the intermodulation linearized power amplifier shown can perform DPD using feedback related to the main stream, aggressive stream, and non-linearity (such as IM) generated by the attacker stream and main stream modulation. For driving Figure 1 DPD of the power amplifier for the full antenna array 12 can consider all streams and all generated intermodulation to linearize the power amplifier. Such DPD would be complex and may be impractical.

[0047] Miniaturized isolators using semiconductor processes can reduce the coupling between independent streams. However, such isolators may have relatively high losses, thus reducing the efficiency of the power amplifier and / or relatively low linearity.

[0048] Some other methods of reducing the coupling between antennas involve combining multiple antennas (such as 3 antennas) and driving the combined antennas with a single power amplifier. This can allow more space to place isolators and / or circulators, but can reduce the element beam width. This method can provide a relatively limited beam scanning angle and / or a relatively large array area. In contrast, the technical solutions disclosed herein can provide a relatively wide beam scanning angle and relatively high isolation.

[0049] Aspects of the present disclosure relate to a power amplifier system with interference cancellation. Such systems can generate an indication of interference power and apply a cancellation signal in the signal path including the power amplifier. These systems can be implemented without an isolator in the signal path between the output of the power amplifier and the antenna. The power amplifier system can include an antenna array, a power amplifier in the transmit signal path configured to drive the first antenna of the array, a radio frequency coupler configured to generate an interference power signal, and an interference cancellation loop configured to receive the interference power signal and provide a cancellation signal to the transmit signal path to suppress interference at the output of the power amplifier. For example, the output of the power amplifier can be the drain of a field effect transistor. The interference power signal can be associated with the aggressive power and / or reflected power. The interference power signal can represent the power propagating in the direction from the antenna to the output of the power amplifier. The interference cancellation loop can include an amplifier and a phase shifter to generate a cancellation signal from the interference power signal. The cancellation signal can be applied on the output side of the power amplifier. In some other applications, the cancellation signal can be applied on the input side of the power amplifier.

[0050] Reference will be made to Figures 3 to 10 discuss embodiments of a power amplifier system with interference cancellation. Any suitable principles and advantages of these systems can be implemented together with each other and / or with Figure 1 the radio frequency system 10. Figures 3 to 10Any suitable principles and advantages of the power amplifier system can be achieved at the output of the power amplifier interfaced with other circuits to eliminate reflected signals and improve the performance of the power amplifier under VSWR variations. Refer to Figures 3 to 10 The power amplifier system discussed can be implemented for each processing channel driving an antenna array. A radio frequency system with a relatively large antenna array can include a relatively large number of power amplifiers and associated interference cancellation circuits. Refer to Figures 3 to 10 The power amplifier system discussed can be implemented in a system that can eliminate power amplifier signals reflected due to impedance mismatch and reduce the sensitivity of the power amplifier in the presence of any load impedance mismatch.

[0051] Figure 3 FIG. is a schematic diagram of a power amplifier system 30 with interference cancellation according to an embodiment. In the power amplifier system 30, a power amplifier 18 drives a first antenna 14A. There may be an undesired coupling between the first antenna 14A and a second antenna 14B adjacent to the first antenna 14A. An aggressor signal associated with such an undesired coupling can be introduced into the signal path between the power amplifier 18 and the first antenna 14A. Due to the impedance mismatch between the impedance of the power amplifier 18 and the impedance of the first antenna 14A, an undesired reflected signal may be generated. Interference cancellation in the power amplifier system 30 can reduce and / or eliminate the aggressor signal and / or the reflected signal at the output of the power amplifier 18. Thus, the intermodulation components associated with the mixing of the aggressor with the output signal generated by the power amplifier 18 can be suppressed. As an alternative or in addition, the reflected signal generated due to the load impedance mismatch can be suppressed, which can reduce the sensitivity of the power amplifier to VSWR and antenna impedance variations.

[0052] The power amplifier system 30 includes an interference sensing circuit 32 in the signal path between the power amplifier 18 and the first antenna 14A. The interference sensing circuit 32 can include a radio frequency directional coupler. The interference sensing circuit 32 can sense interference power. The interference power can include the power associated with the aggressor signal and / or the reflected power associated with the impedance mismatch between the power amplifier output and the impedance of the first antenna 14A. A portion of the interference power can be coupled to an interference cancellation loop 34. The interference sensing circuit 32 can be arranged to couple a portion of the power propagating in the direction from the first antenna 14A to the power amplifier 18. This coupled power can be referred to as an interference power signal.

[0053] The coupled power P_coupled provided by the interference sensing circuit 32 can be represented by Equation 1:

[0054] P_coupled = C * (P_aggressor + P_reflected) (Equation 1)

[0055] In Equation 1, C represents the coupling factor, P_aggresser represents the power of the unwanted aggressor signal, and P_reflected represents the reflected output power due to impedance mismatch. The coupling factor C can be a fraction of the interference power provided to the interference cancellation loop 34. A higher coupling factor C introduces more losses in the signal path between the power amplifier 18 and the antenna 14A. The smaller the coupling factor C, the greater the amplification factor in the interference cancellation loop. The coupled power P_coupled can be in the range of 15 decibels (dB) to 20 dB lower than the interference power.

[0056] The interference cancellation loop 34 is a feedback loop. The interference cancellation loop 34 includes a controllable amplification circuit 35 and a phase shifter 36 for generating a cancellation signal with amplitude and phase to cancel the interference at the output of the power amplifier.

[0057] The controllable amplification circuit 35 can amplify the power and voltage of the coupled power signal from the interference sensing circuit 32. This can generate the amplitude of the cancellation signal to suppress the interference at the output of the power amplifier. The controllable amplification circuit 35 can have a controllable gain, which can be controlled by any suitable analog or digital gain control technique.

[0058] The phase shifter 36 can control the phase of the cancellation signal to provide a 180-degree phase shift between the aggressor signal at the output of the power amplifier and the cancellation signal provided by the interference cancellation loop 34. In some cases, the interference cancellation loop can be implemented without a phase shifter.

[0059] The power P_cancel of the cancellation signal can be represented by Equation 2:

[0060] P_cancel = -1 * G * L * C * (P_aggressor + P_reflected) (Equation 2)

[0061] In Equation 2, G represents the amplification factor of the controllable amplification circuit 35, L represents the loss of the phase shifter 36, C represents the coupling factor, P_aggresser represents the power of the unwanted aggressor signal, and P_reflected represents the reflected output power due to impedance mismatch. For G = 1 / (L * C), Equation 2 can be simplified to Equation 3:

[0062] P_cancel = -1 * (P_aggressor + P_reflected) (Equation 3)

[0063] The cancellation signal can reduce and / or eliminate interference. The cancellation signal can have approximately the same amplitude and a phase shift of approximately 180 degrees relative to the interference. The cancellation signal can be within a range of phase shift from 150 degrees to 210 degrees relative to the interference. The amplitude of the cancellation signal can be similar to that of the interference, for example, within 20%, within 10%, or within 5%.

[0064] A cancellation signal having a power P_cancel can be applied to the combiner 38. The combiner 38 can be any suitable combiner, such as a node combiner, a Wilkinson combiner, a coupler, a transformer combiner, etc. The combiner 38 can be coupled between the output of the power amplifier 18 and the interference sensing circuit 32. The combiner 38 can add the interference to the cancellation signal from the interference cancellation loop 34 to suppress the interference before connecting to the non-linear power amplifier load. Thus, interference can be eliminated in the power amplifier system 30, including aggressive signals and / or reflected power from antenna impedance mismatch.

[0065] Figure 4A is a schematic diagram of a power amplifier system 40 according to an embodiment. The power amplifier system 40 is Figure 3 an example of the power amplifier system 30. The power amplifier system 40 includes Figure 3 an example circuit of the interference sensing circuit 32, the controllable amplification circuit 35, and the phase shifter 36.

[0066] As Figure 4A shown, Figure 3 the interference sensing circuit 32 is implemented by a directional coupler 42. The termination impedance of the directional coupler 42 is connected to its isolation port, and the coupled port provides an indication of the power propagating in the direction from the first antenna 14A to the output of the power amplifier 18.

[0067] Figure 4B is a schematic diagram of a power amplifier system 47 having a configurable directional coupler 42 according to an embodiment. In some applications, the directional coupler 42 can be configured to couple a portion of the power of the radio frequency signal generated by the power amplifier 18 that propagates to the first antenna 14A. Figure 4B The directional coupler 42 can be configured to a first state to couple interference power and can be configured to a second state to couple forward power.

[0068] In the first state, the directional coupler 42 can operate as Figure 4A shown and described. The switchable termination impedance 48A can be connected to the Figure 4B port of the directional coupler 42 labeled "isolation" in Figure 4B and the switchable termination resistor 48B can be disconnected from the port of the directional coupler 42 labeled "coupling" in

[0069] By swapping which ports of the directional coupler 42 are terminated and providing the coupled power relative to Figure 4A the shown connection, forward power can be coupled. For example, the switchable termination impedance 48B and / or another termination impedance can be connected to Figure 4B the port of the directional coupler 42 labeled "coupling" in Figure 4B and the switchable termination impedance 48A can be disconnected from the port of the directional coupler 42 labeled "isolation" in Figure 4B to operate in a second state. In this configuration, a portion of the forward power can be coupled to the port of the directional coupler 42 labeled isolation in Figure 4B . One or more switches and / or other suitable circuitry can configure the directional coupler 42 to couple forward power or reflected power. In the second state, the coupled forward power from the directional coupler 42 can be provided to the power detector 49 and / or the DPD path 51.

[0070] Referring to Figure 4A , the power amplifier system 40 includes an interference cancellation loop 44 that includes a variable gain amplifier 45 and a phase shifter 46, each of which can be controlled by one or more digital control bits. The variable gain amplifier 45 is Figure 3 an example of the controllable amplification circuit 35 of Figure 4A . The gain of the variable gain amplifier 45 can be controlled by one or more digital control bits, as Figure 4A shown. In some other applications, the gain of the variable gain amplifier 45 can be controlled by an analog signal (such as an analog control voltage). Figure 3 The controllable amplification circuit 35 of Figure 4A can also be implemented by an amplifier and a variable attenuation circuit.

[0071] The phase shifter 46 is Figure 3 an example of the phase shifter 36 of Figure 4A . The phase shifter 46 can provide a phase shift based on one or more phase control bits. For example, a phase control word including multiple phase control bits can control the phase shift of the phase shifter 46. The phase shifter 46 can include active or / and passive components. The required phase shift can be controlled by digital control bits or by an analog signal (such as an analog control voltage).

[0072] Embodiments of the interference cancellation loop for interference cancellation disclosed herein can include an amplifier and a phase shifter. Amplification and phase shift can be performed in any suitable order. For example, in some systems, the coupled power signal can be amplified by an amplifier and then phase shifted by a phase shifter, as in the system shown in Figures 3 - 5 . As another example, in some systems, such as the system shown in Figures 8 - 10 , the coupled power signal can be phase shifted by a phase shifter and then amplified by an amplifier.

[0073] Referring to Figure 4A, the combiner 38 can be implemented by a node combiner, a Wilkinson combiner, a directional coupler, a transformer combiner, or any other suitable voltage or power combining circuit.

[0074] The interference cancellation loop 44 can be implemented with DPD to improve the overall linearity of the power amplifier system 40. In such an application, the DPD can linearize the power amplifier 18, and the interference cancellation loop 44 can be tuned to suppress interference power and associated intermodulation non - linearities. The interference cancellation loop 44 can be tuned by setting the control bits of the variable - gain amplifier 45 and the phase shifter 46.

[0075] The interference cancellation circuits of the power amplifier systems 30 and 40 can improve in - band and out - of - band linearity by suppressing interference (such as an aggressor signal) before the power amplifier load. However, this interference suppression reduces the overall power amplifier efficiency due to the additional power consumption and / or additional load of the combiner for inferring the sensed and applied cancellation signal.

[0076] For low interference levels (e.g., low aggressor power levels) where the intermodulation generated between the power amplifier output and the interference is below a threshold, the interference cancellation loop for suppressing interference can be disabled to reduce power consumption and improve power amplifier efficiency. The interference cancellation loop can be selectively disabled and / or enabled for a single processing channel, a subset of the processing channels driving the antenna elements of an antenna array, or all the processing channels driving the antenna elements of an antenna array.

[0077] Figure 4C is a schematic diagram of a power amplifier system 52 having interference cancellation for multiple power amplifier stages according to an embodiment. Figure 4C shows that the interference cancellation loop can be applied in situations where there may be little or no aggressor interference and / or other antenna - related interference. For example, an interference cancellation loop according to any suitable principles and advantages disclosed herein can be used between the power amplifier stages of a multi - stage power amplifier or at a voltage - controlled oscillator and / or a phase - locked loop driver. In some applications, the interference cancellation loop can only cancel reflected power. The interference cancellation disclosed herein can be applied to suppress interference associated with any suitable power amplifier load. Such cancellation can advantageously make the power amplifier VSWR - insensitive.

[0078] Refer to Figure 4C, the power amplifier system 52 includes a first power amplifier stage 18A that drives a second power amplifier stage 18B. When there is a load impedance mismatch in the first power amplifier stage 18A, the first interference cancellation loop 44A can provide cancellation to eliminate the reflected power PR_reflected1 associated with the impedance mismatch. In some cases, this can eliminate the interference associated only with the reflected power. The first interference cancellation loop 44A can be implemented according to any suitable principles and advantages of the interference cancellation loop 44 of FIG. 4 and / or any other suitable interference cancellation loop disclosed herein. The cancellation signal can be applied at the first combiner 38A.

[0079] Then, the second power amplifier stage 18B can amplify the radio frequency signal with the interference suppressed. The second interference cancellation loop 44B can operate as described with reference to Figure 4A and apply a cancellation signal at the second combiner 38B. Thus, the power amplifier system 47 can apply cancellation at the output of the individual power amplifier stages.

[0080] Figure 5 is a schematic diagram of a power amplifier system 50 having interference power monitoring and interference cancellation according to an embodiment. The power amplifier system 50 includes an interference cancellation loop 54 and an interference power monitoring circuit 55. The interference power monitoring circuit 55 can monitor the attacker power level and selectively disable and / or enable the interference cancellation loop 54. The interference power monitoring circuit 55 can include a power detector 56, a comparator 57, and a multiplexer 58. The power detector 56 can be any suitable power detector or envelope detector. The comparator 57 can compare the output signal from the detector 56 with a reference signal (e.g., a reference voltage).

[0081] The output signal from the detector 56 being higher than the reference signal can indicate that the attacker power is high enough to affect linearity and / or otherwise have a negative impact on performance. If the amplitude of the output signal of the detector 56 is greater than the reference signal, the interference cancellation loop 54 can be enabled. On the other hand, if the amplitude of the output signal of the detector 56 is lower than the reference signal, the interference cancellation loop 54 can be disabled. In this case, the aggression power may be relatively low and produce relatively low intermodulation. Reference Figure 5 The description of monitoring the aggression power can be applicable to monitoring any other suitable interference power or any other suitable interference power combined with the aggression power.

[0082] The multiplexer 57 can receive the output signal from the comparator 56 and the loop power - off signal. The multiplexer 57 can provide a loop disable signal to the interference cancellation loop 54 in response to the output signal from the comparator 56 and / or the loop power - off signal to disable the interference cancellation loop 54.

[0083] In the interference cancellation loop 54, the variable gain amplifier 45 and the switch 59 receive a loop disable signal. The loop disable signal can disable the interference cancellation loop 54 in the following ways: (1) turn off or otherwise deactivate the variable gain amplifier 45, and (2) decouple the interference cancellation loop from the input of the combiner 38. Any other suitable circuitry can alternatively or additionally disable the interference cancellation loop to suppress interference. In some cases, the loop disable signal can be provided to one or more interference cancellation loops associated with one or more transmit signal paths that drive different antennas in the same antenna array as the Figure 5 antenna 14 shown.

[0084] Figure 6 is a graph showing the output power versus frequency of a power amplifier system without an aggressor signal, a power amplifier with the interference cancellation loop enabled, and a power amplifier with the interference cancellation loop disabled. Figure 6 The simulation results in are for a power amplifier with 2 tones in the presence and absence of aggressor coupling.

[0085] Comparing the simulation results of a power amplifier system without an aggressor signal and a power amplifier with the loop disabled, the aggressor tones can be 11 dBc lower than the main power amplifier tone. These aggressor tones can mix with the power amplifier tone and generate intermodulation (IM) that is 30 dB lower than the main power amplifier tone. In the case of the loop being disabled, using such aggressor tones and IM, due to the intermodulation distortion generated by the aggressor, traditional DPD may not be able to improve linearity to achieve the required performance specifications, such as achieving 3% EVM.

[0086] Comparing the simulation results of a power amplifier system with the loop disabled and a power amplifier system with the loop enabled, the interference cancellation loop suppresses the 2 aggressor tones by approximately 15 dB and also suppresses the intermodulation tones generated by the aggressor by approximately 13 dB. With the interference cancellation loop enabled, the IM generated by the aggressor is approximately 40 dB lower than the main power amplifier tone. By linearizing the power amplifier through this suppression and DPD, an EVM of less than 3% can be achieved due to the suppression of the IM generated by the aggressor.

[0087] Figure 7 is a graph of the aggressor intermodulation versus the main power amplifier signal power and the power output. Aggressor intermodulation can be generated due to the mixing between the main power amplifier signal and the coupled aggressor signal. Figure 7 shows the relationship between the aggressor intermodulation and the output power of the main power amplifier signal. These IM results are generated with the aggressor power 11 dB lower than the main power amplifier power.

[0088] With the interference cancellation loop disabled, even at lower power amplifier output powers, the IM associated with the aggressor signal is approximately 30 dBc relative to the main power amplifier input power. This aggressor IM level causes EVM degradation and OOB emissions. With the interference cancellation loop enabled, this IM (1) is reduced by approximately 18 dB at low output power to achieve an aggressor IM of less than 50 dBc, and (2) is suppressed by approximately 13 dB to achieve an aggressor of less than 40 dBc at higher power amplifier output powers up to approximately 16 dBm. The improved IM of less than 40 dBc should improve the linearity of the transmitted signal (such as EVM, ACP) and reduce OOB emissions. Figure 7 shows that when the power amplifier output power is greater than 15 dB, the cancellation level is low. This may be due to higher power amplifier non-linearity and operation near saturation power.

[0089] In some cases, interference cancellation can be applied at the input of the power amplifier. This can utilize the gain of the power amplifier to amplify the cancellation signal to provide interference suppression at the power amplifier output. Refer to Figures 8 to 10 for an example power amplifier system with interference suppression on the input side of the power amplifier. In some other cases, interference cancellation can be applied at an intermediate stage of the power amplifier between the input stage and the output stage. In this case, the interference cancellation loop can provide a cancellation signal between the stages of the power amplifier, thereby suppressing interference at the power amplifier output.

[0090] Figure 8 is a schematic diagram of a power amplifier system 80 with interference cancellation applied at the input side of the power amplifier according to an embodiment. The power amplifier system 80 includes an interference cancellation loop 84 that provides a cancellation signal to a combiner 38. The combiner 38 combines the power amplifier input signal with the cancellation signal. This combined signal is provided to the input of the power amplifier 18 and is amplified by the power amplifier 18. This can use the amplification of the power amplifier 18 to amplify the cancellation signal to cancel interference at the power amplifier output.

[0091] In the power amplifier system 80, the power amplifier output power Pout can be represented by Equation 4:

[0092] P_out =G PA * (P_in + P_cancel ) (Equation 4)

[0093] In Equation 4, G PA represents the gain of the power amplifier 18, P_in is the power of the power amplifier input signal, and P_cancel is the power of the cancellation signal. The power of the cancellation signal P_cancel can be calculated based on Equation 2. For G PA*G*L*C = 1, Equation 4 can be simplified to Equation 5:

[0094] P_out = G PA * P_in - P_interference (Equation 5)

[0095] In Equation 4, G PA *P_in represents the power of the input signal of the power amplifier to be amplified, and P_interference represents the power of the interference signal at the output of the power amplifier, including the power of the undesired aggressor signal and the power from impedance mismatch.

[0096] By using the power amplifier 18 to amplify the cancellation signal from the interference cancellation loop 84, the variable gain amplifier 45 of the interference cancellation loop 84 can have a lower gain than the amplifier of the interference cancellation loop that applies cancellation on the output side of the power amplifier. For example, compared with Figure 3 the interference cancellation loop 34 of Figure 4A the interference cancellation loop 44 of Figure 5 the interference cancellation loop 54 of, amplifying the cancellation signal in the power amplifier system 80 using the power amplifier 18 can reduce the power consumption of the interference cancellation loop 84. This can improve the overall efficiency of the power amplifier system 80.

[0097] The power amplifier 18 can be non - linear. Amplifying the cancellation signal from the interference cancellation loop with the power amplifier 18 introduces non - linearity in the output signal provided by the power amplifier 18. Figure 9 and Figure 10 provide technical solutions to suppress the non - linearity associated with amplifying the cancellation signal.

[0098] Figure 9 is a schematic diagram of a power amplifier system 90 having an interference cancellation loop 84 and a non - linear cancellation loop 95 according to an embodiment. To suppress the non - linearity associated with amplifying the cancellation signal from the interference cancellation loop 84 with the power amplifier, the non - linear cancellation loop 95 can cancel the combined non - linearity at the output of the power amplifier 18. The interference cancellation loop 84 can cancel the interference at the output of the power amplifier 18.

[0099] Due to the non - linearity of the power amplifier 18, the output signal provided by the power amplifier 18 can have cross - modulation related to the power amplifier input signal and the cancellation signal. The non - linear cancellation loop 95 can cancel the combined non - linear inter - modulation components in the main power amplifier input signal, as well as the non - linearity and inter - modulation resulting from the mixing of the main input and cancellation signals of the power amplifier.

[0100] The second coupling element 102 may couple a portion of the power amplifier output power that includes a non-linear component to provide a second coupling signal to the non-linear cancellation loop 95. The second coupling element 102 may be a radio frequency coupler. The second coupled power signal may be a portion of the forward power propagating from the power amplifier 18 to the antenna 14. The second coupled power signal may be amplified and phase shifted. For example, the second coupled power signal may be provided to the variable gain control circuit 103 to adjust its amplitude, and then phase shifted by the variable delay circuit 104 to compensate for and / or control the phase of the second coupling signal. A modified coupled power signal is generated by amplifying and phase shifting the second coupled power signal.

[0101] The modified signal is applied to the signal combining circuit 105, which subtracts the linear power amplifier signal from the modified signal. The input coupling circuit 106 may provide a coupled power signal of the power amplifier input signal, the amplitude of which may cancel the linear component of the modified signal. Thus, only the non-linear component of the power amplifier output signal remains at the output of the signal combining circuit 105. The output signal of the signal combining circuit 105 may be phase shifted and amplified to control the amplitude and phase for combination with the power amplifier input signal. The controllable phase shifter 107 may perform such phase shifting, and the controllable gain amplifier 108 may perform such amplification.

[0102] The combiner 98 may combine the power amplifier input signal, the cancellation signal, and the non-linear cancellation signal such that (1) interference is cancelled at the output of the power amplifier 18, and (2) non-linearity is cancelled at the output of the power amplifier 18.

[0103] Figure 10 is a schematic diagram of a power amplifier system 110 having an interference cancellation loop 114 and a non-linear cancellation path 115 for digital predistortion according to an embodiment. The non-linear cancellation path 115 may suppress non-linearity associated with amplifying the cancellation signal generated by the interference cancellation loop 114 using the power amplifier 18. The interference cancellation loop 114 may cancel interference at the output of the power amplifier.

[0104] The second coupling element 102 may couple a portion of the power amplifier output power that includes a non-linear component to provide an observation signal to the non-linear cancellation path 115. The observation signal may represent the forward power propagating from the power amplifier 18 to the antenna 14. The observation signal may be provided to the DPD circuit 116. In some cases, one or more circuit elements (not shown) may be located in the signal path between the second coupling element 102 and the DPD circuit 116. The DPD circuit 116 may adjust the input signal of the power amplifier 18 based on the observation signal. This may reduce the overall non-linearity at the output of the power amplifier 18.

[0105] In power amplifier system 110, interference cancellation loop 114 can cancel interference associated with undesired large aggressor signals that are difficult to cancel with DPD alone, and DPD can be used to cancel all non-linear components at the output of power amplifier 18.

[0106] Technical solutions for suppressing interference are provided. An interference power signal can be generated that represents the aggressor signal and / or reflected power signal propagating from the antenna to the power amplifier output. A radio frequency coupler, such as a directional coupler, can generate the interference power signal. The interference power signal can be amplified and phase shifted to generate a cancellation signal. The cancellation signal can be applied in the transmit signal path including the power amplifier. The cancellation signal can be applied to a combiner on the output side of the power amplifier, between power amplifier stages, or on the input side of the power amplifier. In some embodiments, an interference power detection circuit can detect the power level associated with the interference and selectively activate and / or deactivate the interference cancellation loop based on the detected power level associated with the interference.

[0107] In the above embodiments, systems, devices, circuits, and methods for suppressing interference at the output of a power amplifier are described in the context of specific embodiments. However, it should be understood that the principles and advantages of the embodiments can be used in any other system, device, or method that requires suppression of power amplifier output interference.

[0108] The principles and advantages described herein can be implemented in a variety of devices. Examples of such devices can include, but are not limited to, communication infrastructure such as wireless communication infrastructure, consumer electronics, components of consumer electronic devices, electronic test equipment, in-vehicle electronics, industrial electronics, etc. Electronic products can include, but are not limited to, base stations such as cellular base stations, access points, repeaters, wireless communication devices, mobile phones (e.g., smartphones), handheld computers, tablets, laptops, wearable computing devices, in-vehicle electronic systems, radios, wearable health monitoring devices, etc. Additionally, the devices can include unfinished products.

[0109] Unless the context clearly requires otherwise, throughout the specification and claims, words such as "comprising", "including", "having", etc. shall be construed in an inclusive sense, rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to". As used herein, the term "coupled" or "connected" generally refers to two or more elements that can be directly connected or connected through one or more intermediate elements. In addition, the terms "herein", "above", "below" and words of similar import used in this application shall refer to the entire application, rather than any particular part of this application. Where the context permits, words in the detailed description using the singular or plural may also respectively include the plural or the singular. When referring to a list of two or more items, the word "or" is intended to cover all of the following interpretations of that word: any item in the list, all items in the list, and any combination of items in the list. All numerical values provided herein are intended to include similar values within the measurement error.

[0110] In addition, unless otherwise specifically stated or understood in the context in which it is used, conditional language used herein, such as "can", "may", "could", "for example", "such as", etc., generally intends to convey that certain embodiments include, while other embodiments do not include certain features, elements, and / or states.

[0111] The teachings of the present invention provided herein can be applied to other systems, not necessarily the systems described above. The elements and actions of the various embodiments above can be combined to provide further embodiments. The actions of the methods discussed herein can be appropriately performed in any order. In addition, the actions of the methods discussed herein can be performed serially or in parallel as needed.

[0112] Although certain embodiments of the present invention have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the disclosure. In fact, the novel methods and systems described herein can be embodied in various other forms. In addition, various omissions, substitutions and changes can be made to the forms of the methods and systems described herein without departing from the spirit of the disclosure. The appended claims and their equivalents are intended to cover forms or modifications that fall within the scope and spirit of the disclosure. Accordingly, the scope of the present invention is defined by reference to the claims.

Claims

1. A power amplifier system with interference cancellation, the power amplifier system comprising: An antenna array includes a first antenna and a second antenna; a transmit signal path comprising a power amplifier configured to drive the first antenna; a radio frequency coupler located in a signal path between the power amplifier and the first antenna, the radio frequency coupler being configured to generate an interference power signal; and An interference cancellation loop includes an amplifier and a phase shifter, the interference cancellation loop being configured to receive the interference power signal and provide a cancellation signal to the transmit signal path to suppress interference at the output of the power amplifier, and the interference includes an aggressor signal associated with the second antenna. 2 . The power amplifier system of claim 1 , further comprising an interference power monitoring circuit configured to enable the interference cancellation loop based on a power level of the interference power signal. 3 . The power amplifier system of claim 1 , wherein the interference cancellation loop is configured to apply the cancellation signal at an output side of the power amplifier.

4. A power amplifier system with interference cancellation, the power amplifier system comprising: a transmit signal path, including a power amplifier; an interference sensing circuit connected to an output terminal of the power amplifier, the interference sensing circuit being configured to output an interference power signal; and An interference cancellation loop includes an amplifier configured to receive the interference power signal and provide a cancellation signal to the transmit signal path, thereby suppressing interference at the output of the power amplifier.

5. The power amplifier system of claim 4, wherein the interference cancellation loop further comprises a phase shifter, the interference cancellation loop being configured to generate the cancellation signal by at least amplifying and phase shifting the interference power signal using the amplifier and the phase shifter.

6. The power amplifier system of claim 4, wherein the interference cancellation loop has a controllable gain, and the interference cancellation loop is configured to set the controllable gain to control the amplitude of the cancellation signal.

7. The power amplifier system of claim 4, wherein the interference sensing circuit comprises a radio frequency coupler.

8. The power amplifier system of claim 7, wherein the RF coupler is configurable to a first state and a second state, the RF coupler being configured to couple interference power in the first state, and the RF coupler being configured to couple forward power in the second state.

9. The power amplifier system of claim 4, further comprising an antenna array including a first antenna connected to the power amplifier through the interference sensing circuit.

10. The power amplifier system of claim 9, wherein the interference comprises interference associated with coupling of a second antenna of the antenna array and the first antenna.

11. The power amplifier system of claim 4, wherein the interference comprises reflected power associated with an impedance mismatch at an output of the power amplifier.

12. The power amplifier system of claim 4, further comprising an interference power monitoring circuit configured to enable the interference cancellation loop based on a power level of the interference power signal.

13. The power amplifier system of claim 4, wherein the interference cancellation loop is configured to apply the cancellation signal to an output side of the power amplifier.

14. The power amplifier system of claim 4, wherein the interference cancellation loop is configured to apply the cancellation signal to an input side of the power amplifier.

15. The power amplifier system of claim 14, further comprising a second nonlinear cancellation loop configured to provide a nonlinear cancellation signal at an input side of the power amplifier.

16. The power amplifier system of claim 14, further comprising a radio frequency coupler and a digital predistortion circuit, the radio frequency coupler being configured to provide a coupled power signal to the digital predistortion circuit, and the digital predistortion circuit being configured to reduce nonlinearity at the output of the power amplifier, wherein the coupled power information is related to power propagated from the output of the power amplifier to an antenna.

17. A method for interference elimination in a power amplifier system, the method comprising: sensing interference in a signal path between a power amplifier and a first antenna, the interference propagating in a direction toward an output of the power amplifier, the interference comprising an aggressor signal associated with a second antenna; generating a cancellation signal based on the sensing; and The cancellation signal is applied to a transmit signal path including the power amplifier to suppress interference at an output of the power amplifier.

18. The method of claim 17, wherein the sensing comprises generating a coupled power signal using a radio frequency coupler, and wherein generating the cancellation signal comprises amplifying and phase shifting the coupled power signal.

19. The method of claim 17, wherein the sensing comprises generating a coupled power signal using a radio frequency coupler, and the method further comprises an enabling circuit that performs the generating based on a power level of the coupled power signal.

20. The method of claim 17, wherein the applying comprises applying the cancellation signal at an output side of the power amplifier.

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