Device including circuit board and method of manufacturing the same

Abstract

The present application provides a device including a circuit board and a manufacturing method thereof, which can be applied to the field of circuit board technology. The device includes: a multi-layer circuit board, stacked in a vertical direction and having an inclined side surface inclined relative to the vertical direction; a metal trace in the circuit board; first metal traces of at least two layers of the first circuit board in the multi-layer circuit board extending in the horizontal direction to the inclined side surface of the first circuit board; a first surface connection portion, located on the inclined side surface of the first circuit board, and connecting the ends of at least two layers of the first metal traces. In this way, the present application can interconnect metal traces of different layers based on the surface connection portion extending on the inclined side surface, reducing the difficulty of manufacturing high-order HDI equipment, thereby realizing high-order HDI equipment and ensuring the effectiveness of the interconnection of metal traces of each layer in the equipment.

Description

Technical Field

[0001] The present application relates to the technical field of circuit boards, and in particular to a device including a circuit board and a manufacturing method thereof. Background Art

[0002] High-density interconnect (HDI) design for printed circuit boards (PCBs) has emerged alongside the demand for miniaturization and multifunctionality in electronic devices. Common HDI solutions include step-by-step buildup. However, for servers that include PCBs, this approach makes it difficult to create high-order HDI structures with a large number of layers. Summary of the Invention

[0003] In view of the above problems, the present application provides a device including a circuit board and a manufacturing method thereof.

[0004] In a first aspect of the present application, a device is provided comprising a circuit board, comprising: a multilayer circuit board stacked in a vertical direction and having an inclined side surface inclined relative to the vertical direction; metal traces in the circuit board; first metal traces of at least two layers of the first circuit board in the multilayer circuit board extending in a horizontal direction to the inclined side surface of the first circuit board; and a first surface connection portion located on the inclined side surface of the first circuit board and connecting the ends of at least two layers of the first metal traces.

[0005] The second aspect of the present application provides a method for manufacturing the above-mentioned device, including: forming a multi-layer circuit board stacked in a vertical direction and metal traces in the multi-layer circuit board; tilting the side surface of the multi-layer circuit board relative to the vertical direction to form an inclined side surface of the multi-layer circuit board; wherein the inclined side surfaces of at least two layers of the first circuit board in the multi-layer circuit board expose the ends of at least two layers of the first metal traces; forming a first surface connection portion on the inclined side surface of the first circuit board, so that the first surface connection portion connects the ends of at least two layers of the first metal traces.

[0006] According to an embodiment of the present application, a device including a circuit board is provided. At least two layers of first metal traces inside the device are simultaneously connected to a first surface connection portion on the inclined side surface of the first circuit board, and an effective electrical connection is achieved via the first surface connection portion. In this way, when there are many levels of interconnected metal traces, the surface connection portion on the inclined side surface can ensure the effectiveness of the interconnection between metal traces of different layers. Based on this, since there is no need to fill the vias in the circuit board to form a connection portion connecting metal traces of different layers, the problem of difficulty in manufacturing high-order HDI devices due to the difficulty in effectively filling the holes in the related art is avoided, and the problem of via failure caused by the laser not drilling through the hole is avoided. In this way, the present application can interconnect metal traces of different layers based on the surface connection portion extending on the inclined side surface, reducing the difficulty of manufacturing high-order HDI devices, thereby realizing high-order HDI devices and ensuring the effectiveness of the interconnection of metal traces of each layer in the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0008] Figure 1 A schematic diagram of a device according to a first embodiment of the present application is shown.

[0009] Figure 2A A flow chart of a method for manufacturing a device according to an embodiment of the present application is shown.

[0010] Figure 2B A cross-sectional view of a device according to a second embodiment of the present application during a manufacturing process is shown.

[0011] Figure 2C The device according to the second embodiment of the present application is shown in FIG. Figure 2B A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0012] Figure 2D The device according to the second embodiment of the present application is shown in FIG. Figure 2C A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0013] Figure 3 A schematic diagram of a device according to a third embodiment of the present application is shown.

[0014] Figure 4A A cross-sectional view in a first horizontal direction of a device according to a fourth embodiment of the present application is shown.

[0015] Figure 4B A cross-sectional view in a second horizontal direction of a device according to a fourth embodiment of the present application is shown.

[0016] Figure 5 A cross-sectional view in a first horizontal direction of a device according to a fifth embodiment of the present application is shown.

[0017] Figure 6A A cross-sectional view in a first horizontal direction of a device according to a sixth embodiment of the present application is shown.

[0018] Figure 6B A cross-sectional view in a second horizontal direction of a device according to a sixth embodiment of the present application is shown.

[0019] Figure 7A A cross-sectional view in the first horizontal direction of a device according to a seventh embodiment of the present application is shown.

[0020] Figure 7B A cross-sectional view in the second horizontal direction of a device according to a seventh embodiment of the present application is shown.

[0021] Figure 8 A schematic diagram of a device according to an eighth embodiment of the present application is shown.

[0022] Figure 9 A schematic diagram of a device according to a ninth embodiment of the present application is shown.

[0023] Figure 10 A schematic diagram of a device according to a tenth embodiment of the present application is shown.

[0024] Figure 11 A schematic diagram of a device according to an eleventh embodiment of the present application is shown.

[0025] Figure 12 A schematic diagram of a device according to a twelfth embodiment of the present application is shown.

[0026] Figure 13 A flow chart of another method for manufacturing a device according to an embodiment of the present application is shown.

[0027] Figure 14A A cross-sectional view of a device according to the thirteenth embodiment of the present application during a manufacturing process is shown.

[0028] Figure 14B The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14A A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0029] Figure 14C The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14BA cross-sectional view of the manufacturing process following the manufacturing process shown.

[0030] Figure 14D The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14C A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0031] Figure 14E The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14D A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0032] Figure 14F The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14E A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0033] Figure 14G The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14F A cross-sectional view of the manufacturing process following the manufacturing process shown. DETAILED DESCRIPTION

[0034] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In the detailed description below, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present application.

[0035] The terms used herein are only for describing specific embodiments and are not intended to limit this application. The terms "comprise," "include," etc. used herein indicate the presence of the features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0036] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0037] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0038] It should be noted that the terms "center," "longitudinal," "transverse," "length," "width," "thickness," "upper," "lower," "front," "back," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like, indicating positions or relationships, are based on the positions or relationships shown in the accompanying drawings and are intended solely for ease of description and simplification of the present application. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limiting the present application. The terms "mounted," "connected," and "connected" should be interpreted broadly, and may include, for example, fixed, removable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediary; and internal communication between two components. The terms "parallel," "perpendicular," and "equal" encompass the described conditions and conditions similar to the described conditions, provided that the range of the similar conditions is within an acceptable range of deviation, as determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes both absolute parallelism and approximate parallelism, where the acceptable deviation range for approximate parallelism may be, for example, within 5°; "perpendicular" includes both absolute perpendicularity and approximate perpendicularity, where the acceptable deviation range for approximate perpendicularity may also be, for example, within 5°. "Equal" includes both absolute equality and approximate equality, where the acceptable deviation range for approximate equality may be, for example, that the difference between the two is less than or equal to 5% of either. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0039] For server equipment, the dielectric constant (Dk) is generally around 3.7, the dielectric thickness of the device's circuit board is approximately 4-5 mils, and the copper trace thickness is approximately 1.2 mil. Based on this, designing the differential trace width of the device's circuit board to 3-3.5 mils can achieve an impedance of 85 ohms, meeting the required impedance. However, when using a step-by-step build-up method to form high-order HDI (HDI) devices, the relatively thick circuit boards can result in a high aperture ratio of the vias, making it difficult to effectively fill the vias using electroplating. This results in the center top of the conductive material inside the via being recessed relative to the inner wall of the via. This difficulty in effectively filling the vias becomes more severe as the device's order increases, increasing the difficulty of filling the vias in the next-order HDI layer, further hindering the realization of high-order HDI for servers. For example, high-order HDI refers to HDI with eight or more stacked circuit boards.

[0040] In view of this, the present application provides a device that can realize high-order HDI with effective interconnection of metal traces on different layers.

[0041] Figure 1 FIG1 shows a schematic diagram of a device according to the first embodiment of the present application. It should be noted that, in order to facilitate the illustration of the various metal traces in the device, Figure 1 Other structures in the device are not shown in the figure. The drawings described below in this application are similar to this and will not be described in detail here.

[0042] like Figure 1 As shown, the device may include multiple circuit boards stacked in a vertical direction Z and metal traces disposed between the multiple circuit boards. For example, the multiple circuit boards include one or more first circuit boards of a first thickness W11, one or more second circuit boards of a second thickness W12 on the first circuit board, and one or more third circuit boards of a third thickness W13 on the second circuit board. For example, the multiple circuit boards may include a first layer circuit board 111_L1 of a first thickness, a second layer circuit board 111_L2 of a second thickness on the first layer circuit board, and a third layer circuit board 111_L3 of a third thickness on the second layer circuit board. It should be understood that this is merely an example, and in embodiments of the present application, a fourth circuit board of a fourth thickness, a fifth circuit board of a fifth thickness, and so on may also be included.

[0043] The metal traces between the multiple circuit boards may include at least two layers of metal traces. The at least two layers of metal traces may include a first layer of metal traces 121_I1 and a second layer of metal traces 121_I2. The multiple circuit boards and the multiple metal traces may extend in a horizontal direction. The horizontal direction may be a first horizontal direction X or a second horizontal direction Y, which is not limited in this application.

[0044] Any two layers of metal traces in the at least two layers of metal traces can be connected via a connection portion located between the two layers of metal traces. For example, the connection portion can be an intra-board connection portion, which can be formed by a conductive material in a via in a circuit board. Specifically, the first layer metal trace 121_I1 and the second layer metal trace 121_I2 can be connected via a connection portion 121_S. The second layer metal trace 121_I2 and the connection portion 121_S can be formed together through an electroplating process. Figure 1 , it can be seen that the center top of the connection portion 121_S, that is, the center top of the conductive material in the via, is recessed relative to the top of the via's inner sidewall. This recess increases the difficulty of filling the via when making the next-level connection. As the interconnection level increases, the difficulty of filling the via increases, increasing the risk of product scrapping. This limits the number of HDI levels in products such as servers, making it difficult to achieve high-level HDI interconnects in servers and other products.

[0045] In this regard, the present application controls the first thickness W11, the second thickness W12, and the third thickness W13 of each of the above-mentioned circuit boards to decrease in sequence in the vertical direction Z, so that the thickness of multiple circuit boards in the vertical direction Z is thinned layer by layer. While ensuring the impedance matching of the equipment, the punching quality and the hole filling quality of each order of circuit boards can be improved, and the difficulty of hole filling can be reduced, thereby realizing high-order HDI interconnection. It should be understood that the fourth circuit board of the fourth thickness on the third circuit board of the third thickness and the fifth circuit board of the fifth thickness on the fourth circuit board and so on can also be thinned layer by layer, which will not be elaborated here. Among them, when the parameters such as the dielectric constant of the circuit board, the line width of the metal trace, and the line spacing of the metal trace are constant, the thickness of the circuit board can be positively correlated with the impedance.

[0046] On this basis, Figure 2A FIG. 1 is a flow chart showing a method for manufacturing a device according to an embodiment of the present application. Figure 2A As shown, the method for manufacturing a device according to this embodiment includes operation S210 .

[0047] In operation S210 , a plurality of circuit boards stacked in a vertical direction, metal traces between the plurality of circuit boards, and a connection portion connecting at least two layers of metal traces are formed.

[0048] Figure 2Bshows a cross-sectional view of a device according to a second embodiment of the present application during a manufacturing process, Figure 2C The device according to the second embodiment of the present application is shown in FIG. Figure 2B A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 2D The device according to the second embodiment of the present application is shown in FIG. Figure 2C A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0049] like Figure 2B As shown in the embodiment of the present application, a via hole extending in the vertical direction Z and passing through the circuit board can be formed on any circuit board. For example, a via hole pattern can be formed on the second layer circuit board by a dry film process, and then the second circuit board is punched using a laser to form the first via hole 131_1. Figure 2B Also shown is a second via 131_2 on the third-layer circuit board. It should be understood that this is for illustrative purposes only. In another implementation of the present application, the first via 131_1 and the second via 131_2 can be formed sequentially in different process flows. The first via 131_1 can partially expose the top surface of the metal trace on the first-layer circuit board. The second via 131_2 can partially expose the top surface of the metal trace on the second-layer circuit board.

[0050] Continue to refer Figure 2B , it can be seen that the inner sidewalls of the vias of different circuit boards at different heights are inclined at different angles relative to the vertical direction Z. For example, the inner sidewall of the first via 131_1 is inclined at a first angle ∠1 relative to the vertical direction Z, and the inner sidewall of the second via 131_2 is inclined at a second angle ∠2 relative to the vertical direction Z. Since the third thickness W13 is less than the second thickness W12, the quality of the via 131_2 formed in the third-layer circuit board 111_L3 is better than that of the second-layer circuit board 111_L2, and therefore the second angle ∠2 is less than the first angle ∠1.

[0051] refer to Figure 2B to Figure 2C, the connection portion within the via and the metal trace on the circuit board can be formed using an electroplating process. For example, the first connection portion 121_S1 within the first via 131_1 and the first metal trace 121_I3 on ​​the top surface of the second-layer circuit board can be formed using an electroplating process. Furthermore, the second connection portion 121_S2 within the second via 131_2 and the second metal trace 121_I4 on the top surface of the second-layer circuit board can be formed using an electroplating process. It can be seen that because the inner sidewalls of the vias of circuit boards at different heights have different inclination angles relative to the vertical direction Z, the contact interfaces between the connection portions within the vias of different circuit boards and the circuit boards (i.e., the contact interfaces with the inner sidewalls of the vias) have different inclination angles relative to the vertical direction Z. The inclination angle of the contact plane of the connection portion within the circuit board is positively correlated with the thickness of the circuit board; that is, the thicker the circuit board, the greater the inclination angle of the contact plane. Thus, in one embodiment of the present application, since the thickness of the multi-layer circuit board decreases layer by layer in the vertical direction Z, the inclination angles of the second connection portions at different heights also show a decreasing trend in the vertical direction Z.

[0052] refer to Figure 2B to Figure 2D , a new circuit board, such as a fourth circuit board 111_L4, can be formed on the third circuit board 111_L3. Figure 2B to Figure 2D The horizontal portion of the third layer circuit board 111_L3 is padded so that the left side of the third layer circuit board 111_L3 is flush with the left sides of the other circuit boards in the vertical direction Z, and the third layer circuit board and the fourth layer circuit board after filling are shown. It should be understood that the structure of the vias after filling is only for illustration and is not intended to limit the actual structure of this application. Figure 2B to Figure 2D In the embodiment, the center top of any connection part among the multiple connection parts is recessed relative to the top of the inner side wall of the through hole of any connection part. The degree of recess of any connection part is positively correlated with the thickness of the circuit board in which the connection part is located. For example, the fourth-layer circuit board is thinner than the third-layer circuit board, so that the recess distance D2 of the fourth-layer circuit board is smaller than the recess distance of the connection part in the third-layer circuit board D1. In this way, the recess degree of the top of the connection parts of the multiple circuit boards can be reduced layer by layer from bottom to top, thereby reducing the difficulty of filling the holes when the number of layers of the circuit board increases, thereby realizing the interconnection of high-order HDI.

[0053] However, in some cases, due to the thick dielectric of the circuit board, it may be difficult to penetrate the circuit board during the process of using a laser to punch holes in the dielectric of the circuit board. In the circuit board, since the laser fails to penetrate the dielectric inside the circuit board, a failed hole is formed. This will make it impossible for metal traces at different heights to be interconnected. On a single product, there are thousands or even tens of thousands of laser holes in each layer of connection. The failure of any hole will cause the product to fail, thereby making the product scrapped. This will increase the resources required to produce high-order HDI equipment and increase the processing cycle. On this basis, the present application proposes another device that can solve this problem and realize the effective interconnection of metal traces on any layer in high-order HDI equipment.

[0054] Figure 3 A schematic diagram of a device according to a third embodiment of the present application is shown.

[0055] like Figure 3 As shown, the device of this embodiment may include a multilayer circuit board stacked in a vertical direction Z and metal traces disposed within the multilayer circuit board. The multilayer circuit board may have inclined side surfaces that are tilted relative to the vertical direction Z. The circuit board may have inclined side surfaces oriented in a horizontal direction, such as at least one of an inclined side surface oriented in a first horizontal direction X or an inclined side surface oriented in a second horizontal direction Y. The first horizontal direction X intersects (e.g., is perpendicular to) the second horizontal direction Y. For example, the multilayer circuit board may include at least two first circuit boards L1. The first circuit board L1 has inclined side surfaces that are tilted at a first angle F1 relative to the vertical direction Z. For example, the upper surface (i.e., the upper surface of the uppermost circuit board) and the lower surface (i.e., the lower surface of the lowermost circuit board) of the device may extend in the first horizontal direction X and the second horizontal direction Y. The inclined side surface of the first circuit board L1 may extend obliquely relative to the lower surface. The inclined side surface may form an acute angle with the lower surface of the device. In this case, the angle formed by the inclined side surface and the lower surface is complementary to the first angle F1. And the embodiments of the present application are not limited thereto, the inclined side surface may also form an obtuse angle with the lower surface of the circuit board. In this case, the angle formed by the inclined side surface and the lower surface differs from the first angle F1 by 90°.

[0056] The above-mentioned at least two layers of first circuit boards L1 may include at least two layers of first metal traces I1. The first metal traces I1 extend to the inclined side surface of the first circuit board L1 in the horizontal direction (for example, at least one of the first horizontal direction X and the second horizontal direction Y). In addition, the connection portion of the embodiment of the present application is not limited to the above-mentioned connection portion formed based on the via, but also includes a surface connection portion extending on the inclined side surface. The interface where the surface connection portion connects to the circuit board may also have a certain angle relative to the vertical direction. The device of this embodiment may also include a first surface connection portion S1 on the inclined side surface of the first circuit board L1. The first surface connection portion S1 connects the ends of at least two layers of first metal traces I1, thereby electrically contacting the respective ends of at least two layers of first metal traces I1. For example, the first surface connection portion S1 may at least partially cover the ends of at least two layers of first metal traces I1. In this way, at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. It should be understood that in Figure 3 The number of metal traces, surface connection parts and circuit boards shown in the figure is for illustration only. Other embodiments of the present application may include other numbers of metal traces, surface connection parts and circuit boards.

[0057] Based on this, at least two layers of first metal traces I1 inside the device are simultaneously connected to the first surface connection portion S1 on the inclined side surface of the first circuit board L1, and an effective electrical connection is achieved through the first surface connection portion S1. In this way, when there are many levels of interconnected metal traces, the surface connection portion on the inclined side surface can ensure the effectiveness of the interconnection between metal traces of different layers. Based on this, since there is no need to fill the vias in the circuit board to form the connection portion connecting the metal traces of different layers, the problem of difficulty in manufacturing high-order HDI devices due to the difficulty in effectively filling the holes in the related art is avoided, and the problem of via failure caused by the laser not drilling through the hole is avoided. In this way, the present application can interconnect metal traces of different layers based on the surface connection portion extending on the inclined side surface, reducing the difficulty of manufacturing high-order HDI devices, thereby realizing high-order HDI devices and ensuring the effectiveness of the interconnection between metal traces of each layer in the device.

[0058] On this basis, continue to refer to Figure 3The value of the first angle F1 can be at least partially determined by the thickness of the at least two layers of the first circuit board L1 and the number of layers of the at least two layers of the first metal traces I1. For example, if the thickness of the at least two layers of the first circuit board L1 is fixed, the value of the first angle F1 is positively correlated with the number of layers of the at least two layers of the first metal traces I1. For example, the number of layers of the first circuit board L1 is greater than or equal to 2, and the at least two layers of the first circuit board L1 can be stacked sequentially in the vertical direction Z. Furthermore, the at least two layers of the first metal traces I1 can be located at different heights within the first circuit board L1. In this case, the greater the number of layers of the at least two layers of the first metal traces I1, that is, the greater the number of layers of the first metal traces I1 distributed across different layers in the vertical direction Z, the greater the value of the first angle F1. This allows the inclined side surfaces of the at least two layers of the first circuit board L1 to expose more ends of the first metal traces I1, thereby allowing for electrical connection of as many of the exposed ends of the first metal traces I1 as possible on the inclined side surfaces of the first circuit board L1.

[0059] For example, a first distance between the end of the topmost first metal trace I1 of at least two layers of first metal traces I1 close to the inclined side surface of the first circuit board L1 and the end of the bottommost first metal trace I1 close to the inclined side surface of the first circuit board L1 can be determined. This first distance can be used as the hypotenuse length in the sine formula. In addition, a second distance between the topmost first metal trace I1 and the bottommost first metal trace I1 in the vertical direction Z can be determined. This second distance can be used as the opposite side length in the sine formula. The sine formula can then be used to process the first distance and the second distance to obtain a sine value, thereby determining the angle value between the inclined side surface and the lower surface of the device based on the sine value, thereby determining the angle value of the first angle F1.

[0060] In addition, in addition to the step-by-step lamination method, in some examples, full lamination and other methods can also be used to achieve high-order HDI interconnection. This method requires filling the vias with conductive materials such as conductive paste or copper, and then signal reflection will occur at the location of the conductive paste or copper, which makes it difficult to meet the transmission requirements of high-speed signals, and the yield rate of the equipment manufactured by this method is low. In this regard, in some embodiments of the present application, the first surface connection portion S1 and the first metal trace I1 may include the same material. For example, the first surface connection portion S1 and the first metal trace I1 may include the same metal material, such as copper. In this way, signal reflection can be reduced relative to the related art, thereby improving the transmission quality of high-speed signals.

[0061] Furthermore, since the ends of at least two layers of first metal traces I1 are electrically connected via the first surface connection portion S1, at least two layers of first metal traces I1 are not electrically connected via the conductive material filled in the via hole, which can increase the dielectric thickness and thus improve the dielectric impedance without affecting the interconnection quality. On this basis, a new inclined side surface of the device can be formed and a new surface connection portion can be formed on the new inclined side surface to increase the number of interconnected metal traces. Alternatively, a new surface connection portion can be formed on the original inclined side surface to interconnect the metal traces with their ends exposed on the original inclined side surface via the new surface connection portion, thereby increasing the number of interconnected metal traces. The following is combined with Figure 4A and Figure 4B Provide explanation.

[0062] Figure 4A 1 shows a cross-sectional view of a device according to a fourth embodiment of the present application in a first horizontal direction, Figure 4B FIG2 shows a cross-sectional view of the device according to the fourth embodiment of the present application in the second horizontal direction. It is additionally noted that, Figure 4A The contact interface between the circuit boards is shown in FIG. Figure 4B For the sake of convenience, the contact interfaces between the circuit boards are not shown, but the Figure 4A The upper surface interface of the step, which is only visible when viewed from the middle right, is the same as the various drawings described below in this application and will not be described in detail later.

[0063] refer to Figure 4A and Figure 4B In the device of this embodiment, the multi-layer circuit board may include at least two layers of first circuit boards L1 and at least two layers of second circuit boards L2. The first circuit board L1 has an inclined side surface inclined at a first angle F1 relative to the vertical direction Z. The second circuit board L2 has an inclined side surface inclined at a second angle F2 relative to the vertical direction Z, and the first angle F1 and the second angle F2 may be different angles. In this way, the device of the present application can simultaneously have inclined side surfaces with multiple inclination angles, so that different surface connection portions can be formed on the inclined side surfaces with different inclination angles, thereby realizing flexible and arbitrary interconnection of high-order HDI.

[0064] The metal traces disposed within the multilayer circuit board may include at least two layers of first metal traces I1 and at least two layers of second metal traces I2. The first metal trace I1 extends horizontally to the inclined side surface of the first circuit board L1. The second metal trace I2 extends horizontally to the inclined side surface of the second circuit board L2. The first metal trace I1 and the second metal trace I2 may be located in different areas of the multilayer circuit board. For example, the different areas may be divided based on height, and the first metal trace I1 and the second metal trace I2 may be at different heights in the vertical direction. Correspondingly, the first surface connection portion S1 and the second surface connection portion S2 may be at different heights in the vertical direction.

[0065] The device of this embodiment may also include a first surface connection portion S1 extending on the inclined side surface of the first circuit board L1 and a second surface connection portion S2 extending on the inclined side surface of the second circuit board L2. The first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z, and is connected to the ends of at least two layers of first metal traces I1, thereby electrically contacting at least two layers of first metal traces I1. In this way, at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. Similarly, the second surface connection portion S2 is located between at least two layers of second metal traces I2 in the vertical direction Z, and is connected to the ends of at least two layers of second metal traces I2, thereby electrically contacting at least two layers of second metal traces I2. In this way, at least two layers of second metal traces I2 can be electrically connected via the second surface connection portion S2. It should be understood that in Figure 4A and Figure 4B The number of metal traces, surface connection parts and circuit boards shown in the figure is for illustration only. Other embodiments of the present application may include other numbers of metal traces, surface connection parts and circuit boards.

[0066] Based on this, surface connection parts of different heights can be arbitrarily formed on different inclined side surfaces of different circuit boards. These surface connection parts of different heights can each interconnect part of the metal traces in the multi-layer metal traces, so that the effective interconnection of any at least two layers of metal traces can be achieved. In addition, the device can also include other metal traces that are not in electrical contact with the first surface connection part S1 and the second surface connection part S2. It should be understood that this application is not limited to Figure 4A and Figure 4B The two surface connection parts shown in FIG. 3 can be used to connect the metal lines on the inclined side surface of the device as needed.

[0067] Continue to refer Figure 4A and Figure 4BIn one embodiment of the present application, the metal traces disposed within the multilayer circuit board may include metal traces for transmitting different types of signals. The metal traces for transmitting different types of signals may be located in different regions. Specifically, the first metal traces I1 and the second metal traces I2 may be used to transmit different types of signals. For example, at least two layers of the first metal traces I1 may be located in a first region in the vertical direction Z, and at least two layers of the second metal traces may be located in a second region in the vertical direction Z. Specifically, the metal traces in the first region may be used to transmit power signals. The metal traces in the second region may be used to transmit data signals different from the power signals. For another example, the metal traces in the first region may be used to transmit high-speed signals such as Peripheral Component Interconnect Express (PCIe) signals. The metal traces in the second region may be used to transmit low-speed signals, which are slower than PCIe signals. It should be understood that this is merely an example and the present application is not limited thereto. In another embodiment of the present application, in addition to dividing the regions by height, the regions may also be divided horizontally, although this application is not limited thereto.

[0068] Furthermore, in an embodiment of the present application, the end of the first metal trace may have an interface flush with the inclined side surface of the first circuit board. Accordingly, the first surface connection portion connects to at least two layers of first metal traces via the interface of at least two layers of first metal traces. Similarly, the end of the second metal trace may have an interface flush with the inclined side surface of the second circuit board. Furthermore, the second surface connection portion connects to at least two layers of second metal traces via the interface of at least two layers of second metal traces. The area of ​​the interface of the first metal trace is different from the area of ​​the interface of the second metal trace. In one implementation, the inclined side surface of the first circuit board and the inclined side surface of the second circuit board may be formed by milling. In this manner, the greater the milling angle, the larger the area of ​​the interface of the end of the metal trace exposed through the side surface. Specifically, the inclined side surface of the first circuit board is inclined at a first angle relative to the vertical direction, and the inclined side surface of the second circuit board is inclined at a second angle relative to the vertical direction. When the first angle is greater than the second angle, the area of ​​the interface at the end of the first metal trace is greater than the area of ​​the interface at the end of the second metal trace. When the first angle is smaller than the second angle, the area of ​​the interface at the end of the first metal trace is smaller than the area of ​​the interface at the end of the second metal trace. On this basis, different surface connections can be used on different inclined side surfaces for interconnection, thereby realizing a high-order HDI structure. Furthermore, the first angle can be greater than 0° and less than 90°; the second angle can be greater than 0° and less than 90°. For example, after the milling process, it is necessary to use laser patterning and electroplating processes to form a surface connection on the inclined side surface. If the angle is greater than or equal to 90°, it is difficult to use processes such as laser patterning and electroplating to realize the surface connection set on the inclined side surface, making it difficult to realize the high-order HDI structure of the present application. If the angle is equal to 0°, there is no need to use laser patterning and electroplating processes to form a surface connection on the inclined side surface, and the traces extending in the horizontal direction can be directly formed. In this way, designing the inclined angle of the inclined side surface to be 0°~90° can realize the concept of the inclined high-order HDI structure of the present application.

[0069] Figure 5 A cross-sectional view in a first horizontal direction of a device according to a fifth embodiment of the present application is shown.

[0070] refer to Figure 5 In the device of this embodiment, the multilayer circuit board may also include at least two layers of first circuit boards L1 and at least two layers of second circuit boards L2. The first circuit board L1 has an inclined side surface inclined at a first angle relative to the vertical direction Z. For example, the inclined side surface of the first circuit board L1 may include an inclined side surface with a first orientation and an inclined side surface with a second orientation different from the first orientation. Specifically, the first circuit board L1 may have an inclined side surface with a first orientation. Figure 5 The inclined side surface on the left side and the direction Figure 5 The inclined side surface on the right side of the middle. It should be understood that in the embodiment of the present application, the specific directions of the first orientation and the second orientation are not limited, nor is the number of inclined side surfaces of the first circuit board L1 facing different directions limited. For example, the first circuit board L1 may also have an inclined side surface facing the second horizontal direction Y, and so on. Similarly, the second circuit board L2 has an inclined side surface in the horizontal direction that is inclined at a second angle relative to the vertical direction Z, and the first angle and the second angle may be different angles. For example, the inclined side surface of the second circuit board may include an inclined side surface facing the first orientation and an inclined side surface facing the second orientation. For example, the second circuit board may also have an inclined side surface facing Figure 5 The inclined side surface on the left side and the direction Figure 5 It should be understood that the embodiment of the present application also does not limit the number of inclined side surfaces of the second circuit board L2 facing different directions. For example, the second circuit board L2 may also have an inclined side surface facing the second horizontal direction Y, and so on.

[0071] The metal traces arranged inside the multi-layer circuit board may include at least two layers of first metal traces I1 and at least two layers of second metal traces I2. The first metal traces I1 extend horizontally to the inclined side surface of the first circuit board L1. The second metal traces I2 extend horizontally to the inclined side surface of the second circuit board L2. For example, the orientation of the inclined side surface of the first circuit board L1 to which the first metal traces I1 extend and the inclined side surface of the second circuit board L2 to which the second metal traces extend may be the same or different. Figure 5 In the illustrated example, the inclined side surface of the first circuit board L1 to which the first metal trace I1 extends and the inclined side surface of the second circuit board L2 to which the second metal trace extends have different orientations.

[0072] The device of this embodiment may also include a first surface connection portion S1 extending on an inclined side surface of one side of the first circuit board L1 and a second surface connection portion S2 extending on an inclined side surface of one side of the second circuit board L2. For example, the orientation of the inclined side surface of the first circuit board L1 where the first surface connection portion S1 is located and the inclined side surface of the second circuit board where the second surface connection portion S2 is located may be the same or different. Figure 5 In the illustrated example, the inclined side surface of the first circuit board L1 where the first surface connection portion S1 is located and the inclined side surface of the second circuit board where the second surface connection portion S2 is located are oriented in different directions.

[0073] On this basis, the first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z, and is connected to one side end portion of at least two layers of first metal traces I1, thereby electrically contacting at least two layers of first metal traces I1. In this way, at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. Similarly, the second surface connection portion S2 is located between at least two layers of second metal traces I2 in the vertical direction Z, and is connected to one side end portion of at least two layers of second metal traces I2, thereby electrically contacting at least two layers of second metal traces I2. In this way, at least two layers of second metal traces I2 can be electrically connected via the second surface connection portion S2. It should be understood that in Figure 5 The number of metal traces, surface connection parts and circuit boards shown in the figure is for illustration only. Other embodiments of the present application may include other numbers of metal traces, surface connection parts and circuit boards.

[0074] Based on this, reference Figure 5 It can be seen that surface connection portions can be formed on side surfaces in different orientations, and the surface connection portions on the inclined side surfaces in different orientations and at different heights can each interconnect part of the metal traces in the multi-layer metal traces, thereby achieving effective interconnection of any at least two layers of metal traces on different side surfaces.

[0075] Figure 6A FIG. 4 shows a cross-sectional view of a device according to a sixth embodiment of the present application in a first horizontal direction X, Figure 6B A cross-sectional view in the second horizontal direction Y of a device according to a sixth embodiment of the present application is shown.

[0076] refer to Figure 6A and Figure 6B In the device of this embodiment, the multilayer circuit board may include at least two layers of first circuit boards L1 and at least two layers of second circuit boards L2. The first circuit board L1 has an inclined side surface inclined at a first angle relative to the vertical direction Z. The second circuit board L2 has an inclined side surface inclined at a second angle relative to the vertical direction Z, and the first angle and the second angle may be different angles. The metal traces arranged inside the multilayer circuit board may include at least two layers of first metal traces I1 and at least two layers of second metal traces I2. The first metal traces I1 extend in the horizontal direction to the inclined side surface of the first circuit board L1. The second metal traces I2 extend in the horizontal direction to the inclined side surface of the second circuit board L2.

[0077] The device of this embodiment may also include a first surface connection portion S1 extending on the inclined side surface of the first circuit board L1 and a second surface connection portion S2 extending on the inclined side surface of the second circuit board L2. The first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z and is connected to one side end portion of the at least two layers of first metal traces I1, thereby electrically contacting the at least two layers of first metal traces I1. In this way, the at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. Similarly, the second surface connection portion S2 is located between at least two layers of second metal traces I2 in the vertical direction Z and is connected to one side end portion of the at least two layers of second metal traces I2, thereby electrically contacting the at least two layers of second metal traces I2. In this way, the at least two layers of second metal traces I2 can be electrically connected via the second surface connection portion S2.

[0078] In addition, the device of this embodiment may further include a third surface connection portion S3, which may extend on the upper surface of the uppermost circuit board in the multi-layer circuit board and be connected to one of the first surface connection portion S1 and the second surface connection portion S2, thereby forming a continuous integral structure. Figure 6A and Figure 6B In the embodiment, the third surface connection portion S3 is in electrical contact with the second surface connection portion S2 and forms a continuous integral structure with the second surface connection portion S2. In this way, the second surface connection portion S2 can be electrically connected to other structures on the upper surface of the device via the third surface connection portion S3. For example, the other structures here can be devices ( Figure 6A and Figure 6B (Not shown in the figure). Because the second surface connection portion S2 and the third surface connection portion S3 extend on the inclined side surface of the second circuit board L2 and the upper surface of the device, respectively, an angle is formed between the second surface connection portion S2 and the third surface connection portion S3 toward the circuit board. For example, this angle can be an obtuse angle. The present application is not limited to this. In some embodiments, this angle can also be an acute angle. It should be understood that in this embodiment, this angle can be complementary to the angle between the inclined side surface and the lower surface of the device described above.

[0079] Based on this, reference Figure 6A and Figure 6B It can be seen that at least one of the first surface connection portion S1 and the second surface connection portion S2 on the side surface can be extended to connect to the device on the upper surface of the device via the third surface connection portion S3, so that effective interconnection of devices on different layers is achieved on both the inclined side surface and the upper surface. In addition, the device may also include other metal traces that are not in electrical contact with the first surface connection portion S1 and the second surface connection portion S2. It should be understood that this application is not limited to Figure 6A and Figure 6B The three surface connection parts shown in the figure can also be provided with more surface connection parts as needed to realize the interconnection of metal traces on the inclined side surface of the device.

[0080] Figure 7A : shows a cross-sectional view of a device according to a seventh embodiment of the present application in a first horizontal direction, Figure 7B A cross-sectional view in the second horizontal direction of a device according to a seventh embodiment of the present application is shown.

[0081] refer to Figure 7A and Figure 7B In the device of this embodiment, the multilayer circuit board may include at least two layers of first circuit boards L1 and at least two layers of second circuit boards L2. The first circuit board L1 has an inclined side surface inclined at a first angle relative to the vertical direction Z. The second circuit board L2 has an inclined side surface inclined at a second angle relative to the vertical direction Z, and the first angle and the second angle may be different angles. The metal traces arranged inside the multilayer circuit board may include at least two layers of first metal traces I1 and at least two layers of second metal traces I2. The first metal traces I1 extend in the horizontal direction to the inclined side surface of the first circuit board L1. The second metal traces I2 extend in the horizontal direction to the inclined side surface of the second circuit board L2.

[0082] The device of this embodiment may also include a first surface connection portion S1 extending on the inclined side surface of the first circuit board L1 and a second surface connection portion S2 extending on the inclined side surface of the second circuit board L2. The first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z and is connected to one side end portion of the at least two layers of first metal traces I1, thereby electrically contacting the at least two layers of first metal traces I1. In this way, the at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. Similarly, the second surface connection portion S2 is located between at least two layers of second metal traces I2 in the vertical direction Z and is connected to one side end portion of the at least two layers of second metal traces I2, thereby electrically contacting the at least two layers of second metal traces I2. In this way, the at least two layers of second metal traces I2 can be electrically connected via the second surface connection portion S2.

[0083] In addition, the device of this embodiment may further include a third surface connection portion S3. Figure 7A and Figure 7B In the embodiment, the third surface connection portion S3 is electrically in contact with the first surface connection portion S1 and the second surface connection portion S2 and forms a continuous integral structure with the first surface connection portion S1 and the second surface connection portion S2, so that the first surface connection portion S1 and the second surface connection portion S2 can be electrically connected to other structures on the upper surface of the device via the third surface connection portion S3.

[0084] Continue to refer Figure 7A The multilayer circuit board may further include at least two layers of third circuit boards L3. Each of the at least two layers of third circuit boards L3 includes a via filled with a conductive material. The third metal traces I3 of the at least two layers of third circuit boards L3 can be electrically connected via the conductive material filled in the vias. The inner sidewalls of the vias of the at least two layers of third circuit boards L3 are inclined relative to the vertical direction Z. The inner sidewall inclination angle of the vias of the upper third circuit board L3 of the at least two layers of third circuit boards L3 is smaller than the inner sidewall inclination angle of the vias of the lower third circuit board L3, and the thickness of the upper third circuit board is thinner than that of the lower third circuit board. Correspondingly, if the thickness of the upper third circuit board is thicker than that of the lower third circuit board, the inner sidewall inclination angle of the vias of the upper third circuit board L3 is larger than the inner sidewall inclination angle of the vias of the lower third circuit board L3. For example, the center top of the conductive material in the vias of the upper third circuit board L3 is recessed by a first distance relative to the top of the inner sidewall of the vias of the upper third circuit board L3. The center top of the conductive material in the via of the third circuit board L3 below has a second recessed distance relative to the top of the inner side wall of the via of the third circuit board L3 below. The first recessed distance is smaller than the second recessed distance. On this basis, by controlling the thickness of the multi-layer third circuit board L3 to decrease layer by layer from bottom to top, the impedance of the multi-layer third circuit board can be made to meet the impedance conditions of the equipment while improving the punching quality, so that the angle between the inner side wall of the via and the vertical direction decreases layer by layer, thereby improving the quality of filling the via with conductive material, reducing the degree of recess of the conductive material relative to the inner side wall of the via, and reducing the difficulty of forming high-order HDI due to the recess of the conductive material, so that high-order HDI can be manufactured. Specifically, the first recessed distance can be 0~1.5 mil, and the second recessed distance can be 0~1.5 mil. For example, if the circuit board thickness is 4 mil, the recess distance can be 1.5 mil; if the circuit board thickness is 3.5 mil, the recess distance can be 1.2 mil; if the circuit board thickness is 3 mil, the recess distance can be 0.8 mil; if the circuit board thickness is 2.5 mil, the recess distance can be 0.3 mil; and if the circuit board thickness is 2 mil, the recess distance can be 0 mil. This shows that the thickness difference of the circuit board layer by layer can be smaller than the distance difference of the recess distance layer by layer. A recess distance of 1.5 mil ensures the usability of the equipment and avoids equipment scrapping. Furthermore, the recess distance of the conductive material in at least two third layers of the circuit board is gradually reduced from 1.5 mil to 0, achieving the best hole filling quality and minimizing the difficulty of manufacturing high-order HDI.

[0085] It should be noted that, although in this embodiment, the first surface connection portion S1, the second surface connection portion S2, the third surface connection portion S3 and the connection portion formed based on the via hole appear at the same time, this is not used to limit the embodiments of the various connection portions in this application, that is, in the embodiments of other figures, connection portions that do not appear in the embodiments of other figures can also be provided, that is, the various embodiments of this application can be arbitrarily combined, subject to the ability of those skilled in the art to implement. For example, in a device of one embodiment of this application, the three-layer third metal trace I3 is electrically connected via two via holes of different heights, then the device of this embodiment can also apply the aforementioned features such as multiple circuit boards that are successively thinned in the vertical direction to achieve the purpose described above in this application, which will not be elaborated here.

[0086] Figure 8 A schematic diagram of a device according to an eighth embodiment of the present application is shown.

[0087] refer to Figure 8 In the device of this embodiment, the multilayer circuit board may include at least two layers of first circuit boards L1 and at least two layers of second circuit boards L2. The first circuit board L1 has an inclined side surface inclined at a first angle F1 relative to the vertical direction Z. For example, the inclined side surface of the first circuit board L1 may include an inclined side surface facing a first direction and an inclined side surface facing a second direction. For example, the first circuit board L1 may have an inclined side surface facing a first direction. Figure 8 The inclined side surface on the left side and the direction Figure 8 Similarly, the second circuit board L2 has an inclined side surface that is inclined at a second angle relative to the vertical direction Z. For example, the inclined side surface of the second circuit board may include an inclined side surface with a first orientation and an inclined side surface with a second orientation different from the first orientation. In this embodiment, the second circuit board L2 may have both an inclined side surface with the same inclination angle as the inclined side surface of the first circuit board L1 and an inclined side surface with a different inclination angle than the inclined side surface of the first circuit board L1.

[0088] The metal traces arranged between the multilayer circuit boards may include at least two layers of first metal traces I1 and at least two layers of second metal traces I2. The first metal trace I1 extends horizontally to the inclined side surface of the first circuit board L1. The second metal trace I3 extends horizontally to the inclined side surface of the second circuit board L1. In this embodiment, the inclined side surface of the first circuit board L1 to which one end of the first metal trace I1 extends and the inclined side surface of the second circuit board L2 to which one end of the second metal trace extends have different orientations and different inclination angles.

[0089] The device of this embodiment may further include a first surface connection portion S1 extending on an inclined side surface of one side of the first circuit board L1, and a second surface connection portion S2 extending on an inclined side surface of one side of the second circuit board L2. In this embodiment, the inclined side surface of the first circuit board L1 on which the first surface connection portion S1 is located and the inclined side surface of the second circuit board on which the second surface connection portion S2 is located are oriented in different directions and have different inclination angles.

[0090] On this basis, the first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z and is connected to one end portion of the at least two layers of first metal traces I1, thereby electrically contacting the at least two layers of first metal traces I1. In this way, the at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. Similarly, the second surface connection portion S2 is located between at least two layers of second metal traces I2 in the vertical direction Z and is connected to one end portion of the at least two layers of second metal traces I2, thereby electrically contacting the at least two layers of second metal traces I2. In this way, the at least two layers of second metal traces I2 can be electrically connected via the second surface connection portion S2.

[0091] In addition, the device of this embodiment may also include a third surface connection portion S3, which may extend on the upper surface of the topmost circuit board in the multi-layer circuit board and form a continuous integral structure together with the first surface connection portion S1 and the second surface connection portion S2. In this way, the first surface connection portion S1 and the second surface connection portion S2 can be electrically connected to other structures on the upper surface of the device via the third surface connection portion S3. It should be noted that in this embodiment, the first metal trace I1 and the second metal trace I2 can be used to transmit the same signal, but it should also be understood that the embodiment of the present application is not limited to this. The first metal trace I1 and the second metal trace I2 can also transmit different types of signals as described above. In this way, the present application realizes the electrical connection of metal traces on two inclined side surfaces in different height ranges, different orientations, and different inclination angles via the third intra-board connection portion S3, and can extend multiple surface connections on the side surface to connect to the device on the upper surface of the device via the third surface connection portion S3, so that effective interconnection of devices on different layers is achieved on both the inclined side surface and the upper surface.

[0092] Optionally, the inclined side surface may also have various forms, for example, the inclined side surface may be formed as the outer peripheral surface of the circuit board, or may be formed as the groove surface inside the circuit board, etc. Figure 9 ~ and Figure 12 Provide specific instructions.

[0093] Figure 9 A schematic diagram of a device according to a ninth embodiment of the present application is shown.

[0094] refer to Figure 9 In the device of this embodiment, the multilayer circuit board may include at least two first circuit boards L1. The first circuit boards L1 have inclined side surfaces inclined at a first angle F1 relative to a vertical direction Z. In this embodiment, the inclined side surfaces of the at least two first circuit boards L1 may each be inclined at a different angle relative to the vertical direction Z. This may form inclined side surfaces having different slopes.

[0095] The metal traces disposed within the multilayer circuit board may include at least two layers of first metal traces I1. The first metal traces I1 extend horizontally to the inclined side surfaces of the first circuit board L1. In this embodiment, the at least two layers of first metal traces I1 extend horizontally to inclined side surfaces of different first circuit boards L1 having different slopes.

[0096] The device of this embodiment may further include a first surface connection portion S1 extending on the inclined side surface of the first circuit board L1. The first surface connection portion S1 is located between at least two layers of first metal traces I1 in the vertical direction Z, and is connected to one side end portion of at least two layers of first metal traces I1, thereby making electrical contact with at least two layers of first metal traces I1. In this way, at least two layers of first metal traces I1 can be electrically connected via the first surface connection portion S1. In this embodiment, the first surface connection portion S1 can extend on the inclined side surfaces of different slopes of at least two layers of first circuit boards L1, thereby making electrical contact with at least two layers of first metal traces I1 on the inclined side surfaces of different slopes. It should be understood that in Figure 9 The number of metal traces, surface connection parts and circuit boards shown in the figure is for illustration only. Other embodiments of the present application may include other numbers of metal traces, surface connection parts and circuit boards. In this way, it is possible to realize arbitrary interconnection of metal traces of different layers on side surfaces with different slopes. It should be understood that in Figure 9The schematic diagram of the slope of the inclined side surfaces of the different first circuit boards L1 shows a gradually increasing trend from bottom to top. The present application is not limited to this. In other embodiments, the slope of the inclined side surfaces of the different first circuit boards L1 may also gradually decrease from top to bottom. In one embodiment of the present application, one end of the first metal trace I1 has an interface flush with the inclined side surface of the first circuit board L1. The first surface connection portion S1 is connected to at least two layers of first metal traces I1 via the interface between the at least two layers of first metal traces I1. Specifically, the area of ​​the interface at one end of the first metal trace I1 is positively correlated with the first angle. That is, the greater the slope of the inclined side surface, the correspondingly larger the area of ​​the interface at the one end of the first metal trace. This increases the contact area between the first metal trace I1 and the first surface connection portion S1, improving the interconnection effect. The present application is not limited to this. In another embodiment, the thickness of the first metal trace I1 may be positively correlated with the first angle of the inclined side surface of the first circuit board L1 at which the first metal trace I1 is located relative to the vertical direction Z. For example, the thicker the first metal trace I1, the greater the slope (i.e., the angle of inclination relative to the vertical direction Z) of the inclined side surface of the first circuit board L1 to which the first metal trace I1 extends. This allows the first surface connection portion S1, which has a relatively larger area, to better adhere to the inclined side surface, thereby ensuring the stability of the electrical connection between at least two layers of the first metal trace I1. It should be understood that if the first metal trace I1 is thicker, the thickness of the first circuit board L1 can also be controlled to vary accordingly (e.g., become thicker) to ensure impedance matching.

[0097] Figure 10 A schematic diagram of a device according to a tenth embodiment of the present application is shown.

[0098] refer to Figure 10 In the device of this embodiment, the multi-layer circuit board may include at least two layers of first circuit boards L1. The first circuit board L1 has an inclined side surface inclined at a first angle F1 relative to the vertical direction Z. In this embodiment, the inclined side surfaces of the at least two layers of first circuit boards L1 may be inclined at different angles relative to the vertical direction Z. In this way, inclined side surfaces with different slopes may be formed. And the embodiments of the present application are not limited to this. Any number of first circuit boards L1 in the at least two layers of first circuit boards L1 may also have inclined side surfaces in other directions. The inclination angles of the inclined side surfaces of the same first circuit board L1 in different directions relative to the vertical direction Z may be the same or different.

[0099] The metal traces arranged inside the multi-layer circuit board may include at least two layers of first metal traces I1. The first metal traces I1 extend horizontally to the inclined side surfaces of the first circuit board L1. In this embodiment, the at least two layers of first metal traces I1 extend horizontally in different directions to the inclined side surfaces of different first circuit boards L1 with different slopes, and the inclined side surfaces of different first circuit boards L1 with different slopes face different directions. It should be understood that in Figure 10 The inclined side surfaces in different directions of the same first circuit board L1 shown in the figure may be opposite surfaces or adjacent surfaces, which is not limited in the present application.

[0100] In this embodiment, the first surface connection portion S1 may extend on the same-oriented inclined side surfaces of at least two layers of the first circuit board L1 with different slopes, and may electrically contact the first metal traces I1 on at least one of the inclined side surfaces. Furthermore, another first surface connection portion S1 may be provided on the other-oriented inclined side surface of the first circuit board L1, and may electrically contact another portion of the first metal traces I1 in the at least two layers of first metal traces I1 on that inclined side surface.

[0101] The device of this embodiment may further include a first surface connection portion S1 extending on the inclined side surface of the first circuit board L1, and a third surface connection portion extending on the upper surface of the first circuit board L1. The first surface connection portion S1 extending on the inclined side surfaces in different orientations can form a continuous, integrated structure with the third surface connection portion S3, thereby electrically connecting the first metal traces I1 at different heights and with ends facing different directions on the inclined side surfaces.

[0102] Figure 11 A schematic diagram of a device according to an eleventh embodiment of the present application is shown.

[0103] refer to Figure 11 In the device of this embodiment, the multilayer circuit board may include at least two first circuit boards L1. The first circuit boards L1 have inclined side surfaces inclined at a first angle F1 relative to a vertical direction Z. For example, any one of the at least two first circuit boards L1 may have inclined side surfaces inclined at different angles relative to the vertical direction Z.

[0104] In this embodiment, at least two layers of first metal traces I1 extend in different directions in the horizontal direction to the inclined side surfaces of different first circuit boards L1 with different slopes, and the inclined side surfaces of different first circuit boards L1 with different slopes face different directions. Figure 11 In the embodiment, at least two layers of first metal traces I1 extend in different horizontal directions, for example, Figure 11In the embodiment, the first metal trace I1 at the bottom extends in the first horizontal direction X, and the first metal trace I1 at the top extends in the second horizontal direction Y.

[0105] In this embodiment, the first surface connection portion S1 may extend on the same oriented, inclined side surfaces (e.g., inclined side surfaces oriented in the first horizontal direction X) of at least two layers of the first circuit board L1, but with different slopes, and may electrically contact the first metal traces I1 on at least one of these inclined side surfaces. Furthermore, another first surface connection portion S1 may be provided on another oriented, inclined side surface of the first circuit board L1 (e.g., an inclined side surface oriented in the second horizontal direction Y), and may electrically contact another portion of the first metal traces I1 in the at least two layers on this inclined side surface. The first surface connection portions S1 on the differently oriented inclined side surfaces may form a continuous, integrated structure, thereby electrically contacting the ends of the first metal traces I1 located on inclined side surfaces of different orientations, heights, and slopes, thereby enabling arbitrary interconnection of the first metal traces I1 in the at least two layers.

[0106] Figure 12 A schematic diagram of a device according to a twelfth embodiment of the present application is shown.

[0107] refer to Figure 12 In the device of this embodiment, the multilayer circuit board may include at least two layers of first circuit boards L1. The first circuit boards L1 have inclined side surfaces inclined at a first angle relative to the vertical direction Z. For example, any of the at least two layers of first circuit boards L1 may have inclined side surfaces inclined at different angles relative to the vertical direction Z. In this embodiment, the inclined side surfaces of the device may be formed as groove surfaces recessed into the board. The groove surface may include at least two inclined side surfaces facing different directions, and the inclination angles of the at least two inclined side surfaces facing different directions relative to the vertical direction Z may be the same or different.

[0108] In this embodiment, at least two layers of first metal traces I1 extend horizontally in different directions to inclined side surfaces of different first circuit boards L1 with different slopes, heights, and orientations. Furthermore, in this embodiment, the first surface connection portion S1 can extend along inclined side surfaces of different slopes and orientations within the slot, electrically contacting the ends of at least two layers of first metal traces I1. Consequently, the first surface connection portion S1 located on the inclined side surfaces of different orientations within the slot can form a continuous, integrated structure, thereby electrically contacting the ends of the first metal traces I1 located on the inclined side surfaces of different orientations, heights, and slopes within the slot, thereby enabling arbitrary interconnection of at least two layers of first metal traces I1.

[0109] Figure 13A flow chart of another method for manufacturing a device according to an embodiment of the present application is shown.

[0110] like Figure 13 As shown, the method for manufacturing a device in this embodiment includes operations S1310 to S1330.

[0111] In operation S1310 , a multilayer circuit board stacked in a vertical direction and metal traces in the multilayer circuit board are formed.

[0112] In operation S1320, the side surface of the multilayer circuit board is tilted relative to the vertical direction to form an inclined side surface of the multilayer circuit board, wherein the inclined side surfaces of at least two first circuit boards in the multilayer circuit board expose ends of at least two first metal traces.

[0113] In operation S1330, a first surface connection portion is formed on the inclined side surface of the first circuit board, such that the first surface connection portion connects ends of at least two layers of first metal traces.

[0114] Figure 14A FIG1 shows a cross-sectional view of a device according to the thirteenth embodiment of the present application during a manufacturing process. Figure 14B The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14A A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 14C The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14B A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 14D The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14C A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 14E The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14D A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 14F The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14E A cross-sectional view of the manufacturing process after the manufacturing process shown, Figure 14G The device according to the thirteenth embodiment of the present application is shown in FIG. Figure 14F A cross-sectional view of the manufacturing process following the manufacturing process shown.

[0115] refer to Figure 14A , a plurality of vertically stacked multi-layer circuit boards and metal traces between the multi-layer circuit boards can be formed in the manner described above, the multi-layer first metal traces in the device are completely surrounded by the first circuit board L1, and the ends of the multi-layer first metal traces I1 in the first horizontal direction X are covered by the side surface of the first circuit board L1 that has not yet been tilted.

[0116] Then, the side surface of the first circuit board L1 may be tilted at a first angle in the vertical direction Z to form an inclined side surface of the first circuit board L1. Figures 14A and 14B The first circuit board L1 can be milled at a certain angle (e.g., the first angle described above) using a milling process to tilt the side surface of the first circuit board L1, thereby exposing the ends of at least two layers of first metal traces I1 through the tilted side surface of the first circuit board L1. In this way, the ends of the metal traces that need to be interconnected can be exposed through the milling process. After milling using the milling process, the interface of the exposed ends of the at least two layers of first metal traces I1 on the tilted side surface is flush with the tilted side surface of the first circuit board. For example, the above angle can be determined based on the thickness of the at least two layers of the first circuit board and the number of layers of the at least two layers of first metal traces.

[0117] Then, the first surface connection portion S1 may be formed on the inclined side surface.

[0118] refer to Figure 14A to Figure 14C An initial connection layer OS can be formed on the inclined side surface to at least partially cover the inclined side surface. For example, the thickness of the initial connection layer OS can be greater than or equal to 33 microns. For example, the initial connection layer OS can be formed on the inclined side surface by electroplating a metal material. For example, the material of the initial connection layer OS can include copper, etc.

[0119] refer to Figure 14A to Figure 14D , an initial sacrificial layer OSS can be formed on the initial connection layer OS by electroplating a metal material. For example, the thickness of the initial sacrificial layer OSS can be 5 to 8 microns. Then, the initial sacrificial layer OSS can be patterned. The material of the initial sacrificial layer OSS can be tin, and the initial sacrificial layer OSS can be patterned using a laser to form a patterned sacrificial layer. Figure 14A to Figure 14E The patterned sacrificial layer SS partially covers a first portion S11 of the initial connection layer OS and exposes a second portion S12 of the initial connection layer OS. The first portion S11 at least partially connects to ends of at least two layers of first metal traces I1.

[0120] refer to Figures 14A to 14F , the second portion S12 can be removed. For example, the second portion S12 can be removed by alkaline etching.

[0121] refer to Figure 14A to Figure 14GAfter removing the second portion S12, the patterned sacrificial layer SS can be removed. For example, a solution such as nitric acid can be used to remove the patterned sacrificial layer SS. The first portion S11 remaining on the side surface is used as the first surface connection portion S1. In this way, the position of the first surface connection portion S1 formed on the side surface can be controlled by patterning, thereby achieving arbitrary interconnection of multiple layers of metal traces. It should be understood that this is only an example of the first circuit board, the first metal trace, and the first surface connection portion. The other circuit boards, metal traces, and surface connection portions in this application are also applicable to the above-described method, and will not be repeated here.

[0122] Based on this, the present application forms an initial connection layer and then an initial sacrificial layer on the inclined surface of the circuit board. Afterwards, based on the different volatilization temperatures of the initial connection layer and the initial sacrificial layer, a laser is used to ablate a patterned sacrificial layer used as a negative image on the inclined surface. For example, taking the sacrificial layer as a tin layer and the connection layer as a copper layer as an example, the volatilization temperature of tin is only 232 degrees, and the melting point of copper is about 1086 degrees. Then, the first part of the connection layer covered by the patterned sacrificial layer is used as a positive image. On this basis, the initial connection layer is etched, and the patterned sacrificial layer can protect the first part under the positive image, thereby forming an interconnection circuit.

[0123] exist Figure 2B to Figure 2D In the illustrated embodiment, the process of forming a multi-layer HDI requires repeated lamination, drilling, electroplating, and patterning, which is relatively cumbersome. However, the method of this embodiment forms a surface connection layer on the inclined side surface through the process described above, avoiding the repeated processing of lamination, drilling, electroplating, patterning, etc., significantly improving HDI manufacturing efficiency, reducing the resources required to manufacture high-end HDI devices, and improving the yield of the manufactured high-end HDI devices.

[0124] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of the boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0125] Those skilled in the art will appreciate that the features described in the various embodiments of this application may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in this application. In particular, the features described in the various embodiments of this application may be combined and / or coupled in various ways without departing from the spirit and teachings of this application. All such combinations and / or couplings fall within the scope of this application.

[0126] The embodiments of the present application have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present application. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present application, those skilled in the art may make various substitutions and modifications, and these substitutions and modifications should all fall within the scope of the present application.

Claims

1. A device comprising a circuit board, characterized in that include: A multilayer circuit board, stacked in a vertical direction and having an inclined side surface inclined relative to the vertical direction; the circuit board having metal traces; at least two layers of first metal traces of at least two first circuit boards in the multilayer circuit board extend in a horizontal direction to the inclined side surfaces of the at least two first circuit boards; at least two layers of second metal traces of at least two second circuit boards in the multilayer circuit board extend in the horizontal direction to the inclined side surfaces of the at least two second circuit boards; at least two layers of second metal traces of the at least two second circuit boards extend in the horizontal direction to the inclined side surfaces of the at least two second circuit boards; a first surface connection portion, located on an inclined side surface of the first circuit board and connecting ends of the at least two layers of first metal traces; a second surface connecting portion, located on an inclined side surface of the second circuit board and connecting ends of the at least two layers of second metal traces; The second circuit board is arranged on the first surface of the first circuit board, with the first surface as the projection plane and a direction perpendicular to the first surface as the projection direction. The projection of the second circuit board partially overlaps with the projection of the first surface, the projection of the first surface connecting portion and the projection of the second surface connecting portion are offset, and the projection of the first surface connecting portion is offset from the projection of the first surface. The inclined side surface of the first circuit board and the inclined side surface of the second circuit board have different inclination angles.

2. The device according to claim 1, characterized in that The at least two layers of first metal traces and the at least two layers of second metal traces are respectively located in different areas of the multi-layer circuit board; the metal traces in different areas are used to transmit different types of signals.

3. The device according to claim 1, characterized in that The end of the first metal trace has an interface flush with the inclined side surface of the first circuit board; the first surface connection portion is connected to the at least two layers of first metal traces via the interface of the at least two layers of first metal traces; The end of the second metal trace has an interface flush with the inclined side surface of the second circuit board; the second surface connection portion is connected to the at least two layers of second metal traces via the interface of the at least two layers of second metal traces; The area of ​​the interface of the first metal wiring is different from the area of ​​the interface of the second metal wiring.

4. The device according to claim 3, characterized in that The inclined side surface of the first circuit board is inclined at a first angle relative to the vertical direction, and the inclined side surface of the second circuit board is inclined at a second angle relative to the vertical direction; When the first angle is greater than the second angle, the area of ​​the interface of the end portion of the first metal trace is greater than the area of ​​the interface of the end portion of the second metal trace; When the first angle is smaller than the second angle, the area of ​​the interface of the end portion of the first metal trace is smaller than the area of ​​the interface of the end portion of the second metal trace.

5. The device according to claim 4, characterized in that The first angle is greater than 0° and less than 90°; the second angle is greater than 0° and less than 90°.

6. The device according to any one of claims 1 to 5, characterized in that: The inclined side surface of the first circuit board includes an inclined side surface with a first orientation and an inclined side surface with a second orientation different from the first orientation.

7. The device according to any one of claims 1 to 5, characterized in that The circuit board further includes a third surface connection portion extending on the upper surface of the uppermost layer circuit board in the multi-layer circuit board and connected to at least one of the first surface connection portion and the second surface connection portion.

8. The device according to any one of claims 1 to 5, characterized in that: The thickness of the multi-layer circuit board decreases in sequence in the vertical direction.

9. The device according to claim 8, characterized in that The multilayer circuit board further includes at least two layers of third circuit boards; each of the at least two layers of third circuit boards includes a via filled with a conductive material; the third metal traces of the at least two layers of third circuit boards are electrically connected via the conductive material in the vias of the at least two layers of third circuit boards; Among them, the inner side walls of the vias of the at least two layers of third circuit boards are inclined relative to the vertical direction; the inclination angle of the inner side walls of the vias of the upper third circuit board among the at least two layers of third circuit boards is smaller than the inclination angle of the inner side walls of the vias of the lower third circuit board, and the thickness of the upper third circuit board is thinner than the thickness of the lower third circuit board.

10. The device according to claim 9, characterized in that The center top of the conductive material in the via hole of the upper third circuit board is recessed by a first distance relative to the top of the inner side wall of the via hole of the upper third circuit board; the center top of the conductive material in the via hole of the lower third circuit board is recessed by a second distance relative to the top of the inner side wall of the via hole of the lower third circuit board; Wherein, the first concave distance is smaller than the second concave distance.

11. The device according to claim 10, characterized in that The first concave distance is 0~1.5 mil; the second concave distance is 0~1.5 mil.

12. The device according to any one of claims 1 to 5, characterized in that: The at least two layers of first metal traces are not electrically connected via the conductive material filled in the via hole.

13. The device according to any one of claims 1 to 5, characterized in that: The first metal trace and the first surface connection portion include the same material.

14. The device according to any one of claims 1 to 5, characterized in that: The inclined side surface is formed as an outer peripheral surface of the circuit board, or is formed as a groove surface inside the circuit board.

15. A method for manufacturing the device according to any one of claims 1 to 14, characterized in that: include: A multilayer circuit board and metal traces in the multilayer circuit board are formed, the at least two layers of second metal traces of the at least two layers of second circuit boards in the multilayer circuit board extending in the horizontal direction to the inclined side surfaces of the at least two layers of second circuit boards; the at least two layers of second metal traces of the at least two layers of second circuit boards extending in the horizontal direction to the inclined side surfaces of the at least two layers of second circuit boards; The side surface of the multilayer circuit board is tilted relative to the vertical direction to form an inclined side surface of the multilayer circuit board; wherein the inclined side surfaces of at least two first layers of the multilayer circuit board expose ends of at least two first metal traces; forming a first surface connection portion on the inclined side surface of the first circuit board, so that the first surface connection portion connects ends of the at least two layers of first metal traces; forming a second surface connection portion on the inclined side surface of the second circuit board, so that the second surface connection portion connects ends of the at least two layers of second metal traces; The second circuit board is arranged on the first surface of the first circuit board, with the first surface as the projection plane and the projection direction along a direction perpendicular to the first surface. The projection of the second circuit board partially overlaps with the projection of the first surface, the projection of the first surface connection portion and the projection of the second surface connection portion are offset, and the projection of the first surface connection portion is offset with the projection of the first surface. The inclined side surface of the first circuit board and the inclined side surface of the second circuit board have different inclination angles.

16. The method according to claim 15, characterized in that The interfaces of the exposed ends of the at least two layers of first metal traces are flush with the inclined side surface of the first circuit board.

17. The method according to claim 16, characterized in that Before the side surface of the multi-layer circuit board is tilted, the ends of the at least two layers of first metal traces are covered by the side surface of the at least two layers of first circuit board; Inclining the side surface of the multilayer circuit board relative to the vertical direction to form the inclined side surface of the multilayer circuit board comprises: The at least two layers of first circuit boards are milled at a certain angle using a milling cutter process so that the side surfaces of the at least two layers of first circuit boards are inclined, forming inclined side surfaces of the at least two layers of first circuit boards, thereby exposing the ends of the at least two layers of first metal traces through the inclined side surfaces of the at least two layers of first circuit boards.

18. The method according to claim 17, characterized in that The method further comprises: The angle is determined based on the thickness of the at least two layers of the first circuit board and the number of layers of the at least two layers of the first metal traces.

19. The method according to any one of claims 15 to 18, characterized in that A first surface connection portion is formed on the inclined side surface of the first circuit board, including: forming an initial connection layer on the inclined side surface of the first circuit board to at least partially cover the inclined side surface of the first circuit board; forming a patterned sacrificial layer on the initial connection layer, wherein the patterned sacrificial layer covers a first portion of the initial connection layer and exposes a second portion of the initial connection layer, wherein the first portion is at least partially connected to ends of the at least two layers of first metal traces; The second portion of the initial connection layer exposed by the sacrificial layer is removed, and the patterned sacrificial layer is removed after removing the second portion; the first portion of the initial connection layer remains on the inclined side surface of the first circuit board and serves as the first surface connection portion.

20. The method according to claim 19, characterized in that Forming a patterned sacrificial layer on the initial connection layer comprises: forming an initial sacrificial layer on the initial connection layer by electroplating a metal material; The initial sacrificial layer is patterned to form the patterned sacrificial layer.

21. The method according to claim 20, characterized in that Patterning the initial sacrificial layer to form the patterned sacrificial layer comprises: The initial sacrificial layer is patterned using a laser to form the patterned sacrificial layer.

22. The method according to claim 19, wherein Forming an initial connection layer on the inclined side surface of the first circuit board, comprising: The initial connection layer is formed on the inclined side surface of the first circuit board by electroplating a metal material.

23. The method according to claim 19, wherein Removing the second portion of the initial connection layer exposed by the sacrificial layer comprises: The second portion is removed by alkaline etching.

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