Solar cell and preparation method thereof

Abstract

The invention relates to a solar cell and a preparation method thereof. The solar cell comprises a substrate, the substrate is provided with a first surface and a second surface which are oppositely arranged, and the substrate comprises a first doping element. The doped silicon material layer is arranged on the first surface and covers part of the first surface, the doped silicon material layer comprises a second doping element, and the doping type of the first doping element is opposite to that of the second doping element. And the silicon oxide layer covers the side wall of the doped silicon material layer. The solar cell comprises the silicon oxide layer covering the side wall of the silicon-doped material layer, so that the conductivity of the edge region of the PN junction of the solar cell can be reduced, and the solar cell has relatively small leakage current.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and particularly to a solar cell and a method for manufacturing the same. Background Art

[0002] The most prominent feature of an interdigitated back contact (IBC) solar cell is that both the PN junction and the metal contact are located on the back of the solar cell, avoiding the shading of the front surface by metal grid electrodes. Combining with the light trapping structure composed of the pyramid texture and the antireflection layer on the front surface, it can maximize the utilization of incident light, reduce optical losses, and has a higher short-circuit current.

[0003] However, the leakage current of the PN junction edge of traditional IBC cells is relatively large. Summary of the Invention

[0004] Based on this, it is necessary to provide a solar cell and a method for manufacturing the same. The solar cell of this application has a smaller leakage current.

[0005] In a first aspect, this application provides a solar cell, including: a substrate having a first surface and a second surface disposed opposite to each other, the substrate including a first doping element;

[0006] A doped silicon material layer disposed on the first surface and covering a part of the first surface, the doped silicon material layer including a second doping element, the doping types of the first doping element and the second doping element being opposite;

[0007] A silicon oxide layer covering the sidewalls of the doped silicon material layer.

[0008] In some embodiments, along the thickness direction of the substrate, there is a height difference between the first surface exposed from the doped silicon material layer and the surface of the doped silicon material layer away from the first surface.

[0009] In some embodiments, the silicon oxide layer also covers the surface of the doped silicon material layer away from the substrate and the first surface exposed from the doped silicon material layer.

[0010] In some embodiments, the thickness of the silicon oxide layer is 0.5 nm to 2 nm.

[0011] In some embodiments, the second surface has a textured structure.

[0012] In some embodiments, the solar cell further includes a tunneling oxide layer disposed between the first surface and the doped silicon material layer.

[0013] In some embodiments, the solar cell further includes a first passivation layer disposed on the surface of the silicon oxide layer away from the substrate and on the surface of the silicon oxide layer away from the doped silicon material layer.

[0014] In some embodiments, the solar cell further includes a second passivation layer disposed on the second surface.

[0015] In a second aspect, the present application provides a method for manufacturing a solar cell, including the following steps:

[0016] Providing a substrate having a first surface and a second surface disposed opposite to each other, the substrate including a first doping element;

[0017] Preparing a doped silicon material layer disposed on the first surface and covering a part of the first surface, the doped silicon material layer including a second doping element, and the doping types of the first doping element and the second doping element being opposite;

[0018] Preparing a silicon oxide layer covering the sidewalls of the doped silicon material layer.

[0019] In some embodiments, preparing the silicon oxide layer includes the following steps:

[0020] Subjecting the substrate after preparing the doped silicon material layer to single-sided annealing in an oxygen atmosphere to form a silicon oxide layer on the sidewalls of the doped silicon material layer, on the surface of the doped silicon material layer away from the first surface, and on the first surface exposed from the doped silicon material layer.

[0021] In some embodiments, the time of the single-sided annealing is 30 min to 60 min.

[0022] In some embodiments, the temperature of the single-sided annealing is 630 °C to 730 °C.

[0023] In some embodiments, the oxygen flow rate of the single-sided annealing is 1000 sccm to 100000 sccm.

[0024] In some embodiments, the oxygen pressure of the single-sided annealing is 0.1 bar to 1 bar.

[0025] In some embodiments, preparing the doped silicon material layer includes the following steps:

[0026] Preparing a first silicon material layer on the first surface;

[0027] Diffusing the first silicon material layer to obtain a doped silicon material layer;

[0028] Form a patterned groove on the doped silicon material layer by laser;

[0029] Perform wet etching in the groove to expose the first surface in the groove.

[0030] The above solar cell includes a silicon oxide layer covering the side walls of the doped silicon material layer, which can reduce the conductivity of the edge region of the PN junction of the solar cell, thereby enabling the solar cell to have a small leakage current. Description of the Drawings

[0031] Figure 1 It is a schematic structural diagram for preparing a tunneling oxide layer and a doped silicon material layer on a substrate;

[0032] Figure 2 It is for Figure 1 A schematic structural diagram of forming a textured surface on the basis of the structure shown;

[0033] Figure 3 It is for Figure 2 A schematic structural diagram of preparing a silicon oxide layer on the basis of the structure shown;

[0034] Figure 4 It is for Figure 3 A schematic structural diagram of preparing a first passivation layer and a second passivation layer on the basis of the structure shown;

[0035] Figure 5 It is for Figure 4 A schematic structural diagram of preparing a first electrode and a second electrode on the basis of the structure shown.

[0036] Description of the Reference Numerals

[0037] 10. Substrate; 20. Tunneling oxide layer; 30. Doped silicon material layer; 40. Silicon oxide layer; 51. First passivation layer; 52. Second passivation layer; 61. First electrode; 62. Second electrode. Detailed Description of the Embodiments

[0038] To make the above objects, features, and advantages of the present application more obvious and understandable, the following provides a detailed description of the specific embodiments of the present application. Many specific details are set forth in the following description to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terms used in the description of this application herein are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the related listed items.

[0040] In the description of this application, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to this application.

[0041] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of this application, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0042] In this application, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0043] An embodiment of this application provides a solar cell, including: a substrate 10 having a first surface and a second surface disposed opposite to each other, the substrate 10 including a first doping element; a doped silicon material layer 30 disposed on the first surface and covering a part of the first surface, the doped silicon material layer 30 including a second doping element, and the doping types of the first doping element and the second doping element are opposite; and a silicon oxide layer 40 covering the sidewalls of the doped silicon material layer 30.

[0044] The above solar cell includes a silicon oxide layer 40 covering the sidewalls of the doped silicon material layer 30, which can reduce the conductivity of the edge region of the PN junction of the solar cell, thereby enabling the solar cell to have a smaller leakage current.

[0045] It can be understood that in the thickness direction of the substrate 10, the doped silicon material layer 30 has a certain thickness, and the sidewalls of the doped silicon material layer 30 are the surfaces parallel to the thickness direction of the doped silicon material layer 30.

[0046] In some embodiments, the substrate 10 is a P-type doped polysilicon substrate 10.

[0047] In some embodiments, the doped silicon material layer 30 is an N-type doped polysilicon layer.

[0048] In some embodiments, along the thickness direction of the substrate 10, there is a height difference between the first surface exposed from the doped silicon material layer 30 and the surface of the doped silicon material layer 30 away from the first surface.

[0049] Along the thickness direction of the substrate 10, there is a height difference between the first surface exposed from the doped silicon material layer 30 and the surface of the doped silicon material layer 30 away from the first surface, which facilitates isolating the N region and the P region through the height difference and reducing the carrier aggregation.

[0050] In some embodiments, along the thickness direction of the substrate 10, the distance between the surface of the doped silicon material layer 30 away from the first surface and the second surface is greater than the distance between the first surface and the second surface not covered with the doped silicon material layer 30.

[0051] In some embodiments, the silicon oxide layer 40 also covers the surface of the doped silicon material layer 30 away from the substrate 10 and the first surface exposed from the doped silicon material layer 30. The silicon oxide layer 40 with such a structure is convenient for direct preparation by single-sided annealing.

[0052] In some embodiments, the thickness of the silicon oxide layer 40 is 0.5 nm to 2 nm. Within this thickness range of the silicon oxide layer 40, the silicon oxide layer 40 has a better effect of reducing the conductivity of the edge region of the PN junction of the solar cell, enabling the solar cell to have a smaller leakage current. At the same time, the silicon oxide layer 40 within this thickness range has a smaller blocking effect during the subsequent electrode preparation process and has a smaller impact on the series resistance and fill factor. Optionally, the thickness of the silicon oxide layer 40 is 0.5 nm, 0.55 nm, 0.6 nm, 0.65 nm, 0.7 nm, 0.75 nm, 0.8 nm, 0.85 nm, 0.9 nm, 0.95 nm, 1 nm, 1.05 nm, 1.1 nm, 1.15 nm, 1.2 nm, 1.25 nm, 1.3 nm, 1.35 nm, 1.4 nm, 1.45 nm, 1.5 nm, 1.55 nm, 1.6 nm, 1.65 nm, 1.7 nm, 1.75 nm, 1.8 nm, 1.85 nm, 1.9 nm, 1.95 nm or 2 nm. Alternatively, the thickness of the silicon oxide layer 40 can also be within the range between any two of the above thicknesses.

[0053] In some embodiments, the second surface has a textured structure. It can be understood that the textured structure can reduce the reflectivity of the surface of the solar cell by using the light trapping principle. The uneven textured structure can increase the secondary reflection and enhance the light absorption of the solar cell.

[0054] In some embodiments, the textured structure is a pyramid-shaped textured structure.

[0055] In some embodiments, the solar cell further includes a tunneling oxide layer 20, and the tunneling oxide layer 20 is disposed between the first surface and the doped silicon material layer 30.

[0056] In some embodiments, the solar cell further includes a first passivation layer 51, and the first passivation layer 51 is disposed on the surface of the silicon oxide layer 40 away from the substrate 10 and on the surface of the silicon oxide layer 40 away from the doped silicon material layer 30.

[0057] In some embodiments, the first passivation layer 51 includes a first aluminum oxide layer and a first silicon nitride layer stacked on top of each other.

[0058] In some embodiments, the first aluminum oxide layer is closer to the substrate 10 than the first silicon nitride layer.

[0059] In some embodiments, the solar cell further includes a second passivation layer 52, and the second passivation layer 52 is disposed on the second surface.

[0060] In some embodiments, the second passivation layer 52 includes a second aluminum oxide layer and a second silicon nitride layer stacked on top of each other.

[0061] In some of these embodiments, the second alumina layer is closer to the substrate 10 than the second silicon nitride layer.

[0062] In some of these embodiments, the solar cell further includes a first electrode 61 and a second electrode 62. The first electrode 61 and the second electrode 62 are disposed on the surface of the first passivation layer 51 away from the substrate 10. The first electrode 61 is in contact with the doped silicon material layer 30, and the second electrode 62 is in contact with the substrate 10.

[0063] Another embodiment of the present application provides a method for manufacturing a solar cell, including the following steps: providing a substrate 10 having a first surface and a second surface disposed opposite to each other, and the substrate 10 includes a first doping element. Preparing a doped silicon material layer 30, the doped silicon material layer 30 is disposed on the first surface and covers a part of the first surface, the doped silicon material layer 30 includes a second doping element, and the doping types of the first doping element and the second doping element are opposite. Preparing a silicon oxide layer 40, the silicon oxide layer 40 covers the sidewalls of the doped silicon material layer 30.

[0064] In some examples of this embodiment, the method for manufacturing a solar cell includes steps S100 to S500, specifically as follows:

[0065] S100: Providing a substrate 10 having a first surface and a second surface disposed opposite to each other, and the substrate 10 includes a first doping element. Preparing a doped silicon material layer 30, the doped silicon material layer 30 is disposed on the first surface and partially covers the first surface, the doped silicon material layer 30 includes a second doping element, and the doping types of the first doping element and the second doping element are opposite.

[0066] Referring to Figure 1 shown, Figure 1 is a schematic structural diagram of preparing a tunneling oxide layer 20 and a doped silicon material layer 30 on the substrate 10. In some of these embodiments, preparing the doped silicon material layer 30 includes the following steps: preparing a first silicon material layer on the first surface. Diffusing the first silicon material layer to obtain the doped silicon material layer 30. Forming a patterned groove on the doped silicon material layer 30 by laser. Performing wet etching in the groove so that the first surface is exposed in the groove.

[0067] In some of these embodiments, before preparing the first silicon material layer, it further includes: preparing a tunneling oxide layer 20 on the first surface.

[0068] Exemplarily, the preparation methods of the tunneling oxide layer 20 and the first silicon material layer can be low-pressure chemical vapor deposition.

[0069] S200: Texturing the second surface of the substrate 10.

[0070] Referring to Figure 2As shown Figure 2 is a schematic structural diagram of a velvet surface structure formed on the basis of the structure shown Figure 1 in

[0071] In some embodiments, the second surface of the substrate 10 is etched with an alkaline solution.

[0072] In some of these embodiments, during the process of etching the second surface of the substrate 10 with an alkaline solution, the substrate 10 exposed in the groove is also etched.

[0073] S300: Anneal the textured substrate 10 to prepare the silicon oxide layer 40.

[0074] Referring to Figure 3 as shown Figure 3 is a schematic structural diagram of preparing the silicon oxide layer 40 on the basis of the structure shown Figure 2 in

[0075] In some embodiments, preparing the silicon oxide layer 40 includes the following steps: annealing the substrate 10 after preparing the doped silicon material layer 30 in an oxygen atmosphere on one side, and forming the silicon oxide layer 40 on the side wall of the doped silicon material layer 30, the surface of the doped silicon material layer 30 away from the first surface, and the first surface exposed by the doped silicon material layer 30.

[0076] It can be understood that during the one-sided annealing process, the second surface is controlled not to contact with oxygen. Annealing the substrate 10 after preparing the doped silicon material layer 30 in an oxygen atmosphere on one side can simultaneously prepare the silicon oxide layer 40 on the part of the first surface exposed by the doped silicon material layer 30, the side wall of the doped silicon material layer 30, and the surface of the doped silicon material layer 30 away from the substrate 10, which can oxidize the silicon and impurities on the surfaces of each layer, reduce the conductivity of the surfaces of the N-type doped silicon and the P-type doped silicon, and thus reduce the leakage current at the edge of the PN junction.

[0077] In some of these embodiments, the time for single-sided annealing is 30 min to 60 min. Within this time range of single-sided annealing, the thickness of the silicon oxide layer 40 prepared by annealing is moderate, and the effect of improving the leakage current at the PN junction edge is better. When the annealing time is too short, the thickness of the silicon oxide layer 40 is too small, and the effect of improving the leakage current is poor. When the annealing time is too long, the thickness of the silicon oxide layer 40 will be too thick, and the too thick silicon oxide layer 40 will have a blocking effect on the preparation of subsequent electrodes, thereby affecting the series resistance and fill factor. Optionally, the time for single-sided annealing is 30 min, 32 min, 34 min, 36 min, 38 min, 40 min, 42 min, 44 min, 46 min, 48 min, 50 min, 52 min, 54 min, 56 min, 58 min or 60 min. Or, the time for single-sided annealing can also be within the range between any two of the above times.

[0078] In some of these embodiments, the temperature for single-sided annealing is 630 °C to 730 °C. Within this temperature range of single-sided annealing, the effect of forming the silicon oxide layer 40 is better. When the temperature for single-sided annealing is too low, it is difficult for oxygen molecules to diffuse into the silicon oxide layer 40, the growth rate of the silicon oxide layer 40 is slow, the thickness is thin, and the effect of improving the leakage current is relatively limited. When the temperature for single-sided annealing is too high, the impurities at the PN junction edge will continue to diffuse inward, thereby affecting the carrier concentration of the PN junction, resulting in a decrease in the open-circuit voltage of the solar cell, an increase in the series resistance, and a decrease in the fill factor. Optionally, the temperature for single-sided annealing is 630 °C, 635 °C, 640 °C, 645 °C, 650 °C, 655 °C, 660 °C, 665 °C, 670 °C, 675 °C, 680 °C, 685 °C, 690 °C, 695 °C, 700 °C, 705 °C, 710 °C, 715 °C, 720 °C, 725 °C or 730 °C. Or, the temperature for single-sided annealing can also be within the range between any two of the above temperatures.

[0079] In some of these embodiments, the oxygen flow rate for single-sided annealing is 1000 sccm to 100000 sccm. Optionally, the oxygen flow rate for single-sided annealing is 1000 sccm to 20000 sccm. Further optionally, the oxygen flow rate for single-sided annealing is 1000 sccm, 1500 sccm, 2000 sccm, 2500 sccm, 3000 sccm, 3500 sccm, 4000 sccm, 4500 sccm, 5000 sccm, 5500 sccm, 6000 sccm, 6500 sccm, 7000 sccm, 7500 sccm, 8000 sccm, 8500 sccm, 9000 sccm, 9500 sccm, 10000 sccm, 10500 sccm, 11000 sccm, 11500 sccm, 12000 sccm, 12500 sccm, 13000 sccm, 13500 sccm, 14000 sccm, 14500 sccm, 15000 sccm, 15500 sccm, 16000 sccm, 16500 sccm, 17000 sccm, 17500 sccm, 18000 sccm, 18500 sccm, 19000 sccm, 19500 sccm or 20000 sccm. Alternatively, the oxygen flow rate for single-sided annealing can also be within the range between any two of the above flow rates.

[0080] In some of these embodiments, the oxygen gas pressure for single-sided annealing is 0.1 bar to 1 bar. Optionally, the oxygen gas pressure for single-sided annealing is 0.1 bar, 0.2 bar, 0.3 bar, 0.4 bar, 0.5 bar, 0.6 bar, 0.7 bar, 0.8 bar, 0.9 bar or 1 bar. Alternatively, the oxygen gas pressure for single-sided annealing can also be within the range between any two of the above gas pressures.

[0081] S400: Prepare a first passivation layer 51 on the surface of the silicon oxide layer 40, and prepare a second passivation layer 51 on the second surface of the substrate 10.

[0082] Referring Figure 4 as shown Figure 4 is a schematic structural diagram for preparing the first passivation layer 51 and the second passivation layer 51 based on the structure Figure 3 shown.

[0083] In some of these embodiments, a first passivation layer 51 is prepared on the surface of the silicon oxide layer 40, and preparing a second passivation layer 51 on the second surface of the substrate 10 includes the following steps: preparing a first aluminum oxide layer on the surface of the silicon oxide layer 40, preparing a second aluminum oxide layer on the second surface, preparing a first silicon nitride layer on the surface of the first aluminum oxide layer, and preparing a silicon nitride layer on the surface of the second aluminum oxide layer.

[0084] In some of these embodiments, the first aluminum oxide layer and the second aluminum oxide layer are prepared by atomic layer deposition.

[0085] In some of these embodiments, the first silicon nitride layer and the second silicon nitride layer are prepared by plasma enhanced chemical vapor deposition.

[0086] S500: Prepare a first electrode 61 and a second electrode 62 on the surface of the first passivation layer 51, wherein the first electrode 61 is in contact with the doped silicon material layer 30, and the second electrode 62 is in contact with the substrate 10.

[0087] Refer to Figure 5 as shown Figure 5 For preparing Figure 4 a schematic structural diagram of the first electrode 61 and the second electrode 62 on the basis of the structure shown. Among them, the first electrode 61 is prepared on the surface of the first passivation layer 51 covering the doped silicon material layer 30, and the second electrode 62 is prepared on the surface of the first passivation layer 51 covering the region of the first surface where the doped silicon material layer 30 is not provided.

[0088] In some of these embodiments, the first electrode 61 and the second electrode 62 are prepared by screen printing after laser grooving.

[0089] The following are specific examples

[0090] Example 1

[0091] Method for preparing a solar cell:

[0092] (1) Provide a P-type silicon substrate, the substrate having relatively arranged first and second surfaces. A tunneling oxide layer and a polysilicon layer are sequentially prepared on the first surface by low-pressure chemical vapor deposition. The polysilicon layer is subjected to high-temperature diffusion to prepare an N-type doped polysilicon layer. Part of the N-type doped polysilicon layer and the tunneling oxide layer are etched by laser so that the P-type silicon substrate is exposed.

[0093] (2) Use an alkaline solution to etch the second surface of the substrate to form a textured structure on the second surface. At the same time, the exposed P-type silicon substrate is etched.

[0094] (3) Anneal the etched substrate on the first surface in an oxygen atmosphere at 680 °C for 50 min. During the single-sided annealing, control the oxygen flow rate at 10,000 sccm and the oxygen pressure at 1 bar to prepare a silicon oxide layer.

[0095] (4) Prepare a first aluminum oxide layer on the surface of the silicon oxide layer, a second aluminum oxide layer on the second surface, a first silicon nitride layer on the surface of the first aluminum oxide layer, and a silicon nitride layer on the surface of the second aluminum oxide layer.

[0096] (5) Prepare a first electrode and a second electrode on the surface of the first passivation layer.

[0097] Example 2

[0098] Method for preparing a solar cell:

[0099] The method for preparing the solar cell in this example is basically the same as that in Example 1, with the only difference being that:

[0100] (3) Anneal in an oxygen atmosphere at 680 °C for 35 min. During the annealing, control the oxygen flow rate at 10,000 sccm and the oxygen pressure at 1 bar.

[0101] The difference between this example and Example 1 is that the annealing time in the annealing step is shorter, being 35 min. The thickness of the silicon oxide layer obtained in this example is smaller than that in Example 1, and the same good effect of improving the leakage current can be achieved.

[0102] Example 3

[0103] Method for preparing a solar cell:

[0104] The method for preparing the solar cell in this example is basically the same as that in Example 1, with the only difference being that:

[0105] (3) Anneal in an oxygen atmosphere at 680 °C for 15 min. During the annealing, control the oxygen flow rate at 10,000 sccm and the oxygen pressure at 1 bar.

[0106] The difference between this example and Example 1 is that the annealing time in the annealing step is too short, being 15 min. In this example, due to the too short annealing time, the thickness of the obtained silicon oxide layer is too small, which can improve the leakage current of the battery but the improvement effect is relatively limited.

[0107] Example 4

[0108] Method for preparing a solar cell:

[0109] The method for preparing the solar cell in this example is basically the same as that in Example 1, with the only difference being that:

[0110] (3) Annealing is carried out at 680 °C in an oxygen atmosphere for 70 min. During annealing, the oxygen flow rate is controlled at 10000 sccm and the oxygen pressure is 1 bar.

[0111] The difference between this example and Example 1 is that the annealing time in the annealing step is too long, being 70 min. In this example, due to the too long annealing time, the thickness of the silicon oxide layer obtained is too large, which has a good improvement effect on the leakage current of the solar cell, but will have a certain blocking effect on the subsequent silver paste sintering to contact the silicon wafer, thus affecting the series resistance and fill factor of the solar cell.

[0112] Example 5

[0113] Preparation method of solar cell:

[0114] The preparation method of the solar cell in this example is basically the same as that in Example 1, and the difference is only that:

[0115] (3) Annealing is carried out at 710 °C in an oxygen atmosphere for 70 min. During annealing, the oxygen flow rate is controlled at 10000 sccm and the oxygen pressure is 1 bar.

[0116] The difference between this example and Example 1 is that the annealing temperature in the annealing step is 710 °C. In this example, the improvement effect on the leakage current of the solar cell is good.

[0117] Example 6

[0118] Preparation method of solar cell:

[0119] The preparation method of the solar cell in this example is basically the same as that in Example 1, and the difference is only that:

[0120] (3) Annealing is carried out at 610 °C in an oxygen atmosphere for 50 min. During annealing, the oxygen flow rate is controlled at 10000 sccm and the oxygen pressure is 1 bar.

[0121] The difference between this example and Example 1 is that the annealing temperature in the annealing step is too low, being 610 °C. In this example, due to the too low annealing temperature, it is difficult for oxygen molecules to diffuse into the silicon oxide layer, resulting in a slower growth rate of the silicon oxide and a thinner thickness of the obtained silicon oxide layer, and the improvement effect on the leakage current of the solar cell is relatively limited.

[0122] Example 7

[0123] Preparation method of solar cell:

[0124] The preparation method of the solar cell in this example is basically the same as that in Example 1, and the difference is only that:

[0125] (3) Annealing is carried out at 800 °C in an oxygen atmosphere for 50 min. During annealing, the oxygen flow rate is controlled at 10000 sccm and the oxygen pressure is 1 bar.

[0126] The difference between this example and Example 1 is that the annealing temperature in the annealing step is too high, being 800 °C. In this example, due to the too high annealing temperature, impurities at the edge of the PN junction will continue to diffuse inward at this temperature, thus affecting the carrier concentration of the PN junction, resulting in a decrease in the open-circuit voltage of the solar cell, an increase in the series resistance, and a decrease in the fill factor.

[0127] Example 8

[0128] Preparation method of solar cell:

[0129] The preparation method of the solar cell in this example is basically the same as that in Example 1, with the only difference being:

[0130] (3) Annealing is carried out at 680 °C in an oxygen atmosphere for 50 min. During annealing, the oxygen flow rate is controlled at 1000 sccm and the oxygen pressure is 1 bar.

[0131] The difference between this example and Example 1 is that the oxygen flow rate in the annealing step is small, being 1000 sccm. In this example, under the condition of an oxygen pressure of 1 bar, the oxygen flow rate is small, being 1000 sccm, which will cause a slight difference in the distribution of oxygen in the cavity, and thus may result in a difference in the oxidation degree of the silicon wafers at different positions in the cavity.

[0132] Example 9

[0133] Preparation method of solar cell:

[0134] The preparation method of the solar cell in this example is basically the same as that in Example 1, with the only difference being:

[0135] (3) Annealing is carried out at 680 °C in an oxygen atmosphere for 50 min. During annealing, the oxygen flow rate is controlled at 10000 sccm and the oxygen pressure is 0.1 bar.

[0136] The difference between this example and Example 1 is that the pressure in the cavity in the annealing step is small, being 0.1 bar. In this example, under the condition of an oxygen pressure of 1 bar, the uniformity of oxygen in the cavity will be better, but the concentration of oxygen will decrease, thereby affecting the formation rate of the oxide layer.

[0137] Comparative Example 1

[0138] Preparation method of solar cell:

[0139] The difference between the preparation method of the solar cell in Comparative Example 1 and that in Example 1 is that the annealing in step (3) was not carried out in Comparative Example 1.

[0140] The electrical properties of the solar cells prepared in Examples 1 to 9 and Comparative Example 1 were tested, and the test results are shown in Table 1 below:

[0141] Table 1

[0142]

[0143] Referring to Table 1, it can be seen that the solar cells prepared by the preparation methods of the solar cells in Examples 1 to 9 all have a small leakage current, while the solar cell prepared by the preparation method of the solar cell in Comparative Example 1 has a large leakage current. Further, the annealing time in Example 3 was too short, and the thickness of the formed silicon oxide layer was relatively thin, so the effect of improving the leakage current was limited, and the leakage current of the obtained solar cell was 0.89 A, which was larger than that of the solar cells prepared in Examples 1 and 2. The annealing temperature in Example 6 was too low, and it was difficult for oxygen molecules to diffuse into the silicon oxide layer, resulting in a slow growth rate of the silicon oxide and a relatively thin thickness of the obtained silicon oxide layer, and the improvement effect on the leakage current of the solar cell was relatively limited, and the leakage current of the obtained solar cell was 0.92 A, which was larger than that of the solar cells prepared in Examples 1 and 5.

[0144] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0145] The above-described embodiments only represent several implementation manners of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims, and the description and drawings can be used to explain the content of the claims.

Claims

1. A solar cell, characterized in that, Comprising: a substrate having a first surface and a second surface disposed opposite to each other, the substrate including a first doping element; A doped silicon material layer disposed on the first surface and covering a part of the first surface, the doped silicon material layer including a second doping element, the doping types of the first doping element and the second doping element being opposite; A silicon oxide layer covering the sidewalls of the doped silicon material layer.

2. The solar cell according to claim 1, characterized in that, Along the thickness direction of the substrate, there is a height difference between the first surface exposed from the doped silicon material layer and the surface of the doped silicon material layer away from the first surface.

3. The solar cell according to claim 1, characterized in that, The silicon oxide layer further covers the surface of the doped silicon material layer away from the substrate and the first surface exposed from the doped silicon material layer.

4. The solar cell according to any one of claims 1 to 3, characterized in that, The thickness of the silicon oxide layer is 0.5 nm to 2 nm.

5. The solar cell according to any one of claims 1 to 3, characterized in that The second surface has a matte structure; and / or, The solar cell further includes a tunneling oxide layer disposed between the first surface and the doped silicon material layer; and / or, The solar cell further includes a first passivation layer disposed on the surface of the silicon oxide layer away from the substrate and on the surface of the silicon oxide layer away from the doped silicon material layer; and / or, The solar cell further includes a second passivation layer disposed on the second surface.

6. A method for preparing a solar cell, characterized in that, Including the following steps: Providing a substrate having a first surface and a second surface disposed opposite to each other, the substrate including a first doping element; Preparing a doped silicon material layer disposed on the first surface and covering a part of the first surface, the doped silicon material layer including a second doping element, the doping types of the first doping element and the second doping element being opposite; Preparing a silicon oxide layer covering the sidewalls of the doped silicon material layer.

7. The manufacturing method of the solar cell according to claim 6, characterized in that, Preparing the silicon oxide layer includes the following steps: Annealing one side of the substrate after preparing the doped silicon material layer in an oxygen atmosphere to form a silicon oxide layer on the sidewalls of the doped silicon material layer, the surface of the doped silicon material layer away from the first surface, and the first surface exposed from the doped silicon material layer.

8. The manufacturing method of the solar cell according to claim 7, characterized in that, The time of the one-sided annealing is 30 min to 60 min; and / or, The temperature of the one-sided annealing is 630 °C to 730 °C.

9. The manufacturing method of the solar cell according to claim 7, wherein, The oxygen flow rate of the one-sided annealing is 1000 sccm to 100000 sccm; and / or, The oxygen pressure of the one-sided annealing is 0.1 bar to 1 bar.

10. The method for preparing a solar cell according to any one of claims 6 to 9, characterized in that, Preparing the doped silicon material layer includes the following steps: Preparing a first silicon material layer on the first surface; Diffusing the first silicon material layer to obtain a doped silicon material layer; Forming a patterned groove on the doped silicon material layer by laser; Performing wet etching in the groove to expose the first surface in the groove.

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