Display device

Abstract

The present invention relates to a display device comprising: a substrate including a display area having a plurality of sub-pixels and a non-display area adjacent to the display area; a plurality of data lines extending in a first direction in the display area; a plurality of vertical data connection lines extending along the first direction in the display area; a plurality of horizontal data connection lines extending along a second direction in the display area; a power supply line disposed in the non-display area; a plurality of vertical power distribution lines electrically connected to the power supply lines and extending in the first direction in the display area; a plurality of horizontal power supply connecting lines extending along the second direction in the display area; and a plurality of vertical power connection lines extending along the first direction in the display area.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0197120, filed on December 29, 2023, the entire contents of which are hereby incorporated by reference into this application. Technical field

[0003] The present invention relates to a display device. Background art

[0004] A display device may include a display area (also referred to as an active area) configured to display an image and a non - display area (also referred to as a non - active area or a border area) that does not display an image. The display area may include a plurality of pixels that can jointly generate an image. In order for the display device to perform various functions such as displaying an image and sensing a touch event when touch electrodes are also used, various structures, circuits, lines, etc. may be provided in the non - display area of the display device and away from the display area to ensure that the display device can have the maximum amount of area for displaying an image. Summary of the invention

[0005] Due to these elements located in the non - display area, it is not easy to reduce the border of the display panel. In particular, since the connection lines for transmitting data signals to the data lines are provided in the non - display area of the display panel, challenges may arise in reducing the border of the display panel. To solve these problems, one or more aspects of the present invention may provide a display device having a data connection structure capable of reducing the border.

[0006] One or more aspects of the present invention may provide a display device having a power line structure capable of improving the transmission performance of a common driving voltage.

[0007] One or more aspects of the present invention may provide a display device having a power line structure capable of contributing to improving image quality.

[0008] One or more aspects of the present invention may provide a display device having a power line structure applicable to a data connection structure capable of reducing the border of the display panel.

[0009] According to aspects of the present invention, a display device may include a substrate including a display area having a plurality of sub - pixels and a non - display area adjacent to the display area.

[0010] In one or more aspects, the display device may include: a plurality of data lines extending in a first direction in the display area; a plurality of vertical data connection lines extending in the first direction in the display area; and a plurality of horizontal data connection lines extending in a second direction in the display area.

[0011] In one or more aspects, the display device may include: a power supply line disposed in the non-display area; a plurality of vertical power distribution lines electrically connected to the power supply line and extending in the first direction in the display area; a plurality of horizontal power connection lines extending in the second direction in the display area; and a plurality of vertical power connection lines extending in the first direction in the display area.

[0012] According to various aspects of the present invention, a display device may include: a substrate including a display area having a plurality of sub-pixels and a non-display area adjacent to the display area; a plurality of vertical data connection lines extending in a first direction in the display area; a plurality of horizontal data connection lines extending in a second direction in the display area; a power supply line disposed in the non-display area; at least one power distribution line; and a plurality of power connection lines disposed in the display area and electrically connected to the at least one power distribution line.

[0013] According to one or more aspects of the present invention, a display device may be provided that has a data connection structure capable of reducing the border of a display panel.

[0014] According to one or more aspects of the present invention, a display device may be provided that has a power line structure capable of improving the transmission performance of a common driving voltage.

[0015] According to one or more aspects of the present invention, a display device may be provided that has a power line structure capable of contributing to improving image quality.

[0016] According to one or more aspects of the present invention, a display device may be provided that has a power line structure suitable for a data connection structure capable of reducing the border area of a display panel.

[0017] According to one or more aspects of the present invention, a display device and a display panel may be provided that are capable of reducing the border of a display panel by applying an improved data connection structure and are configured to have a reduced weight. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings, which are incorporated in and constitute a part of this specification, illustrate various aspects of the invention and, together with the description, serve to explain the principles of the invention.

[0019] Figure 1 Illustrates a system configuration of a display device according to various aspects of the present invention.

[0020] Figure 2 Illustrates a display panel according to various aspects of the present invention.

[0021] Figure 3 It is a cross-sectional view of a display panel according to various aspects of the present invention.

[0022] Figure 4 Illustrates a substrate of a display panel according to various aspects of the present invention.

[0023] Figure 5 It is a plan view of a display panel according to various aspects of the present invention, and illustrates a data connection structure disposed in the display panel.

[0024] Figure 6 It is another plan view of a display panel according to various aspects of the present invention, and illustrates a data connection structure capable of reducing the bezel of the display panel.

[0025] Figure 7 Illustrates three regions defined in a display area of a display panel according to various aspects of the present invention, wherein the display area is configured using a data connection structure capable of reducing the bezel of the display panel.

[0026] Figure 8 It is a plan view of a display panel according to various aspects of the present invention, wherein the display panel has a data connection structure capable of reducing the bezel.

[0027] Figure 9 and 10 It is a cross-sectional view of a display panel according to various aspects of the present invention, wherein the display panel has a data connection structure capable of reducing the bezel.

[0028] Figure 11 It is a plan view of a display panel according to various aspects of the present invention, wherein the display panel has a power supply line structure related to a data connection structure capable of reducing the bezel.

[0029] Figure 12 is in Figure 11 a plan view of a partial area in the configuration of

[0030] Figure 13 Illustrates some color artifacts vertically identified in a power supply area located in a central portion of a display panel according to various aspects of the present invention.

[0031] Figure 14 It is another plan view of a display panel according to various aspects of the present invention, wherein the display panel has a power supply line structure related to a data connection structure capable of reducing the bezel area.

[0032] Figure 15 and 16 is in Figure 14 a plan view of a partial area in the configuration of Detailed Description

[0033] Reference will now be made in detail to aspects of the present invention, some examples of which are illustrated in the accompanying drawings. In the following description, when a detailed description of a known method, function, structure, or construction may unnecessarily obscure aspects of the present invention, the detailed description of such known function or construction may be omitted for the sake of brevity. In addition, repeated descriptions may be omitted for the sake of brevity. The processes of the described processing steps and / or operations are non-limiting examples.

[0034] The order of the steps and / or operations is not limited to those set forth herein, but may be varied to occur in an order different from the order described herein, unless the steps and / or operations must occur in a particular order. In one or more examples, two consecutive operations may be performed substantially simultaneously, or depending on the functions or operations involved, the two operations may be performed in the reverse order or in a different order.

[0035] Unless otherwise indicated, like reference numerals may refer to like elements throughout, even when shown in different figures. Unless otherwise indicated, the same reference numerals may be used throughout the specification and drawings to refer to the same or substantially the same elements. In one or more aspects, the same elements (or elements having the same name) in different figures may have the same or substantially the same functions and characteristics, unless otherwise indicated. For convenience only, the names of the corresponding elements used in the following description are selected, and thus these names may be different from those used in the actual product.

[0036] The advantages, features, and the method of implementing the present invention are illustrated by aspects described with reference to the accompanying drawings. However, the present invention may be implemented in different forms and should not be construed as limited to the exemplary aspects set forth herein. Rather, these exemplary aspects are examples provided to make the disclosure of the present invention thorough and complete to assist those of ordinary skill in the art in understanding the inventive concept, and not to limit the scope of the present invention.

[0037] The shapes, sizes (such as dimensions, lengths, widths, heights, thicknesses, positions, radii, diameters, and areas), ratios, rates, angles, quantities, the number of elements, etc. (including those shown in the figures) disclosed herein are merely examples, and thus the present invention is not limited to the details shown. However, note that the relative sizes of the components shown in the figures are part of the present invention.

[0038] When terms such as "comprising", "having", "including", "containing", or "constituting" are used with respect to one or more other elements (such as layers, films, regions, components, segments, members, parts, zones, portions, steps, and / or operations, etc.), one or more other elements may be added, unless terms such as "only" are used. The terms used in the disclosure of the present invention are only for describing exemplary aspects and are not intended to limit the scope of the present invention. Singular terms may include plural forms unless the context clearly indicates otherwise.

[0039] The term "exemplary" is used to indicate serving as an example or illustration, unless otherwise specified. Multiple aspects are exemplary aspects. "Aspect", "example", etc. should not be construed as being more superior or more advantageous than other embodiments. An aspect, an example, an exemplary aspect, etc. may refer to one or more aspects, one or more examples, one or more exemplary aspects, etc., unless otherwise specified. In addition, the term "may" encompasses all meanings of the term "can".

[0040] In one or more aspects, unless otherwise clearly specified, an element, a feature, or the corresponding information (such as level, range, size, dimension, etc.) is construed to include an error or tolerance range, even if no clear description of such error or tolerance range is provided. The error or tolerance range may be caused by various factors (such as process factors, internal or external shocks, noise, etc.). When interpreting a numerical value, the value is construed to include an error range unless otherwise clearly specified.

[0041] When describing a positional relationship, such as when using "on", "above", "at the top of", "over", "lower", "upper", "below", "under", "near", "close to", "adjacent to", "beside", "after", "on one side", etc. to describe the positional relationship between two parts (such as layers, films, regions, components, parts, etc.), one or more other parts may be located between these two parts, unless more restrictive terms such as "immediately", "directly", or "adjacent" are used. For example, when a structure is described as being on, above, at the top of, upper, under, above, below, under, near, beside, after, on one side of, or close to, adjacent to another structure, this description should be construed to include the case where the two structures are in contact with each other and the case where one or more additional structures are disposed or interposed therebetween. In addition, terms such as "front", "rear", "back", "left", "right", "top", "bottom", "down", "up", "above", "below", "on", "under", "column", "row", "vertical", "horizontal", etc. refer to any reference system.

[0042] Spatial relative terms such as "below", "lower", "under", "above", "upper", etc. may be used to describe the relationship between various elements (such as layers, films, regions, components, parts, etc.) shown in the figures. These spatial relative terms should be understood to include terms for different orientations of the elements in addition to the orientation depicted in the figures during use or operation. For example, if the elements shown in the figures are flipped, an element described as being "under" or "below" other elements will be oriented as being "above" other elements. Thus, the term "below" as an exemplary term may include all directions of "above" and "below". Similarly, the exemplary terms "above" or "upper" may include both directions of "above" and "below".

[0043] When describing temporal relationships, such as when a chronological order is described as "after", "subsequently", "next", "before", "prior", "preceding", etc., discontinuous or non-sequential situations may be included, so one or more other events may occur in between, unless more restrictive terms such as "exactly", "immediately", or "directly" are used.

[0044] Terms such as "below", "lower", "above", "upper", etc. may be used herein to describe the relationship between the elements shown in the figures. It will be understood that these terms are spatial relative terms and are terms based on the orientation depicted in the figures.

[0045] It will be understood that although terms such as "first", "second", etc. may be used herein to describe various elements (such as layers, films, regions, components, sections, members, parts, zones, portions, steps, and / or operations, etc.), these elements should not be limited by these terms to, for example, any particular order, priority order, or number of elements. These terms are only used to distinguish one element from other elements. For example, without departing from the scope of the present invention, the first element may represent the second element, and similarly, the second element may represent the first element. In addition, without departing from the scope of the present invention, the first element, the second element, etc. may be arbitrarily named according to the convenience of those of ordinary skill in the art. For the sake of clarity, the functions or structures of these elements (such as the first element, the second element, etc.) are not limited by the ordinal numbers or names in front of the elements. In addition, the first element may include one or more first elements. Similarly, the second element, etc. may include one or more second elements, etc.

[0046] When describing the elements of the present invention, terms such as "first", "second", "A", "B", "(a)", or "(b)", etc. may be used. These terms are intended to identify the corresponding elements from other elements and are not used to limit the essence, basis, order, sequence, or number of the elements.

[0047] For expressions such as a component (e.g., a layer, film, region, assembly, part, etc.) being "connected", "joined", "attached", or "adhered" to another component, this component can not only be directly connected, joined, attached, or adhered to the other component, etc., but can also be indirectly connected, joined, attached, or adhered to the other component, etc. by means of one or more intermediate components disposed or interposed between these components, unless otherwise specified.

[0048] For expressions such as a component (e.g., a layer, film, region, assembly, part, etc.) being "overlapped" with another component, etc., this component can not only be in direct contact and overlap with the other component, etc., but can also indirectly overlap with the other component, etc. by means of one or more intermediate components disposed or interposed between these components, unless otherwise specified.

[0049] Expressions such as a component (e.g., a layer, film, region, assembly, part, etc.) being "provided", "disposed", "connected", "joined", etc. in, on, or to another component can be understood as, for example, at least a part of the component being provided, disposed, connected, joined, etc. in, on, or to at least a part of the other component, or the whole of the component being provided, disposed, connected, joined, etc. in, on, or to the other component. Expressions such as a component (e.g., a layer, film, region, assembly, part, etc.) being in "contact" or "overlap" with another component can be understood as, for example, at least a part of the component being in contact or overlap with at least a part of the other component; the whole of the component being in contact or overlap with at least a part of the other component; or at least a part of the component being in contact or overlap with the whole of the other component.

[0050] Terms such as "line" or "direction" should not be interpreted solely based on the geometric relationship that the corresponding lines or directions are parallel or perpendicular to each other. These terms can refer to a wider range of lines or directions in which the components of the present invention are functionally operable. For example, terms such as "first direction", "second direction", etc., such as directions parallel or perpendicular to the "x-axis", "y-axis", or "z-axis", should not be interpreted solely based on the geometric relationship that the corresponding directions are parallel or perpendicular to each other, and can refer to directions with a wider directivity within the range in which the components of the present invention are functionally operable.

[0051] The term "at least one" should be understood to include any and all combinations of one or more of the relevant listed items. For example, each of the expressions "at least one of the first item, the second item, or the third item" and "at least one of the first item, the second item, and the third item" can represent: (i) a combination of items provided by two or more of the first item, the second item, and the third item; and (ii) only one of the first item, the second item, and the third item.

[0052] The expression of the first element, the second element, and / or the third element should be understood to include any one of the first element, the second element, and the third element, as well as any and all combinations of the first element, the second element, and the third element. For example, A, B, and / or C encompasses: only A; only B; only C; any one of A, B, and C (e.g., A, B, or C); some combinations of A, B, and C (e.g., A and B; A and C; or B and C); and all of A, B, and C. Additionally, the expression "A / B" can be understood as A and / or B. For example, the expression "A / B" can refer to only A; only B; A or B; or A and B.

[0053] In one or more aspects, the terms "between" and "among" may be used interchangeably for convenience only, unless otherwise specified. For example, the expression "between multiple elements" can be understood as among multiple elements. In another example, the expression "among multiple elements" can be understood as between multiple elements. In one or more examples, the number of elements can be two. In one or more examples, the number of elements can exceed two. Additionally, when an element (such as a layer, film, region, component, part, etc.) is said to be located between at least two elements, that element can be the only element located between at least two elements, or there can also be one or more intermediate elements.

[0054] In one or more aspects, the phrases "each other" and "one another" may be used interchangeably for convenience only, unless otherwise specified. For example, the expression "different from each other" can be understood as different from one another. In another example, the expression "different from one another" can be understood as different from each other. In one or more examples, the number of elements involved in the foregoing expression can be two. In one or more examples, the number of elements involved in the foregoing expression can exceed two.

[0055] In one or more aspects, the phrases "one or more of" and "one or more thereof" may be used interchangeably for convenience only, unless otherwise specified.

[0056] The term "or" means "inclusive or" rather than "exclusive or". For example, unless otherwise specified or clear from the context, an expression such as "x uses a or b" refers to any one in the natural inclusive permutation. For example, "a or b" can refer to "a", "b", or "a and b". For example, "a, b, or c" can refer to "a", "b", "c", "a and b", "b and c", "a and c", or "a, b, and c".

[0057] Features of various aspects of the present invention can be combined or combined with each other partially or wholly, can be technically related to each other, and can be operated, connected, or driven together in various ways. Multiple aspects of the present invention can be implemented or executed independently of each other, or can be implemented or executed together in a relationship of mutual dependence or association. In one or more aspects, components of each device according to aspects of the present invention are operably joined and configured.

[0058] Unless otherwise defined, the terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary aspects belong. It should be further understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with, for example, the meaning in the context of the related art, and should not be idealized or interpreted overly formally unless otherwise clearly defined herein.

[0059] The terms used herein are selected as general terms in the related art field; however, there may be other terms according to the development and / or changes of technology, customs, preferences of technicians, etc. Therefore, the terms used herein should not be understood as limiting the technical concept, but should be understood as examples of terms for describing exemplary aspects.

[0060] In addition, in specific situations, the terms can be arbitrarily selected by the applicant, and in such situations, their specific meanings are described herein. Therefore, the terms used herein should not be understood based only on the term names, but also based on the meanings and contents of the terms.

[0061] The "X-axis direction", "Y-axis direction", and "Z-axis direction" should not be interpreted only by the geometric relationship of mutual perpendicularity, but can have a wider directivity within the range where the elements of the present invention can function functionally.

[0062] In the following description, various exemplary aspects of the present invention are described in detail with reference to the accompanying drawings. Regarding the reference numerals of the elements of each figure, the same elements may be shown in other figures, and similar reference numerals may refer to similar elements, unless otherwise specified. The same or similar elements may be referred to by the same reference numeral even if they are shown in different figures. In addition, for the convenience of description, the proportions, sizes, dimensions, and thicknesses of each element shown in the drawings may be different from the actual proportions, sizes, dimensions, and thicknesses. Therefore, multiple aspects of the present invention are not limited to the proportions, sizes, dimensions, and thicknesses shown in the figures.

[0063] Figure 1 Illustrate the system configuration of the display device 100 according to multiple aspects of the present invention. All components of each display device according to all aspects of the present invention are operably joined and configured.

[0064] Refer to Figure 1, in one or more aspects, the display device 100 may include a display panel 110, which is an element configured to display an image, and a display driving circuit. The display driving circuit may be a circuit configured to generate and drive the display panel 110, and includes a data driving circuit 120, a gate driving circuit 130, a controller 140, and other circuit components. However, the aspects of the present invention are not limited thereto, and other elements may be included.

[0065] For example, the display panel 110 may include a substrate 111 and a plurality of sub-pixels SP disposed on the substrate 111.

[0066] The substrate 111 may include a display area AA configured to display an image and a non-display area NA disposed outside the display area AA.

[0067] The display area AA may also be referred to as an active area, and a plurality of sub-pixels SP configured to display an image may be disposed in the display area AA. The non-display area NA may also be referred to as a non-active area, and may include a pad area PA (see Figure 4 ). For example, the pad area PA may be a part of the non-display area NA disposed along a first direction (e.g., a column direction or a row direction) from the display area AA.

[0068] According to aspects of the present invention, the display panel 110 may be configured to have a very small non-display area NA. For example, the non-display area NA may include: a first non-display area located outside the display area AA in a first direction; a second non-display area located outside the display area AA in a second direction; a third non-display area located outside the display area AA in a direction opposite to the first direction; and a fourth non-display area located outside the display area AA in a direction opposite to the second direction. The first non-display area among the first to fourth non-display areas may include a pad area to which a driving circuit is connected or joined (or attached). Among the first to fourth non-display areas, the second to fourth non-display areas that do not include a pad area may have a very small size compared to the first non-display area.

[0069] In another example, a boundary area located between the display area AA and the non-display area NA may be defined. In this example, the non-display area NA may be bent at a certain angle with respect to the display area AA, and thus may be disposed below the display area AA. In this embodiment, when a user views the display device 100 in front of the display device 100, all or most of the non-display area NA may be invisible to the user.

[0070] Various signal lines configured to drive the plurality of sub-pixels SP may be disposed on the substrate 111 of the display panel 110.

[0071] In some aspects, the display device 100 herein may be a liquid crystal display device or the like, or a self-emitting display device that emits light from the display panel 110 itself. In an example where the display device 100 is a self-emitting display device, each of the plurality of sub-pixels SP may include a light-emitting element. However, the various aspects of the present invention are not limited thereto.

[0072] For example, the display device 100 according to various aspects of the present invention may be an organic light-emitting display device in which light-emitting elements are implemented using organic light-emitting diodes (OLEDs). In another example, the display device 100 according to various aspects of the present invention may be an inorganic light-emitting display device in which light-emitting elements are implemented using light-emitting diodes based on inorganic materials. In another example, the display device 100 according to various aspects of the present invention may be a quantum dot display device in which light-emitting elements are implemented using quantum dots that are self-emitting semiconductor crystals.

[0073] The structure of each of the plurality of sub-pixels SP may depend on the type of the display device 100. For example, in an example where the display device 100 is a self-emitting display device including self-emitting sub-pixels SP, each sub-pixel SP may include a self-emitting light-emitting element, one or more transistors, and one or more capacitors. However, the various aspects of the present invention are not limited thereto.

[0074] Various signal lines may include, for example: a plurality of data lines DL for transmitting data signals (which may be referred to as data voltages or image signals); a plurality of gate lines GL for transmitting gate signals (which may be referred to as scan signals); and so on.

[0075] In one or more aspects, the plurality of data lines DL and the plurality of gate lines GL may cross each other. The plurality of data lines DL may be arranged to extend in a first direction, and the plurality of gate lines GL may be arranged to extend in a second direction. For example, the first direction may be the column direction, and the second direction may be the row direction. In another example, the first direction may be the row direction, and the second direction may be the column direction. Hereinafter, for the sake of convenience in explanation, the discussion may be provided based on an example in which each of the plurality of data lines DL is arranged in the column direction and each of the plurality of gate lines GL is arranged in the row direction, but the various aspects of the present invention are not limited thereto.

[0076] The data driving circuit 120 may be a circuit configured to drive the plurality of data lines DL and may output data signals to the plurality of data lines DL.

[0077] The data driving circuit 120 may receive image data DATA in digital form from the controller 140, convert the received image data DATA into analog-form data signals, and output the converted data signals to the plurality of data lines DL.

[0078] In some aspects, the data driving circuit 120 may be connected to the display panel 110 by a tape automated bonding (TAB) method, or connected to a conductive pad such as a bonding pad of the display panel 110 by a chip on glass (COG) method or a chip on panel (COP) method, or connected to the display panel 110 using a chip on film (COF) method. However, various aspects of the present invention are not limited thereto.

[0079] The data driving circuit 120 may be disposed on and / or electrically connected to one side or a portion (e.g., upper or lower portion) of the display panel 110, but is not limited thereto. In some aspects, the data driving circuit 120 may be disposed on and / or electrically connected to two sides or two portions (e.g., upper and lower portions) of the display panel 110, or at least two of four sides or four portions (e.g., upper, lower, left, and right portions) of the display panel 110 according to a driving mechanism, a panel design mechanism, etc., but is not limited thereto.

[0080] The data driving circuit 120 may be connected to the outside or periphery of the display area AA of the display panel 110, or disposed in the display area AA of the display panel 110.

[0081] The gate driving circuit 130 may be a circuit configured to drive a plurality of gate lines GL, and may output gate signals to the plurality of gate lines GL.

[0082] The gate driving circuit 130 may receive various gate driving control signals GCS. In addition, the gate driving circuit 130 receives a first gate voltage corresponding to a turn-on level voltage and a second gate voltage corresponding to a cut-off level voltage. Thus, the gate driving circuit 130 may generate gate signals and provide the generated gate signals to the plurality of gate lines GL.

[0083] In some aspects, the gate driving circuit 130 in the display device 100 may be built into the display panel 110 by an in-panel gate (GIP) method. In an example where the gate driving circuit 130 is implemented by an in-panel gate (GIP) method, the gate driving circuit 130 may be disposed on the substrate 111 of the display panel 110 during a manufacturing process of the display panel 110 or the display device 100. However, various aspects of the present invention are not limited thereto.

[0084] In one aspect, the gate driving circuit 130 may be disposed at the non-display area NA of the display panel 110.

[0085] In another aspect, the gate driving circuit 130 may be disposed in the display area AA of the display panel 110. In this embodiment, for example, the gate driving circuit 130 may be disposed in and / or electrically connected to a part of the first area (e.g., the left area or the right area) of the display area AA of the display panel 110, but is not limited thereto. In another example, the gate driving circuit 130 may be disposed in and / or electrically connected to a part of the first area (e.g., the left area or the right area) and a part of the second area (e.g., the right area or the left area) of the display area AA of the display panel 110, but is not limited thereto.

[0086] Here, the gate driving circuit 130 built in the display panel 110 by the gate-in-panel (GIP) method may also be referred to as an in-panel gate circuit.

[0087] The controller 140 may be a device configured to control the data driving circuit 120 and the gate driving circuit 130, and may control the driving timings of the plurality of data lines DL and the plurality of gate lines GL.

[0088] The controller 140 may provide a data control signal DCS to the data driving circuit 120 to control the data driving circuit 120; and may provide a gate control signal GCS to the gate driving circuit 130 to control the gate driving circuit 130.

[0089] The controller 140 may receive the image data input from the host system 150, and provide the image data DATA readable by the data driving circuit 120 based on the input image data to the data driving circuit 120.

[0090] The controller 140 may be implemented in a component separate from the data driving circuit 120, or integrated with the data driving circuit 120, so that the controller 140 and the data driving circuit 120 may be implemented as a single integrated circuit.

[0091] The controller 140 may be a timing controller used in display technology, or a control device / apparatus capable of additionally performing other control functions in addition to the function of the timing controller. In one or more aspects, the controller 140 may be one or more other control circuits different from the timing controller, or a circuit or component in the control device / apparatus. The controller 140 may be implemented by using various circuits or electronic components such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and / or a processor, etc., but the various aspects of the present invention are not limited thereto.

[0092] The controller 140 may be mounted on a printed circuit board, a flexible printed circuit, etc., and may be electrically connected to the data driving circuit 120 and the gate driving circuit 130 through the printed circuit board and / or the flexible printed circuit, etc.

[0093] The controller 140 can send and receive signals to / from the data driving circuit 120 via one or more predetermined interfaces. For example, such interfaces can include a Low-Voltage Differential Signaling (LVDS) interface, an Embedded Clock Point-to-Point Interface (EPI), a Serial Peripheral Interface (SPI), etc. However, multiple aspects of the present invention are not limited thereto.

[0094] In one or more aspects, in order to provide a touch sensing function in addition to the image display function, the display device 100 can include a touch sensor and a touch sensing circuit, and the touch sensing circuit is configured to sense the touch sensor through an object such as a finger, a pen, etc. and detect the presence or absence of a touch or the touch position.

[0095] The touch sensing circuit can include: a touch driving circuit configured to drive and sense the touch sensor, generate and output touch sensing data; and a touch controller capable of detecting the presence or absence of a touch or the touch position through the touch sensing data.

[0096] The touch sensor can include a plurality of touch electrodes. The touch sensor can further include a plurality of touch lines that electrically connect the plurality of touch electrodes to the touch driving circuit.

[0097] The touch sensor can be provided outside the display panel 110 in the form of a touch panel, or can be provided inside the display panel 110. The touch sensor provided outside the display panel 110 can be referred to as an add-on type touch sensor. In an example where the add-on type touch sensor is provided in the display device 100, the touch panel and the display panel 110 can be separately manufactured and combined in an assembly process. The add-on touch panel can include a touch panel substrate and a plurality of touch electrodes provided on the touch panel substrate.

[0098] In an example where the touch sensor is provided inside the display panel 110, the touch sensor can be formed on the substrate together with signal lines and electrodes for display driving during the manufacturing process of the display panel 110.

[0099] The touch driving circuit can provide a touch driving signal to at least one of the plurality of touch electrodes and generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0100] The touch sensing circuit can perform touch sensing through a self-capacitance sensing method or a mutual-capacitance sensing method.

[0101] In an example where a touch sensing circuit performs touch sensing by a self - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between one or more touch electrodes and an object such as a finger and / or a pen. According to the self - capacitance sensing method, each of the plurality of touch electrodes can be used as both a driving touch electrode and a sensing touch electrode. The touch driving circuit may drive all of the plurality of touch electrodes, or one or more of them, and sense all of the plurality of touch electrodes, or one or more of them.

[0102] In an example where a touch sensing circuit performs touch sensing by a mutual - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between touch electrodes. According to the mutual - capacitance sensing method, the plurality of touch electrodes can be divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit may drive the above - mentioned driving touch electrodes and sense the above - mentioned sensing touch electrodes.

[0103] In one or more aspects, the touch driving circuit and the touch controller included in the touch sensing circuit can be implemented as separate devices or a single device. In one or more aspects, the touch driving circuit and the data driving circuit can be implemented as separate devices or a single device.

[0104] The display device 100 may further include a power supply circuit configured to supply various power supplies to the display driving circuit and / or the touch sensing circuit.

[0105] In some aspects, the display device 100 can be a mobile terminal such as a smart phone or a tablet, or a display, a television (TV), etc. Such devices can be configured in various types, sizes, and shapes. The display device 100 according to multiple aspects of the present invention is not limited thereto, and it can include various types, sizes, and shapes configured to display information or images.

[0106] In one or more aspects, the display device 100 may further include an electronic device such as a camera (e.g., an image sensor), a sensor capable of detecting an object, etc. For example, the sensor can be a sensor capable of detecting an object or a human body by receiving light such as infrared light, ultrasonic light, ultraviolet light, etc. However, multiple aspects of the present invention are not limited thereto.

[0107] Figure 2 Illustrate the structure of the display panel 110 according to multiple aspects of the present invention.

[0108] Refer to Figure 2 As shown, the display panel 110 may include: a substrate 111 on which a plurality of sub - pixels SP are disposed; and a packaging layer 200 above the substrate 111. The packaging layer 200 can also be referred to as a packaging substrate or a packaging portion, etc. However, multiple aspects of the present invention are not limited thereto.

[0109] Refer to Figure 2, in an example where the display device 100 is a self-emissive display device, each of the plurality of sub-pixels SP provided on the substrate 111 may include a light-emitting element ED and a sub-pixel circuit SPC configured to drive the light-emitting element ED.

[0110] Referring to Figure 2 , the sub-pixel circuit SPC may include a plurality of transistors configured to drive the light-emitting element ED and at least one capacitor. The sub-pixel circuit SPC may drive the light-emitting element ED by supplying a driving current to the light-emitting element ED in a predetermined timing. The light-emitting element ED may emit light by being driven by the driving current.

[0111] The plurality of transistors may include: a driving transistor DT configured to drive the light-emitting element ED; and a scanning transistor ST configured to be turned on or off according to a scan signal SC.

[0112] The driving transistor DT may supply a driving current to the light-emitting element ED.

[0113] The scanning transistor ST may be configured to control the electrical state of a corresponding node in the sub-pixel circuit SPC, or control the state or operation of the driving transistor DT.

[0114] The at least one capacitor may include a storage capacitor Cst configured to maintain a constant voltage during one frame or a determined period of a frame.

[0115] To drive one or more sub-pixels SP, a data signal VDATA as an image signal and a scan signal SC as a gate signal may be applied to the sub-pixels SP. In addition, a common pixel driving voltage including a first common driving voltage VDD and a second common driving voltage VSS may be applied to one or more sub-pixels SP.

[0116] The light-emitting element ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The intermediate layer EL may be provided between the pixel electrode PE and the common electrode CE. However, various aspects of the present invention are not limited thereto.

[0117] For example, the pixel electrode PE may be an electrode provided at each sub-pixel SP, and the common electrode CE may be an electrode commonly provided at a plurality of sub-pixels SP. For example, the pixel electrode PE may be an anode, and the common electrode CE may be a cathode. In another example, the pixel electrode PE may be a cathode, and the common electrode CE may be an anode. Hereinafter, for ease of explanation, the discussion may be provided based on an example where the pixel electrode PE is an anode and the common electrode CE is a cathode.

[0118] In an example where the light-emitting element ED is an organic light-emitting diode, the intermediate layer EL may include: a light-emitting layer EML; a first common intermediate layer COM1 located between the pixel electrode PE and the light-emitting layer EML; and a second common intermediate layer COM2 located between the light-emitting layer EML and the common electrode CE. The layer including the first common intermediate layer COM1 and the second common intermediate layer COM2 may be referred to as the common intermediate layer EL_COM.

[0119] The light-emitting layer EML may be disposed at each sub-pixel SP, and the common intermediate layer EL_COM may be disposed commonly across a plurality of sub-pixels SP.

[0120] The light-emitting layer EML may be disposed at each light-emitting region, and the common intermediate layer EL_COM may be disposed commonly across a plurality of light-emitting regions and non-light-emitting regions. However, various aspects of the present invention are not limited thereto.

[0121] For example, the first common intermediate layer COM1 may include a hole injection layer (HIL), a hole transport layer (HTL), etc. The second common intermediate layer COM2 may include an electron transport layer (ETL), an electron injection layer (EIL), etc. However, various aspects of the present invention are not limited thereto.

[0122] The hole injection layer may inject holes from the pixel electrode PE into the hole transport layer, the hole transport layer may transport the holes to the light-emitting layer EML, the electron injection layer may inject electrons from the common electrode CE into the electron transport layer, and the electron transport layer may transport the electrons to the light-emitting layer EML. However, various aspects of the present invention are not limited thereto.

[0123] For example, the common electrode CE may be electrically connected to the second common driving voltage line VSSL. As a second common driving voltage VSS of a common pixel driving voltage, the second common driving voltage VSS may be applied to the common electrode CE via the second common driving voltage line VSSL. The pixel electrode PE may be directly or indirectly (via another transistor) electrically connected to the first node N1 of the corresponding driving transistor DT of each sub-pixel SP. Here, the second common driving voltage VSS may also be referred to as a "ground voltage", and the second common driving voltage line VSSL may also be referred to as a "low power supply voltage line", a "low voltage line", or a "ground voltage line".

[0124] Each light-emitting element ED may be configured by the overlap of the pixel electrode PE, the light-emitting layer in the intermediate layer EL, and the common electrode CE. Each light-emitting element ED may form a corresponding light-emitting region. For example, the corresponding light-emitting region of each light-emitting element ED may include the overlap region of the pixel electrode PE, the light-emitting layer in the intermediate layer EL, and the common electrode CE.

[0125] In some aspects, the light-emitting element ED may be an organic light-emitting diode (OLED), a light-emitting diode (LED) based on an inorganic material, or a quantum dot light-emitting element. For example, in an example where the light-emitting element ED is an organic light-emitting diode OLED, the intermediate layer EL of the light-emitting element ED may be a layer including an organic material.

[0126] The driving transistor DT may be a transistor configured to provide a driving current to the light-emitting element ED. The driving transistor DT may be connected between the first common driving voltage line VDDL and the light-emitting element ED.

[0127] The driving transistor DT may include a first node N1, a second node N2, and a third node N3. The first node N1 may be electrically connected to the light-emitting element ED. The data signal VDATA may be applied to the second node N2. The first common driving voltage VDD provided via the first common driving voltage line VDDL may be applied to the third node N3.

[0128] In the driving transistor DT, the second node N2 may be a gate node, the first node N1 may be a source node or a drain node, and the third node N3 may be a drain node or a source node. Hereinafter, for the sake of convenience of explanation only, the discussion may be provided based on an example where the first node N1, the second node N2, and the third node N3 of the driving transistor DT are a source node, a gate node, and a drain node, respectively. However, various aspects of the present invention are not limited thereto.

[0129] Figure 2 The scanning transistor ST in the shown sub-pixel circuit SPC may be a switching transistor configured to allow the data signal VDATA, which is an image signal, to be provided to the second node N2, which is the gate node of the driving transistor DT. However, various aspects of the present invention are not limited thereto.

[0130] The scanning transistor ST may be turned on or off by a scanning signal SC, which is a kind of gate signal, applied via a scanning line SCL, which is a kind of gate line, and controls the electrical connection between the second node N2 of the driving transistor DT and the data line DL. The drain or source of the scanning transistor ST may be electrically connected to the data line DL. The source or drain of the scanning transistor ST may be electrically connected to the second node N2 of the driving transistor DT. The gate of the scanning transistor ST may be electrically connected to the scanning line SCL.

[0131] The storage capacitor Cst may be electrically connected between the first node N1 and the second node N2 of the driving transistor DT. The storage capacitor Cst may include: a first capacitor electrode electrically connected to the first node N1 of the driving transistor DT or corresponding to the first node N1 of the driving transistor DT; and a second capacitor electrode electrically connected to the second node N2 of the driving transistor DT or corresponding to the second node N2 of the driving transistor DT.

[0132] The storage capacitor Cst may be an external capacitor specifically designed to be located outside the driving transistor DT, and thus, is different from internal capacitors such as parasitic capacitors (e.g., Cgs, Cgd) that may be formed between the first node N1 and the second node N2 of the driving transistor DT.

[0133] Each of the driving transistor DT and the scanning transistor ST may be an n-type transistor or a p-type transistor.

[0134] The display panel 110 may have a top-emission structure or a bottom-emission structure.

[0135] In an example where the display panel 110 has a top-emission structure, at least a part of the sub-pixel circuit SPC may overlap at least a part of the light-emitting element ED in the vertical direction. In such a configuration, the area or size of the corresponding light-emitting region may be increased, and the corresponding aperture ratio may be increased.

[0136] In an example where the display panel 110 has a bottom-emission structure, the sub-pixel circuit SPC may not overlap the light-emitting element ED in the vertical direction.

[0137] As Figure 2 shown, the sub-pixel circuit SPC may include two transistors (2T: DT and ST) and one capacitor (1C: Cst) (which may be referred to as a "2T1C structure"), and in some embodiments, may further include one or more transistors, or further include one or more capacitors. However, various aspects of the present invention are not limited thereto.

[0138] For example, the sub-pixel circuit SPC may have an 8T1C structure including 8 transistors and 1 capacitor. In another example, the sub-pixel circuit SPC may have a 6T2C structure including 6 transistors and 2 capacitors. In yet another example, the sub-pixel circuit SPC may have a 7T1C structure including 7 transistors and 1 capacitor. Various aspects of the present invention are not limited to these structures. However, various aspects of the present invention are not limited thereto.

[0139] The type and number of gate signals provided to the sub-pixel SP, and / or the type and number of gate lines connected to the sub-pixel SP may be changed according to the structure of the corresponding sub-pixel circuit SPC. In addition, the type and number of common pixel driving voltages provided to the sub-pixel SP may be changed according to the structure of the corresponding sub-pixel circuit SPC.

[0140] Since circuit elements (e.g., light-emitting element ED such as an organic light-emitting diode (OLED) including an organic material) in each sub-pixel SP are vulnerable to external moisture or oxygen, the encapsulation layer 200 may be provided at the display panel 110 to prevent external moisture or oxygen from penetrating into the circuit elements (e.g., light-emitting element ED). The encapsulation layer 200 may be provided in various shapes or configurations to prevent the light-emitting element ED from coming into contact with moisture or oxygen. For example, the encapsulation layer 200 may include two or more layers in which organic layers and inorganic layers are alternately stacked, but aspects of the present invention are not limited thereto.

[0141] Referring to Figure 2 , in some aspects, to sense a user touch, the display device 100 may include: a touch sensor unit 210 including a plurality of sensor electrodes; a touch driving circuit 220 configured to sense the plurality of sensor electrodes; and a touch controller 230 configured to determine the presence or absence of a touch or touch coordinates using a sensing result (e.g., touch sensing data) of the touch driving circuit 220.

[0142] The touch sensor unit 210 may be built in the display panel 110. For example, the touch sensor unit 210 may be provided on the encapsulation layer 200 of the display panel 110.

[0143] The display panel 110 may include: a plurality of touch pads TP to which the touch driving circuit 220 is electrically connected; and a plurality of touch wirings TL for electrically connecting the plurality of sensor electrodes included in the touch sensor unit 210 to the plurality of touch pads TP connected to the touch driving circuit 220.

[0144] Figure 3 is a cross-sectional view of the display panel 110 according to aspects of the present invention.

[0145] Referring to Figure 3 , in some aspects, according to a stack-up configuration, the display panel 110 may include a transistor forming portion, a light-emitting element forming portion, and an encapsulation portion. However, aspects of the present invention are not limited thereto.

[0146] The transistor forming portion may include: a substrate 111; various insulating layers (311, 312, 313, 321, 322, and 323) on the substrate 111; various transistors (TFT1 and TFT2); a storage capacitor Cst; various electrodes or signal lines. The transistor forming portion may be a transistor part.

[0147] The transistors (TFT1 and TFT2) in the transistor forming portion may include a first transistor TFT1 and a second transistor TFT2.

[0148] The first transistor TFT1 may include a first active layer ACT1, a first electrode E1a, a second electrode E1b, and a third electrode E1c. The first active layer ACT1 may be a first semiconductor layer, but various aspects of the present invention are not limited thereto. For example, the first active layer ACT1 may be configured with an oxide semiconductor, amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon (LTPS), etc., but various aspects of the present invention are not limited thereto. The first transistor TFT1 may be a p-channel transistor or an n-channel transistor, but various aspects of the present invention are not limited thereto. The first electrode E1a may be a gate, the second electrode E1b may be a source or a drain, and the third electrode E1c may be a drain or a source. Hereinafter, for ease of explanation, the discussion may be provided based on an example where the first electrode E1a, the second electrode E1b, and the third electrode E1c are the first gate E1a, the first source E1b, and the first drain E1c, respectively.

[0149] The second transistor TFT2 may include a second active layer ACT2, a fourth electrode E2a, a fifth electrode E2b, and a sixth electrode E2c. The second active layer ACT2 may be a second semiconductor layer, but various aspects of the present invention are not limited thereto. For example, the second active layer ACT2 may be configured with an oxide semiconductor, amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon (LTPS), etc., but various aspects of the present invention are not limited thereto. The second transistor TFT2 may be a p-channel transistor or an n-channel transistor, but various aspects of the present invention are not limited thereto. For example, one of the first transistor TFT1 and the second transistor TFT2 may include an active layer having an oxide semiconductor. In another example, one of the first transistor TFT1 and the second transistor TFT2 may include an active layer having low-temperature polycrystalline silicon. In another example, the first transistor TFT1 and the second transistor TFT2 may include an active layer configured to have an oxide semiconductor. In another example, one or more transistors in a gate driver configured as a gate-in-panel (GIP) type may include an active layer having an oxide semiconductor or low-temperature polycrystalline silicon. In another example, all transistors disposed on a substrate and transistors included in a gate driver configured as a gate-in-panel (GIP) type may include an active layer having an oxide semiconductor. However, various aspects of the present invention are not limited thereto.

[0150] The fourth electrode E2a may be a gate, the fifth electrode E2b may be a source or a drain, and the sixth electrode E2c may be a drain or a source. Hereinafter, for ease of explanation, the discussion may be provided based on an example where the fourth electrode E2a, the fifth electrode E2b, and the sixth electrode E2c are the second gate E2a, the second source E2b, and the second drain E2c, respectively.

[0151] With respect to the substrate 111 (or based on the substrate 111), the second active layer ACT2 of the second transistor TFT2 can be set higher than the first active layer ACT1 of the first transistor TFT1.

[0152] The first buffer layer 311 can be disposed under the first active layer ACT1 of the first transistor TFT1, and the second buffer layer 321 can be disposed under the second active layer ACT2 of the second transistor TFT2. For example, the first active layer ACT1 of the first transistor TFT1 can be disposed on the first buffer layer 311, and the second active layer ACT2 of the second transistor TFT2 can be disposed on the second buffer layer 321. The second buffer layer 321 can be set higher than the first buffer layer 311.

[0153] The storage capacitor Cst can be disposed in various metal layers in the display panel 110. For example, the storage capacitor Cst can include a first capacitor electrode CE1 and a second capacitor electrode CE2.

[0154] The light-emitting element forming part can include a plurality of light-emitting elements ED disposed on at least one planarization layer (331 and / or 332). Each light-emitting element ED can include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The light-emitting element forming part can be a light-emitting element portion.

[0155] The encapsulation part can include an encapsulation layer 200 located on the plurality of light-emitting elements ED. The encapsulation layer 200 can be configured as a single layer or multiple layers. In addition to the encapsulation layer 200, the encapsulation part can further include at least one dam DAM. However, various aspects of the present invention are not limited thereto.

[0156] Hereinafter, with reference to Figure 3 The stacked structure of the display panel 110 according to various aspects of the present invention will be described in more detail.

[0157] With reference to Figure 3 , the first buffer layer 311 can be disposed on the substrate 111. The first buffer layer 311 can be configured as a single layer or multiple layers. In an example where the first buffer layer 311 has a multi-layer stack, the first buffer layer 311 can include a multi-buffer layer 311a and a buffer layer 311b.

[0158] The first active layer ACT1 of the first transistor TFT1 can be disposed on the first buffer layer 311. The first active layer ACT1 can include: a channel region configured with a channel; a source connection region on one side of the channel region; and a drain connection region on the other side of the channel region.

[0159] The first gate insulating layer 312 may be disposed on the first active layer ACT1 of the first transistor TFT1. The first gate E1a of the first transistor TFT1 may be disposed on the first gate insulating layer 312. The first interlayer insulating layer 313 may be disposed on the first gate E1a of the first transistor TFT1.

[0160] The second buffer layer 321 may be disposed on the first interlayer insulating layer 313.

[0161] The second active layer ACT2 of the second transistor TFT2 may be disposed on the second buffer layer 321. The second active layer ACT2 may include: a channel region configured with a channel; a source connection region on a first side of the channel region; and a drain connection region on a second opposite side of the channel region.

[0162] The second gate insulating layer 322 may be disposed on the second active layer ACT2 of the second transistor TFT2. The second gate E2a of the second transistor TFT2 may be disposed on the second gate insulating layer 322. The second interlayer insulating layer 323 may be disposed on the second gate E2a of the second transistor TFT2.

[0163] The first source E1b and the first drain E1c of the first transistor TFT1 and the second source E2b and the second drain E2c of the second transistor TFT2 may be disposed on the second interlayer insulating layer 323.

[0164] The first source E1b and the first drain E1c of the first transistor TFT1 may be connected to the source connection region and the drain connection region of the first active layer ACT1 via corresponding holes in the second interlayer insulating layer 323, the second gate insulating layer 322, the second buffer layer 321, the first interlayer insulating layer 313, and the first gate insulating layer 312, respectively.

[0165] The second source E2b and the second drain E2c of the second transistor TFT2 may be connected to the source connection region and the drain connection region of the second active layer ACT2 via corresponding holes in the second interlayer insulating layer 323 and the second gate insulating layer 322, respectively.

[0166] The first source E1b and the first drain E1c of the first transistor TFT1 and the second source E2b and the second drain E2c of the second transistor TFT2 may include a first metal and may be disposed in a first metal layer. The first metal and the first metal layer may be referred to as the first source-drain metal and the first source-drain metal layer, respectively.

[0167] Refer to Figure 3, in one or more aspects, the storage capacitor Cst may be configured with a first capacitor electrode CE1 and a second capacitor electrode CE2. In one or more aspects, the storage capacitor Cst may include three or more capacitor electrodes, or may include two or more capacitors connected in parallel.

[0168] Each of the first capacitor electrode CE1 and the second capacitor electrode CE2 may be disposed in various metal layers in or at the display panel 110.

[0169] In one or more aspects, the first capacitor electrode CE1 may include the same first gate metal as the first gate E1a of the first transistor TFT1 on the first gate insulating layer 312, and may be disposed in or at the first gate metal layer.

[0170] In one or more aspects, the second capacitor electrode CE2 may be disposed on the first interlayer insulating layer 313.

[0171] The second source E2b of the second transistor TFT2 may be electrically connected to the second capacitor electrode CE2 through corresponding holes in the second interlayer insulating layer 323, the second gate insulating layer 322, and the second buffer layer 321.

[0172] In one or more aspects, the first transistor TFT1 may be Figure 2 the driving transistor DT, and the second transistor TFT2 may be Figure 2 the scanning transistor ST.

[0173] The transistor forming portion may further include various metal layers (such as a first metal layer MP1, a second metal layer MP2, etc.). For example, the first metal layer MP1 may be disposed between a multiple buffer layer 311a and a buffer layer 311b included in the first buffer layer 311. The second metal layer MP2 may include the same first gate metal as the first gate E1a of the first transistor TFT1, and may be disposed in the first gate metal layer. In one or more aspects, the first metal layer MP1 may be a first metal pattern, and the second metal layer MP2 may be a second metal pattern. However, multiple aspects of the present invention are not limited thereto.

[0174] Each of the first metal layer MP1 and the second metal layer MP2 may be disposed in the display area AA or the non-display area NA.

[0175] Referring to Figure 3 , the transistor forming portion may further include a shielding layer BSM, which is disposed on the substrate 111, overlaps with the second active layer ACT2 of the second transistor TFT2, and is disposed below the second active layer ACT2 of the second transistor TFT2. However, multiple aspects of the present invention are not limited thereto.

[0176] For example, the shielding layer BSM may be disposed in the same first gate metal layer as the first gate E1a of the first transistor TFT1. In another example, the shielding layer BSM may be disposed in the same metal layer as the first metal layer MP1 on the first buffer layer 311.

[0177] An additional shielding layer BSM may be disposed under and overlapping the first active layer ACT1 of the first transistor TFT1. In this embodiment, the additional shielding layer BSM may be disposed in the same metal layer as the first metal layer MP1.

[0178] Referring to Figure 3 , the transistor forming portion may further include a common driving voltage pattern CVP to which a common driving voltage is applied. The common driving voltage applied to the common driving voltage pattern CVP may be a power supply signal. For example, it may be Figure 2 the first common driving voltage VDD or the second common driving voltage VSS in

[0179] The common driving voltage pattern CVP may be disposed in the display area AA or the non-display area NA.

[0180] At least one planarization layer may be disposed on the first transistor TFT1 and the second transistor TFT2. Figure 3 For example, two planarization layers (the first planarization layer 331 and the second planarization layer 332) are shown disposed on the first transistor TFT1 and the second transistor TFT2. In one or more aspects, three or more planarization layers may be disposed on the first transistor TFT1 and the second transistor TFT2. However, the various aspects of the present invention are not limited thereto.

[0181] Referring to Figure 3 , the first planarization layer 331 may be disposed on the first source E1b and the first drain E1c of the first transistor TFT1 and the second source E2b and the second drain E2c of the second transistor TFT2. In one or more aspects, the first planarization layer 331 may be disposed on both the first transistor TFT1 and the second transistor TFT2 and cover both the first transistor TFT1 and the second transistor TFT2.

[0182] Referring to Figure 3 , a connection electrode RE may be disposed on the first planarization layer 331. The connection electrode RE may be electrically connected to the first source E1b of the first transistor TFT1 through a hole in the first planarization layer. The connection electrode RE may be referred to as a relay electrode RE.

[0183] The connection electrode RE may be provided in a second metal layer on the first planarization layer 331 and include a second metal. The second metal and the second metal layer may be referred to as a second source-drain metal and a second source-drain metal layer, respectively.

[0184] The second planarization layer 332 may be provided on the connection electrode RE.

[0185] Referring Figure 3 , a light-emitting element forming portion may be provided on the second planarization layer 332. The light-emitting element ED may be provided on the second planarization layer 332. The light-emitting element ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. A light-emitting region of the light-emitting element ED may be formed in a region where the pixel electrode PE, the intermediate layer EL, and the common electrode CE overlap and contact each other.

[0186] The pixel electrode PE may be provided on the second planarization layer 332, and a bank 333 may be provided on the pixel electrode PE. An opening of the bank 333 may expose a part of the pixel electrode PE to form a light-emitting region. For example, the opening of the bank 333 may overlap a part of the pixel electrode PE.

[0187] The intermediate layer EL of the light-emitting element ED may be provided on a part of the pixel electrode PE and the bank 333. The common electrode CE may be provided on the intermediate layer EL.

[0188] Referring Figure 3 , a packaging portion may be provided on the light-emitting element forming portion and on the common electrode CE. The packaging portion may include a packaging layer 200 provided on the common electrode CE.

[0189] The packaging layer 200 may prevent moisture or oxygen from penetrating into the light-emitting element ED. For example, the packaging layer 200 may prevent moisture or oxygen from penetrating into an organic material included in the intermediate layer EL of the light-emitting element ED. In one or more aspects, the packaging layer 200 may be configured as a single layer or multiple layers, but multiple aspects of the present invention are not limited thereto.

[0190] Referring Figure 3 , for example, the packaging layer 200 may include a first packaging layer 341, a second packaging layer 342, and a third packaging layer 343. The first packaging layer 341 and the third packaging layer 343 may include an inorganic layer, and the second packaging layer 342 may include an organic layer, for example.

[0191] In one or more aspects, a touch sensor may be built into the display panel 110. In these aspects, the display panel 110 may include a touch sensor portion 210 provided on the packaging layer 200.

[0192] Referring Figure 3, the touch sensor unit 210 may include a plurality of touch electrodes TE, and may include a bridging electrode BRG and a touch sensor electrode TSM for forming the plurality of touch electrodes TE. The touch sensor electrode TSM may also be referred to as a touch sensor layer TSM. The bridging electrode BRG may also be referred to as a bridging layer BRG.

[0193] The touch sensor unit 210 may further include one or more insulating layers, such as a buffer layer 351 on the encapsulation layer 200, an interlayer insulating layer 352 on the buffer layer 351, and / or a protective layer 353 on the interlayer insulating layer 352. The bridging layer BRG may be disposed between the buffer layer 351 and the interlayer insulating layer 352, and the touch sensor layer TSM may be disposed between the interlayer insulating layer 352 and the protective layer 353.

[0194] Each of the plurality of touch electrodes TE may include a touch sensor layer TSM. Each of the plurality of touch electrodes TE may be a mesh-type electrode having a plurality of openings.

[0195] The plurality of touch electrodes TE may include one or more first touch electrodes TE1 and one or more second touch electrodes TE2. The touch sensor layers TSM included in the first touch electrodes TE1 may be electrically connected via at least one bridging layer BRG.

[0196] The buffer layer 351 may be disposed on the encapsulation layer 200, the bridging layer BRG may be disposed on the buffer layer 351, and the interlayer insulating layer 352 may be disposed on the bridging layer BRG.

[0197] The touch sensor layer TSM may be disposed on the interlayer insulating layer 352. Corresponding portions of the touch sensor layer TSM may be connected to corresponding bridging layers BRG via holes in the interlayer insulating layer 352.

[0198] Refer to Figure 3 , the touch sensor layer TSM and the bridging layer BRG may be arranged such that the touch sensor layer TSM and the bridging layer BRG do not overlap each other. The touch sensor layer TSM and the bridging layer BRG may overlap with the dam portion 333.

[0199] In one or more aspects, a plurality of touch sensor layers TSM may be included in one touch electrode TE, and may be arranged in a mesh pattern and electrically connected to each other. In one or more aspects, one or more touch sensor layers TSM and another or more touch sensor layers TSM may be electrically connected to each other via one or more bridging layers BRG to form one touch electrode TE.

[0200] The protective layer 353 may be disposed on the touch sensor layer TSM and the bridging layer BRG, and cover the touch sensor layer TSM and the bridging layer BRG.

[0201] Reference Figure 3 As shown in Figure 3 , the touch line TL can electrically connect the touch electrode TE to the touch pad TP. The touch line TL can include at least one of the touch sensor layer TSM and the bridge layer BRG.

[0202] In an example where the display panel 110 is a display panel with a built-in touch sensor, the touch line TL can extend along the outer slope SLP_ENCAP of the encapsulation layer 200 and the upper part of at least one dam DAM, and extend to the touch pad TP located in the non-display area NA.

[0203] Figure 4 Diagram of the substrate (e.g., Figure 3 substrate 111) of the display panel 110 according to various aspects of the present invention.

[0204] Reference Figure 4 As shown in Figure 4 , in one or more aspects, the substrate 111 of the display panel 110 can include a display area AA configured to allow an image to be displayed and a non-display area NA where no image is displayed.

[0205] The non-display area NA can include a first non-display area NA1, a second non-display area NA2, a third non-display area NA3, and a fourth non-display area NA4.

[0206] The first non-display area NA1 can be set in a first direction from the display area AA. The second non-display area NA2 can be set in a second direction from the display area AA. The third non-display area NA3 can be set in a third direction from the display area AA. The fourth non-display area NA4 can be set in a fourth direction from the display area AA. However, various aspects of the present invention are not limited thereto.

[0207] For example, the first direction and the third direction can be directions opposite to each other in the column direction. The second direction and the fourth direction can be directions opposite to each other in the row direction. In another example, the first direction and the third direction can be directions opposite to each other in the row direction. The second direction and the fourth direction can be directions opposite to each other in the column direction. Hereinafter, for ease of explanation, the discussion may be provided based on an example where the first direction and the third direction are directions opposite to each other in the column direction and the second direction and the fourth direction are directions opposite to each other in the row direction. However, various aspects of the present invention are not limited thereto.

[0208] For example, the column direction can be the direction in which the data line DL extends, and the row direction can be the direction in which the gate line GL extends. In another example, the column direction can be the direction in which the gate line GL extends, and the row direction can be the direction in which the data line DL extends. Hereinafter, for ease of explanation, the discussion may be provided based on an example where the column direction is the direction in which the data line DL extends and the row direction is the direction in which the gate line GL extends. However, various aspects of the present invention are not limited thereto.

[0209] Referring to Figure 4 , the first non-display area NA1 may include a pad area PA. A plurality of pads to which at least one driving circuit or a printed circuit board is electrically connected may be provided in the pad area PA. In one or more aspects, a plurality of data lines DL, a first common driving voltage line VDDL, and a second common driving voltage line VSSL may be electrically connected to the plurality of pads.

[0210] The first non-display area NA1 may further include a bending area BA. In this embodiment, the substrate 111 may be a flexible substrate, but the aspects of the present invention are not limited thereto. For example, the substrate 111 may be a non-flexible substrate or may be a substrate having a flexible portion and a non-flexible portion, or a combination thereof. In one or more aspects, the first non-display area NA1 does not need to include the bending area BA.

[0211] The display panel 110 may further include a groundline provided in the non-display area NA of the substrate 111. The groundline may be provided to extend from a point in the pad area PA through the second non-display area NA2, the third non-display area NA3, and the fourth non-display area NA4 to another point in the pad area PA.

[0212] In one or more aspects, the encapsulation layer 200 provided in the display panel 110 may have a structure in which at least one inorganic layer and at least one organic layer are stacked, but the aspects of the present invention are not limited thereto. In these aspects, the edge of the encapsulation layer 200 may be the edge of the organic layer. The encapsulation layer 200 may extend from the display area AA to a part of the non-display area NA.

[0213] In one or more aspects, in order to prevent the overflow of the organic layer in the encapsulation layer 200, the display panel 110 may further include at least one dam or at least one stopper provided outside the organic layer included in the encapsulation layer 200. The at least one dam or the at least one stopper may include an organic layer, but the aspects of the present invention are not limited thereto.

[0214] In Figure 4 In the aspect of the present invention shown, the display panel 110 is shown as having a rectangular display area AA that has a greater length in the vertical direction and a smaller length in the horizontal direction, but the aspects of the present invention are not limited thereto, and display panels having a greater length in the horizontal direction fall within the scope of the present invention. In addition, the display panel 110 does not need to be rectangular, but rather, the display panel 110 may be of different shapes including an ellipse, a hexagon, or other polygons.

[0215] In addition, although the non-display area NA is shown as having four non-display areas NA1, NA2, NA3, and NA4, one or more sides of the display panel 110 may not have a non-display area. In addition, the sizes such as area, width, and / or length of the non-display areas NA1, NA2, NA3, and / or NA4 may be different or the same.

[0216] Figure 5 is a plan view of the display panel 110 according to various aspects of the present invention and illustrates a data link structure configured in the display panel 110.

[0217] Referring Figure 5 , in one or more aspects, the display panel 110 may include: a plurality of data lines DL configured to transmit a data voltage VDATA; and a plurality of pads PD provided in a pad area PA and configured to allow electrical connection of the data driving circuit 120.

[0218] In one or more aspects, the display panel 110 may include a data connection structure configured to electrically connect the plurality of data lines DL to the plurality of pads PD. In one or more aspects, the data connection structure may include a plurality of data connection lines LINK. The data connection lines may also be referred to as link lines.

[0219] The plurality of data connection lines LINK may be provided in the non-display area NA. For example, the plurality of data connection lines LINK may be provided in a first non-display area NA1 including the pad area PA.

[0220] In addition to the pad area PA and the bending area BA, the first non-display area NA1 may further include a connection area LA. However, various aspects of the present invention are not limited thereto.

[0221] For example, each of the plurality of data connection lines LINK may be disposed across the pad area PA, the bending area BA, and the connection area LA. Each of the plurality of data connection lines LINK may include: a first end (or a first side or a first portion) electrically connected to a pad PD provided in the pad area PA; and a second end (or a second side or a second portion) electrically connected to a data line DL provided in the display area AA. A portion between both ends (i.e., the first end and the second end, or the first side and the second side) of each of the plurality of data connection lines LINK may be disposed across the bending area BA and the connection area LA.

[0222] For example, each of the plurality of data connection lines LINK may be configured with one line or two or more lines. Each of the plurality of data connection lines LINK may be provided in one metal layer or two or more metal layers.

[0223] The bending region BA can be bent during the manufacturing process of the display panel 110. Thus, when a user views the display device 100 in front of the display device 100, the bending region BA and the pad region PA may not be visible to the user from the front.

[0224] However, when a user views the display device 100 in front of the display device 100, the connection region LA can be recognized as a border even when covered by a case or a cover member. Thus, in order to achieve a narrow border, it is desirable to reduce the area or size of the connection region LA.

[0225] Refer to Figure 5 , since all of the plurality of data connection lines LINK in the connection region LA of the first non-display region NA1 need to be electrically connected to the plurality of data lines DL, the connection region LA requires a large area.

[0226] For example, when the length of the pad region PA in the second direction (row direction) is shorter than the length of the display region AA in the second direction (row direction), each of the plurality of data connection lines LINK in the left region LBZ and the right region RBZ of the connection region LA needs to extend at a determined angle with respect to the row direction or the column direction and then be electrically connected to a corresponding one of the plurality of data lines DL. This configuration results in an increased length of the connection region LA in the first direction (column direction), and the connection region LA has an increased area.

[0227] Thus, as Figure 5 shown, in an example where the display panel 110 has a data connection structure in which the plurality of data connection lines LINK are provided in the first non-display region NA1, the connection region LA of the first non-display region NA1 may require a large area. In this embodiment, when a user views the display device 100 in front of the display device 100, the connection region LA can be recognized as a wide border.

[0228] Thus, in order to achieve a narrow border, a data connection structure capable of reducing the area of the connection region LA needs to be provided. Thus, as discussed below, a data connection structure capable of achieving a narrow border is provided.

[0229] Hereinafter, a data connection structure capable of achieving a narrow border according to various aspects of the present invention will be described.

[0230] Figure 6 is a plan view of a display panel 110 according to various aspects of the present invention and illustrates a data connection structure (border reduction data connection structure) capable of reducing the border of the display panel 110. Figure 7 Illustrates three regions (region A, region B, and region C) in the display region AA through the data connection structure of the display panel 110 according to various aspects of the present invention. The data connection structure according to various aspects described herein can be a border reduction data connection structure.

[0231] Refer to Figure 6 , the non-display area NA may include a first non-display area NA1 provided in the column direction from the display area AA. The first non-display area NA1 may include a pad area PA and a connection area LA provided in the column direction from the display area AA. However, multiple aspects of the present invention are not limited thereto.

[0232] In one or more aspects, the display panel 110 may include a data connection structure that can reduce the bezel of the display panel 110 and allow a data voltage VDATA to be provided to a plurality of sub-pixels SP provided in the display area AA (or provide the data voltage VDATA to a plurality of sub-pixels SP provided in the display area AA).

[0233] Refer to Figure 6 , in one or more aspects, the bezel-reducing data connection structure may include a plurality of data connection lines LINK configured to electrically connect a plurality of data lines DL to a plurality of pads PD.

[0234] A plurality of data lines DL may be provided in the display area AA, extend in the column direction, and be connected to a plurality of sub-pixels SP provided in the display area AA.

[0235] A plurality of pads PD may be provided in the pad area PA included in the first non-display area NA1.

[0236] A plurality of data connection lines LINK may electrically connect a plurality of pads PD provided in the pad area PA in the first non-display area NA1 to a plurality of data lines DL provided at the display area AA.

[0237] Refer to Figure 6 , in one or more aspects, each of the plurality of data connection lines LINK in the data connection structure for a narrow bezel may include a portion LIA provided in the display area AA.

[0238] In the bezel-reducing data connection structure according to multiple aspects of the present invention, the plurality of data connection lines LINK and the plurality of data lines DL may be electrically connected to each other in the display area AA. For example, in the bezel-reducing data connection structure according to multiple aspects of the present invention, a connection point (or connection portion) CNT_DL between the plurality of data connection lines LINK and the plurality of data lines DL may be provided in the display area AA.

[0239] Therefore, each of the plurality of data connection lines LINK does not need to extend at a determined angle in the left area and the right area of the connection area LA with respect to the row direction or the column direction (or the diagonal direction or the inclined direction), and each of the plurality of data connection lines LINK may pass through the connection area LA in the column direction with a shorter length and enter the display area AA to be connected to the corresponding data line DL in the display area AA.

[0240] As Figure 6 shown, in an example where the display panel 110 has a border-reduced data connection structure, the length of the connection area LA in the column direction can be very short or zero. Accordingly, the first non-display area NA1 seen by the user in front of the display panel 110 can become very small or completely non-existent, so that the display area AA is directly connected to the bending area BA.

[0241] Referring Figure 6 , in the border-reduced data connection structure according to various aspects of the present invention, each of the plurality of data connection lines LINK may include a data connection line LIA of the display area AA or a data connection line LIA in the display area AA (which may be referred to as a display area data connection line LIA) that can be disposed in the display area AA.

[0242] The display area data connection line LIA may be disposed in the display area AA and includes a horizontal data connection line HLIA extending in the row direction (i.e., the horizontal direction) and a vertical data connection line VLIA extending in the column direction (i.e., the vertical direction). The vertical data connection line VLIA may be, for example, a first data connection line or a first connection line, but various aspects of the present invention are not limited thereto. The horizontal data connection line HLIA may be, for example, a second data connection line or a second connection line, but various aspects of the present invention are not limited thereto.

[0243] The vertical data connection line VLIA may electrically connect the corresponding pad PD to the corresponding horizontal data connection line HLIA. The horizontal data connection line HLIA may electrically connect the corresponding vertical data connection line VLIA to the corresponding data line DL.

[0244] The horizontal data connection line HLIA and the vertical data connection line VLIA may be electrically connected to each other at a connection hole (or connection point or connection portion) CNT_LIA of the connection lines. The horizontal data connection line HLIA and the data line DL may be electrically connected to each other at a data line connection hole (or connection point or connection portion) CNT_DL.

[0245] Referring Figure 6 , each of the plurality of data connection lines LINK may further include a data connection line LIN of the non-display area NA or a data connection line LIN in the non-display area NA (which may be referred to as a non-display area data connection line LIN) that can be disposed in the first non-display area NA1 of the non-display area NA. However, various aspects of the present invention are not limited thereto.

[0246] For example, the non-display area data connection line LIN and the vertical data connection line VLIA can be integrally formed as a single line. In another example, the non-display area data connection line LIN can be electrically connected to the vertical data connection line VLIA and can be disposed in a metal layer different from the metal layer in which the vertical data connection line VLIA is disposed. In another example, the non-display area data connection line LIN can include a line that is electrically connected to the vertical data connection line VLIA and is disposed in a metal layer different from the metal layer in which the vertical data connection line VLIA is disposed.

[0247] In the example where the display panel 110 has Figure 6 the border-reducing data connection structure shown, the horizontal data connection line HLIA included in each of the plurality of data connection lines LINK can be parallel to the plurality of gate lines GL provided in the display area AA and extend in the row direction (horizontal direction).

[0248] In addition, in the example where the display panel 110 has Figure 6 the border-reducing data connection structure shown, the horizontal data connection line HLIA included in each of the plurality of data connection lines LINK can overlap at least one gate line GL in the vertical direction (or in the vertical direction in the plan view).

[0249] Among the plurality of vertical data connection lines VLIA, the vertical data connection line VLIA electrically connected to the data line DL disposed closer to the center (or inside) of the display area AA can have a shorter length compared to the vertical data connection line VLIA electrically connected to the data line DL disposed farther from the center (or outside) of the display area AA. Among the plurality of vertical data connection lines VLIA, the vertical data connection line VLIA electrically connected to the data line DL disposed farther from the center of the display area AA can have a longer length compared to the vertical data connection line VLIA electrically connected to the data line DL disposed closer to the center of the display area AA. Among the plurality of vertical data connection lines VLIA, the vertical data connection line VLIA electrically connected to the data line DL disposed closer to the center of the display area AA can have a shorter length compared to the vertical data connection line VLIA electrically connected to the data line DL disposed farther from the center of the display area AA.

[0250] Among the plurality of horizontal data connection lines HLIA, the horizontal data connection line HLIA electrically connected to the data line DL disposed closer to the center of the display area AA may have a relatively short length. Among the plurality of horizontal data connection lines HLIA, the horizontal data connection line HLIA electrically connected to the data line DL disposed farther from the center of the display area AA may have a longer length compared to the horizontal data connection line HLIA electrically connected to the data line DL disposed closer to the center of the display area AA. Among the horizontal data connection lines HLIA, the horizontal data connection line HLIA electrically connected to the data line DL disposed closer to the center of the display area AA may have a shorter length compared to the horizontal data connection line HLIA electrically connected to the data line DL disposed farther from the center of the display area AA.

[0251] Among the plurality of horizontal data connection lines HLIA, the horizontal data connection line HLIA closer to the pad area PA may have a relatively short length. Among the plurality of horizontal data connection lines HLIA, the horizontal data connection line HLIA farther from the pad area PA may have a relatively long length. Among the plurality of horizontal data connection lines HLIA, the horizontal data connection line HLIA closer to the pad area PA may have a shorter length compared to the horizontal data connection line HLIA farther from the pad area PA.

[0252] The first connection line LINK1 may include a first display area data connection line LIA1 (or the data connection line LIA1 of the first display area or the data connection line LIA1 in the first display area) and a first non-display area data connection line LIN1 (or the data connection line LIN1 of the first non-display area or the data connection line LIN1 in the first non-display area). The first display area data connection line LIA1 may include a first horizontal data connection line HLIA1 and a first vertical data connection line VLIA1. The first vertical data connection line VLIA1 may be, for example, the 1-1 data connection line, the 1-1 connection line, the first data connection line, or the first connection line, but various aspects of the present invention are not limited thereto. The first horizontal data connection line HLIA1 may be, for example, the 2-1 data connection line, the 2-1 connection line, the seventh data connection line, or the seventh connection line, but various aspects of the present invention are not limited thereto.

[0253] The second connection line LINK2 may include a second display area data connection line LIA2 (or a data connection line LIA2 of the second display area or a data connection line LIA2 in the second display area) and a second non-display area data connection line LIN2 (or a data connection line LIN2 of the second non-display area or a data connection line LIN2 in the second non-display area). The second display area data connection line LIA2 may include a second horizontal data connection line HLIA2 and a second vertical data connection line VLIA2. The second vertical data connection line VLIA2 may be, for example, a first-to-second data connection line, a first-to-second connection line, a second data connection line, or a second connection line, but various aspects of the present invention are not limited thereto. The second horizontal data connection line HLIA2 may be, for example, a second-to-second data connection line, a second-to-second connection line, an eighth data connection line, or an eighth connection line, but various aspects of the present invention are not limited thereto.

[0254] Among the first vertical data connection line VLIA1 and the second vertical connection line VLIA2, the first vertical data connection line VLIA1 electrically connected to the first data line DL1, which is disposed more outward than the second data line DL2 among the first data line DL1 and the second data line DL2, may have a longer length than the second vertical connection line VLIA2.

[0255] Among the first horizontal data connection line HLIA1 and the second horizontal connection line HLIA2, the first horizontal data connection line HLIA1 electrically connected to the first data line DL1, which is disposed more outward than the second data line DL2 among the first data line DL1 and the second data line DL2, may have a longer length than the second horizontal connection line HLIA2.

[0256] Since the first horizontal data connection line HLIA1 has a longer length than the second horizontal data connection line HLIA2, a first area where the first horizontal data connection line HLIA1 overlaps with at least one gate line GL may be larger than a second area where the second horizontal data connection line HLIA2 overlaps with at least one gate line GL.

[0257] As Figure 6 shown, a point (or portion) CNT_DL where the data line DL and the horizontal data connection line HLIA are connected may form two first slant lines SLT_DL. In addition, a point (or portion) CNT_LIA where the vertical data connection line VLIA and the horizontal data connection line HLIA are connected may form two second slant lines SLT_LIA.

[0258] As Figure 6As shown, two triangles can be formed by two first diagonal lines SLT_DL and two second diagonal lines SLT_LIA. In each of the two triangles, one of the three sides can be a horizontal side parallel to the horizontal data connection line HLIA, and the vertex facing this horizontal side can be set in the boundary between the display area AA and the first non-display area NA1, or near the boundary.

[0259] Referring to Figure 6 , the display area AA may include a central area Ac, a first area A1 on one side of the central area Ac, and a second area A2 on the other side of the central area Ac.

[0260] Referring to Figure 6 , the data lines DL provided in the first area A1 and the second area A2 can be connected to the non-display area data connection line LIN through the display area data connection line LIA.

[0261] In one aspect, at least one data line DL provided in the central area Ac can be directly connected to the corresponding non-display area data connection line LIN without passing through the display area connection line LIA.

[0262] In an example where the display panel 110 has the Figure 6 data connection structure shown, the corresponding horizontal data connection line HLIA among the multiple data connection lines LINK can be parallel to the multiple gate lines GL provided in the display area AA, and extend in the row direction (horizontal direction), and the corresponding horizontal data connection line HLIA included in the multiple data connection lines LINK can overlap at least one gate line GL in the vertical direction (or the vertical direction in the plan view).

[0263] Referring to Figure 7 , according to the data connection structure capable of reducing the border of the display panel 110, the display area AA may include three areas (A, B, and C).

[0264] The first area (area A) can be an area where the border reduction data connection structure is not configured. The second area (area B) and the third area (area C) can be areas configured with the border reduction data connection structure (such as the above-mentioned border reduction data connection structure). The second area (area B) can be an area where the horizontal data connection line HLIA is provided, and the third area (area C) can be an area where the vertical data connection line VLIA is provided.

[0265] Among the first to fourth non-display areas (NA1 to NA4) included in the non-display area NA, the first non-display area NA1 including the pad area PA can be adjacent to one side of each third area (area C).

[0266] The second region (Region B) may have an inverted triangle or an isosceles triangle, but many aspects of the present invention are not limited thereto. The display region AA may include two second regions (Region B). The two second regions (Region B) may be respectively disposed on both sides of the first region (Region A, which is located in the central portion of the display region AA).

[0267] The third region (Region C) may have a right triangle, but many aspects of the present invention are not limited thereto. The display region AA may include two third regions (Region C). The two third regions (Region C) may be respectively located on both sides of the first region (Region A, which is located in the central portion of the display region AA).

[0268] The first region (Region A) may be disposed on (or at the top or upper part of) the two second regions (Region B), may also be disposed between the two third regions (Region C), and / or may also be disposed outside the two second regions (Region B). The first region (Region A) located between the two third regions (Region C) may correspond to Figure 6 the central region Ac.

[0269] Referring to Figure 6 and 7 , the boundary between the first region (Region A) and each of the two second regions (Region B) may correspond to the point (or portion) CNT_DL where the horizontal data connection line HLIA is connected to the data line DL, and form a first oblique line SLT_DL.

[0270] The boundary between the second region (Region B) and the third region (Region C) may correspond to the point (or portion) CNT_LIA where the vertical data connection line VLIA is connected to the horizontal data connection line HLIA, and form a second oblique line SLT_LIA.

[0271] In various aspects of the present invention, each A region (left and right) may have the same area, each B region may have the same area, and each C region may have the same area, but this is not necessary. Therefore, each A region (left and right) may also have different areas, each B region may have different areas, and each C region may have different areas.

[0272] Figure 8 Illustrate the regions of the display panel 110 having a data connection structure according to various aspects of the present invention. The following discusses together with Figure 6 the structure of Figure 8 .

[0273] Referring to Figure 8 and 6, the first non-display area NA1 may include a pad area PA provided with a plurality of data pads (DP1, DP2, DP3, and / or DP4). The plurality of data pads (DP1, DP2, DP3, and / or DP4) may include a first data pad DP1, a second data pad DP2, a third data pad DP3, and a fourth data pad DP4.

[0274] A plurality of data lines DL may be provided in the display area AA and include a first data line DL1, a second data line DL2, a third data line DL3, and a fourth data line DL4. Each of the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4 may be provided in the display area AA and extend in the column direction. Corresponding data voltages may be applied to each of the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4.

[0275] Referring to Figure 8 and 6 , a data connection structure (such as the border-reducing data connection structure discussed above) may be configured in a part of the display area AA adjacent to the first non-display area NA1. Thus, the border-reducing data connection structure discussed with reference to Figure 6 may be configured for Figure 8 the data connection structure.

[0276] The data connection structure may include display area connection lines LIA. The display area connection lines LIA may include horizontal data connection lines HLIA and vertical data connection lines VLIA.

[0277] Each horizontal data connection line HLIA may be provided in the display area AA. All or at least a part of each vertical data connection line VLIA may be provided in the display area AA.

[0278] Referring to Figure 8 , the horizontal data connection line HLIA may be electrically connected to the data line including the first data line DL1. The horizontal data connection line HLIA may be provided in the display area AA. The horizontal data connection line HLIA may extend in the row direction. The horizontal data connection line HLIA may include a first horizontal data connection line HLIA1 provided in the first metal layer ML1 (see Figure 9 ).

[0279] At least one vertical data connection line VLIA may electrically connect the first horizontal data connection line HLIA1 to the first data pad DP1. The vertical data connection line VLIA may extend in the column direction. The vertical data connection line VLIA may include a first vertical data connection line VLIA1 provided in a second metal layer ML2 different from the first metal layer ML1. All or at least a part of the first vertical data connection line VLIA1 may be provided in the display area AA.

[0280] At least one horizontal data connection line HLIA can be electrically connected to the second data line DL2. The horizontal data connection line HLIA can be disposed in the display area AA. The horizontal data connection line HLIA can extend in the row direction. The horizontal data connection line HLIA can further include a second horizontal data connection line HLIA2 disposed in the first metal layer ML1.

[0281] At least one vertical data connection line VLIA can electrically connect the second horizontal data connection line HLIA2 to the second data pad DP2. The vertical data connection line VLIA can extend in the column direction. The vertical data connection line VLIA can further include a second vertical data connection line VLIA2 disposed in a second metal layer ML2 different from the first metal layer ML1. All or at least a part of the second vertical data connection line VLIA2 can be disposed in the display area AA. However, various aspects of the present invention are not limited thereto.

[0282] Referring to Figure 8 , in one or more aspects, the display panel 600 can include at least one horizontal metal layer HLIA_P and at least one vertical metal layer VLIA_P. The horizontal metal layer HLIA_P can be separated from the horizontal data connection line HLIA, extend in the row direction, and be disposed in the first metal layer ML1. The vertical metal layer VLIA_P can be separated from the vertical data connection line VLIA, extend in the column direction, and be disposed in the second metal layer ML2.

[0283] At least one horizontal metal layer HLIA_P can include a first horizontal metal layer HLIA1_P. The first horizontal metal layer HLIA1_P can be separated from the first horizontal data connection line HLIA1, extend in the row direction, and be disposed in the first metal layer ML1.

[0284] At least one horizontal metal layer HLIA_P can include a second horizontal metal layer HLIA2_P. The second horizontal metal layer HLIA2_P can be separated from the second horizontal data connection line HLIA2, extend in the row direction, and be disposed in the first metal layer ML1.

[0285] At least one vertical metal layer VLIA_P can include a first vertical metal layer VLIA1_P. The first vertical metal layer VLIA1_P can be separated from the first vertical data connection line VLIA1, extend in the column direction, and be disposed in the second metal layer ML2.

[0286] At least one vertical metal layer VLIA_P can include a second vertical metal layer VLIA2_P. The second vertical metal layer VLIA2_P can be separated from the second vertical data connection line VLIA2, extend in the column direction, and be disposed in the second metal layer ML2.

[0287] In a case where the first horizontal metal layer HLIA1_P and the second horizontal metal layer HLIA2_P are not provided in a region where the first horizontal metal layer HLIA1_P and the second horizontal metal layer HLIA2_P are provided, an imbalance in the presence of the first metal layer may occur between the region where the first horizontal metal layer HLIA1_P and the second horizontal metal layer HLIA2_P are provided and the region where the first horizontal metal layer HLIA1_P and the second horizontal metal layer HLIA2_P are not provided. Due to this configuration, the respective characteristics of the reflected light may become significantly different at each position inside the display panel 110, which causes display artifacts such as image abnormalities, brightness differences, color differences, and the like. The light may include at least a part of the amount of internal light emitted from one or more light-emitting elements ED and the amount of external light introduced from the outside into the display panel 110. However, multiple aspects of the present invention are not limited thereto.

[0288] In a case where the first vertical metal layer VLIA1_P and the second vertical metal layer VLIA2_P are not provided in a region where the first vertical metal layer VLIA1_P and the second vertical metal layer VLIA2_P are provided, an imbalance in the presence of the second metal layer may occur between the region where the first vertical metal layer VLIA1_P and the second vertical metal layer VLIA2_P are provided and the region where the first vertical metal layer VLIA1_P and the second vertical metal layer VLIA2_P are not provided. Due to this configuration, the respective characteristics of the reflected light may become significantly different at each position inside the display panel 110, which causes display artifacts such as image abnormalities, brightness differences, color differences, and the like.

[0289] For example, display artifacts caused by such an imbalance in the presence in one or more metal layers can be reduced by providing the first horizontal metal layer HLIA1_P and the second horizontal metal layer HLIA2_P, and the first vertical metal layer VLIA1_P and the second vertical metal layer VLIA2_P.

[0290] The common driving voltage transmitted through at least one horizontal metal layer HLIA_P and at least one vertical metal layer VLIA_P may be Figure 2 one of the first common driving voltage VDD and the second common driving voltage VSS shown. However, the common driving voltage transmitted through at least one horizontal metal layer HLIA_P and at least one vertical metal layer VLIA_P is not limited to the first common driving voltage VDD and the second common driving voltage VSS, but may be any of the DC voltages supplied to the display panel 110.

[0291] Here, for ease of description, a discussion is provided based on an example in which a common driving voltage transmitted through at least one horizontal metal layer HLIA_P and at least one vertical metal layer VLIA_P is a second common driving voltage VSS. The second common driving voltage VSS is also referred to as a base voltage or a low power supply voltage.

[0292] Referring to Figure 8 , the horizontal metal layer HLIA_P and the vertical metal layer VLIA_P can be configured as a mesh pattern (or mesh shape). By adopting such a configuration, the area for providing the base voltage VSS as the second common driving voltage can be significantly increased by at least one horizontal metal layer HLIA_P and at least one vertical metal layer VLIA_P. Accordingly, the transmission characteristics of the base voltage VSS can also be significantly improved.

[0293] In addition, since the first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P extending in the same direction are separated from each other, the first vertical data connection line VLIA1 and the first vertical metal layer VLIA1_P extending in the same direction are separated from each other, the second horizontal data connection line HLIA2 and the second horizontal metal layer HLIA2_P extending in the same direction are separated from each other, and the second vertical data connection line VLIA2 and the second vertical metal layer VLIA2_P extending in the same direction are separated from each other, the length and area of the path for transmitting the data voltage can be reduced. By adopting such a configuration, the parasitic capacitance associated with the first data line DL1 and the second data line DL2 can be reduced.

[0294] The horizontal metal layer HLIA_P and the vertical metal layer VLIA_P can be lines configured to transmit (or transfer) a common driving voltage for driving a display panel.

[0295] Figure 9 and 10 are cross-sectional views of display panels according to various aspects of the present invention, in which the display panels 810 and 820 respectively have a data connection structure capable of reducing a border. The following is discussed together with the configurations of Figure 6 and 8 . Figure 9 and 10 's configurations.

[0296] Referring to Figure 9 , the first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P can be disposed on a second interlayer insulating layer 323 (such as Figure 3 the second interlayer insulating layer 323 of ). The first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P can be disposed to be separated from each other. However, various aspects of the present invention are not limited thereto.

[0297] The first planarization layer 331 (such asFigure 3 The first planarization layer 331) may be disposed on the first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P.

[0298] The first vertical data connection line VLIA1 and the vertical line (e.g., the data line DL3 discussed above) may be disposed on the first planarization layer 331.

[0299] The first vertical data connection line VLIA1 may be connected to the first horizontal data connection line HLIA1 through a via in the first planarization layer 331.

[0300] The second planarization layer 332 (e.g., Figure 3 the second planarization layer 332) may be disposed on the first vertical data connection line VLIA1 and the vertical line (e.g., the data line DL3). The dam portion 333 (e.g., Figure 3 the dam portion 333) may be disposed on the second planarization layer 332.

[0301] The metal layer in which the first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P are disposed may be the first metal layer ML1 located between the second interlayer insulating layer 323 and the first planarization layer 331.

[0302] The space (or distance) between the first horizontal data connection line HLIA1 and the first horizontal metal layer HLIA1_P in the first metal layer ML1 may be referred to as the first opening region OA1 of the first metal layer ML1.

[0303] The metal layer in which the first vertical data connection line VLIA1 and the vertical line (e.g., the data line DL3) are disposed may be the second metal layer ML2 located between the first planarization layer 331 and the second planarization layer 332.

[0304] Referring to Figure 10 , the first horizontal data connection line HLIA1 may be disposed on the second interlayer insulating layer 323.

[0305] The first planarization layer 331 may be disposed on the first horizontal data connection line HLIA1.

[0306] The first vertical data connection line VLIA1 and the first vertical metal layer VLIA1_P may be disposed on the first planarization layer 331 such that the first vertical data connection line VLIA1 and the first vertical metal layer VLIA1_P are separated from each other.

[0307] The first vertical data connection line VLIA1 may be connected to the first horizontal data connection line HLIA1 through a via in the first planarization layer 331.

[0308] The second planarization layer 332 may be disposed on the first vertical data connection line VLIA1 and the first vertical metal layer VLIA1_P. The dam portion 333 may be disposed on the second planarization layer 332.

[0309] Both the first vertical metal layer VLIA1_P and the first vertical data connection line VLIA1 may be disposed in the second metal layer ML2.

[0310] The space (or distance) between the first vertical metal layer VLIA1_P and the first vertical data connection line VLIA1 in the second metal layer ML2 may be referred to as the second opening area OA2 of the second metal layer ML2.

[0311] As described above, the common driving voltage required for driving the display panel may be provided via the horizontal metal layers (HLIA1_P, HLIA2_P) separated from the horizontal data connection lines (HLIA1, HLIA2) and the vertical metal layers (VLIA1_P, VLIA2_P) separated from the vertical data connection lines (VLIA1, VLIA2). For example, the common driving voltage may be the base voltage VSS.

[0312] Therefore, the path for transmitting the common driving voltage may be configured in a mesh pattern (or mesh shape). Thus, the area for transmitting the common driving voltage increases, and the transmission characteristics of the common driving voltage may also be significantly improved. However, multiple aspects of the present invention are not limited thereto.

[0313] In Figure 9 and 10 the positions of the first metal layer ML1 and the second metal layer ML2 may be switched. For example, the first metal layer ML1 may be located on the second metal layer ML2.

[0314] Hereinafter, with reference to Figures 11 to 16 the structure of the power line for transmitting the common driving voltage will be described in more detail.

[0315] Figure 11 is a plan view of a display panel 110 according to multiple aspects of the present invention, where the display panel 110 has a power line structure related to a border-reduced data connection structure.

[0316] With reference to Figure 11 and 3 in one or more aspects, the display panel 110 may include a substrate 111, a plurality of data lines DL, etc.

[0317] The substrate 111 may include a display area AA having a plurality of sub-pixels SP and a non-display area NA disposed outside the display area AA. The non-display area NA may include a pad area PA.

[0318] With reference to Figure 11 and4 , the non-display area NA may include a first non-display area NA1, a second non-display area NA2, a third non-display area NA3, and a fourth non-display area NA4. The first non-display area NA1 may include a pad area PA.

[0319] The pad area PA may include a data pad area DPA provided with a plurality of data pads DP.

[0320] A plurality of data lines DL may extend in the column direction in the display area AA. For example, one or more of the plurality of data lines DL may be connected to one or more of the plurality of data pads DP provided in the pad area PA and extend into the display area AA. In addition, one or more of the other plurality of data lines DL may be provided only in the display area AA.

[0321] In one or more aspects, the display panel 110 may include a data connection structure. The data connection structure may include a plurality of display area data connection lines LIA. The plurality of display area data connection lines LIA may be provided in Figure 7 the second area (area B) and the third area (area C) among the first to third areas (A, B, and C). The data connection structure configured in Figure 11 may be based on the border reduction data connection structure discussed above.

[0322] The plurality of display area data connection lines LIA may include a plurality of vertical data connection lines VLIA and a plurality of horizontal data connection lines HLIA. The plurality of vertical data connection lines VLIA and the plurality of horizontal data connection lines HLIA may be provided in the display area AA. The plurality of vertical data connection lines VLIA may be electrically connected to the plurality of data pads DP and may extend in the column direction in the display area AA. The plurality of horizontal data connection lines HLIA may electrically connect the plurality of vertical data connection lines VLIA to the plurality of data lines DL and may extend in the row direction in the display area AA.

[0323] The plurality of vertical data connection lines VLIA may be provided in the two third areas (area C). The plurality of horizontal data connection lines HLIA may be provided in the two second areas (area B). A part of the first area (area A) may exist between the two third areas (area C). However, various aspects of the present invention are not limited thereto.

[0324] Referring to Figure 11 , in one or more aspects, the display panel 110 may include a border reduction data connection structure and a power line structure associated therewith.

[0325] In one or more aspects, the power supply line structure of the display panel 110 may include at least one power pad PP, at least one power supply line PIW, and a plurality of vertical power distribution lines V_PDW. At least one power pad PP may be disposed in the pad area PA. The power supply line PIW may be electrically connected to at least one power pad PP and may be disposed in the non-display area NA. The plurality of vertical power distribution lines V_PDW may be electrically connected to the power supply line PIW and may extend in the column direction in the display area AA. The power supply line PIW may be a power supply line disposed in the edge area (or peripheral area) of the display panel 110, but the aspects of the present invention are not limited thereto. The plurality of vertical power distribution lines V_PDW may be a plurality of first power distribution lines or a plurality of first power supply lines, but the aspects of the present invention are not limited thereto.

[0326] As Figure 11 shown, the non-display area NA may include a pad area PA, which includes a plurality of data pads DP and at least one power pad PP. For example, at least one power pad PP may be disposed on each of one side and the other side of the data pad area DPA in which a plurality of data pads DP are disposed. In another example, at least one power pad PP may be disposed at one side or the other side of the data pad area DPA.

[0327] The power supply line PIW may be disposed in the first non-display area NA1. The power supply line PIW may be disposed in the area between the pad area PA and the display area AA.

[0328] In one or more aspects, at least one additional power supply line PIW may be disposed in at least one of the second non-display area NA2 and the third non-display area NA3. In one or more aspects, at least one additional power supply line PIW may be disposed in at least one of the second non-display area NA2, the third non-display area NA3, and the fourth non-display area NA4.

[0329] Referring Figure 11 , each of the plurality of vertical power distribution lines V_PDW may be connected to the power supply line PIW and extend into the display area AA. Each of the plurality of vertical power distribution lines V_PDW may extend in the column direction in the display area AA. For example, at least one of the plurality of vertical power distribution lines V_PDW may be a first power distribution line or a first power supply line, but the aspects of the present invention are not limited thereto.

[0330] In one or more aspects, the power supply line structure of the display panel 110 may be configured to supply a common driving voltage for driving the display panel to a plurality of sub-pixels SP disposed in the display area AA. However, the aspects of the present invention are not limited thereto.

[0331] For example, the common driving voltage provided by the power supply line structure of the display panel 110 may beFigure 2 One of the first common driving voltage VDD and the second common driving voltage VSS shown. However, the common driving voltage provided through the power line structure of the display panel 110 is not limited to the first common driving voltage VDD and the second common driving voltage VSS, but can be any of the DC voltages provided to the display panel 110.

[0332] Referring to Figure 11 , in one or more aspects, the plurality of vertical data connection lines VLIA may include: a first central vertical data connection line VLIA_C1 and a second central vertical data connection line VLIA_C2, which are disposed at a central portion of a region in which the plurality of vertical data connection lines VLIA are disposed; and a first outermost vertical data connection line VLIA_O1 and a second outermost vertical data connection line VLIO_O2, which are disposed at two outermost portions of a region in which the plurality of vertical data connection lines VLIA are disposed. The first central vertical data connection line VLIA_C1 may be, for example, the 1-3 data connection line, the 1-3 connection line, the third data connection line, or the third connection line, but the aspects of the present invention are not limited thereto. The second central vertical data connection line VLIA_C2 may be, for example, the 1-4 data connection line, the 1-4 connection line, the fourth data connection line, or the fourth connection line, but the aspects of the present invention are not limited thereto. The first outermost vertical data connection line VLIA_O1 may be, for example, the 1-5 data connection line, the 1-5 connection line, the fifth data connection line, or the fifth connection line, but the aspects of the present invention are not limited thereto. The second outermost vertical data connection line VLIO_O2 may be, for example, the 1-6 data connection line, the 1-6 connection line, the sixth data connection line, or the sixth connection line, but the aspects of the present invention are not limited thereto.

[0333] The first central vertical data connection line VLIA_C1 may have a longer length than the first outermost vertical data connection line VLIA_O1.

[0334] The second central vertical data connection line VLIA_C2 may have a longer length than the second outermost vertical data connection line VLIO_O2.

[0335] Referring to Figure 11 , in one or more aspects, the horizontal data connection line HLIA connected to the first central vertical data connection line VLIA_C1 may have a longer length than the horizontal data connection line HLIA connected to the first outermost vertical data connection line VLIA_O1.

[0336] The horizontal data connection line HLIA connected to the second central vertical data connection line VLIA_C2 may have a longer length than the horizontal data connection line HLIA connected to the second outermost vertical data connection line VLIO_O2.

[0337] A plurality of horizontal data connection lines HLIA can be disposed in the first metal layer ML1 (e.g., Figure 9 and 10 the first metal layer ML1 shown). A plurality of vertical data connection lines VLIA can be disposed in a second metal layer ML2 different from the first metal layer ML1 (e.g., Figure 9 and 10 the second metal layer ML2 shown).

[0338] A plurality of data lines DL can be disposed in the second metal layer ML2.

[0339] As described above, a horizontal line extending in the row direction can be disposed in the first metal layer ML1, and a vertical line extending in the column direction can be disposed in the second metal layer ML2.

[0340] Each of the plurality of vertical power distribution lines V_PDW can have a longer length than each of the plurality of vertical data connection lines VLIA. However, various aspects of the present invention are not limited thereto.

[0341] For example, each of the plurality of vertical power connection lines (or a plurality of vertical metal layers) VLIA_P can have a longer length than the longest vertical data connection line (VLIA_C1 and VLIA_C2) among the plurality of vertical data connection lines VLIA.

[0342] Referring to Figure 11 , the plurality of vertical data connection lines VLIA can include a first central vertical data connection line VLIA_C1 and a second central vertical data connection line VLIA_C2, which are disposed at a central portion of a region in which the plurality of vertical data connection lines VLIA are disposed.

[0343] The plurality of vertical power distribution lines V_PDW can be disposed between the first central vertical data connection line VLIA_C1 and the second central vertical data connection line VLIA_C2.

[0344] Referring to Figure 11 and 7 , the display area can include: a first area (area A) in which the plurality of vertical data connection lines VLIA and the plurality of horizontal data connection lines HLIA are not disposed; two second areas (area B) in which the plurality of horizontal data connection lines HLIA are disposed; and two third areas (area C) in which the plurality of vertical data connection lines VLIA are disposed.

[0345] Referring to Figure 11 and 7, the area between two third regions (Region C) may correspond to a part of the first region (Region A). A plurality of vertical power distribution lines V_PDW may be provided in the central power supply area CPA, and the central power supply area CPA may be the first region (Region A) between two third regions (Region C).

[0346] Figure 12 is a plan view of a local area in the Figure 11 configuration. The following provides a discussion of the Figure 11 configuration together with the Figure 12 configuration.

[0347] Referring to Figure 12 , in one or more aspects, the data connection structure of the display panel 110 may include a plurality of display area data connection lines LIA, which include a plurality of horizontal data connection lines HLIA and a plurality of vertical data connection lines VLIA. The horizontally arranged data connection lines HLIA and the vertically arranged data connection lines VLIA that correspond to each other may be electrically connected via connection holes CNT_LIA. However, the various aspects of the present invention are not limited to this.

[0348] For example, the plurality of horizontal data connection lines HLIA may include first to eighth horizontal data connection lines (HLIA1 to HLIA8), and the plurality of vertical data connection lines VLIA may include first to thirteenth vertical data connection lines (VLIA1 to VLIA13). This example is only for ease of explanation, and thus, the various aspects of the present invention are not limited to this.

[0349] Referring to Figure 12 , the first vertical data connection line VLIA1 may correspond to the Figure 11 first outermost vertical data connection line VLIA_O1 of the Figure 11 . The thirteenth vertical data connection line VLIA13 may correspond to the

[0350] first central vertical data connection line VLIA_C1 of the

[0351] In one or more aspects, the power supply line structure of the display panel 110 may include at least one power distribution line PDW for distributing a common driving voltage to the display area AA. Figure 11 Figure 11

[0352] At least one power distribution line PDW may be electrically connected to a power supply line PIW (e.g., the power supply line PIW in Figure 11 ). At least one power distribution line PDW may include a plurality of vertical power distribution lines V_PDW extending in the column direction in the display area AA (e.g., the vertical power distribution lines V_PDW in Figure 11 ). For example, the vertical power distribution line V_PDW may be the first power distribution line or the first power supply line, but the various aspects of the present invention are not limited to this.For example, multiple vertical power distribution lines V_PDW may include a first vertical power distribution line V_PDW1, a second vertical power distribution line V_PDW2, and a third vertical power distribution line V_PDW3. This example is only for ease of explanation, and thus, various aspects of the present invention are not limited thereto.

[0353] Referring to Figure 12 , multiple vertical power distribution lines V_PDW may be disposed in a central power supply area CPA, and the central power supply area CPA may be a first area (area A) between two third areas (area C).

[0354] In one or more aspects, the power line structure of the display panel 110 may include multiple power connection lines LIA_P, which are configured to transmit a common driving voltage distributed from the vertical power distribution lines V_PDW to multiple sub-pixels SP.

[0355] The multiple power connection lines LIA_P may include multiple horizontal power connection lines HLIA_P and multiple vertical power connection lines VLIA_P. For example, one of the vertical power connection lines VLIA_P may be a first power connection line or a ninth connection line, but various aspects of the present invention are not limited thereto. For example, one of the horizontal power connection lines HLIA_P may be a second power connection line or a second connection line, but various aspects of the present invention are not limited thereto.

[0356] Each of the multiple horizontal power connection lines HLIA_P may be electrically connected to a corresponding one of the multiple vertical power distribution lines V_PDW via a power line connection hole CNT_P, and may extend in a row direction in the display area AA.

[0357] The multiple vertical power connection lines VLIA_P may be electrically connected to the multiple vertical power distribution lines V_PDW or an extended power supply line, and may extend in a column direction in the display area AA. For example, the extended power supply line PIW may be a line extending from the power supply line PIW in the first non-display area NA1 to the second to fourth non-display areas (NA2, NA3, and / or NA4). However, various aspects of the present invention are not limited thereto.

[0358] For example, the multiple horizontal power connection lines HLIA_P may include first to eighth horizontal power connection lines (HLIA1_P to HLIA8_P). This example is only for ease of explanation, and thus, various aspects of the present invention are not limited thereto.

[0359] For example, the multiple vertical power connection lines VLIA_P may include first to seventh vertical power connection lines (VLIA1_P to VLIA7_P). This example is only for ease of explanation, and thus, various aspects of the present invention are not limited thereto.

[0360] Figure 12 Multiple horizontal power connection lines HLIA_P may correspond to Figure 8 the horizontal metal layer HLIA_P, Figure 12 Multiple vertical power connection lines VLIA_P may correspond to Figure 8 the vertical metal layer VLIA_P.

[0361] Referring to Figure 12 , multiple horizontal power connection lines HLIA_P may respectively correspond to multiple horizontal data connection lines HLIA. Multiple vertical power connection lines VLIA_P may respectively correspond to multiple vertical data connection lines VLIA.

[0362] For example, multiple horizontal data connection lines HLIA may include a first horizontal data connection line HLIA1 and a second horizontal data connection line HLIA2 that is set further away from the pad region PA than the first horizontal data connection line HLIA1.

[0363] Multiple horizontal power connection lines HLIA_P may include a first horizontal power connection line HLIA1_P and a second horizontal power connection line HLIA2_P. The first horizontal power connection line HLIA1_P may be set in the same first row as the first horizontal data connection line HLIA1 and may be separated from the first horizontal data connection line HLIA1. The second horizontal power connection line HLIA2_P may be set in the same second row as the second horizontal data connection line HLIA2 and may be separated from the second horizontal data connection line HLIA2. The first horizontal power connection line HLIA1_P may be, for example, the 2-1 power connection line, the second power connection line, or the tenth connection line, but multiple aspects of the present invention are not limited thereto. The second horizontal power connection line HLIA2_P may be, for example, the 2-2 power connection line, the third power connection line, or the eleventh connection line, but multiple aspects of the present invention are not limited thereto.

[0364] Referring to Figure 12 , the second horizontal data connection line HLIA2 may have a longer length than the first horizontal data connection line HLIA1.

[0365] The second horizontal power connection line HLIA2_P may have a longer length than the first horizontal power connection line HLIA1_P.

[0366] Hereinafter, the structural relationship between the data connection structure and the power line structure will be described in more detail.

[0367] Referring to Figure 12, the n-th horizontal data connection line HLIAn (where n = 1, 2,...) among multiple horizontal data connection lines HLIA can correspond to the n-th horizontal power connection line HLIAn_P (where n = 1, 2,...) among multiple horizontal power connection lines HLIA_P.

[0368] The n-th horizontal data connection line HLIAn (where n = 1, 2,...) and the n-th horizontal power connection line HLIAn_P (where n = 1, 2,...) can be set to be separated from each other in the same n-th row.

[0369] , the m-th vertical data connection line VLIAm (where m = 1, 2,...) among multiple vertical data connection lines VLIA can correspond to the m-th vertical power connection line VLIAm_P (where m = 1, 2,...) among multiple vertical power connection lines VLIA_P.

[0370] The m-th vertical data connection line VLIAm (where m = 1, 2,...) and the m-th vertical power connection line VLIAm_P (where m = 1, 2,...) can be set to be separated from each other in the same m-th column.

[0371] , the i-th horizontal data connection line HLIAi (where i = 1, 2,...) among multiple horizontal data connection lines HLIA can correspond to the i-th horizontal power connection line HLIAi_P (where i = 1, 2,...) among multiple horizontal power connection lines HLIA_P. Here, i can be a natural number different from n.

[0372] The i-th horizontal data connection line HLIAi (where i = 1, 2,...) and the i-th horizontal power connection line HLIAi_P (where i = 1, 2,...) can be set to be separated from each other in the i-th row different from the n-th row.

[0373] , the j-th vertical data connection line VLIAj (where j = 1, 2,...) among multiple vertical data connection lines VLIA can correspond to the j-th vertical power connection line VLIAj_P (where j = 1, 2,...) among multiple vertical power connection lines VLIA_P. Here, j can be a natural number different from m.

[0374] The j-th vertical data connection line VLIAj (where j = 1, 2,...) and the j-th vertical power connection line VLIAj_P (where j = 1, 2,...) can be set to be separated from each other in the j-th column different from the m-th column.

[0375] The sum of the corresponding lengths of the n-th horizontal data connection line HLIAn and the n-th horizontal power connection line HLIAn_P can correspond to the sum of the corresponding lengths of the i-th horizontal data connection line HLIAi and the i-th horizontal power connection line HLIAi_P.

[0376] The sum of the respective lengths of the m-th vertical data connection line VLIAm and the m-th vertical power connection line VLIAm_P may correspond to the sum of the respective lengths of the j-th vertical data connection line VLIAj and the j-th vertical power connection line VLIAj_P.

[0377] Here, the sums of the lengths corresponding to each other may mean that the sums of the lengths are exactly the same, or substantially the same within a tolerance.

[0378] Each of the plurality of data lines DL can be electrically connected to the data pad DP without using the vertical data connection line VLIA and / or the horizontal data connection line HLIA.

[0379] The plurality of data lines DL can be set based on the data connection structure and the power supply line structure.

[0380] At least one of the plurality of data lines DL can be a bypass type data line DL, which is electrically connected to at least one data pad DP without being electrically connected to the display area data connection line LIA. However, various aspects of the present invention are not limited thereto.

[0381] For example, at least one bypass type data line DL among the plurality of data lines DL can be set between two adjacent vertical data connection lines (e.g., VLIA1 and VLIA2) among the plurality of vertical data connection lines VLIA.

[0382] In another example, at least one bypass type data line DL among the plurality of data lines DL can be set between two adjacent vertical power distribution lines (e.g., V_PDW2 and V_PDW3) among the plurality of vertical power distribution lines V_PDW.

[0383] In another example, at least one bypass type data line DL among the plurality of data lines DL can be set between one vertical power distribution line (e.g., V_PDW1) among the plurality of vertical power distribution lines V_PDW and one vertical data connection line (e.g., VLIA13) among the plurality of vertical data connection lines VLIA.

[0384] Each of the plurality of sub-pixels SP provided in the display area AA can include a light-emitting element ED, and the light-emitting element ED includes a pixel electrode PE and a common electrode CE.

[0385] The second common driving voltage (e.g., Figure 2 the second common driving voltage VSS) can be applied to the common electrode CE, and the second common driving voltage VSS can be transmitted to the common electrode CE through the power supply line structure.

[0386] Accordingly, the common electrode CE can be electrically connected to a plurality of vertical power distribution lines V_PDW, a plurality of horizontal power connection lines HLIA_P, and a plurality of vertical power connection lines VLIA_P.

[0387] The second common driving voltage line (e.g., Figure 2 the second common driving voltage line VSSL) of

[0388] In one or more aspects, the display device 100 and / or the display panel 110 included in the display device 100 may include a substrate 111 (e.g., Figure 2 the substrate 111). The substrate 111 includes a display area AA including a plurality of sub-pixels SP; and a non-display area NA located outside the display area AA and including a pad area PA. In one or more aspects, the display device 100 and / or the display panel 110 may include: a plurality of data lines DL extending in the column direction in the display area AA; a plurality of data pads DP provided in the pad area PA; a plurality of vertical data connection lines VLIA electrically connected to the plurality of data pads DP and extending in the column direction in the display area AA; and a plurality of horizontal data connection lines HLIA electrically connecting the plurality of vertical data connection lines VLIA to the plurality of data lines DL and extending in the row direction in the display area AA. In one or more aspects, the display device 100 and / or the display panel 110 may include: at least one power pad PP provided in the pad area PA; a power supply line PIW electrically connected to the at least one power pad PP and provided in the non-display area NA; at least one power distribution line PDW electrically connected to the power supply line PIW; and a plurality of power connection lines LIA_P provided in the display area AA and electrically connected to the at least one power distribution line PDW.

[0389] Layers adopting a data connection structure and a power line structure or layers provided with elements related to the data connection structure and the power line structure such as lines may be related to each other.

[0390] In the data connection structure, a plurality of horizontal data connection lines HLIA may be provided in a first metal layer (e.g., Figure 9 and 10 the first metal layer ML1), and a plurality of vertical data connection lines VLIA may be provided in a second metal layer (e.g., Figure 9 and 10 the second metal layer ML2).

[0391] In a power supply line structure, a plurality of vertical power distribution lines V_PDW may be provided in the second metal layer ML2. A plurality of vertical power connection lines VLIA_P may be provided in the second metal layer ML2, and a plurality of horizontal power connection lines HLIA_P may be provided in the first metal layer ML1.

[0392] In a data connection structure and a power supply line structure, a horizontal line extending in a row direction may be provided in the first metal layer ML1, and a vertical line extending in a column direction may be provided in the second metal layer ML2. However, multiple aspects of the present invention are not limited thereto.

[0393] For example, the horizontal lines may include a plurality of horizontal data connection lines HLIA and a plurality of horizontal power connection lines HLIA_P, and the vertical lines may include a plurality of vertical data connection lines VLIA, a plurality of vertical power distribution lines V_PDW, and a plurality of vertical power connection lines VLIA_P.

[0394] The first metal layer ML1 may be a metal layer between the second interlayer insulating layer (e.g., Figure 3 、 9 and the second interlayer insulating layer 323 of 10) and the first planarization layer (e.g., Figure 3 、 9 and the first planarization layer 331 of 10), and may be the first source-drain metal layer. For example, referring to Figure 3 , Figure 3 the source electrodes E1b, E2b and drain electrodes E1c, E2c may be provided in the first metal layer ML1.

[0395] The second metal layer ML2 may be a metal layer between the first planarization layer 331 and the second planarization layer (e.g., Figure 3 、 9 and the second planarization layer 332 of 10), and may be the second source-drain metal layer. For example, referring to Figure 3 , Figure 3 the connection electrode RE may be provided in the second metal layer ML2.

[0396] Figure 13 Illustrates some color artifacts (e.g., defects where adjacent colors appear different from each other) vertically identified in a power supply area provided in a central portion of a display panel 110 according to multiple aspects of the present invention.

[0397] Referring to Figure 13 ,in the area between two third regions (C regions) (e.g., Figure 7 and 11 the two third regions (C regions)), it may correspond to the first region (A region) (e.g., Figure 7 and 11a part of the first region (Region A), and may be the central power supply region CPA of the display region AA. A plurality of vertical power distribution lines V_PDW may be densely arranged in the central power supply region CPA.

[0398] Accordingly, the metal in the sub-pixel SP disposed in the central power supply region CPA may form an unnecessary parasitic capacitance with at least one of the plurality of vertical power distribution lines V_PDW. However, the sub-pixel SP disposed in a region different from the central power supply region CPA does not need to form an unnecessary parasitic capacitance with the plurality of vertical power distribution lines V_PDW.

[0399] Accordingly, the sub-pixel SP disposed in the central power supply region CPA and the sub-pixel SP disposed in a region different from the central power supply region CPA may have different capacitance components.

[0400] This may result in a brightness difference between the sub-pixel SP disposed in the central power supply region CPA and the sub-pixel SP disposed in a region different from the central power supply region CPA. For example, a brightness difference may occur between the central power supply region CPA and a region different from the central power supply region CPA. This brightness difference may result in color artifacts vertically recognized in the central power supply region CPA, such as defects where adjacent colors appear different from each other.

[0401] To solve this problem, in one or more aspects, the display device 100 and / or the display panel 110 may be configured with a power line structure that can prevent color artifacts in the central power supply region CPA caused by the brightness difference between the central power supply region CPA and a region different from the central power supply region CPA.

[0402] Hereinafter, such a power line structure that can reduce the brightness difference between regions is described.

[0403] Figure 14 is another plan view of the display panel 110 according to multiple aspects of the present invention, wherein the display panel has a power line structure related to a border reduction data connection structure. For the sake of brevity, the following discussion focuses on those Figure 11 structures or features that are different. Therefore, the discussion about those Figure 11 structures or features that are the same or substantially the same is omitted.

[0404] Refer to Figure 14 , the display region AA may include an extended power supply region EPA obtained by combining two third regions (Region C) and the central power supply region CPA.

[0405] Figure 14 illustrates that compared with Figure 11In the structure, multiple vertical power distribution lines V_PDW are not densely arranged in the central region. Instead, multiple vertical power distribution lines V_PDW can be distributed from the left part to the right part of the extended power supply area EPA.

[0406] By arranging multiple vertical power distribution lines V_PDW to be distributed across a relatively wide area (such as the extended power supply area EPA), the parasitic capacitance affecting the sub-pixels SP caused by the multiple vertical power distribution lines V_PDW can be evenly distributed. Therefore, image artifacts identified in a relatively narrow area (such as Figure 13 the central power supply area CPA therein) can be prevented.

[0407] Refer to Figure 14 , in one or more aspects, in the left (or first) half area or the right (or second) half area of the display area AA, at least one vertical power distribution line V_PDW can be arranged between two adjacent vertical data connection lines VLIA among the multiple vertical data connection lines VLIA.

[0408] In the left half area or the right half area of the display area AA, at least one data line DL or at least one vertical data connection line VLIA can be arranged between two adjacent vertical power distribution lines V_PDW among the multiple vertical power distribution lines V_PDW.

[0409] In one or more aspects, the multiple vertical data connection lines VLIA can include: a first central vertical data connection line VLIA_C1 and a second central vertical data connection line VLIA_C2, which are arranged at the central part of the area where the multiple vertical data connection lines VLIA are arranged; and a first outermost vertical data connection line VLIA_O1 and a second outermost vertical data connection line VLIA_O2, which are arranged at the relatively outermost side parts of the area where the multiple vertical data connection lines VLIA are arranged.

[0410] The multiple vertical power distribution lines V_PDW can include at least one first vertical power distribution line V_PDW and at least one second vertical power distribution line V_PDW. At least one first vertical power distribution line V_PDW can be arranged between the first outermost vertical data connection line VLIA_O1 and the first central vertical data connection line VLIA_C1. At least one second vertical power distribution line V_PDW can be arranged between the second outermost vertical data connection line VLIA_O2 and the second central vertical data connection line VLIA_C2.

[0411] Figure 15 and 16 is a plan view of the local area 1400 in the Figure 14 structure

[0412] Refer to Figure 15 and 16, in one or more aspects, the data connection structure of the display panel 110 may include a plurality of display area data connection lines LIA, which include a plurality of horizontal data connection lines HLIA and a plurality of vertical data connection lines VLIA. However, the various aspects of the present invention are not limited thereto.

[0413] For example, referring to Figure 15 , the plurality of horizontal data connection lines HLIA may include first to eighth horizontal data connection lines (HLIA1 to HLIA8), and the plurality of vertical data connection lines VLIA may include first to thirteenth vertical data connection lines (VLIA1 to VLIA13). This example is only for ease of explanation, and thus, the various aspects of the present invention are not limited thereto.

[0414] For example, referring to Figure 16 , the plurality of horizontal data connection lines HLIA may include first to sixth horizontal data connection lines (HLIA1 to HLIA6), and the plurality of vertical data connection lines VLIA may include first to thirteenth vertical data connection lines (VLIA1 to VLIA13). This example is only for ease of explanation, and thus, the various aspects of the present invention are not limited thereto.

[0415] Referring to Figure 15 and 16 , in one or more aspects, the power supply line structure of the display panel 110 may include at least one power distribution line PDW for distributing a common driving voltage to the display area AA.

[0416] At least one power distribution line PDW may be electrically connected to at least one power supply line PIW, and may include a plurality of vertical power distribution lines V_PDW extending in the column direction in the display area AA.

[0417] For example, the plurality of vertical power distribution lines V_PDW may include a first vertical power distribution line V_PDW1, a second vertical power distribution line V_PDW2, a third vertical power distribution line V_PDW3, and a fourth vertical power distribution line V_PDW4. This example is only for ease of explanation, and thus, the various aspects of the present invention are not limited thereto.

[0418] Referring to Figure 15 and 16 , in one or more aspects, with Figure 11Compared with the structure of [], the first vertical power distribution line V_PDW1, the second vertical power distribution line V_PDW2, the third vertical power distribution line V_PDW3, and the fourth vertical power distribution line V_PDW4 may be arranged less densely in the central region. Instead, the first vertical power distribution line V_PDW1, the second vertical power distribution line V_PDW2, the third vertical power distribution line V_PDW3, and the fourth vertical power distribution line V_PDW4 may be distributed or arranged from the left (or first) part to the right (or second) part of the display area AA.

[0419] In one or more aspects, in the left half or the right half of the display area AA, at least one vertical power distribution line V_PDW may be arranged between two adjacent vertical data connection lines VLIA among the plurality of vertical data connection lines VLIA.

[0420] For example, the first vertical power distribution line V_PDW1 may be arranged between the first vertical data connection line VLIA1 and the second vertical data connection line VLIA2. The second vertical power distribution line V_PDW2 may be arranged between the fourth vertical data connection line VLIA4 and the fifth vertical data connection line VLIA5. The third vertical power distribution line V_PDW3 may be arranged between the ninth vertical data connection line VLIA9 and the tenth vertical data connection line VLIA10. The fourth vertical power distribution line V_PDW4 may be arranged between the thirteenth vertical data connection line VLIA13 and the center line serving as the boundary between the left half and the right half. In various aspects of the present invention, the vertical power distribution line V_PDW may be interleaved inside the data line DL.

[0421] In various aspects of the present invention, multiple portions of at least one vertical power distribution line V_PDW may be located outside the extended power area EPA. For example, among the vertical power distribution lines, the first vertical power distribution line V_PDW1 includes a first portion located inside or within the extended power area EPA and a second portion located outside the extended power area EPA. Similarly, the second vertical power distribution line V_PDW2 includes a first portion located inside or within the extended power area EPA and a second portion located outside the extended power area EPA. However, various aspects of the present invention are not limited thereto, and multiple portions of the vertical power distribution line V_PDW may all be located inside the extended power area EPA, as shown by the third vertical power distribution line V_PDW3 and the fourth vertical power distribution line V_PDW4.

[0422] In various aspects of the present invention, a first portion of a vertical power distribution line V_PDW located inside or within an extended power supply area EPA and a second portion of the vertical power distribution line V_PDW located outside the extended power supply area EPA may have the same length or different lengths. When having different lengths, the first portion may be longer or shorter than the second portion.

[0423] In various aspects of the present invention, a first portion of one vertical power distribution line V_PDW located inside or within an extended power supply area EPA and a first portion of another vertical power distribution line V_PDW located inside or within the extended power supply area EPA may have the same or different lengths. Similarly, a second portion of one vertical power distribution line V_PDW located outside the extended power supply area EPA and a second portion of another vertical power distribution line V_PDW located outside the extended power supply area EPA may have the same or different lengths. For example, a first portion of a first vertical power distribution line V_PDW1 located inside or within an extended power supply area EPA may be shorter than a first portion of a second vertical power distribution line V_PDW2 located inside or within the extended power supply area EPA.

[0424] When the first portion of the vertical power distribution line V_PDW is located inside or within the extended power supply area EPA, a horizontal power connection line HLIA_P may be electrically connected to the vertical power distribution line V_PDW via a power supply connection hole CNT_P, but when the second portion of the vertical power distribution line V_PDW is located outside the extended power supply area EPA, there is no need for the existence of the power supply connection hole CNT_P.

[0425] In various aspects of the present invention, one or more vertical power distribution lines V_PDW may cross a slant line SLT_DL (where a data line DL and a horizontal data connection line HLIA are connected at the slant line SLT_DL) (see Figure 6 ).

[0426] Referring to Figure 15 and 16 , in one or more aspects, in the left half area or the right half area of a display area AA, at least one data line DL or at least one vertical data connection line VLIA may be disposed between two adjacent vertical power distribution lines V_PDW among a plurality of vertical power distribution lines V_PDW.

[0427] For example, K1 data lines DL and K2 vertical data connection lines VLIA may be disposed between a second vertical power distribution line V_PDW2 and a third vertical power distribution line V_PDW3.

[0428] In another example, three vertical data connection lines (VLIA2, VLIA3, and VLIA4) and four data lines DL may be disposed between a first vertical power distribution line V_PDW1 and a second vertical power distribution line V_PDW2.

[0429] Referring Figure 15 and 16 , in one or more aspects, K vertical lines to which data signals are applied may be disposed between two adjacent vertical power distribution lines (e.g., V_PDW2 and V_PDW3) among a plurality of vertical power distribution lines V_PDW, where K may be a natural number of 2 or greater.

[0430] The K vertical lines may be signal lines configured to transmit data signals and may include at least one vertical data connection line VLIA and at least one data line DL.

[0431] Here, K, which is the number of vertical lines between two vertical power distribution lines (e.g., V_PDW2 and V_PDW3), may correspond to the number of sub-pixel columns and may be a value defined or determined according to the resolution of the display device 100.

[0432] For example, K, which is the number of vertical lines between two vertical power distribution lines (e.g., V_PDW2 and V_PDW3), may be proportional to the resolution of the display device 100 and may be inversely proportional to the number of vertical power distribution lines V_PDW. Here, the resolution of the display device 100 may be proportional to the number of sub-pixel columns.

[0433] These configuration mechanisms may be applied between any two vertical power distribution lines, but these configuration mechanisms may not be applied between the two outermost vertical power distribution lines located in the relatively outermost part of the display area AA or between the two central vertical power distribution lines provided in the central part of the display area AA. Multiple aspects of the present invention are not limited to this structure.

[0434] The total number of the plurality of vertical power distribution lines V_PDW may be determined according to the total number of vertical lines (data line DL and / or vertical data connection line VLIA) to which data signals are applied. At least one vertical line (at least one data line DL and / or at least one vertical data connection line VLIA) to which a data signal is applied may be disposed between the plurality of vertical power distribution lines V_PDW.

[0435] For example, in the display device 100, when the number of multiple data lines DL is N1, the number of multiple vertical data connection lines VLIA is N2, and the number of multiple vertical power distribution lines V_PDW is N3, K, which is the number of vertical lines between two vertical power distribution lines (e.g., V_PDW2 and V_PDW3), can be proportional to (N1 + N2) / (N3 + C). Here, C is a constant. For example, C can be 1. For example, K can be equal to (N1 + N2) / (N3 + 1).

[0436] The sum of the total number (N1) of data lines DL to which data signals are applied and the total number (N2) of vertical data connection lines VLIA to which data signals are applied can correspond to the total number of sub-pixel columns in the display panel 110 and can vary according to the resolution of the display panel 110.

[0437] Refer to Figure 16 , in one or more aspects, the power line structure of the display device 100 may further include at least one horizontal power distribution line H_PDW. At least one horizontal power distribution line H_PDW may be electrically connected to at least one of the multiple vertical power distribution lines V_PDW and may extend in the row direction in the display area AA. For example, the horizontal power distribution line H_PDW may be a second power distribution line or a second power supply line, but the aspects of the present invention are not limited thereto.

[0438] For example, at least one horizontal power distribution line H_PDW may include a first horizontal power distribution line H_PDW1 and a second horizontal power distribution line H_PDW2. This example is only for ease of explanation, and thus, the aspects of the present invention are not limited thereto. For example, the first horizontal power distribution line H_PDW may be a 2-1 power distribution line or a second power distribution line, but the aspects of the present invention are not limited thereto. For example, the second horizontal power distribution line H_PDW2 may be a 2-2 power distribution line or a third power distribution line, but the aspects of the present invention are not limited thereto.

[0439] Since at least one horizontal power distribution line H_PDW is provided, the resistance of the transmission path of the common driving voltage can be reduced, and the transmission characteristics (transmission performance) of the common driving voltage can be improved.

[0440] Refer to Figure 16 , one horizontal power distribution line H_PDW may be provided between two adjacent horizontal data connection lines HLIA among the multiple horizontal data connection lines HLIA.

[0441] For example, the first horizontal power distribution line H_PDW1 may be disposed between the first horizontal data connection line HLIA1 and the second horizontal data connection line HLIA2. The second horizontal power distribution line H_PDW2 may be disposed between the fourth horizontal data connection line HLIA4 and the fifth horizontal data connection line HLIA5.

[0442] In aspects of the present invention, when one or more horizontal power distribution lines H_PDW are provided, the one or more horizontal power distribution lines H_PDW may have a first portion located inside the extended power area EPA and a second portion located outside the extended power area EPA. In such a case, the first portion of the vertical power distribution line V_PDW located inside the extended power area EPA and the second portion of the vertical power distribution line V_PDW located outside the extended power area EPA may be respectively connected to the first portion of the horizontal power distribution line H_PDW located inside the extended power area EPA and the second portion of the horizontal power distribution line H_PDW located outside the extended power area EPA. The connection may be implemented via one or more power line connection holes CNT_P.

[0443] In aspects of the present invention, the first portion of the horizontal power distribution line H_PDW located inside or within the extended power area EPA and the second portion of the horizontal power distribution line H_PDW located outside the extended power area EPA may have the same length or different lengths. When having different lengths, the first portion may be longer or shorter than the second portion.

[0444] The above-described aspects will be briefly described as follows.

[0445] A display device according to aspects of the present invention may include a substrate including a display area having a plurality of sub-pixels and a non-display area adjacent to the display area.

[0446] In one or more aspects, the display device may include: a plurality of data lines extending in a first direction in the display area; a plurality of vertical data connection lines extending in the first direction in the display area; and a plurality of horizontal data connection lines extending in a second direction in the display area.

[0447] In one or more aspects, the display device may include: a power supply line disposed in the non-display area; a plurality of vertical power distribution lines electrically connected to the power supply line and extending in the first direction in the display area; a plurality of horizontal power connection lines extending in the second direction in the display area; and a plurality of vertical power connection lines extending in the first direction in the display area.

[0448] In one or more aspects, the plurality of vertical data connection lines may include: a first central vertical data connection line and a second central vertical data connection line disposed at the center among the plurality of vertical data connection lines; and a first outermost vertical data connection line and a second outermost vertical data connection line disposed on both sides among the plurality of vertical data connection lines.

[0449] In one or more aspects, the length of the first central vertical data connection line may be longer than the length of the first outermost vertical data connection line. The length of the second central vertical data connection line may be longer than the length of the second outermost vertical data connection line.

[0450] In one or more aspects, the length of the horizontal data connection line connected to the first central vertical data connection line may be longer than the length of the horizontal data connection line connected to the first outermost vertical data connection line.

[0451] In one or more aspects, the length of the horizontal data connection line connected to the second central vertical data connection line may be longer than the length of the horizontal data connection line connected to the second outermost vertical data connection line.

[0452] In one or more aspects, the plurality of horizontal data connection lines may include: a first horizontal data connection line; and a second horizontal data connection line disposed farther from the pad region than the first horizontal data connection line.

[0453] In one or more aspects, the length of the second horizontal data connection line may be longer than the length of the first horizontal data connection line.

[0454] In one or more aspects, the plurality of horizontal power connection lines may include: a first horizontal power connection line disposed in the same first row as the first horizontal data connection line and separated from the first horizontal data connection line; and a second horizontal power connection line disposed in the same second row as the second horizontal data connection line and separated from the second horizontal data connection line.

[0455] In one or more aspects, the length of the second horizontal power connection line may be shorter than the length of the first horizontal power connection line.

[0456] In one or more aspects, the plurality of horizontal data connection lines may be disposed in a first metal layer. The plurality of vertical data connection lines may be disposed in a second metal layer different from the first metal layer.

[0457] In one or more aspects, the first metal layer and the second metal layer may be located on different planes.

[0458] In one or more aspects, the plurality of vertical power distribution lines may be disposed in the second metal layer. The plurality of vertical power connection lines may be disposed in the second metal layer.

[0459] In one or more aspects, the plurality of horizontal power connection lines may be disposed in the first metal layer.

[0460] In one or more aspects, the n-th horizontal data connection line among the plurality of horizontal data connection lines and the n-th horizontal power connection line among the plurality of horizontal power connection lines may correspond to each other. Here, n may be a natural number equal to or greater than 1. The n-th horizontal data connection line and the n-th horizontal power connection line may be disposed separately from each other in the same n-th row.

[0461] In one or more aspects, the m-th vertical data connection line among the plurality of vertical data connection lines and the m-th vertical power connection line among the plurality of vertical power connection lines may correspond to each other. Here, m may be a natural number equal to or greater than 1. The m-th vertical data connection line and the m-th vertical power connection line may be disposed separately from each other in the same m-th column.

[0462] In one or more aspects, the i-th horizontal data connection line among the plurality of horizontal data connection lines and the i-th horizontal power connection line among the plurality of horizontal power connection lines may correspond to each other. Here, i may be a natural number equal to or greater than 1. The i-th horizontal data connection line and the i-th horizontal power connection line may be disposed separately from each other in the same i-th row.

[0463] In one or more aspects, the j-th vertical data connection line among the plurality of vertical data connection lines and the j-th vertical power connection line among the plurality of vertical power connection lines may correspond to each other. Here, j may be a natural number equal to or greater than 1. The j-th vertical data connection line and the j-th vertical power connection line may be disposed separately from each other in the same j-th column.

[0464] In one or more aspects, the sum of the respective lengths of the n-th horizontal data connection line and the n-th horizontal power connection line may correspond to the sum of the respective lengths of the i-th horizontal data connection line and the i-th horizontal power connection line.

[0465] In one or more aspects, the sum of the respective lengths of the m-th vertical data connection line and the m-th vertical power connection line may correspond to the sum of the respective lengths of the j-th vertical data connection line and the j-th vertical power connection line.

[0466] In one or more aspects, at least one of the plurality of data lines may be disposed between two adjacent vertical data connection lines among the plurality of vertical data connection lines, or may be disposed between two adjacent vertical power distribution lines among the plurality of vertical power distribution lines, or may be disposed between one vertical power distribution line of the plurality of vertical power distribution lines and one vertical data connection line of the plurality of vertical data connection lines. At least one of the plurality of data lines may include, for example, a bypass-type data line that is electrically connected to a data pad without using the data connection wiring structure of the display area.

[0467] In one or more aspects, each of the plurality of vertical power connection lines may have a length longer than that of the longest vertical data connection line among the plurality of vertical data connection lines.

[0468] In one or more aspects, the plurality of vertical data connection lines may include: a first central vertical data connection line and a second central vertical data connection line disposed at the center among the plurality of vertical data connection lines.

[0469] In one or more aspects, the plurality of vertical power distribution lines may be disposed between the first central vertical data connection line and the second central vertical data connection line.

[0470] In one or more aspects, the display area may include: a first area in which the plurality of horizontal data connection lines and the plurality of vertical data connection lines are not disposed; two second areas in which the plurality of horizontal data connection lines are disposed; and two third areas in which the plurality of vertical data connection lines are disposed.

[0471] In one or more aspects, the area between the two third areas may correspond to a part of the first area.

[0472] In one or more aspects, the plurality of vertical power distribution lines may be disposed in a central power area, which is the area between the two third areas.

[0473] In one or more aspects, in the first half area or the second half area of the display area, at least one vertical power distribution line may be disposed between two adjacent vertical data connection lines among the plurality of vertical data connection lines.

[0474] In one or more aspects, in the first half area or the second half area of the display area, at least one data line or at least one vertical data connection line may be disposed between two adjacent vertical power distribution lines among the plurality of vertical power distribution lines.

[0475] In one or more aspects, K vertical lines to which data signals are applied may be disposed between two adjacent vertical power distribution lines among the plurality of vertical power distribution lines, where K may be a natural number equal to or greater than 2.

[0476] In one or more aspects, the K vertical lines may include at least one vertical data connection line and at least one data line. Here, K may be proportional to the resolution of the display device and inversely proportional to the number of the vertical power distribution lines.

[0477] In one or more aspects, the number of the plurality of data lines may be N1, the number of the plurality of vertical data connection lines may be N2, the number of the plurality of vertical power distribution lines may be N3, and K may be proportional to (N1 + N2) / (N3 + 1).

[0478] In one or more aspects, the display device may further include at least one horizontal power distribution line that is electrically connected to at least one of the plurality of vertical power distribution lines and extends in the second direction in the display area.

[0479] In one or more aspects, one of the at least one horizontal power distribution line may be disposed between two adjacent horizontal data connection lines among the plurality of horizontal data connection lines.

[0480] In one or more aspects, each of the plurality of sub-pixels may include a light-emitting element, and the light-emitting element includes a pixel electrode and a common electrode. The common electrode may be electrically connected to the plurality of vertical power distribution lines, the plurality of horizontal power connection lines, and the plurality of vertical power connection lines.

[0481] In one or more aspects, the non-display area may include a pad area, and the pad area includes a plurality of data pads and at least one power pad. The plurality of vertical data connection lines may be electrically connected to the plurality of data pads. The power supply line may be electrically connected to the at least one power pad.

[0482] In one or more aspects, the plurality of horizontal data connection lines may electrically connect the plurality of vertical data connection lines to the plurality of data lines. The plurality of vertical power distribution lines may be electrically connected to the power supply line. The plurality of horizontal power connection lines and the plurality of vertical power connection lines may be electrically connected to the plurality of vertical power distribution lines.

[0483] In one or more aspects, the plurality of vertical power distribution lines may include at least one first vertical power distribution line and at least one second vertical power distribution line.

[0484] In one or more aspects, the at least one first vertical power distribution line may be disposed between the first outermost vertical data connection line and the first central vertical data connection line.

[0485] In one or more aspects, the at least one second vertical power distribution line may be disposed between the second outermost vertical data connection line and the second central vertical data connection line.

[0486] In one or more aspects, the second region may have an inverted triangle or an isosceles triangle, and the third region may have a right triangle.

[0487] In one or more aspects, the boundary between the first region and each of the two second regions may correspond to the portion where the horizontal data connection line is connected to the data line, and form a first oblique line.

[0488] In one or more aspects, the boundary between a corresponding second region and a corresponding third region may correspond to the portion where the vertical data connection line is connected to the horizontal data connection line, and form a second oblique line.

[0489] In one or more aspects, the display region may include an extended power region obtained by combining the two third regions and a central power region, where the central power region is the region between the two third regions.

[0490] In one or more aspects, the plurality of vertical power distribution lines may be distributed from a first portion of the extended power region to a second portion.

[0491] In one or more aspects, the display device may further include at least one horizontal metal layer and at least one vertical metal layer. The horizontal metal layer may be separated from the horizontal data connection line, extend in the second direction, and be disposed in the first metal layer. The vertical metal layer may be separated from the vertical data connection line, extend in the first direction, and be disposed in the second metal layer.

[0492] In one or more aspects, the horizontal metal layer and the vertical metal layer may be configured as a mesh pattern.

[0493] In one or more aspects, each of the plurality of vertical power distribution lines may have a longer length than each of the plurality of vertical data connection lines.

[0494] In one or more aspects, the display device may include a substrate, the substrate including a display region having a plurality of sub-pixels and a non-display region adjacent to the display region.

[0495] In one or more aspects, the display device may include: a plurality of data lines extending in a first direction in the display area; a plurality of vertical data connection lines extending in the first direction in the display area; and a plurality of horizontal data connection lines extending in a second direction in the display area.

[0496] In one or more aspects, the display device may include a power supply line, at least one power distribution line, and a plurality of power connection lines, wherein the power supply line is disposed in the non-display area, and the plurality of power connection lines are disposed in the display area and electrically connected to the at least one power distribution line.

[0497] The display device according to multiple aspects of the present invention may include: a substrate including a display area having a plurality of sub-pixels and a non-display area adjacent to the display area; a plurality of vertical data connection lines extending in a first direction in the display area; a plurality of horizontal data connection lines extending in a second direction in the display area, a power supply line disposed in the non-display area; at least one power distribution line; and a plurality of power connection lines disposed in the display area and electrically connected to the at least one power distribution line.

[0498] In one or more aspects, the plurality of power connection lines may include a plurality of first power connection lines extending in the second direction and a plurality of second power connection lines extending in the first direction.

[0499] In one or more aspects, the non-display area may include a pad area including a plurality of data pads and at least one power pad. The plurality of vertical data connection lines may be electrically connected to the plurality of data pads. The power supply line may be electrically connected to the at least one power pad.

[0500] In one or more aspects, the display device may further include a plurality of data lines extending in the first direction in the display area. The plurality of horizontal data connection lines may electrically connect the plurality of vertical data connection lines to the plurality of data lines.

[0501] In one or more aspects, the at least one power distribution line may be electrically connected to the power supply line.

[0502] In one or more aspects, the display area may include: a first area in which the plurality of vertical data connection lines and the plurality of horizontal data connection lines are not provided; two second areas in which the plurality of horizontal data connection lines are provided; and two third areas in which the plurality of vertical data connection lines are provided. In one or more aspects, the area between the two third areas may correspond to a part of the first area.

[0503] In one or more aspects, the at least one power distribution line may be disposed in a central power region, which is a region between the two third regions.

[0504] In one or more aspects, the display region may include an extended power region obtained by combining the two third regions and the central power region, which is a region between the two third regions.

[0505] In one or more aspects, the at least one power distribution line may be distributed from a first portion of the extended power region to a second portion.

[0506] In one or more aspects, the second region may have an inverted triangle or an isosceles triangle, and the third region may have a right triangle.

[0507] A display device according to multiple aspects of the present invention may include: a substrate including a display region having a plurality of sub-pixels and a non-display region adjacent to the display region. The display device may include: a plurality of vertical data connection lines extending in a first direction in the display region; a plurality of horizontal data connection lines extending in a second direction in the display region; a plurality of power connection lines disposed in a power region of the display region; and at least one vertical power distribution line.

[0508] In one or more aspects, the plurality of horizontal data connection lines may not be located in the power region.

[0509] In one or more aspects, the at least one vertical power distribution line may extend from the power region to a region of the display region located outside the power region.

[0510] In one or more aspects, the display device may further include at least one horizontal power distribution line, which is electrically connected to the at least one vertical power distribution line and is located in a region of the display region outside the power region.

[0511] According to multiple aspects of the present invention, a display device having a border-reduced data connection structure may be provided.

[0512] According to multiple aspects of the present invention, a display device having a power line structure capable of improving the transmission performance of a common driving voltage may be provided.

[0513] According to multiple aspects of the present invention, a display device having a power line structure capable of contributing to improving image quality may be provided.

[0514] According to multiple aspects of the present invention, a display device having a power line structure suitable for a border-reduced data connection structure may be provided.

[0515] According to various aspects of the present invention, a display device and a display panel can be provided, which can reduce the bezel of the display panel by applying an improved data connection structure and are configured to have a reduced weight.

[0516] The display device according to various aspects of the present invention can be applied to mobile devices, video phones, smart watches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, stretchable devices, curved devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation devices, automotive navigation devices, vehicle display devices, vehicle devices, theater devices, theater display devices, TVs, wallpaper devices, signage devices, gaming devices, laptop computers, monitors, cameras, camcorders, and household appliances, etc.

[0517] It will be apparent to those of ordinary skill in the art that various modifications and variations can be made in the present invention without departing from the scope of the present invention. Therefore, the present invention is intended to cover modifications and variations of the present invention that fall within the scope of the appended claims and their equivalents.

Claims

1. A display device, comprising: A substrate, the substrate comprising a display area having a plurality of sub-pixels and a non-display area adjacent to the display area; a plurality of data lines extending along a first direction in the display area; a plurality of vertical data connection lines extending along the first direction in the display area; a plurality of horizontal data connection lines extending along a second direction in the display area; a power supply line disposed in the non-display area; a plurality of vertical power distribution lines electrically connected to the power supply lines and extending along the first direction in the display area; a plurality of horizontal power connection lines extending along the second direction in the display area; as well as A plurality of vertical power connection lines extending along the first direction in the display area.

2. The display device according to claim 1, wherein the plurality of vertical data connection lines comprises: a first central vertical data link line and a second central vertical data link line disposed at a center among the plurality of vertical data link lines; as well as a first outermost vertical data link line and a second outermost vertical data link line as two outermost vertical data link lines among the plurality of vertical data link lines, The length of the first central vertical data connection line is longer than the length of the first outermost vertical data connection line, and the length of the second central vertical data connection line is longer than the length of the second outermost vertical data connection line.

3. The display device according to claim 1, wherein the plurality of vertical data connection lines comprises: a first central vertical data link line and a second central vertical data link line disposed at a center among the plurality of vertical data link lines; as well as a first outermost vertical data link line and a second outermost vertical data link line as two outermost vertical data link lines among the plurality of vertical data link lines, wherein the length of the horizontal data connection line connected to the first central vertical data connection line is longer than the length of the horizontal data connection line connected to the first outermost vertical data connection line, The length of the horizontal data connection line connected to the second central vertical data connection line is longer than the length of the horizontal data connection line connected to the second outermost vertical data connection line.

4. The display device according to claim 1, wherein the plurality of horizontal data connection lines comprises: A first horizontal data connection line; as well as Compared with the first horizontal data connection line, the second horizontal data connection line is arranged farther away from the pad area, The length of the second horizontal data connection line is longer than the length of the first horizontal data connection line.

5. The display device according to claim 4, wherein the plurality of horizontal power connection lines comprises: a first horizontal power connection line disposed in the same first row as the first horizontal data connection line and separated from the first horizontal data connection line; as well as a second horizontal power link line arranged in the same second row as the second horizontal data link line and separated from the second horizontal data link line, The length of the second horizontal power connection line is shorter than the length of the first horizontal power connection line.

6. The display device according to claim 1, wherein the plurality of horizontal data connection lines are arranged in a first metal layer, and the plurality of vertical data connection lines are arranged in a second metal layer different from the first metal layer, The first metal layer and the second metal layer are located on different planes. 7 . The display device according to claim 6 , wherein the plurality of vertical power distribution lines are disposed in the second metal layer, the plurality of vertical power connection lines are disposed in the second metal layer, and the plurality of horizontal power connection lines are disposed in the first metal layer.

8. The display device according to claim 1, wherein an n-th horizontal data link line among the plurality of horizontal data link lines and an n-th horizontal power link line among the plurality of horizontal power link lines correspond to each other, wherein n is a natural number equal to or greater than 1, The nth horizontal data link lines and the nth horizontal power link lines are disposed in a same nth row and spaced apart from each other.

9. The display device according to claim 8, wherein an i-th horizontal data link line among the plurality of horizontal data link lines and an i-th horizontal power link line among the plurality of horizontal power link lines correspond to each other, wherein i is a natural number equal to or greater than 1, and the i-th horizontal data link line and the i-th horizontal power link line are disposed spaced apart from each other in the same i-th row, The sum of the corresponding lengths of the nth horizontal data link line and the nth horizontal power link line corresponds to the sum of the corresponding lengths of the ith horizontal data link line and the ith horizontal power link line.

10. A display device, comprising: A substrate, the substrate comprising a display area having a plurality of sub-pixels and a non-display area adjacent to the display area; a plurality of vertical data connection lines extending along a first direction in the display area; a plurality of horizontal data connection lines extending along a second direction in the display area, a power supply line disposed in the non-display area; at least one power distribution line; as well as A plurality of power connection lines are disposed in the display area and electrically connected to the at least one power distribution line.

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