High-precision measuring circuit for resistance value of resistor

Abstract

The invention provides a resistor resistance value high-precision measuring circuit. The resistor resistance value high-precision measuring circuit comprises a chip power supply end, a grounding end, a current mirror circuit, an operational amplifier circuit, a current starvation type oscillator circuit and a switched capacitor circuit, wherein the switched capacitor circuit is controlled by the output frequency of the current starvation type oscillator circuit and can be equivalent to a resistor with a resistance value related to the output frequency; an equivalent resistor and a to-be-measured resistor which is arranged outside the chip and is connected with the signal input port are driven by the current mirror image circuit, and two obtained voltages related to the to-be-measured resistor and the equivalent resistor are output to the operational amplifier circuit for comparison. According to the current hunger type oscillator circuit, accurate resistance value measurement can be achieved, the influence of non-idealities such as the working voltage, temperature drift and threshold drift of the high-precision resistance value measurement circuit on accurate measurement of the to-be-measured resistance value is small, and the circuit structure is simple.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and particularly to a high-precision measurement circuit for resistor resistance. Background Art

[0002] With the development of technology, the application demand for resistance-type sensors is becoming stronger and stronger, and at the same time, the measurement requirements for the resistance accuracy of related types of devices are also getting higher and higher. Traditional precise measurement of resistor resistance requires large-sized instruments and meters to achieve, and the application scenarios are highly limited. The physical quantities related to the measured resistance in integrated circuits, such as voltage, current, and resistance, are significantly affected by changes in power supply voltage, temperature, and process parameters, and the circuit for precisely measuring resistance has complex defects.

[0003] The resistor resistance and resistance-type sensors need simple and convenient precise measurement in applications. However, in semiconductor integrated circuits, the physical quantities related to the measured resistance, such as voltage, current, and resistance, are often greatly affected by process deviations, chip power supply voltage, devices, environmental temperature, etc., and it is difficult to achieve precise measurement of resistance using chip circuits. Summary of the Invention

[0004] To solve the above technical problems, the present invention proposes a high-precision measurement circuit for resistor resistance, which uses the principle of equivalent resistance of switched capacitors to design a digital-analog hybrid circuit to achieve a precise measurement resistor circuit that is not affected by factors such as power supply voltage and temperature drift.

[0005] To achieve the above object, the technical solution adopted by the present invention is: A high-precision measuring circuit for resistance value, characterized in that it includes a chip power supply terminal, a grounding terminal, an operational amplifier circuit, a current mirror circuit, and a current-starved oscillator circuit. The operational amplifier circuit includes an operational amplifier, which is connected to the chip power supply terminal. The operational amplifier is provided with an output terminal, a positive input terminal, and a negative input terminal. The current mirror circuit includes a first current branch and a second current branch. The first current branch and the second current branch are respectively connected to the chip power supply terminal. The first current branch is connected to an equivalent resistance, and the other end of the equivalent resistance is connected to the grounding terminal. The second current branch is connected to a resistance to be measured, and the other end of the resistance to be measured is connected to the grounding terminal. The positive input terminal and the negative input terminal of the operational amplifier are respectively connected between the first current branch and the equivalent resistance, and between the second current branch and the resistance to be measured. The current-starved oscillator circuit includes an inverter unit. The output terminal of the operational amplifier is connected to the inverter unit. An odd number of inverter units are connected end to end to form a ring oscillator. The ring oscillator is provided with a frequency output terminal, and the frequency output terminal is connected to the equivalent resistance. The equivalent resistance is a switched capacitor circuit composed of a capacitor, a PMOS transistor, and an NMOS transistor. The PMOS transistor includes M9, and the NMOS transistor includes M10. M9 is turned on when the signal at the frequency output terminal is low level to charge the capacitor. M10 is connected in parallel with the capacitor and is turned on when the signal at the frequency output terminal is high level to discharge the charge on the capacitor to the ground.

[0006] As a preferred technical solution of the present invention: it further includes a capacitor to ground, one end of the capacitor to ground is connected to the output terminal of the operational amplifier circuit, and the other end is grounded.

[0007] As a preferred technical solution of the present invention: the oscillation frequency f of the ring oscillator is determined by the number of oscillation units, the output resistance, and the input capacitance of the inverter unit: f =1 / 2 πRCn ‌, where R is the output resistance of the inverter unit, C is the input capacitance of the inverter unit, and n is the number of inverter units.

[0008] As a preferred technical solution of the present invention: the inverter unit is provided with an inverter input terminal and an inverter output terminal. The inverter output terminal of the latter inverter unit is connected to the inverter input terminal of the previous inverter unit. The inverter output terminal of the frontmost inverter unit is connected to the frequency output terminal. The frequency output terminal is respectively connected to the director input terminal of the last inverter unit and the equivalent resistance.

[0009] As a preferred technical solution of the present invention: the PMOS transistor further includes M1, M2, M3, M4, the NMOS transistor further includes M5, M6, M7, M8, M1 is respectively connected to M2 and M3, M2 is connected to M1 and M4, M3 is respectively connected to M1, M4, M5, M4 is respectively connected to M2, M3, M6, M5 is respectively connected to M3, M6, M7, M6 is respectively connected to M4, M5, M8, M7 is respectively connected to M5 and M8, M8 is respectively connected to M6 and M7.

[0010] As a preferred technical solution of the present invention: it further includes a resistor, and both ends of the resistor are connected in series on M3 and M5 and in parallel between M1, M2 and between M3, M4.

[0011] As a preferred technical solution of the present invention: the PMOS transistor further includes M11, M12, M13, M14, M11 is respectively connected to M1, M2, M12, M13, M12 is respectively connected to M4, M11, M14 and the positive input terminal, M13 is respectively connected to M1, M2, M11, M14, M14 is respectively connected to M9, M12, M13, M11 and M13 have the same or proportional width-to-length ratio as M1 and M2, and M12 and M14 have the same or proportional width-to-length ratio as M3 and M4.

[0012] In the above technical solution: a high-precision measurement circuit for the resistance value of a resistor proposed by the present invention includes a chip power supply terminal, a ground terminal, an operational amplifier circuit, a current mirror circuit, and a current-starved oscillator circuit, and an accurate match between the equivalent resistor inside the chip and the resistor to be measured outside the chip is obtained through a negative feedback loop implemented by an operational amplifier.

[0013] The positive input terminal of the operational amplifier is connected to one end of the equivalent resistor inside the chip, and at the same time, this end is driven by the output current of the first current branch, and the other end of the equivalent resistor is grounded; The negative input terminal of the operational amplifier is connected to one end of the resistor to be measured outside the chip, and at the same time, this end of the resistor to be measured is driven by the output current of the second current branch, and the other end of the resistor to be measured is grounded; The output terminal of the operational amplifier is connected to the gate terminal of the current control transistor of the ring oscillator. The higher its voltage value, the greater the driving current of the inverter unit, and the higher the oscillation frequency of the ring oscillator; the lower its voltage value, the smaller the driving current of the inverter unit, and the lower the oscillation frequency of the ring oscillator. The oscillation frequency of the ring oscillator is used to connect to the gate terminal of the switching MOS transistor in the equivalent resistor, and its equivalent resistor is inversely proportional to the product of the capacitance value and the switching frequency.

[0014] The negative feedback loop realizes the function of the loop filter through a capacitor connected from the output terminal of the operational amplifier to ground, adjusting the response bandwidth and stability of the negative feedback loop. When the negative feedback loop is stable, the voltages at the positive input terminal and the negative input terminal of the operational amplifier are equal, indicating that the resistance value of the resistor under test and the equivalent resistance are equal under the drive of the same current output by the current mirror circuit. This resistance value is inversely proportional to the switching frequency of the switched-capacitor circuit, that is, the oscillation frequency of the ring oscillator. This frequency corresponds accurately to the resistance value of the resistor under test. By precisely calculating this frequency through other digital circuits, the accurate resistance value of the resistor under test can be converted.

[0015] Through the designed simple circuit structure, the present invention converts the analog quantity of the resistance value of the resistor under test into a digital quantity convenient for calculation and processing by a digital circuit, realizing high-precision measurement of the resistance value. At the same time, a current mirror circuit is used to achieve current matching for driving the resistor under test and the equivalent resistance. The variation amounts generated by the first current branch and the second current branch therein due to the influence of power supply voltage, temperature, and semiconductor process are also the same, making the resistance values of the resistor under test and the equivalent resistance equal and not affected by factors such as power supply voltage, temperature, and semiconductor process. The equivalent resistance value is determined by the capacitance and the oscillation frequency. Among them, the on-chip capacitance has a small deviation in the semiconductor manufacturing process and is also not affected by factors such as power supply voltage and temperature. Therefore, the resistance value of the resistor under test is uniquely determined by the oscillation frequency, realizing high-precision measurement of it.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: The semiconductor integrated circuit for high-precision measurement of the resistance value provided by the present invention can achieve precise measurement of the resistance value, and the non-ideality such as the working voltage, temperature drift, and threshold drift of the semiconductor chip circuit has little influence on the precise measurement of the resistance value under test, and the circuit structure is simple. Description of the Drawings

[0017] Figure 1 is the circuit diagram of the high-precision measurement circuit for the resistance value; Figure 2 is the circuit diagram of the current mirror and the switched-capacitor equivalent resistance circuit; Figure 3 is the circuit diagram of the operational amplifier circuit; Figure 4 is the circuit diagram of the inverter unit in the current-starved oscillator circuit.

[0018] List of Reference Numerals: 1. Operational amplifier circuit; 2. Inverter unit; 21. Inverter input terminal; 22. Inverter output terminal; 3. First current branch; 4. Second current branch; 5. Equivalent resistance; 6. Capacitor to ground; 7. Chip power supply terminal; 8. Ground terminal; 9. Resistor under test; 10. Frequency output terminal; 11. Output terminal; 12. Positive input terminal; 13. Negative input terminal; 14. Resistor; 15. Capacitor. Detailed implementation manners

[0019] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners: A high-precision measurement circuit for the resistance value of a resistor proposed by the present invention includes a chip power supply terminal 7, a ground terminal 8, an operational amplifier circuit 1, a current mirror circuit, and a current-starved oscillator circuit. The operational amplifier circuit 1 includes an operational amplifier, which is connected to the chip power supply terminal 7. An output terminal 11, a positive input terminal 12, and a negative input terminal 13 are provided on the operational amplifier. The current mirror circuit includes a first current branch 3 and a second current branch 4. The first current branch 3 and the second current branch 4 are respectively connected to the chip power supply terminal 7. The first current branch 3 is connected to an equivalent resistor 5, and the other end of the equivalent resistor 5 is connected to the ground terminal 8. The second current branch 4 is connected to a resistor under test 9, and the other end of the resistor under test 9 is connected to the ground terminal 8. The positive input terminal 12 and the negative input terminal 13 of the operational amplifier are respectively connected between the first current branch 3 and the equivalent resistor 5, and between the second current branch 4 and the resistor under test 9. The current-starved oscillator circuit includes an inverter unit 2. The output terminal 11 of the operational amplifier is connected to the inverter unit 2. An odd number of inverter units 2 are connected end to end to form a ring oscillator. A frequency output terminal 10 is provided on the ring oscillator, and the frequency output terminal 10 is connected to the equivalent resistor 5. The equivalent resistor 5 is a switched-capacitor circuit composed of a capacitor 15, a pmos transistor, and an nmos transistor. The pmos transistor includes M9, and the nmos transistor includes M10. M9 is turned on when the signal at the frequency output terminal 10 is at a low level to charge the capacitor 15. M10 is connected in parallel with the capacitor 15 and is turned on when the signal at the frequency output terminal 10 is at a high level to discharge the charge on the capacitor 15 to the ground.

[0020] It further includes a capacitor to ground 6. One end of the capacitor to ground 6 is connected to the output terminal 11 of the operational amplifier circuit 1, and the other end is grounded.

[0021] The oscillation frequency f of the ring oscillator is determined by the number of oscillation units, the output resistance, and the input capacitance of the inverter unit 2: f = 1 / (2πRCn), where R is the output resistance of the inverter unit 2, C is the input capacitance of the inverter unit 2, and n is the number of inverter units 2.

[0022] An inverter input terminal 21 and an inverter output terminal 1122 are provided on the inverter unit 2. The inverter output terminal 1122 of the latter inverter unit 2 is connected to the inverter input terminal 21 of the previous inverter unit 2. The inverter output terminal 1122 of the foremost inverter unit 2 is connected to the frequency output terminal 10, and the frequency output terminal 10 is respectively connected to the guide input terminal of the last inverter unit 2 and the equivalent resistor 5.

[0023] The PMOS transistor further includes M1, M2, M3, and M4, and the NMOS transistor further includes M5, M6, M7, and M8. M1 is respectively connected to M2 and M3, M2 is connected to M1 and M4, M3 is respectively connected to M1, M4, and M5, M4 is respectively connected to M2, M3, and M6, M5 is respectively connected to M3, M6, and M7, M6 is respectively connected to M4, M5, and M8, M7 is respectively connected to M5 and M8, and M8 is respectively connected to M6 and M7.

[0024] It further includes a resistor 14, and both ends of the resistor 14 are connected in series between M3 and M5 and in parallel between M1 and M2 and between M3 and M4.

[0025] The PMOS transistor further includes M11, M12, M13, and M14. M11 is respectively connected to M1, M2, M12, and M13, M12 is respectively connected to M4, M11, M14, and the positive input terminal 12, M13 is respectively connected to M1, M2, M11, and M14, M14 is respectively connected to M9, M12, and M13. M11 and M13 have the same or proportional width-to-length ratio as M1 and M2, and M12 and M14 have the same or proportional width-to-length ratio as M3 and M4.

[0026] A high-precision measurement circuit for the resistance value of a resistor proposed by the present invention includes a chip power supply terminal 7, a ground terminal 8, an operational amplifier circuit 1, a current mirror circuit, and a current-starved oscillator circuit. An accurate match between the equivalent resistor 5 inside the chip and the resistor 9 to be measured outside the chip is obtained through a negative feedback loop implemented by an operational amplifier.

[0027] The positive input terminal 12 of the operational amplifier is connected to one end of the equivalent resistor 5 inside the chip, and at the same time, this end is driven by the output current of the first current branch 3, and the other end of the equivalent resistor 5 is grounded; The negative input terminal 13 of the operational amplifier is connected to one end of the resistor 9 to be measured outside the chip, and at the same time, this end of the resistor 9 to be measured is driven by the output current of the second current branch 4, and the other end of the resistor 9 to be measured is grounded; The output terminal 11 of the operational amplifier is connected to the gate terminal of the current control transistor of the ring oscillator. The higher its voltage value, the greater the driving current of the inverter unit 2, and the higher the oscillation frequency of the ring oscillator; the lower its voltage value, the smaller the driving current of the inverter unit 2, and the lower the oscillation frequency of the ring oscillator. The oscillation frequency of the ring oscillator is used to connect to the gate terminal of the switching MOS transistor in the equivalent resistor 5, and the equivalent resistor 5 is inversely proportional to the product of the capacitance 15 value and the switching frequency.

[0028] The negative feedback loop realizes the function of the loop filter through the capacitor 6 connected to the ground at the output terminal 11 of the operational amplifier, and adjusts the response bandwidth and stability of the negative feedback loop. When the negative feedback loop is stable, the voltages at the positive input terminal 12 and the negative input terminal 13 of the operational amplifier are equal, indicating that the resistance values of the resistor under test 9 and the equivalent resistor 5 driven by the same current output by the current mirror circuit are equal. This resistance value is inversely proportional to the switching frequency of the switched-capacitor circuit, that is, the oscillation frequency of the ring oscillator. This frequency corresponds accurately to the resistance value of the resistor under test 9. By precisely calculating this frequency through other digital circuits, the accurate resistance value of the resistor under test 9 can be converted.

[0029] Through the designed simple circuit structure, the present invention converts the analog quantity of the resistance value of the resistor under test 9 into a digital quantity that is convenient for digital circuit calculation and processing, realizing high-precision measurement of the resistance value of the resistor 14. At the same time, a current mirror circuit is used to achieve current matching for driving the resistor under test 9 and the equivalent resistor 5. The variation amounts generated by the first current branch 3 and the second current branch 4 in the current mirror circuit due to the influence of power supply voltage, temperature, and semiconductor process are also the same, making the resistance values of the resistor under test 9 and the equivalent resistor 5 equal and not affected by factors such as power supply voltage, temperature, and semiconductor process. The resistance value of the equivalent resistor 5 is determined by the capacitor 15 and the oscillation frequency. Among them, the on-chip capacitor 15 has a small deviation in the semiconductor manufacturing process and is also not affected by factors such as power supply voltage and temperature. Therefore, the resistance value of the resistor under test 9 is uniquely determined by the oscillation frequency, realizing high-precision measurement of it.

[0030] As Figure 1 shown, it is a high-precision measurement circuit for the resistance value of the resistor 14. The inverter unit 2 in the current-starved oscillator circuit is an odd number of such units connected end to end to form a ring oscillator. The oscillation frequency is led out from the frequency output terminal 10. The oscillation frequency f is determined by the number of oscillation units and the output resistance and input capacitance of the inverter unit 2: f = 1 / 2πRCn, where R is the output resistance of the inverter, C is the input capacitance of the inverter, and n is the number of inverters. When the number of inverter units 2 and the circuit structure are fixed, the oscillation frequency of the current-starved oscillator circuit can be uniquely determined by the output resistance of the inverter unit 2 controlled by the voltage at the output terminal 11. When the voltage value at the output terminal 11 increases, the output resistance R of the inverter unit 2 decreases, and the oscillator frequency f increases.

[0031] The capacitor 6 connected to the ground is used to adjust the response bandwidth and stability of the negative feedback loop implemented by the operational amplifier. The first current branch 3 and the second current branch 4 are two current branches in the current mirror circuit that output equal or proportional currents, respectively driving the resistor under test 9 connected to the ground outside the chip and the equivalent resistor 5 connected to the ground on the chip.

[0032] As Figure 2As shown in the figure, there is a current mirror circuit and a switched capacitor circuit. The on-chip equivalent resistance 5 is a switched capacitor circuit composed of capacitor 15, M9, and M10. M9 is a pmos transistor that conducts when the signal at the frequency output terminal 10 is low and charges capacitor 15. M10 is connected in parallel with capacitor 15 and conducts when the signal at the frequency output terminal 10 is high, discharging the charge on capacitor 15 to ground. The frequency output terminal 10 is used to output the output frequency of the ring oscillator, and the resistance value of the equivalent resistance 5 is R = 1 / (2πfC).

[0033] M1, M2, M3, and M4 are pmos transistors; M5, M6, M7, and M8 are nmos transistors; by appropriately adjusting the resistance value of resistor 14 and the width-to-length ratio of the mos transistors, a suitable gate terminal bias of the mos transistors is generated in this part of the circuit, and all mos transistors operate in the saturation region.

[0034] M11 and M13 are pmos transistors with the same or proportional width-to-length ratio as M1 and M2, and their gate terminal biases are connected; M12 and M14 are pmos transistors with the same or proportional width-to-length ratio as M3 and M4, and their gate terminal biases are connected; they form a current mirror structure to achieve exactly equal or strictly proportional scaling of the output currents of the first current branch 3 and the second current branch 4.

[0035] As Figure 3 shown in the figure, there is an operational amplifier circuit 1. A current mirror structure composed of two pmos transistors is used as a load to convert the voltage difference between the input terminals of the two operational amplifier circuits 1 into the output current at the output terminal 11. When the voltage at the positive input terminal 12 is higher than the voltage at the negative input terminal 13, the output terminal 11 outputs a current to the loop filter, and this current charges the capacitor 6 to ground, and the voltage at the output terminal 11 will rise.

[0036] As Figure 4 shown in the figure, it is an inverter unit 2 in a current-starved oscillator circuit. Based on the conventional CMOS inverter structure, an nmos transistor is added at the chip power supply terminal 7 to control the charging and discharging current when the level of the inverter unit 2 flips, thereby affecting the oscillation frequency of the ring oscillator composed of the inverter unit 2. The output terminal 11 is the gate terminal of the current control transistor. The higher the voltage at the output terminal 11, the greater the charging and discharging current, and the smaller the equivalent output resistance of the inverter unit 2.

[0037] The above description is only a preferred embodiment of the present invention and does not impose any other form of limitation on the present invention. Any modification or equivalent change made based on the technical essence of the present invention still falls within the scope of protection required by the present invention.

Claims

1. A high-precision measurement circuit for resistance value, characterized in that: It includes a chip power supply terminal (7), a ground terminal (8), an operational amplifier circuit (1), a current mirror circuit, and a current-starved oscillator circuit. The operational amplifier circuit (1) includes an operational amplifier. The operational amplifier is connected to the chip power supply terminal (7). An output terminal (11), a positive input terminal (12), and a negative input terminal (13) are provided on the operational amplifier. The current mirror circuit includes a first current branch (3) and a second current branch (4). The first current branch (3) and the second current branch (4) are respectively connected to the chip power supply terminal (7). The first current branch (3) is connected to an equivalent resistor (5). The other end of the equivalent resistor (5) is connected to the ground terminal (8). The second current branch (4) is connected to a resistor under test (9). The other end of the resistor under test (9) is connected to the ground terminal (8). The positive input terminal (12) and the negative input terminal (13) of the operational amplifier are respectively connected between the first current branch (3) and the equivalent resistor (5), and between the second current branch (4) and the resistor under test (9). The current-starved oscillator circuit includes an inverter unit (2). The output terminal (11) of the operational amplifier is connected to the inverter unit (2). An odd number of inverter units (2) are connected end to end to form a ring oscillator. A frequency output terminal (10) is provided on the ring oscillator. The frequency output terminal (10) is connected to the equivalent resistor (5). The equivalent resistor (5) is a switched capacitor circuit composed of a capacitor (15), a pmos transistor, and an nmos transistor. The pmos transistor includes M9, and the nmos transistor includes M10. M9 is turned on when the signal at the frequency output terminal (10) is low level to charge the capacitor (15). M10 is connected in parallel with the capacitor (15) and is turned on when the signal at the frequency output terminal (10) is high level to discharge the charge on the capacitor (15) to the ground.

2. The high-precision resistance value measurement circuit according to claim 1, characterized in that: It further includes a capacitor to ground (6). One end of the capacitor to ground (6) is connected to the output terminal (11) of the operational amplifier circuit (1), and the other end is grounded.

3. The high-precision resistance value measurement circuit according to claim 1, wherein: The oscillation frequency f of the ring oscillator is determined by the number of oscillation units, the output resistance, and the input capacitance of the inverter unit (2): f = 1 / 2 πRCn ‌, where R is the output resistance of the inverter unit, C is the input capacitance of the inverter unit, and n is the number of inverter units.

4. A high-precision measurement circuit for the resistance value of a resistor according to claim 1, characterized in that: An inverter input terminal (21) and an inverter output terminal (22) are provided on the inverter unit (2). The inverter output terminal (22) of the latter inverter unit (2) is connected to the inverter input terminal (21) of the previous inverter unit (2). The inverter output terminal (22) of the foremost inverter unit (2) is connected to the frequency output terminal (10). The frequency output terminal (10) is respectively connected to the inverter input terminal (21) of the rearmost inverter unit (2) and the equivalent resistor (5).

5. A high-precision measurement circuit for the resistance value of a resistor according to claim 1, characterized in that: The PMOS transistor further includes M1, M2, M3, and M4, the NMOS transistor further includes M5, M6, M7, and M8, M1 is respectively connected to M2 and M3, M2 is connected to M1 and M4, M3 is respectively connected to M1, M4, and M5, M4 is respectively connected to M2, M3, and M6, M5 is respectively connected to M3, M6, and M7, M6 is respectively connected to M4, M5, and M8, M7 is respectively connected to M5 and M8, and M8 is respectively connected to M6 and M7.

6. The high-precision resistance value measurement circuit according to claim 5, wherein: It further includes a resistor (14), and both ends of the resistor (14) are connected in series on M3 and M5 and in parallel between M1 and M2 and between M3 and M4.

7. A high-precision resistance value measurement circuit according to claim 1 or 5, characterized in that: The PMOS transistor further includes M11, M12, M13, and M14, M11 is respectively connected to M1, M2, M12, and M13, M12 is respectively connected to M4, M11, M14, and the positive input terminal (12), M13 is respectively connected to M1, M2, M11, and M14, M14 is respectively connected to M9, M12, and M13, M11 and M13 have the same or proportional width-to-length ratio as M1 and M2, and M12 and M14 have the same or proportional width-to-length ratio as M3 and M4.

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