Test system for testing radio frequency characteristics of unit under test and calibration method thereof

Abstract

The present application provides a test system and calibration method for testing the radio frequency characteristics of a unit under test. The test system includes: a digital waveform generation module, a voltage detection module, a calibration module, and a calibration detector. The digital waveform generation module sends a first digital waveform signal to the unit under test to simulate radio frequency input, and can also send a second digital waveform signal to the calibration detector; the voltage detection module detects the first voltage value output by the unit under test, and receives the second voltage value generated by the calibration detector in response to the second signal; the calibration module converts the equivalent radio frequency power of the second signal into a target voltage value based on the known input power-voltage relationship of the calibration detector, and calculates the power loss compensation value of the transmission path by measuring the difference between the second voltage value and the target value, which is used to correct the power output of the first digital waveform signal to ensure that the radio frequency signal received by the unit under test is not affected by path loss, thereby achieving accurate detection of radio frequency characteristics.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency chip testing, and in particular to a testing system for testing radio frequency characteristics of a unit to be tested and a calibration method thereof. Background Art

[0002] With the advancement of electronics, the application of semiconductor chip manufacturing processes is becoming increasingly widespread. Semiconductor chip verification at the wafer stage, also known as chip probing (CP), involves testing the exposed chips on a whole wafer (before dicing and packaging). This involves connecting the exposed chips to a tester head using a probe station (prober) and then using a probe card to test the chips on the wafer. CP testing, which screens qualified chips before packaging, can improve yield and reduce subsequent packaging costs.

[0003] Conventional CP testers include a power supply and high-speed digital test boards, enabling them to perform digital communication protocol testing, DC parameter testing, and some low-frequency AC parameter testing on chips on wafers. However, conventional CP testers are unable to perform complex RF tests, such as high-precision RF signal power testing, due to their inability to provide RF power signals.

[0004] To solve the problem that conventional CP testers cannot provide RF power signals, there are two common solutions:

[0005] Solution 1: Add an external device capable of transmitting RF power signals to a conventional CP tester. This method requires joint debugging of the CP tester and the external device, resulting in complex procedures and high development costs.

[0006] Option 2 does not use a conventional CP tester, but instead uses an RF tester that can directly send RF power signals. However, since the number of RF testers is relatively small compared to conventional CP testers, their development costs are relatively high. In addition, a specially developed and designed RF probe card is required, which increases the cost of hardware facilities.

[0007] In addition, the RF power signal generally needs to be calibrated before performing RF signal power testing. Both of the above solutions require the use of a power meter to calibrate the cable loss, and a vector network analyzer is required in conjunction with a straight-through cable to calibrate the loss of the probe card and the probe card transmission line.

[0008] Both of the above solutions have the following disadvantages: the hardware structure is complex, and complex hardware improvements and upgrades are required for RF signal power testing based on conventional CP testers; development is difficult, and special solutions and procedures need to be developed for RF signal power testing; the cost is high, and adding external equipment or using special RF probe cards increases hardware and development costs; calibration is difficult, and special calibration equipment is required for power calibration. Summary of the Invention

[0009] In order to solve at least some of the above technical problems, the present application provides a test system and method for testing the radio frequency characteristics of a unit under test, which uses a digital waveform signal emitted by a digital waveform generation module to simulate an radio frequency power signal, so that a test system such as a CP tester can perform radio frequency signal power testing, and no special calibration equipment is required for power calibration.

[0010] The first aspect of the present application discloses a test system for testing the radio frequency characteristics of a unit under test, the test system comprising: a digital waveform generation module for generating a first digital waveform signal; wherein the first digital waveform signal is used to simulate the input of a radio frequency power signal to the unit under test; a voltage detection module for receiving and detecting a first voltage value of the first voltage signal; wherein the first voltage signal is a signal output by the unit under test after receiving the first digital waveform signal, and is used to characterize the radio frequency characteristics of the unit under test; a calibration detector, wherein the input radio frequency power-output voltage relationship of the calibration detector is known; wherein the digital waveform generation module is further used to output a second digital waveform signal to the calibration detector; the voltage detection module further receives a second voltage signal output by the calibration detector and detects a second voltage value of the second voltage signal; wherein the second voltage signal The signal is a signal output by the calibration detector after receiving the second digital waveform signal; the calibration module is connected to the digital waveform generation module and the voltage detection module respectively, and is configured to: obtain the equivalent RF power and the second voltage value of the second digital waveform signal; obtain a target voltage value based on the input RF power-output voltage relationship and according to the equivalent RF power of the second digital waveform signal; wherein the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; and determine a power compensation value based on the difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

[0011] The second aspect of the present application discloses a calibration method, which is applied to the test system disclosed in the first aspect of the present application, comprising: storing an input RF power-output voltage relationship; obtaining an equivalent RF power and a second voltage value of a second digital waveform signal; obtaining a target voltage value based on the input RF power-output voltage relationship and according to the equivalent RF power of the second digital waveform signal; wherein the target voltage value is: a voltage value output by a calibration detector after receiving the second digital waveform signal when power loss of the second digital waveform signal in a transmission path is zero; the transmission path is a path from the output end of a digital waveform generation module to the input end of the calibration detector; and determining a power compensation value based on a difference between the second voltage value and the target voltage value, the power compensation value being used to compensate the first digital waveform signal.

[0012] In the test system of the present application, a digital waveform generating module is added to the digital test machine. The first digital waveform signal output by the digital waveform generating module can simulate the radio frequency power signal and can perform radio frequency signal power testing on the unit under test. Compared with the use of a radio frequency signal source, the cost of the digital waveform generating module is low, which can effectively reduce costs. Moreover, the voltage amplitude of the digital waveform signal is easy to adjust through digital circuits or software, and the signal characteristics can be changed quickly and flexibly. It can simulate different radio frequency powers to meet different test or application requirements. Furthermore, the digital signal generator is easy to integrate into various systems and can easily work in conjunction with other digital devices or circuits to achieve more complex functions.

[0013] In the first aspect of the present application, the test system also includes: a digital tester, the digital waveform generation module, the voltage detection module and the calibration module are located in the digital tester, and the digital tester is calibrated by detecting the calibration detector; a probe card, including a plurality of probes, which are respectively connected to the digital tester and used to contact the unit to be tested; wherein the digital waveform generation module is connected to the probes of the first part, and the probes of the first part are used to input the first digital waveform signal into the unit to be tested; the voltage detection module is connected to the probes of the second part, and the probes of the second part are used to output the first voltage signal to the digital tester.

[0014] The second digital waveform signal output by the digital waveform generation module generates power loss when transmitted to the input of the calibration detector. This power loss is equal to the difference between the power at the input of the calibration detector and the power at the output of the digital waveform generation module. Since there is a linear relationship between the input RF power and the output voltage of the calibration detector, the difference between the second voltage value and the target voltage value is proportional to the power loss of the second digital waveform signal. Therefore, the power loss of the second digital waveform signal can be determined based on the difference between the second voltage value and the target voltage value. This power loss is the power compensation value that needs to be compensated. The power compensation value can be used to compensate for the loss of the first digital waveform signal during transmission, ensuring that the power received by the unit under test is consistent with the expected power, thereby improving the test accuracy of the unit under test. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of the structure of the test system involved in this application;

[0016] Figure 2 This is a schematic diagram of the framework of the first embodiment of the test system involved in this application;

[0017] Figure 3 Schematic diagram of the working principle of the detector;

[0018] Figure 4 This is a schematic diagram of the framework of the second embodiment of the test system involved in this application in a calibration working state;

[0019] Figure 5 A schematic diagram of the relationship between input RF power and output voltage of the calibration detector involved in this application;

[0020] Figure 6 This is a schematic diagram of the framework of the second embodiment of the test system involved in this application in the test working state;

[0021] Figure 7 Flowchart of the calibration method according to the present application. DETAILED DESCRIPTION

[0022] The present application will be further described below with reference to specific embodiments and accompanying drawings. It should be understood that the illustrative embodiments of the present disclosure are intended only to explain the present application and are not intended to limit the present application. In addition, for ease of description, the accompanying drawings only illustrate some, but not all, structures or processes relevant to the present application.

[0023] The following specific embodiments illustrate the implementation of the present application. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Although the description of the present application will be introduced in conjunction with the preferred embodiment, this does not mean that the features of this invention are limited to this implementation. On the contrary, the purpose of introducing the invention in conjunction with the implementation is to cover other options or modifications that may be extended based on the claims of this application. In order to provide an in-depth understanding of the present application, the following description will contain many specific details. The present application can also be implemented without using these details. In addition, in order to avoid confusion or blurring the focus of the present application, some specific details will be omitted in the description. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other unless there is a conflict.

[0024] Unless the context dictates otherwise, the terms "comprising," "having," and "including" are synonymous. The phrase "A / B" means "A or B." The phrase "A and / or B" means "(A and B) or (A or B)."

[0025] It should be understood that although the terms "first," "second," and the like may be used herein to describe various components, units, or data, these components, units, or data should not be limited by these terms. These terms are used only to distinguish one feature from another. For example, a first feature may be referred to as a second feature, and similarly, a second feature may be referred to as a first feature without departing from the scope of the exemplary embodiments.

[0026] It should be understood that although directional terms such as "up", "down", "left" and "right" may be used here to describe the positional relationship of each component, these directional terms are only used to indicate the directions in the drawings for the convenience of understanding and cannot be used to limit the scope of protection of this application.

[0027] It should be noted that in this specification, like reference numerals and letters denote similar items in the drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0028] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0029] CP (Chip Probing) testing involves connecting the exposed chip to the tester head via a probe station (prober) on a whole wafer that has not been diced or packaged, and then testing the chip on the wafer using a probe card. FT (Final Test) testing involves testing the chip after it has been cut and packaged. FT testers have dedicated RF boards for RF testing, while CP testers do not. CP testers have digital boards for outputting digital signals. Therefore, FT testing generally involves RF testing of the chip, while CP testing is primarily a DC test and does not involve RF testing.

[0030] The inventors of this application have discovered that if RF testing is performed on uncut bare chips on wafers during the CP testing phase, any defective chips can be discarded directly without the need for subsequent cutting and packaging, thereby reducing costs. To enable RF testing during the CP testing phase, this application proposes a testing system and method that can perform RF testing using a CP tester. The following describes this testing system and method in detail.

[0031] Figure 1 This is a schematic diagram of the structure of the test system involved in this application. Figure 1 As shown, the test system includes:

[0032] The digital tester 10 is configured to generate a first digital waveform signal for testing a unit under test (UUT). The first digital waveform signal is a test signal. The digital tester 10 receives and analyzes a first voltage signal output by the UUT based on the first digital waveform signal. The first voltage signal is a test result of the UUT. The digital tester 10 may also include a test head 11. The test head 11 is a component of the digital tester 10 that is configured to connect and transmit signals from the digital tester 10 to other components of the test system.

[0033] The load board 20 acts as a transition connection, transmitting the signal from the test head 11 to the probe card 30;

[0034] The probe card 30 has a plurality of probes 31 connected to the digital tester, and is used to contact the unit under test 4 to achieve electrical connection, thereby inputting test signals and outputting test results;

[0035] The probe station 40 has a probe base 41 for supporting and fixing the unit under test 4. The probe station 40 moves and positions the unit under test 4 through a precise mechanical structure, so that the probes 31 of the probe card 30 accurately contact the unit under test 4 to achieve electrical connection;

[0036] The data interface 50 is used for communication and coordination between various parts of the test system, or for connection and interaction with external devices.

[0037] Figure 2 This is a schematic diagram of the framework of the first embodiment of the test system involved in this application. Figure 2 The framework diagram shown omits the test head, load board, probe card, probe station, data interface and other parts. Figure 2 As shown, the digital tester 10 of the test system 1 includes a digital waveform generating module 2 and a voltage detecting module 3. The digital waveform generating module 2 and the voltage detecting module 3 are respectively connected to the unit under test 4. The unit under test 4 is a radio frequency chip to be tested for radio frequency characteristics.

[0038] Specific, combined Figure 1 and Figure 2 The test system 1 may be a CP tester, wherein the digital waveform generation module 2 and the voltage detection module 3 are disposed in a digital tester 10 of the test system 1. In some embodiments, the digital waveform generation module 2 and the voltage detection module 3 may be disposed in a tester head 11 of the digital tester 10. The digital waveform generation module 2 is connected to a first portion of probes 31 in a probe card 30 via a cable to generate a first digital waveform signal; the digital waveform generation module 2 is then connected to a unit under test 4 disposed on a probe station 40 via the first portion of probes 31 to input the first digital waveform signal into the unit under test 4. The first digital waveform signal is used to simulate inputting a radio frequency power signal into the unit under test 4.

[0039] The voltage detection module 3 is connected to the probe card 30 via another cable, and then connected to the unit under test 4 set on the probe station 40 via the first part probe 31. The digital waveform generation module 2 is used to send a test signal to the unit under test 4, and the voltage detection module 3 is used to detect the first voltage value of the first voltage signal fed back by the unit under test 4, forming a closed loop to perform wafer testing. The first voltage signal is a signal output by the unit under test 4 after receiving the first digital waveform signal, and its first voltage value can reflect the RF characteristics of the unit under test 4, and the RF characteristics include detection voltage and / or RF power, or the relationship between detection voltage and RF power.

[0040] According to the test system of the present application, the digital waveform generation module of the CP test machine can be used to output a first digital waveform signal, which is used to simulate an RF power signal and perform an RF signal power test on the unit under test. Compared with the use of an additional RF signal source, the use of a digital waveform to simulate an RF power signal does not require additional RF hardware, which reduces the development difficulty and can effectively reduce costs. Moreover, the voltage amplitude of the digital waveform signal can be easily adjusted through digital circuits or software, and the signal characteristics can be quickly and flexibly changed to meet different test or application requirements.

[0041] In some embodiments, unit under test 4 is a bare chip on a whole wafer that has not been diced and packaged. It can be any type of RF chip, such as a detector chip, a power amplifier chip, a transceiver chip, or an RF switch chip. The following description uses a detector chip as an example. A detector, also known as a radio frequency detector (RFDET), receives an RF power signal and outputs a corresponding voltage signal. The voltage value of the voltage signal is proportional to the power of the input signal, and can accurately detect and measure the amplitude and power of the RF signal. It is widely used in wireless systems. Figure 3 The schematic diagram of the detector's working principle is shown in Figure 2. Figure 3 As shown in the figure, the input signal of the detector is an RF power signal, whose power Pin (in dBm) varies with time; the output signal of the detector is a voltage signal, and the voltage value of the voltage signal VOUT (in V) is proportional to the power of the input signal.

[0042] Generally, RF testing is performed on the cut and packaged chips during the FT test (Final Test). The FT test machine has a special RF board for the corresponding RF test. The inventor of this application innovatively performs the RF test originally done in the FT test stage in the CP test stage in advance, and realizes the RF test function by modifying the software and hardware of the CP test machine. There is no need to further add external equipment, which reduces development costs. In addition, during the CP test stage, the uncut chip bare dies on the wafer are tested. When defective products are found, they can be directly discarded without the need for subsequent cutting and packaging, thereby further reducing costs.

[0043] In some embodiments, the digital waveform generation module 2 can generate various digital waveform signals and can be, for example, a digital waveform generator or a digital board. Preferably, the digital waveform generation module 2 generates a square wave signal or a triangular wave signal as the first digital waveform signal for simulating an RF power signal input to the unit under test 4. Square and triangular wave signals are the easiest digital waveform signals to generate by the digital waveform generation module 2, and their voltage amplitudes are easily adjustable. Using these signals to simulate RF power signals can effectively reduce testing costs.

[0044] The equivalent RF power P of the first digital waveform signal in1 , can be based on the voltage amplitude V of the first digital waveform signal in1 The equivalent RF power of a digital waveform is calculated using the known load resistance R. The equivalent RF power of a digital waveform is the conversion of the power characteristics of a digital signal (such as a square wave or triangle wave) into an equivalent power value within a specific RF frequency band through frequency domain analysis.

[0045] Taking the first digital signal as a square wave signal as an example, the equivalent RF power of the first digital waveform signal can be calculated by the following formula (1):

[0046] .

[0047] Similarly, when the first digital signal is a triangular wave signal, its equivalent RF power can be calculated by the following formula (2):

[0048] .

[0049] Taking the case where the digital waveform signal is a digital square wave signal as an example, the equivalent RF power of the digital square wave signal can be calculated by the following specific formula (1-1):

[0050] ,

[0051] Among them, V in To represent the voltage amplitude of a digital square wave signal in millivolts (mV), first divide the voltage amplitude by 1000 to convert it to volts. Then square the voltage amplitude and set the load resistor to 50 ohms to obtain the power value of the digital square wave signal in watts (W). Next, divide the power value by 0.001 (the reciprocal of 1000) to convert the power unit from watts to milliwatts. Finally, take the base-10 logarithm of the resulting milliwatt power value and multiply it by 10. This converts the equivalent RF power of the digital square wave signal from linear milliwatts (mW) to logarithmic decibel milliwatts (dBm).

[0052] Using the above formula, for example, when the high and low level amplitudes of the digital square wave signal are ±200mV, the calculated equivalent RF power is 0.8mW, which is approximately -1dBm when converted to decibel milliwatts.

[0053] The inventors of this application further discovered that the equivalent RF power emitted by the CP tester is inconsistent with the RF power of the signal received by the unit under test, because the cables and probes will lose a certain amount of RF power. Therefore, it is necessary to perform power calibration on the test system to improve test accuracy.

[0054] Figure 4 This is a schematic diagram of the framework of the second embodiment of the test system involved in this application in the calibration working state. Figure 4 The schematic diagram of the frame shown omits the test head, load board, probe card, probe station, data interface and other parts. Figure 1 and Figure 4In the second embodiment of the present application, the digital tester 10 of the test system 1 includes, in addition to the digital waveform generation module 2 and the voltage detection module 3, a calibration module 5, which performs calibration by testing the calibration detector 6. In this application, the calibration detector 6 has a known linear relationship between the input RF power and the output voltage within its dynamic range. That is, when the input RF power of the calibration detector 6 is a known, specific power, its output voltage is a known, specific voltage, which can be understood as the target voltage value. If the signal sent by the digital waveform generation module 2 is equivalent to the known, specific power, but the output voltage of the calibration detector 6 differs from the known, specific voltage, this indicates that the input power reaching the calibration detector 6 differs from the known, specific power due to losses in the cable and probe, resulting in the output voltage of the calibration detector 6 differing from the known, specific voltage. Therefore, the digital waveform generation module 2 can be used to send a digital waveform signal to the calibration detector 6, and the voltage detection module 3 can be used to detect the output voltage of the calibration detector 6. Calibration can then be performed by comparing the actual measured output voltage with the output voltage corresponding to the ideal condition where the digital waveform signal is free of attenuation.

[0055] During calibration, the calibration detector 6 is placed on the probe station 40, the digital waveform generating module 2 is connected to the probe card 30 via a cable, and then connected to the calibration detector 6 provided on the probe station 40 via the first part of the probe 31 on the probe card 30; the voltage detection module 3 is connected to the probe card 30 via another cable, and then connected to the calibration detector 6 provided on the probe station 40 via the second part of the probe on the probe card, for simulating the test environment of the unit to be tested. And the calibration module 5 is connected to the digital waveform generating module 2 and the voltage detection module 3 respectively. It should be pointed out here that the calibration detector can be used as part of the test system and fixedly set on one of the multiple probe seats of the probe station. The calibration detector can also be used as a detachable calibration device and be installed on the probe seat of the probe station when calibration work is required.

[0056] like Figure 4 As shown, the digital waveform generating module 2 outputs a second digital waveform signal to the calibration detector 6. Similar to the first digital waveform signal, the second digital waveform signal is preferably a square wave signal or a triangular wave signal. It should be pointed out here that during the entire calibration and testing process, the first digital waveform signal and the second digital waveform signal should use the same waveform signal, that is, the first digital waveform signal and the second digital waveform signal both use square wave signals, or the first digital waveform signal and the second digital waveform signal both use triangular wave signals.

[0057] Digital waveform generation module 2 is connected to calibration detector 6, which receives the second digital waveform signal from digital waveform generation module 2. Calibration detector 6 is connected to voltage detection module 3, which receives the second voltage signal output by calibration detector 6 and detects a second voltage value of the second voltage signal. The second voltage signal is the signal output by the calibration detector after receiving the second digital waveform signal. Calibration module 5 obtains the second voltage value from voltage detection module 3.

[0058] On the one hand, calibration module 5 is configured to obtain the equivalent RF power of the second digital waveform signal from digital waveform generation module 2. Based on the input RF power-output voltage relationship of calibration detector 6 and the equivalent RF power of the second digital waveform signal, an output voltage corresponding to the equivalent RF power of the second digital waveform signal is obtained as a target voltage value. In this application, the target voltage value refers to the voltage value that calibration detector 6 should output after receiving the second digital waveform signal under ideal conditions, that is, when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of digital waveform generation module 2 and the input end of calibration detector 6.

[0059] On the other hand, the calibration module 5 is configured to receive a second voltage value from the voltage detection module 3. Since the second digital waveform signal experiences power loss when being transmitted from the output of the digital waveform generation module 2 to the input of the calibration detector, the second voltage value is the actual measured voltage value resulting from test errors caused by factors such as cable loss in the signal transmission path, transmission line loss on the probe card, probe loss, and impedance mismatch in the test system.

[0060] Furthermore, the calibration module 5 is based on the characteristic that the output voltage and input power of the detector show linear changes within the dynamic range, and the compensation value of the output voltage and the compensation value of the input power also show a linear law, which means that the compensation value required for the input power can be accurately calculated based on the output voltage compensation value. Therefore, the calibration module 5 can determine the power compensation value based on the difference between the second voltage value and the target voltage value.

[0061] In some embodiments, the calibration module 5 calculates the equivalent RF power of the second digital waveform signal based on the voltage amplitude of the second digital waveform signal. For example, when the second digital waveform signal is a square wave signal, the equivalent RF power of the second digital waveform signal can be calculated according to the following formula (3):

[0062] ,

[0063] Among them, P in2 is the equivalent RF power of the second digital waveform signal, V in2is the voltage amplitude of the second digital waveform signal, and R is the load resistance value.

[0064] In some embodiments, the calibration module 5 may obtain the target voltage value by the following two methods:

[0065] The first method is to obtain the target voltage value based on a lookup table of the RF power-output voltage relationship and the equivalent RF power of the second digital waveform signal. Specifically, the test system also includes a non-volatile memory. For example, the non-volatile memory is provided in a digital tester of the test system. The input RF power-output voltage relationship is stored in the non-volatile memory in the form of a lookup table. The calibration module 5 can read the lookup table stored in the non-volatile memory and find the corresponding output voltage based on the equivalent RF power of the second digital waveform signal, which is used as the target voltage value.

[0066] The second method is to obtain the target voltage value based on the calculation formula of the RF power-output voltage relationship and the equivalent RF power of the second digital waveform signal. Specifically, the calibration module 5 can substitute the equivalent RF power of the second digital waveform signal into the formula of the input RF power-output voltage relationship to calculate the output voltage at the equivalent RF power of the second digital waveform signal as the target voltage value.

[0067] The following combination Figure 5 , explaining the second method. Figure 5 Schematic diagram of the relationship between input RF power and output voltage of the calibration detector involved in this application. Figure 5 As shown, the horizontal axis represents the input RF power and the vertical axis represents the output voltage. The input RF power and the output voltage are in a linear relationship, and k is a linear parameter representing the slope. It should be noted here that the calibration detector 6 as a calibration component has a standard linear response characteristic and linear parameters. By measuring the output voltage characteristics of the calibration detector 6, the power compensation value can be determined, thereby calibrating the input power so that the input power is more accurately input to the unit under test 4, thereby more accurately testing the detection voltage characteristics of the unit under test 4. The input RF power-output voltage relationship formula (4) of the calibration detector 6 is:

[0068] ,

[0069] Where x is the input RF power of the calibration detector, b is the bias parameter, k is the linear parameter representing the slope, and y is the output voltage.

[0070] The equivalent RF power P of the second digital waveform signal in2 Substituting x into formula (4), the target voltage value is obtained as follows:

[0071] .

[0072] exist Figure 5 In the equation, A represents the target voltage value, and B represents the second voltage value. The deviation between the actual output voltage (i.e., the second voltage value) and the target voltage value caused by the deviation of the input power is V _offset =AB, based on the known linear parameter k, the power compensation value can be determined by the following formula (5):

[0073] .

[0074] The power compensation value is used to eliminate test errors caused by factors such as cable loss in the signal transmission path, transmission line on the probe card, probe loss, and impedance mismatch of the test system.

[0075] After the power compensation value is determined, the power compensation value is stored in the calibration module 5. When the test system 1 is in the test working state, the calibration module 5 sends the power compensation value to the digital waveform generation module 2, and uses the power compensation value to compensate the first digital waveform signal generated by the digital waveform generation module 2, thereby performing a more accurate RF characteristic test. By using the power compensation value to compensate the first digital waveform signal, that is, adding the power compensation value to the target equivalent RF power n at the receiving end of the unit under test 4, the equivalent RF power P of the first digital waveform signal at the output end of the digital waveform generation module can be obtained by the following formula (6): in1 :

[0076] .

[0077] exist Figure 6 The frame diagram shown omits the test head, load board, probe card, probe station, data interface and other parts. Figure 6 As shown, the calibration module 5 is connected to the digital waveform generating module 2. The calibration module 5 outputs the power compensation value obtained in the calibration working state to the digital waveform generating module 2. The digital waveform generating module 2 compensates for the equivalent RF power of the first digital waveform signal according to the received power compensation value, thereby effectively eliminating the power loss generated in the test loop and overcoming the problem of input power inaccuracy, thereby accurately calibrating the power to the receiving end of the unit under test 4. The unit under test 4 receives the first digital waveform signal and outputs a first voltage signal to the voltage detection module 3. The voltage detection module 3 detects the first voltage value of the first voltage signal, thereby completing the detection voltage characteristic test of the unit under test 4.

[0078] In some embodiments, the calibration module 5 may be or include: an application-specific integrated circuit (ASIC), an electronic circuit, a (shared, dedicated, or group) processor and / or memory executing one or more software or firmware programs, combinatorial logic circuitry, and / or other suitable components that provide the described functionality. In some cases, the calibration module 5 may be implemented in hardware, firmware, software, or any combination thereof. The calibration module 5 may also be implemented as instructions carried or stored on one or more transitory or non-transitory machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors.

[0079] This application also discloses a calibration method, which is designed based on the structure and working principle of the above-mentioned test system and aims to solve the power calibration problem during the test process. Figure 1 and Figure 4 The calibration process of the test system is shown in Figure 2. Figure 7 As shown, the calibration method disclosed in this application includes the following steps:

[0080] Step S101: The calibration module 5 obtains an input RF power-output voltage relationship of the calibration detector 6. Specifically, the input RF power-output voltage relationship is a known input RF power-output voltage relationship of the calibration detector 6.

[0081] Step S102: Place the calibration detector 6 on the Figure 1 On the probe station 40, the probe contacts the calibration detector 6; the digital waveform generating module 2 sends a second digital waveform signal to the calibration detector 6 through the first part of the probe to simulate the RF power; the calibration module 5 also obtains the equivalent RF power of the second digital waveform signal from the digital waveform generating module 2;

[0082] In step S103, the calibration detector 6 feeds back a second voltage signal to the voltage detection module 3 based on the second digital waveform signal; the second probe portion of the voltage detection module 3 detects the voltage value of the second voltage signal and outputs the second voltage value; the calibration module 5 also obtains the second voltage value from the voltage detection module 3;

[0083] Step S104: The calibration module 5 can obtain a target voltage value at the equivalent RF power based on the input RF power-output voltage relationship and the equivalent RF power of the second digital waveform signal;

[0084] In some embodiments, the calibration module 5 may obtain the target voltage value by the first method or the second method described above, which will not be described in detail here.

[0085] In step S105 , the calibration module 5 can determine a power compensation value according to the difference between the second voltage value and the target voltage value.

[0086] In some embodiments, the calibration module 5 can determine a power compensation value according to the aforementioned formula (5), which will not be described in detail here. This power compensation value is used to eliminate test errors caused by factors such as cable loss in the signal transmission path, transmission line loss on the probe card, probe loss, and impedance mismatch in the test system.

[0087] After the power compensation value is determined, the power compensation value is stored in the calibration module 5. When the test system 1 is in the test working state, the calibration module 5 sends the power compensation value to the digital waveform generation module 2, and uses the power compensation value to compensate the first digital waveform signal generated by the digital waveform generation module 2, thereby performing a more accurate RF characteristic test.

[0088] In some embodiments, the calibration module 5 can determine the equivalent RF power P of the first digital waveform signal according to the above formula (6): in1 , I will not go into details here.

[0089] The test system and method disclosed in the present application for testing the radio frequency characteristics of the unit to be tested, by using the digital waveform generator in a conventional CP tester to perform radio frequency signal power testing, can reduce hardware and development costs compared to methods using radio frequency testers or external radio frequency power signal sources, effectively achieving cost efficiency. In addition, during radio frequency signal power testing, the test errors caused by the cables in the transmission path of the radio frequency signal, the transmission lines on the probe card, the probe loss, and the impedance mismatch of the test system can be effectively calibrated by adjusting the input power at the output end of the detection voltage, without the need for special calibration equipment.

[0090] The above are only specific embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be imagined by any person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. The embodiments of the present application and the features of the embodiments can be combined with each other unless there is a conflict. Therefore, the scope of protection of the present application shall be based on the scope of protection of the claims.

Claims

1. A test system for testing radio frequency characteristics of a unit under test, characterized in that: The test system comprises: A digital waveform generating module, configured to generate a first digital waveform signal; wherein the first digital waveform signal is used to simulate inputting a radio frequency power signal to the unit under test; a voltage detection module, receiving and detecting a first voltage value of a first voltage signal; wherein the first voltage signal is a signal output by the unit under test after receiving the first digital waveform signal, and is used to characterize the radio frequency characteristics of the unit under test; A calibration detector having a known input RF power-output voltage relationship; wherein, The digital waveform generating module is further configured to output a second digital waveform signal to the calibration detector; The voltage detection module further receives a second voltage signal output by the calibration detector and detects a second voltage value of the second voltage signal; wherein the second voltage signal is a signal output by the calibration detector after receiving the second digital waveform signal; The calibration module is connected to the digital waveform generation module and the voltage detection module respectively, and is configured to: Obtaining an equivalent radio frequency power of the second digital waveform signal and the second voltage value; Based on the input RF power-output voltage relationship and in accordance with the equivalent RF power of the second digital waveform signal, a target voltage value is obtained; wherein the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; A power compensation value is determined according to a difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

2. The test system according to claim 1, wherein: The test system further comprises: A digital tester, wherein the digital waveform generation module, the voltage detection module and the calibration module are located in the digital tester, and the digital tester is calibrated by detecting the calibration detector; A probe card includes a plurality of probes, each of which is connected to the digital tester and is used to contact the unit under test; wherein, The digital waveform generating module is connected to the probe of the first part, and the probe of the first part is used to input the first digital waveform signal into the unit under test; The voltage detection module is connected to the probe of the second part, and the probe of the second part is used to output the first voltage signal to the digital tester.

3. The test system according to claim 1, wherein: The test system further includes a non-volatile memory, wherein the input radio frequency power-output voltage relationship is stored in the non-volatile memory in the form of a lookup table; The step of obtaining the target voltage value by the calibration module includes: The target voltage value is obtained by querying the lookup table according to the equivalent radio frequency power of the second digital waveform signal.

4. The test system according to claim 1, wherein: The step of obtaining the target voltage value by the calibration module includes: The calibration module calculates the target voltage value according to the following formula: ， Among them, P in2 is the equivalent RF power of the second digital waveform signal, k is a linear parameter representing the slope, and b is a bias parameter.

5. The test system according to claim 3 or 4, characterized in that: The determining the power compensation value includes: The calibration module calculates the power compensation value according to the following formula: ， Among them, P in_offset is the power compensation value, A is the target voltage value, B is the second voltage value, and k is a linear parameter representing the slope.

6. The test system according to any one of claims 1 to 4, wherein: The first digital waveform signal and the second digital waveform signal are square wave signals or triangle wave signals.

7. The test system according to any one of claims 1 to 4, characterized in that: The unit to be tested is a detector to be tested.

8. A calibration method, characterized in that: For the test system according to any one of claims 3 to 5, the calibration method comprises: Store input RF power-output voltage relationship; Obtaining an equivalent radio frequency power and a second voltage value of a second digital waveform signal; Based on the input RF power-output voltage relationship and in accordance with the equivalent RF power of the second digital waveform signal, a target voltage value is obtained; wherein the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; A power compensation value is determined according to a difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

9. The calibration method according to claim 8, wherein: The step of obtaining the target voltage value by the calibration module includes: The calibration module calculates the target voltage value according to the following formula: ， Among them, P in2 is the equivalent RF power of the second digital waveform signal, k is a linear parameter representing the slope, and is a bias parameter; or, The test system further includes a non-volatile memory, wherein the input radio frequency power-output voltage relationship is stored in the non-volatile memory in the form of a lookup table; The step of obtaining the target voltage value by the calibration module includes: The target voltage value is obtained by querying the lookup table according to the equivalent radio frequency power of the second digital waveform signal.

10. The calibration method according to claim 8, wherein: The determining the power compensation value includes: The calibration module calculates the power compensation value according to the following formula: ， Among them, P in_offset is the power compensation value, A is the target voltage value, B is the second voltage value, and k is a linear parameter representing the slope.

Images