Processing method and processing device
By performing different processing methods and topological sorting management in parallel, the problem of data correlation corruption in linear processing is solved, and more efficient and flexible data processing is achieved.
Patent Information
- Application Number
- CN202510401744.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-01
- Publication Date
- 2025-07-04
AI Technical Summary
In the prior art, linear processing in signal processing or data analysis can destroy the intrinsic correlation of data, resulting in reduced results accuracy and increased resource consumption, flexibility and efficiency.
Nonlinear processing method is adopted, and different processing methods are executed in parallel, combined with topological sorting and delay parameter management, and the processing results are combined to reduce the calculation amount and coupling degree, and improve the system scalability and reliability.
It realizes more accurate and reliable data processing results, reduces data transmission amount and time, and improves system flexibility and efficiency.
Smart Images

Figure CN120256123A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of data processing, and particularly to a processing method and a processing device. Background Art
[0002] In signal processing or data analysis, linear processing can be performed, that is, multiple sub - processing methods are cascaded and executed in sequence. However, the pre - processing steps will irreversibly modify the original data, destroying the internal correlation of the data, resulting in the data received by the subsequent processing steps deviating from the original distribution, and finally reducing the accuracy of the output result.
[0003] In addition, a certain sub - processing method may need to call the function of another sub - processing method, but it is not necessary in all cases, that is, conditional necessity or auxiliary optionality. However, currently, the direct coupling or compile - time binding method is adopted, which increases unnecessary resource consumption and affects flexibility and efficiency at the same time. Summary of the Invention
[0004] In view of the above problems, the present disclosure provides a processing method and a processing device.
[0005] According to a first aspect of the present disclosure, a first processing method is provided, including: obtaining data to be processed; performing a first process on the data to be processed based on a first processing method to obtain a first processing result, and performing a second process on the data to be processed based on a second processing method to obtain a second processing result, where the first processing method is different from the second processing method; performing a third process on the first processing result and the second processing result based on a third processing method to obtain a third processing result; and using the third processing result as the common processing result of the first processing method and the second processing method.
[0006] According to an embodiment of the present disclosure, before performing a first process on the data to be processed based on a first processing method to obtain a first processing result, and performing a second process on the data to be processed based on a second processing method to obtain a second processing result, the method further includes: in response to obtaining the data to be processed, when it is determined that the pre - processing methods of the first processing method and the second processing method match, processing the data to be processed based on a target pre - processing method and re - using it as the data to be processed, where the target pre - processing method is any one of the pre - processing methods of the first processing method and the second processing method.
[0007] According to an embodiment of the present disclosure, the method further includes: performing a fourth process on the data to be processed based on a fourth processing method to obtain a fourth processing result, where the type of the fourth processing result is different from the type of the first processing result and / or the type of the second processing result; and using the fourth processing result as the separate processing result of the fourth processing method.
[0008] According to an embodiment of the present disclosure, the method further includes: determining the processing order of each processing method according to the types of processing data corresponding to the first processing method, the second processing method, the third processing method, and the fourth processing method, wherein the processing data corresponding to the first processing method and the second processing method is data to be processed; among each processing method, the processing methods with the same type of processing data are executed in parallel.
[0009] According to an embodiment of the present disclosure, the method further includes: if the end time of the first processing method is earlier than the end time of the second processing method, and the third processing result is obtained by processing the first processing result and the second processing result respectively based on the third processing method, then set the start time of processing the first processing result based on the third processing method to be earlier than the start time of processing the second processing result based on the third processing method.
[0010] According to an embodiment of the present disclosure, the method further includes: determining the delay parameters corresponding to the first processing method, the second processing method, the third processing method, and the fourth processing method respectively based on the processing order of each processing method; merging the third processing result and the fourth processing result at the same moment based on each delay parameter.
[0011] A second processing method provided by the second aspect of the present disclosure includes: in response to a data processing request, obtaining data to be processed, and initializing the processing logic of the first processing method, declaring a super pointer and a first pointer within the processing logic, and pointing the super pointer to the address of the first pointer; performing a first processing on the data to be processed based on the first processing method to obtain a first processing result, and determining to call the second processing method based on the first processing logic. When the second processing method is called, pointing the first pointer to a first address space, where the first address space is used to store the second processing parameter corresponding to the second processing method, and the first processing method is different from the second processing method; in response to the second processing method returning a second processing result, releasing the address space occupied by the first pointer based on the super pointer, and the second processing result is obtained by the second processing method performing a second processing on the data to be processed.
[0012] According to an embodiment of the present disclosure, the method further includes: declaring a second pointer, and pointing the super pointer to the address of the second pointer; pointing the second pointer to a second address space, where the second address space is used to store the first processing parameter corresponding to the first processing method; in response to the first processing method returning a first processing result, releasing the address space occupied by the second pointer based on the super pointer.
[0013] The third aspect of the present disclosure provides a first processing device, including: an acquisition module configured to acquire data to be processed; a parallel processing module configured to perform a first processing on the data to be processed based on a first processing method to obtain a first processing result, and perform a second processing on the data to be processed based on a second processing method to obtain a second processing result, where the first processing method is different from the second processing method; a third processing module configured to perform a third processing on the first processing result and the second processing result based on a third processing method to obtain a third processing result; and a determination module configured to use the third processing result as the common processing result of the first processing method and the second processing method.
[0014] The fourth aspect of the present disclosure provides a second processing device, including: a declaration module configured to, in response to a data processing request, acquire data to be processed, and initialize the processing logic of a first processing method, declare a super pointer and a first pointer within the processing logic, and point the super pointer to the address of the first pointer; a call module configured to perform a first processing on the data to be processed based on the first processing method to obtain a first processing result, and determine to call a second processing method based on the first processing logic. When the second processing method is called, point the first pointer to a first address space, where the first address space is used to store second processing parameters corresponding to the second processing method, and the first processing method is different from the second processing method; and a release module configured to, in response to the second processing method returning a second processing result, release the address space occupied by the first pointer based on the super pointer, where the second processing result is obtained by the second processing method performing a second processing on the data to be processed.
[0015] The fifth aspect of the present disclosure provides an electronic device, including: one or more processors; and a storage device configured to store one or more programs, where when the one or more programs are executed by the one or more processors, the one or more processors are caused to execute the steps of the above first processing method and / or the second processing method.
[0016] The sixth aspect of the present disclosure provides a computer-readable storage medium, on which executable instructions are stored, and when the instructions are executed by a processor, the steps of the above first processing method and / or the second processing method are implemented. The seventh aspect of the present disclosure further provides a computer program product, including a computer program, and when the computer program is executed by a processor, the steps of the above first processing method and / or the second processing method are implemented.
[0017] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The drawings are used to better understand the solution and do not constitute a limitation to the present disclosure. Among them:
[0019] Figure 1 Schematically shows a flowchart of a method for processing audio data in a linear structure in the prior art;
[0020] Figure 2 Schematically shows an application scenario diagram of a processing method and a processing device according to an embodiment of the present disclosure;
[0021] Figure 3 Schematically shows a flowchart of a first processing method according to an embodiment of the present disclosure;
[0022] Figure 4 Schematically shows a flowchart of a method for processing audio data in a branch merging structure according to an embodiment of the present disclosure;
[0023] Figure 5 Schematically shows a flowchart of audio data processing according to an embodiment of the present disclosure;
[0024] Figure 6 Schematically shows a system architecture diagram of a second processing method according to an embodiment of the present disclosure;
[0025] Figure 7 Schematically shows a structural block diagram of a first processing device according to an embodiment of the present disclosure;
[0026] Figure 8 Schematically shows a structural block diagram of a second processing device according to an embodiment of the present disclosure; and
[0027] Figure 9 Schematically shows a block diagram of an electronic device suitable for implementing a processing method according to an embodiment of the present disclosure. Detailed implementation manners
[0028] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present disclosure. In the following detailed description, for the sake of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, obviously, one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present disclosure.
[0029] The terms used herein are merely for describing specific embodiments and are not intended to limit the present disclosure. The terms "including", "comprising", etc. used herein indicate the presence of features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.
[0030] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those of ordinary skill in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.
[0031] It should be noted that in the technical solutions of the present disclosure, the processing of the user's personal information involved in the collection, storage, use, processing, transmission, provision, disclosure, and application, etc., all comply with the provisions of relevant laws and regulations, take necessary confidentiality measures, and do not violate public order and good customs. In the technical solutions of the present disclosure, the authorization or consent of the user has been obtained before obtaining or collecting the user's personal information.
[0032] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.
[0033] In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present application, "a plurality" means two or more, unless otherwise specifically defined.
[0034] It has been found through research that in the related art, the audio data processing flow of a linear structure is as Figure 1As shown in the figure, first, the input module recognizes and receives audio in different formats, and then enters the framing module. This module can divide the audio into audio frames with a frame length of N, and at the same time determine the frame data DATA, the number of channels C, the data type T, the sampling rate FS, etc., and sequentially pass this information to the subsequent algorithm modules A to Z for linear processing. During this process, only the frame data DATA changes, and the remaining parameters such as the number of channels C, the data type T, and the sampling rate FS remain unchanged. The merging module then splices the processed speech frames in sequence, and finally the output module outputs the processed audio in the specified format or the same format as the input. It can be seen that the linear processing follows a strict sequence, and each step is executed sequentially, lacking flexibility. For example, during the linear structure processing, there is a transition band in the time-domain processing, and the frequency-domain frame processing will also perform transition operations, and these two transition processes will affect each other. For example, an increase in the transition of the previous module will lead to a decrease in the transition of the middle module, which will in turn lead to an increase in the transition of the subsequent module, that is, the previous processing will more or less damage the input provided to the subsequent module. Logically speaking, the energy will not change during the entire processing process, but in the actual transition processing link, the energy will fluctuate in size.
[0035] In view of this, the embodiments of the present disclosure provide a processing method and a processing device. The processing method and the processing device will be introduced below with reference to the accompanying drawings.
[0036] Figure 2 FIG. 200 is a schematic diagram showing an application scenario of the processing method and the processing device according to an embodiment of the present disclosure.
[0037] It should be noted that Figure 2 The figure shown is only an example of a scenario where the embodiments of the present disclosure can be applied to help those skilled in the art understand the technical content of the present disclosure, but it does not mean that the embodiments of the present disclosure cannot be used in other devices, systems, environments or scenarios.
[0038] As Figure 2 shown, the application scenario 200 according to this embodiment may include terminal devices 201, 202, 203, a network 204, and a server 205. The network 204 is used to provide a medium for communication links between the terminal devices 201, 202, 203 and the server 205. The network 204 may include various connection types, such as wired, wireless communication links, or fiber optic cables, etc.
[0039] Users can use the terminal devices 201, 202, 203 to interact with the server 205 through the network 204 to receive or send messages, etc. Various communication client applications may be installed on the terminal devices 201, 202, 203, such as shopping applications, web browser applications, search applications, instant messaging tools, email clients, social platform software, etc. (only as examples).
[0040] The terminal devices 201 , 202 , and 203 may be various electronic devices having a display screen and supporting web browsing, including but not limited to smart phones, tablet computers, laptop computers, and desktop computers.
[0041] The server 205 may be a server that provides various services, such as a background management server (only an example) that provides support for websites browsed by users using the terminal devices 201, 202, and 203. The background management server may analyze and process the received data such as user requests, and feed back the processing results (such as web pages, information, or data obtained or generated according to user requests) to the terminal device.
[0042] It should be noted that the processing method provided in the embodiment of the present disclosure can generally be executed by the server 205. Accordingly, the processing device provided in the embodiment of the present disclosure can generally be set in the server 205. The processing method provided in the embodiment of the present disclosure can also be executed by a server or server cluster that is different from the server 205 and can communicate with the terminal devices 201, 202, 203 and / or the server 205. Accordingly, the processing device provided in the embodiment of the present disclosure can also be set in a server or server cluster that is different from the server 205 and can communicate with the terminal devices 201, 202, 203 and / or the server 205.
[0043] It should be understood that Figure 2 The number of terminal devices, networks and servers in the embodiment is only for illustration. Any number of terminal devices, networks and servers may be provided according to implementation requirements.
[0044] The following will be based on Figure 2 The scene described by Figures 3 to 6 The processing method of the embodiment of the present disclosure is described in detail.
[0045] Figure 3 The flowchart of the first processing method according to the embodiment of the present disclosure is schematically shown.
[0046] like Figure 3 As shown, the first processing method of this embodiment includes S310~S340.
[0047] In S310, data to be processed is obtained.
[0048] Exemplarily, the data to be processed may be audio data, image data, video data, etc.
[0049] Figure 4 The flowchart of the audio data processing method of the branch-merge structure according to an embodiment of the present disclosure is schematically shown.
[0050] Exemplarily, as Figure 4 shown, after the input module obtains the audio data, it can identify the format of the audio data, that is, determine its encoding method and file structure. Then, through the framing module, the audio data can be framed, and the continuous audio signal can be segmented into discrete time segments. For example, the audio frame length N, frame data DATA, number of channels C, data type T, and sampling rate FS can be determined. Furthermore, the framed audio data can be sequentially passed to the algorithm module A. The algorithm module A includes traditional implementations and AI implementations of audio algorithms, such as other subsequent processing modules like a feature extraction module and a model training module.
[0051] In S320, the data to be processed is first processed based on the first processing method to obtain a first processing result, and then processed based on the second processing method to obtain a second processing result. The first processing method is different from the second processing method.
[0052] The processing types of the first processing method and the second processing method can be the same, that is, the data to be processed is operated based on similar processing logics or objectives. For example, in the field of image processing, both the first processing method and the second processing method can be of the processing type based on image feature extraction. Since the processing types are the same, the types of the first processing result and the second processing result are also the same. For example, in the above example of image feature extraction, both the first processing result and the second processing result are feature vectors or feature maps of the image.
[0053] The processing types of the first processing method and the second processing method can also be different. For example, in text data processing, the first processing method can be text classification to classify the text into different predefined categories. The second processing method can be text summary generation, that is, extracting key information from the original text to generate a concise summary. Since the processing types are different, the types of the first processing result and the second processing result are also different. For example, in the above example of text processing, the first processing result is the category label of the text, and the second processing result is the text summary.
[0054] Continuing to refer to Figure 4 , the first processing and the second processing can be executed in the algorithm module A. The algorithm module A is not limited to a single and fixed module concept, but a collection of logical units with high flexibility and scalability. In essence, it is an abstract representation of a series of algorithms and functions for performing specific data processing tasks. For example, it can execute the first processing, the second processing, and the third processing, etc. In practical applications, the algorithm module A can be configured as a single physical module according to factors such as the system architecture design, the complexity of data processing, and performance requirements, or can be dispersed in multiple different physical or logical modules.
[0055] It should be noted that the first process and the second process can be executed in parallel. For example, the first process and the second process can be encapsulated in different threads respectively, so as to be executed concurrently in different threads. In addition, distributed parallelism can also be carried out, that is, the first process and the second process are respectively deployed on different computing nodes, and communicate and coordinate through the network.
[0056] In S330, based on the third processing method, the first processing result and the second processing result are subjected to a third process to obtain a third processing result.
[0057] The third processing method can include one of linear operations and non-linear operations to integrate, analyze and transform the first processing result and the second processing result. Among them, linear operations can include addition and subtraction operations and normalization processing, etc., and non-linear operations can include comparing the corresponding elements of the first processing result and the second processing result, and selecting one of them as the output according to the comparison result.
[0058] In S340, the third processing result is used as the common processing result of the first processing method and the second processing method.
[0059] The third processing result can simultaneously include the key information in the first processing result and the key information in the second processing result as the common result.
[0060] Exemplarily, the first process is to perform edge detection on the image to obtain the edge contour information of the object in the image, while the second process is to extract color features from the image to obtain the distribution and feature vectors of different color regions in the image. The third process can combine the color features to perform color annotation on the edge information obtained by the first process. Therefore, the third processing result can not only contain the edge information, but also fuse the color features, making the analysis of the image more comprehensive and intuitive.
[0061] The third processing result can also use the first processing result or the second processing result alone as the common result.
[0062] Exemplarily, the first processing method can perform beamforming processing on the audio data based on the original phase of the audio data, filter to form a first attenuation to obtain a first processing result. The second processing method can perform noise reduction processing on the audio data based on the proportion and statistical situation of different audio components in the original scene of the audio data, and also form a first attenuation through the filter to obtain a second processing result. At the same time, energy processing can also be performed on the audio data to obtain the result of energy processing. Since the processing methods are similar, both are attenuations, the processing result formats are also similar. Then the third processing method can select the result with more attenuation from the above processing results as the common processing result, that is, select the smaller value from the first processing result, the second processing result and the result of energy processing to meet the attenuation requirements of beamforming, noise reduction and energy processing.
[0063] It can be understood that by executing the first process and the second process in parallel, the amount of computation can be reduced, and the processing results will not affect each other, thereby reducing the coupling degree between processes and improving the scalability and reliability of the system. In addition, determining the third processing result based on the first processing result and the second processing result and using it as the common output of the first processing method and the second processing method can not only obtain more accurate and reliable data, but also reduce the amount of data transmission and transmission time.
[0064] Based on the above embodiments, in this embodiment, before performing the first process on the data to be processed based on the first processing method to obtain the first processing result and performing the second process on the data to be processed based on the second processing method to obtain the second processing result, the method further includes: in response to obtaining the data to be processed, when it is determined that the preprocessing method of the first processing method and the preprocessing method of the second processing method match, processing the data to be processed based on the target preprocessing method and using it as the data to be processed again, where the target preprocessing method is any one of the preprocessing method of the first processing method and the preprocessing method of the second processing method.
[0065] Exemplarily, the preprocessing method may include caching, delaying, smoothing, overlap addition, generating a window function, windowing in the time domain, multiplying in the frequency domain, Fourier transform, resampling, calculating the amplitude, calculating the energy, and converting the data format, etc.
[0066] When the preprocessing method of the first processing method and the preprocessing method of the second processing method match, that is, when the input data formats of the first processing method and the second processing method are similar or exactly the same, in order to improve the processing efficiency and reduce unnecessary repeated operations, one of the preprocessing method of the first processing method and the preprocessing method of the second processing method can be selected to perform a target preprocessing once, and the preprocessed result is used as the common input of the first processing method and the second processing method.
[0067] The preprocessing method of the first processing method and the preprocessing method of the second processing method can be different. It only needs to meet the conditions that after different preprocessings, the finally obtained data formats are consistent, and the principles of preprocessing are similar in essence. For example, when the principle is time-frequency transformation for format conversion, the preprocessing of the first processing method can be to use Fourier transform or other similar time-frequency transformation methods to convert the original data from the time domain to the frequency domain, or to perform a certain specific format adjustment. The preprocessing of the second processing method can be to use wavelet transform or other different time-frequency transformation means to also achieve the conversion or adjustment of the data format. That is to say, as long as these two preprocessing methods are roughly the same in terms of input and output and can meet the requirements of the subsequent first processing method and second processing method for the data format, one of them, such as Fourier transform or wavelet transform, can be selected as the target preprocessing method, and the processed data can be used as the data to be processed again.
[0068] The preprocessing method of the first processing method and the preprocessing method of the second processing method can also be the same. For example, when the sampling rate of the data to be processed does not match the sampling rates required by the subsequent first processing and second processing, both the first processing method and the second processing method can first adjust the sampling rate of the data. For example, the sampling rate of the original audio data is 52 kHz, while the sampling rates required for the input data by the first processing method and the second processing method are 36 kHz. At this time, the target preprocessing of uniformly reducing the sampling rate can be performed on the input data to convert the 52 kHz audio data into 36 kHz audio data.
[0069] It can be understood that the unified target preprocessing method avoids repeated performance of the same preprocessing operation, saves computing resources and time costs, and makes the entire processing process more efficient and fast.
[0070] In the embodiments of the present disclosure, the method further includes: performing a fourth processing on the data to be processed based on a fourth processing method to obtain a fourth processing result, where the type of the fourth processing result is different from the type of the first processing result and / or the type of the second processing result; and using the fourth processing result as the separate processing result of the fourth processing method.
[0071] In the complex process of data processing and analysis, not only can the first processing method and the second processing method involving parallel processing be involved, but also a fourth processing method that does not need to refer to the processing results of other processing methods can be involved, and the type of the fourth processing result of the fourth processing method is significantly different from the type of the first processing result and / or the type of the second processing result.
[0072] Exemplarily, taking an audio processing scenario as an example, the first processing method and the second processing method can focus on performing attenuation operations on audio signals, and the types of the first processing result and the second processing result finally output are still physical signals. However, the fourth processing method can perform speech recognition on the audio data to be processed. After complex speech recognition algorithms and model analysis, the fourth processing result output is no longer a physical signal, but information with clear semantics presented in the form of text, tags, or other structured data, such as the recognized speech content and the intention of the speaker, etc., and use it as the separate processing result of the fourth processing method.
[0073] It can be understood that introducing an independent processing method and outputting its result separately without referring to the processing results of other processing methods can ensure the independence of data processing, and ultimately enhance the flexibility and scalability of the system.
[0074] In the embodiments of the present disclosure, the method further includes: if the end time of the first processing method is earlier than the end time of the second processing method, and the third processing result is obtained by the third processing method processing the first processing result and the second processing result respectively, then set the start time of the third processing method processing the first processing result to be earlier than the start time of the third processing method processing the second processing result.
[0075] Due to factors such as the amount of data processed and the complexity of the algorithm, there are differences in the end times of the first processing method and the second processing method. When the third processing result is obtained based on the first processing result and the second processing result, if the first processing method ends first, then the start time of the third processing method processing the first processing result can be set earlier than the start time of processing the second processing result. Similarly, if the second processing method ends first, then the start time of the third processing method processing the second processing result can be set earlier than the start time of processing the first processing result.
[0076] Exemplarily, in the above image processing, the first processing method can be to perform simple edge detection on the image, while the second processing method can be to perform complex feature extraction on the image. Since the feature extraction algorithm is usually more complex than the edge detection algorithm, the end time of the second processing method may be later than the end time of the first processing method. Therefore, it can be set that the third processing method preferentially processes the result of edge detection.
[0077] In some exemplary embodiments, the algorithm framework can apply for threads to a higher layer to achieve parallel first processing and second processing, etc. in different branches, and then merge the processing results of each branch, so that in the several-way processing from the branch point to the merge point of the branch merge structure, the overall time consumption only depends on the longest-consuming path, and thus the overall time consumption can be effectively reduced.
[0078] For the process of providing the processing result to other processing flows, it can be set to be processed in the thread with the shortest time consumption to reduce the overall duration. In real-time processing scenarios, such as real-time audio processing, the first processing and the second processing can be performed in real time, and the fourth processing can be performed non-real time. The fourth processing can be responsible for detecting the sound type and proportion, and providing the processing result to other processing methods as the basis for adjusting other processing results. From the perspective of processing duration, the fourth processing can be performed in the frame with the shortest time consumption among the first processing and the second processing frames, so as to make full use of the processing resources and avoid adding extra burden on the busy processing frames.
[0079] It should be noted that for the fourth processing, the strict mode of one frame in and one frame out does not need to be followed, that is, the frames for processing can be flexibly selected according to the actual situation. If the data characteristics of a certain frame are not obvious and not suitable for sound type and proportion detection, then this frame can be skipped and a more suitable frame can be selected for processing.
[0080] It can be understood that by reasonably arranging the processing order, the third processing method can start processing the first processing result immediately after the first processing method ends, so as to make full use of the processing resources, reduce the overall processing time, and improve the processing efficiency.
[0081] In the embodiments of the present disclosure, the method further includes: determining the processing order of each processing method according to the types of the processed data corresponding to the first processing method, the second processing method, the third processing method, and the fourth processing method respectively, where the processed data corresponding to the first processing method and the second processing method is the data to be processed; among each processing method, the processing methods with the same type of processed data are executed in parallel.
[0082] In the data processing flow, the data types targeted by different processing methods are different. And according to the types of the processed data corresponding to the first processing method, the second processing method, the third processing method, and the fourth processing method respectively, the topological sorting can be used to determine the processing order. The topological sorting is essentially a method for linearly sorting the nodes in a directed acyclic graph. In the data processing scenario, each processing method can be regarded as a node, and the data flow direction and dependency relationship between the processing methods constitute the directed edges. In this way, the sequence order between each processing method can be determined to ensure the smooth progress of data processing.
[0083] When the processing data corresponding to the first processing method and the second processing method is the data to be processed, that is, the types of the processing data of the first processing method and the second processing method are the same and there is no sequential dependency relationship, the first processing method and the second processing method can be executed in parallel. Taking image data processing as an example, assume that the first processing method is color correction of an image, which processes the original image data, and the second processing method is noise reduction processing of the image, which also acts on the original image data. Since the data types targeted by these two processing methods are the same, both are the original image data to be processed, so in topological sorting, they can be at the same level and executed in parallel. In addition, the type of the processing data of the fourth processing method can also be the data to be processed. At this time, the fourth processing method can also be executed in parallel with the first processing method and the second processing method. For example, in natural language processing, the first processing method can be basic word segmentation of the text, the second processing method can be part-of-speech tagging of the text, and the fourth processing method can be named entity recognition of the text. These three processing methods can all directly act on the original text data. Therefore, in topological sorting, they can be executed in parallel.
[0084] When the output type of the A processing method is the same as the input type of the B processing method, that is, the output parameter of the A processing method is the same as the input parameter of the B processing method, then in topological sorting, the execution order of the A processing method is earlier than the execution order of the B processing method. For example, if the third processing method needs to process the first processing result and the second processing result, then the execution order of the third processing method is later than that of the first processing method and the second processing method, and the first and second processing methods are executed first.
[0085] It can be understood that by determining the processing order of each processing method (including parallel processing and serial processing) through the type of processing data, all dependency relationships can be ensured to be satisfied, and the overall efficiency can be improved on the premise of ensuring processing accuracy.
[0086] In the embodiments of the present disclosure, the method further includes: determining delay parameters corresponding to the first processing method, the second processing method, the third processing method, and the fourth processing method respectively based on the processing order of each processing method; and merging the third processing result and the fourth processing result at the same moment based on each delay parameter.
[0087] Due to factors such as algorithm complexity and data processing volume, different processing methods will result in differences in processing time. To ensure accurate and efficient data merging in the subsequent stage, appropriate delay parameters can be set for each processing method. For example, the first processing method, the second processing method, and the fourth processing method are executed in parallel, and the processing result of the third processing method is obtained based on the first processing result and the second processing result. If the delay parameter of the first processing method is 2 milliseconds, the delay parameter of the second processing method is 3 milliseconds, and the delay parameter of the third processing method is 4 milliseconds, and the delay parameters are added during linear linking, then the time to obtain the third processing result is 8 milliseconds, while the delay parameter of the fourth processing method is 5 milliseconds. To ensure that the delay values of each path are the same during multi-path merging, that is, to merge the third processing result and the fourth processing result at the same moment, the delay parameter of the fourth processing method can be adjusted, and an additional 3-millisecond delay can be set. In this way, both paths of data can arrive for merging at 8 milliseconds, ensuring data alignment and avoiding data chaos caused by inconsistent delays.
[0088] If the delay values of each path are different, a general delay module can also be used to dynamically adjust the data of different paths so that the data of each path has the same delay when arriving for merging. For example, when the delay value of a certain path of data is smaller than that of other paths, the delay general module can appropriately buffer the data of this path to increase its delay time. Conversely, when the delay value of a certain path of data is larger than that of other paths, the module can try to speed up the processing speed of the data of this path, or buffer the other paths accordingly to achieve delay balance.
[0089] Continue to refer to Figure 4 In, the third processing result and the fourth processing result can be merged in multiple paths by the merging module. After the merging is completed, the voice frames need to be spliced in sequence to form a complete voice signal. Then, the merged result is output through the output module in the specified format or the input format. For example, if the output result is for further analysis and processing, a specific data format such as JSON or XML can be used. If the output result is for playback or storage, an audio file format such as WAV or MP3 can be used.
[0090] Figure 5 Schematically shows a flowchart of audio data processing according to an embodiment of the present disclosure.
[0091] As Figure 5As shown in the figure, first, obtain the audio data to be processed. Since the preprocessing of the first processing method, the second processing method, and the fourth processing method can include data format conversion, sampling rate processing, frame processing, and time-frequency conversion, and the time-frequency conversion can be used as the preprocessing method for matching the first processing method and the second processing method, the time-frequency conversion is used as the target preprocessing method to preprocess the audio data, obtaining the frame frequency domain X. Then, the frame frequency domain X is respectively input into the first processing method and the second processing method. After filtering through the filter H respectively, combined logical processing is performed based on the third processing method to obtain the third processing result frame frequency domain Y, which is output as the common processing result of the first processing method and the second processing method. At the same time, based on the fourth processing method, the frame time domain x is processed in the time domain, and the gain g is output to adjust the amplitude of the frame frequency domain Y. Then, the adjusted signal is subjected to inverse time-frequency conversion to obtain the frame time domain y, and frame smoothing processing is performed. Finally, sampling rate recovery and data format conversion are performed on the frame time domain y to obtain the final output signal.
[0092] In data processing, different processing methods can have different functions and characteristics. Sometimes, the implementation of the function of one processing method may depend on the function of another processing method, that is, without the function of another processing method, the current processing method cannot complete the task completely and accurately; it may also be optional, that is, the function of another processing method can provide additional optimization or enhancement effects for the current processing method. In view of the above situation, the embodiments of the present disclosure provide a second processing method, which includes S610 to S630.
[0093] In S610, in response to a data processing request, obtain the data to be processed, and initialize the processing logic of the first processing method. In the processing logic, declare a super pointer and a first pointer, and point the super pointer to the address of the first pointer.
[0094] In response to a data processing request, the data to be processed (such as audio data, image data, etc.) can be obtained. The data processing request can come from the upper-layer module of the system, the operation instruction of the user, or other external data sources. After obtaining the data to be processed, the processing logic of the first processing method can be initialized. Inside the processing logic, a super pointer and a first pointer can be declared to store memory addresses, and data in the memory can be indirectly accessed and operated on. At the same time, the super pointer can be pointed to the address of the first pointer to monitor and manage the usage of the first pointer through the super pointer, and provide a basis for subsequent memory management operations.
[0095] In S620, the data to be processed is first processed based on the first processing method to obtain a first processing result, and the second processing method is determined to be called based on the first processing logic. When the second processing method is called, the first pointer is pointed to the first address space, which is used to store the second processing parameters corresponding to the second processing method. The first processing method is different from the second processing method.
[0096] The first processing method is different from the second processing method and has its own unique functions and processing logics. As Figure 6 shown, in the process of first processing the data to be processed based on the first processing method, at the link level, it can be determined whether to call the processing logic M2 of the second processing method according to the judgment of the first processing logic M1, that is, M2 is optional. When the second processing method is called, the first pointer can be pointed to the first address space, which is a space that stores the second processing parameters corresponding to the second processing method during pre-compilation. The second processing parameters can include configuration information, algorithm coefficients, thresholds, etc.
[0097] In S630, in response to the second processing method returning a second processing result, the address space occupied by the first pointer is released based on the super pointer. The second processing result is obtained by the second processing method performing a second processing on the data to be processed.
[0098] After the second processing method performs a second processing on the data to be processed and returns the second processing result, it indicates that the second processing method has been called during the program execution. At this time, the memory space occupied by the first pointer can be released to decouple the first processing method from the second processing method.
[0099] Through the second processing method provided by the embodiments of the present disclosure, it is not necessary to directly understand the internal implementation details of the second processing method and the specific location of parameter storage. The first processing method can only perform its own operations and processing according to the established processing logic. When the second processing method needs to be called, the parameter information required by the second processing method is obtained through the first pointer managed by the super pointer, and the execution of the second processing method is triggered. After the second processing method is executed, the result is returned to the first processing method, and the first processing method can continue with subsequent processing, making the first processing method and the second processing method relatively independent at the code level. If the second processing method needs to be modified later, such as adjusting its parameter structure or changing its processing logic, it can be operated only within the code range related to the second processing method without making large-scale changes to the code of the first processing method. Similarly, the optimization and upgrade of the first processing method will not affect the normal execution of the second processing method.
[0100] Exemplarily, taking audio processing as an example, the first processing method can perform pitch shifting on the audio, that is, change the pitch of the audio to make it higher or lower. The second processing method can detect whether the audio is high pitch or low pitch (not necessary), so as to provide more precise control for the pitch shifting operation. If it is high pitch, three scales can be subtracted during pitch shifting to make the high pitch softer and avoid the sound being too sharp; if it is low pitch, three scales can be raised to enhance the strength and fullness of the low pitch. Therefore, during the process of the first processing (pitch shifting), it is possible to choose whether to call the second processing method (pitch detection) according to actual needs. If the second processing method is called, a super pointer and a first pointer are declared within the processing logic of the first processing method, and the super pointer is pointed to the address of the first pointer. At the same time, the first pointer is pointed to the first address space storing the second processing parameters corresponding to the second processing method. After the call to the second processing method is completed, the address space occupied by the first pointer is released in a timely manner through the super pointer.
[0101] It can be understood that the first processing method can externally load the second processing method, that is, the second processing method does not occupy the address space corresponding to the processing parameters of the first processing method. The first processing method and the second processing method are effectively decoupled, can be developed and maintained independently, and can work together when needed to improve the utilization rate of memory.
[0102] In an embodiment of the present disclosure, the method further includes: declaring a second pointer, and pointing the super pointer to the address of the second pointer; pointing the second pointer to a second address space, where the second address space is used to store the first processing parameters corresponding to the first processing method; in response to the first processing method returning a first processing result, releasing the address space occupied by the second pointer based on the super pointer.
[0103] In the above embodiment, on the basis of managing the first pointer associated with the second processing method through the super pointer, in this embodiment, a second pointer can also be declared, and the super pointer is pointed to the address of the second pointer, so as to manage the first pointer and the second pointer simultaneously based on the super pointer. That is, when there is a call relationship between the first processing method and the second processing method, not only a first pointer is set for the second processing method to point to the first address space storing the relevant parameters of the second processing method, but also a second pointer is set for the first processing method to point to the second address space storing the first processing parameters corresponding to the first processing method. Thus, when allocating memory for the processing parameters of multiple processing methods, the super pointer can uniformly plan the memory space according to the requirements of different processing parameters, avoiding chaos and conflicts in memory allocation. When the first processing method finishes processing and returns the first processing result, the address space occupied by the second pointer can be released based on the super pointer, that is, when releasing memory, the super pointer can also release the address spaces occupied by multiple small pointers at one time, improving the efficiency of memory release.
[0104] It should be noted that for the details not described in this embodiment, please refer to the implementation details of the foregoing embodiment.
[0105] Continue to refer to Figure 6 , in the logical implementation part, it includes two modules, "M1.c" and "M2.c", which can represent the specific function implementation code to implement the first processing method and the second processing method. In the module "M1.c", it can interact with or depend on the module "M2.c" through "M2_pcs". In the parameter definition part, the first pointer ptr1 and the second pointer ptr2 are managed by the super pointer ptr. Among them, the first pointer ptr1 points to the structure "M1.h" corresponding to the module "M1.c", and the second pointer ptr2 points to the structure "M2.h" corresponding to the module "M2.c", and the structure parameters "struct M1" and "struct M2" are respectively defined. The two structures can also include the parameters "p1" and "p2" inside. In the parameter loading part, it can include "M1cfg.c" and "M2cfg.c", which are respectively responsible for loading and configuring the parameters required by the "M1" and "M2" modules.
[0106] It can be understood that by jointly managing the first pointer and the second pointer through the super pointer, and even managing multiple small pointers respectively pointing to different address spaces, memory allocation and release operations can be performed at a centralized location, making memory allocation and release more centralized and efficient.
[0107] Figure 7 The block diagram of the first processing device according to an embodiment of the present disclosure is schematically shown.
[0108] As Figure 7 shown, the first processing device 700 includes an acquisition module 710, a parallel processing module 720, a third processing module 730, and a determination module 740.
[0109] According to some embodiments of the present disclosure, the first processing device 700 can be used to implement the first processing method according to the embodiment of the present disclosure described with reference to Figures 3 to 5 the description.
[0110] The acquisition module 710 can execute, for example, operation S310 to acquire the data to be processed.
[0111] The parallel processing module 720 can execute, for example, operation S320 to perform a first processing on the data to be processed based on the first processing method to obtain a first processing result, and perform a second processing on the data to be processed based on the second processing method to obtain a second processing result, where the first processing method is different from the second processing method.
[0112] The third processing module 730 may execute, for example, operation S330 to perform a third processing on the first processing result and the second processing result based on a third processing method, so as to obtain a third processing result.
[0113] The determination module 740 may execute, for example, operation S340 to use the third processing result as the common processing result of the first processing method and the second processing method.
[0114] For example, any plurality of the acquisition module 710, the parallel processing module 720, the third processing module 730, and the determination module 740 may be combined and implemented in one module, or any one of them may be split into multiple modules. Or, at least part of the functions of one or more of these modules may be combined with at least part of the functions of other modules and implemented in one module. According to an embodiment of the present disclosure, at least one of the acquisition module 710, the parallel processing module 720, the third processing module 730, and the determination module 740 may be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on chip, a system on substrate, a system on package, an application specific integrated circuit (ASIC), or may be implemented by any other reasonable manner such as integrating or packaging circuits, etc., in hardware or firmware, or implemented in any one of the three implementation manners of software, hardware, and firmware, or in an appropriate combination of any several of them. Or, at least one of the acquisition module 710, the parallel processing module 720, the third processing module 730, and the determination module 740 may be at least partially implemented as a computer program module, and when the computer program module runs, it may execute corresponding functions.
[0115] Figure 8 The block diagram of a second processing device according to an embodiment of the present disclosure is schematically shown.
[0116] As Figure 8 shown, the second processing device 800 includes a declaration module 810, a call module 820, and a release module 830.
[0117] According to some embodiments of the present disclosure, the second processing device 800 may be used to implement the second processing method according to the embodiment of the present disclosure described with reference to Figure 6 the description.
[0118] The declaration module 810 may execute, for example, operation S610 to, in response to a data processing request, obtain data to be processed, initialize the processing logic of the first processing method, declare a super pointer and a first pointer within the processing logic, and point the super pointer to the address of the first pointer.
[0119] The calling module 820 may perform, for example, operation S620 to perform a first processing on the data to be processed based on a first processing method, obtain a first processing result, and determine to call a second processing method based on a first processing logic. When the second processing method is called, a first pointer is pointed to a first address space, and the first address space is used to store second processing parameters corresponding to the second processing method. The first processing method is different from the second processing method.
[0120] The releasing module 830 may perform, for example, operation S630 to release, in response to the second processing method returning a second processing result, the address space occupied by the first pointer. The second processing result is obtained by the second processing method performing a second processing on the data to be processed.
[0121] For example, any combination of the declaration module 810, the calling module 820, and the releasing module 830 may be combined and implemented in one module, or any one of them may be split into multiple modules. Or, at least part of the functions of one or more of these modules may be combined with at least part of the functions of other modules and implemented in one module. According to an embodiment of the present disclosure, at least one of the declaration module 810, the calling module 820, and the releasing module 830 may be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on chip, a system on a substrate, a system in a package, an application specific integrated circuit (ASIC), or any other reasonable way of integrating or packaging circuits, etc., implemented by hardware or firmware, or implemented in any one of the three implementation manners of software, hardware, and firmware, or in an appropriate combination of any several of them. Or, at least one of the declaration module 810, the calling module 820, and the releasing module 830 may be at least partially implemented as a computer program module, and when the computer program module is run, corresponding functions may be executed.
[0122] It should be understood that in the embodiments of the present disclosure, the processing device corresponds to the processing method part in the embodiments of the present disclosure, and their specific implementation details are also the same, and will not be described in detail here.
[0123] It should be noted that in the technical solution of the present disclosure, the processing of the user's personal information involved, such as collection, storage, use, processing, transmission, provision, disclosure, and application, all comply with the provisions of relevant laws and regulations, take necessary confidentiality measures, and do not violate public order and good customs. In the technical solution of the present disclosure, before obtaining or collecting the user's personal information, the authorization or consent of the user has been obtained.
[0124] Figure 9 A block diagram of an electronic device suitable for implementing a processing method according to an embodiment of the present disclosure is schematically shown.
[0125] AsFigure 9 As shown, the electronic device 900 according to an embodiment of the present disclosure includes a processor 901, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 902 or a program loaded from a storage section 908 into a random access memory (RAM) 903. The processor 901 may include, for example, a general-purpose microprocessor (such as a CPU), an instruction set processor, and / or a related chipset, and / or a dedicated microprocessor (such as an application-specific integrated circuit (ASIC)), etc. The processor 901 may also include on-board memory for caching purposes. The processor 901 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present disclosure.
[0126] In the RAM 903, various programs and data required for the operation of the electronic device 900 are stored. The processor 901, the ROM 902, and the RAM 903 are connected to each other via a bus 904. The processor 901 performs various operations of the method flow according to an embodiment of the present disclosure by executing programs in the ROM 902 and / or the RAM 903. It should be noted that the program may also be stored in one or more memories other than the ROM 902 and the RAM 903. The processor 901 may also perform various operations of the method flow according to an embodiment of the present disclosure by executing programs stored in the one or more memories.
[0127] According to an embodiment of the present disclosure, the electronic device 900 may further include an input / output (I / O) interface 905, and the input / output (I / O) interface 905 is also connected to the bus 904. The electronic device 900 may further include one or more of the following components connected to the I / O interface 905: an input section 906 including a keyboard, a mouse, etc.; an output section 907 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc. and a speaker, etc.; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN card, a modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the I / O interface 905 as needed. A removable medium 911, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 910 as needed so that a computer program read from it can be installed into the storage section 908 as needed.
[0128] The present disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the foregoing embodiments; or may exist independently without being assembled into the device / apparatus / system. The foregoing computer-readable storage medium carries one or more programs, and when the one or more programs are executed, the methods according to the embodiments of the present disclosure are implemented.
[0129] According to an embodiment of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium, and may include, for example, but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In the present disclosure, the computer-readable storage medium may be any tangible medium that contains or stores a program, and the program may be used by or in combination with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present disclosure, the computer-readable storage medium may include the ROM 902 and / or the RAM 903 described above and / or one or more memories other than the ROM 902 and the RAM 903.
[0130] Embodiments of the present disclosure also include a computer program product, which includes a computer program that contains program code for executing the method shown in the flowchart. When the computer program product runs in a computer system, the program code is used to cause the computer system to implement the processing method provided by the embodiments of the present disclosure.
[0131] When the computer program is executed by the processor 901, the above functions defined in the system / apparatus of the embodiments of the present disclosure are executed. According to an embodiment of the present disclosure, the foregoing systems, apparatuses, modules, units, etc. may be implemented by computer program modules.
[0132] In one embodiment, the computer program may rely on tangible storage media such as optical storage devices and magnetic storage devices. In another embodiment, the computer program may also be transmitted and distributed in the form of a signal on a network medium, and is downloaded and installed through the communication part 909, and / or installed from the removable medium 911. The program code included in the computer program may be transmitted by any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.
[0133] In such an embodiment, the computer program can be downloaded and installed from a network through the communication section 909, and / or installed from the removable medium 911. When the computer program is executed by the processor 901, the above-described functions defined in the system of the embodiments of the present disclosure are performed. According to the embodiments of the present disclosure, the above-described systems, devices, apparatuses, modules, units, etc. can be implemented by computer program modules.
[0134] According to the embodiments of the present disclosure, the program code for executing the computer program provided by the embodiments of the present disclosure can be written in any combination of one or more programming languages. Specifically, these computing programs can be implemented using high-level procedures and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages include, but are not limited to, such as Java, C++, Python, the "C" language, or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, by connecting through the Internet using an Internet service provider).
[0135] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the above-mentioned module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and combinations of blocks in the block diagram or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.
[0136] Those skilled in the art can understand that the features recited in the various embodiments and / or claims of the present disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly recited in the present disclosure. In particular, without departing from the spirit and teachings of the present disclosure, the features recited in the various embodiments and / or claims of the present disclosure can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present disclosure.
[0137] The embodiments of the present disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments have been described separately above, this does not mean that the measures in each embodiment cannot be used advantageously in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present disclosure.
Claims
1. A first processing method, comprising: Obtaining data to be processed; Performing a first processing on the data to be processed based on a first processing manner to obtain a first processing result, and performing a second processing on the data to be processed based on a second processing manner to obtain a second processing result, wherein the first processing manner is different from the second processing manner; Performing a third processing on the first processing result and the second processing result based on a third processing manner to obtain a third processing result; Taking the third processing result as the common processing result of the first processing manner and the second processing manner.
2. The method according to claim 1, before performing a first processing on the data to be processed based on a first processing manner to obtain a first processing result, and performing a second processing on the data to be processed based on a second processing manner to obtain a second processing result, the method further comprises: In response to obtaining the data to be processed, when it is determined that the preprocessing manners of the first processing manner and the second processing manner match, processing the data to be processed based on a target preprocessing manner and reusing it as the data to be processed, where the target preprocessing manner is any one of the preprocessing manners of the first processing manner and the second processing manner.
3. The method according to claim 1, the method further comprises: Performing a fourth processing on the data to be processed based on a fourth processing manner to obtain a fourth processing result, wherein the type of the fourth processing result is different from the type of the first processing result and / or the type of the second processing result; Taking the fourth processing result as the separate processing result of the fourth processing manner.
4. The method according to claim 3, the method further comprises: Determining the processing order of each processing manner according to the types of data processed corresponding to the first processing manner, the second processing manner, the third processing manner and the fourth processing manner, wherein the data processed corresponding to the first processing manner and the second processing manner is the data to be processed; Among each processing manner, the processing manners with the same type of processed data are executed in parallel.
5. The method according to claim 1, the method further comprises: If the end time of the first processing manner is earlier than the end time of the second processing manner, and the third processing result is obtained by processing the first processing result and the second processing result respectively based on the third processing manner, then setting the start time of processing the first processing result based on the third processing manner to be earlier than the start time of processing the second processing result based on the third processing manner.
6. The method according to claim 4, the method further comprises: Determining the delay parameters corresponding to the first processing manner, the second processing manner, the third processing manner and the fourth processing manner respectively based on the processing order of each processing manner; Merging the third processing result and the fourth processing result at the same moment based on each of the delay parameters.
7. A second processing method, comprising: In response to a data processing request, obtain the data to be processed, and initialize the processing logic of the first processing method. Declare a super pointer and a first pointer within the processing logic, and point the super pointer to the address of the first pointer. Perform a first processing on the data to be processed based on the first processing method to obtain a first processing result, and determine to call a second processing method based on the first processing logic. When the second processing method is called, point the first pointer to a first address space, where the first address space is used to store the second processing parameters corresponding to the second processing method, and the first processing method is different from the second processing method. In response to the second processing method returning a second processing result, release the address space occupied by the first pointer based on the super pointer, where the second processing result is obtained by the second processing method performing a second processing on the data to be processed.
8. The processing method according to claim 7, the method further comprising: Declare a second pointer, and point the super pointer to the address of the second pointer. Point the second pointer to a second address space, where the second address space is used to store the first processing parameters corresponding to the first processing method. In response to the first processing method returning a first processing result, release the address space occupied by the second pointer based on the super pointer.
9. A first processing device, comprising: An acquisition module, configured to acquire the data to be processed. A parallel processing module, configured to perform a first processing on the data to be processed based on a first processing method to obtain a first processing result, and perform a second processing on the data to be processed based on a second processing method to obtain a second processing result, where the first processing method is different from the second processing method. A third processing module, configured to perform a third processing on the first processing result and the second processing result based on a third processing method to obtain a third processing result. A determination module, configured to use the third processing result as the common processing result of the first processing method and the second processing method.
10. A second processing device, comprising: A declaration module, configured to, in response to a data processing request, acquire the data to be processed, and initialize the processing logic of a first processing method. Declare a super pointer and a first pointer within the processing logic, and point the super pointer to the address of the first pointer. A call module, configured to perform a first processing on the data to be processed based on the first processing method to obtain a first processing result, and determine to call a second processing method based on the first processing logic. When the second processing method is called, point the first pointer to a first address space, where the first address space is used to store the second processing parameters corresponding to the second processing method, and the first processing method is different from the second processing method. A release module, configured to, in response to the second processing method returning a second processing result, release the address space occupied by the first pointer based on the super pointer, where the second processing result is obtained by the second processing method performing a second processing on the data to be processed.