Memory early mapping method, device, equipment and storage medium
By dynamically adjusting the L2 page table mapping of the Jailhouse virtual machine monitor, the problem of insufficient memory space in multi-CPU scenarios is solved, ensuring the normal startup of the Jailhouse system and expanding the scope of application.
Patent Information
- Application Number
- CN202510742215.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-05
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2045-06-05
AI Technical Summary
In jailhouse systems, insufficient memory space mapping due to a large number of processors can cause the system to fail to boot normally. This is especially true in multi-CPU scenarios like servers, where insufficient memory space can lead to per-CPU data access failures.
By determining the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the Jailhouse virtual machine monitor initialization, obtaining the size of the percpu variable copy data structure, and judging whether the currently configured number of CPUs exceeds the maximum supported number, and if it exceeds, determining the additional memory space required based on the currently configured number of CPUs, the maximum number of supported CPUs, and the size of the percpu variable copy data structure, converting it into the number of newly added page table entries, and adding the corresponding page table entries in the original L2 page table as the newly added mapping area.
On-demand mapping of memory space is implemented to ensure that Jailhouse can start normally when initializing the CPU in the early stage, avoiding initialization failures due to insufficient mapping, and at the same time avoiding unnecessary memory waste, thus expanding the scope of application of Jailhouse.
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Figure CN120256336B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of jailhouse technology, and in particular to a memory early mapping method, device, equipment and storage medium. Background Art
[0002] Jailhouse is a Linux-based partitioned virtual machine manager that uses cells to configure virtualization features of hardware such as the CPU. A cell is a description of system hardware resources, written in C language syntax. Cells are divided into root cells and non-root cells. There is only one root cell, which controls system hardware resources. Non-root cells can have multiple cells and draw system resources from the root cell. CPU or memory resources can be allocated to non-root cells. Each cell can run its own applications or services, providing a high degree of isolation.
[0003] Jailhouse establishes an isolated domain with direct access to physical resources, eliminating the need for emulation or paravirtualization, achieving high performance. It not only retains the versatility of the Linux operating system but also leverages its simplicity to make it easier to run secure and real-time workloads in an isolated domain.
[0004] Each CPU needs to be initialized early in the Jailhouse startup. When EL2 is initialized, a temporary page table needs to be created to prepare for turning on the MMU in EL2. After turning on the MMU, the CPU will use virtual addresses for access, set up the final exception vector table, and initialize the CPU stack and other data.
[0005] In the process of implementing the present invention, the inventors discovered the following problem: the 2MB space mapped by the above method cannot meet the requirements in scenarios with a large number of CPUs, such as servers, and will be stretched. Ultimately, due to the unmapped space behind, the subsequent percpu data access fails, which in turn causes the Jailhouse startup to fail. Summary of the Invention
[0006] Embodiments of the present invention provide a memory early mapping method, apparatus, device and storage medium to solve the technical problem in the prior art that a jailhouse system cannot start normally due to the large number of processors affecting space mapping.
[0007] In a first aspect, an embodiment of the present invention provides a memory early mapping method, comprising:
[0008] Determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initialized by the Jailhouse virtual machine monitor;
[0009] Get the size of the percpu variable copy data structure;
[0010] Get the number of CPUs currently configured on the Jailhouse virtual machine monitor and determine whether the number of currently configured CPUs exceeds the maximum number of supported CPUs.
[0011] When it exceeds the limit, the additional memory space required is determined based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure;
[0012] Convert the required memory space into the number of new page table entries;
[0013] According to the number of newly added page table entries, corresponding page table entries are added to the original L2 page table as a newly added mapping area.
[0014] In a second aspect, an embodiment of the present invention further provides a memory early mapping device, comprising:
[0015] A determination module, configured to determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initially formed by the Jailhouse virtual machine monitor;
[0016] Get module, used to get the size of percpu variable copy data structure;
[0017] A judgment module is used to obtain the number of CPUs currently configured in the Jailhouse virtual machine monitor and determine whether the number of CPUs currently configured exceeds the maximum number of supported CPUs;
[0018] An additional memory space determination module, used to determine the additional required memory space based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure when the number is exceeded;
[0019] A conversion module, used for converting the required memory space into the number of newly added page table entries;
[0020] As a module, it is used to add corresponding page table entries in the original L2 page table as a newly added mapping area according to the number of newly added page table entries.
[0021] In a third aspect, an embodiment of the present invention provides a device, including:
[0022] Multiple processors;
[0023] a storage device for storing one or more programs,
[0024] When the one or more programs are executed by the multiple processors, the multiple processors implement any one of the memory early mapping methods provided in the above embodiments.
[0025] In a fourth aspect, an embodiment of the present invention further provides a storage medium comprising computer executable instructions, which, when executed by a computer processor, are used to execute the memory early mapping method provided in the above embodiment.
[0026] The memory early mapping method, device, equipment and storage medium provided by the embodiment of the present invention are as follows: determining the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor; obtaining the size of the percpu variable copy data structure; obtaining the number of CPUs currently configured by the Jailhouse virtual machine monitor, and judging whether the number of CPUs currently configured exceeds the maximum number of supported CPUs; if it exceeds, determining the additional memory space required based on the number of CPUs currently configured, the maximum number of supported CPUs and the size of the percpu variable copy data structure; converting the required memory space into the number of newly added page table entries; adding corresponding page table entries in the original L2 page table as newly added mapping areas based on the number of newly added page table entries. The maximum number of CPUs currently supported is determined by the memory space mapped by the initialized L2 page table, and based on the difference between the number of currently configured CPUs and the maximum number of CPUs currently supported, the percpu variable copy data structure required by each CPU during initialization is used to calculate the additional memory space required, and convert the required space into the number of newly added page table entries, and use it as a newly added mapping area to accommodate the extra CPUs and the percpu variable copy data structure. Ensure that all spaces that need to be accessed are started in early mapping. This allows the Jailhouse to initialize the CPU normally in the early stages, without initialization failures due to lack of mapping, and without waste due to extra mapping. It achieves on-demand mapping and expands the applicability of the Jailhouse. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings:
[0028] Figure 1 1 is a flow chart of a memory early mapping method provided in the first embodiment of the present invention;
[0029] Figure 2 1 is a flow chart of a memory early mapping method provided in the second embodiment of the present invention;
[0030] Figure 3Schematic diagram of the structure of the memory early mapping device provided in the third embodiment of the present invention;
[0031] Figure 4 It is a structural diagram of the device provided by the fourth embodiment of the present invention. DETAILED DESCRIPTION
[0032] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.
[0033] Example 1
[0034] Figure 1 This is a flowchart of a method for early memory mapping provided in Example 1 of the present invention. This embodiment is applicable to the case where a jailhouse is initialized to establish a corresponding mapped memory space for a CPU. This method can be executed by an early memory mapping device and specifically includes the following steps:
[0035] Step 110: Determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initialized by the Jailhouse virtual machine monitor.
[0036] Memory Address Mapping generally refers to the correspondence between virtual addresses and physical addresses. It is mainly used to manage and optimize the allocation and use of system memory. It is usually used during system startup or before a module is used. After establishing the mapping and enabling the MMU, the CPU will use virtual addresses for access instead of directly operating physical memory, which improves memory usage efficiency, simplifies memory management, and enhances security.
[0037] During the early boot process, Jailhouse creates a simple page table for temporary initialization. It creates three levels of page tables for use by the hypervisor, trampoline, and UART. A global directory, Level 0 (L0), is created and shared. Two L1 tables and one L2 page table are created. The UART and hypervisor share the same L2 page table. Each page table occupies one page of memory, and each page table entry occupies 8 bytes. Each page table can hold 512 entries, and each page table entry maps a 2MB block of memory. Jailhouse only stores one page table entry in the L2 page table for the hypervisor, mapping a fixed 2MB of memory. In general use cases, this temporary 2MB of memory is sufficient, allowing the CPU to access all data. However, in scenarios with multiple CPUs, such as servers, this 2MB of memory is insufficient and may lead to data insufficiency. Ultimately, due to the unmapped space behind the per-CPU access, subsequent per-CPU data access fails, causing Jailhouse startup failure.
[0038] Therefore, in this embodiment, the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initially formed by the Jailhouse virtual machine monitor is first determined.
[0039] Because the initial memory size of the jailhouse's L2 page table mapping is not fixed, it is typically determined dynamically based on the page granularity configuration (4KB / 2MB), hardware architecture (32 / 64-bit), and system requirements. Based on the memory space mapped by the L2 page table, the maximum number of CPUs that can be supported by the currently initialized L2 page table mapping memory space is calculated.
[0040] Step 120: Get the size of the percpu variable replica data structure.
[0041] Since the Jailhouse virtual machine monitor's CPU initialization definition and allocation data structure is a static scenario and is affected by the consistency of alignment constraints, for the hardware system corresponding to the Jailhouse virtual machine monitor, the size of the percpu variable copy data structure corresponding to each CPU is the same and fixed.
[0042] Exemplarily, the method may include: searching for the start address and the end address of the percpu data in the assembly macro definition related to the CPU variable; and calculating the size of the percpu variable copy data structure according to the end address and the start address.
[0043] For example: CPU variable-related assembly macro definitions are usually generated through linker scripts, which are used to mark the total size of the segment:
[0044] ldCopy Code
[0045] .data..percpu : {
[0046] __per_cpu_start = .;
[0047] *(.data..percpu)
[0048] __per_cpu_end = .;
[0049] }
[0050] Therefore, the size of the percpu variable copy data structure can be calculated as follows: per_cpu_end - per_cpu_star.
[0051] Step 130: Obtain the number of CPUs currently configured on the jailhouse virtual machine monitor, and determine whether the number of CPUs currently configured exceeds the maximum number of supported CPUs.
[0052] For example, the current system CPU topology and the number of CPUs allocated to each cell can be viewed through the Jailhouse command line tool, or the number of CPUs currently in use can be determined by parsing the cell configuration file.
[0053] After obtaining the number of CPUs currently configured for the Jailhouse virtual machine monitor, it can be compared with the maximum number of supported CPUs obtained in the previous step.
[0054] Step 140 : When the number of CPUs exceeds the limit, determine the additional memory space required based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure.
[0055] If the number of currently configured CPUs exceeds the maximum number of supported CPUs in the comparison result, the additional memory space required needs to be determined based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure. For example, this can be calculated and determined as follows:
[0056] MEM=((N-NUM)*PERCPU_SIZE) / 1024 / 1024, in MB;
[0057] Among them, MEM is the additional memory space required, N is the number of currently configured CPUs, NUM is the maximum number of supported CPUs, and PERCPU_SIZE is the size of the percpu variable copy data structure.
[0058] By using the above method, the memory space required by the unmapped CPU can be determined.
[0059] Step 150: Convert the required memory space into the number of newly added page table entries.
[0060] Since Jailhouse uses the L2 page table to initially map the memory space, the required memory space can be converted into the number of newly added page table entries.
[0061] Exemplarily, it can be implemented in the following manner: the number of page table entries PAGE_NUM that need to be added for mapping is calculated according to the excess space size, where PAGE_NUM=MEM / 2+1.
[0062] Since the initial mapping memory space of the jailhouse's L2 page table is usually 2M in a common architecture combined with the page granularity configuration, the required memory space can be divided by 2 and added to the base number to obtain the number of page table entries PAGE_NUM to add the mapping.
[0063] Step 160 : Add corresponding page table entries in the original L2 page table as a newly added mapping area according to the number of newly added page table entries.
[0064] Exemplarily, it may include: adding a virtual address and a physical address corresponding to the newly added page table entry based on the newly added page table entry; obtaining the index of the virtual address in the page table entry; and adding a new page table entry to the corresponding physical address in the L2 page table as a newly added mapping area according to the index.
[0065] Since it is a newly added page table entry, it is slightly different from the normal allocation during initialization. For example, it is necessary to first redetermine the virtual address that needs to be memory mapped based on the memory range corresponding to the newly added page table entry and the base address in the L1 table. It is not determined by the last virtual address of the original allocation. After determining the virtual address, determine the corresponding physical address. Re-establish the corresponding index in the page table entry, and add a new page table entry to the corresponding physical address in the L2 page table according to the index as a newly added mapping area. Using the above method, it is possible to dynamically add L2 page table entries in the Jailhouse virtual machine monitor. In addition, the L2 page table entries can be dynamically and flexibly adjusted according to the actual number of CPUs, realizing on-demand mapping.
[0066] This embodiment determines the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor; obtains the size of the percpu variable copy data structure; obtains the number of CPUs currently configured by the Jailhouse virtual machine monitor, and determines whether the number of currently configured CPUs exceeds the maximum number of supported CPUs; if it exceeds, determines the additional required memory space based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable copy data structure; converts the required memory space into the number of newly added page table entries; and adds corresponding page table entries in the original L2 page table as newly added mapping areas based on the number of newly added page table entries. The maximum number of CPUs currently supported is determined by the memory space mapped by the initialized L2 page table, and based on the difference between the currently configured number of CPUs and the maximum number of CPUs currently supported, the percpu variable copy data structure required for each CPU during initialization is used to calculate the additional required memory space, and converts the required space into the number of newly added page table entries, and uses it as a newly added mapping area to accommodate the extra CPUs and the percpu variable copy data structure. Ensure that all spaces that need to be accessed are mapped early. This allows the Jailhouse to initialize the CPU normally in the early stages, without initialization failures due to lack of mapping, and without waste due to extra mapping. It achieves on-demand mapping and expands the applicability of the Jailhouse.
[0067] In a preferred implementation of this embodiment, the method may further include the following step: if the number of pages is not exceeded, maintaining the original L2 page table mapping table. Using this approach, initialization can be performed according to the original L2 page table mapping table without affecting normal initialization, thus achieving on-demand allocation.
[0068] Example 2
[0069] Figure 2It is a flow chart of the memory early mapping method provided in the second embodiment of the present invention. This embodiment is optimized based on the above embodiment, and the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor can be specifically optimized as follows: determining the estimated number of the maximum supported CPUs; determining the embedding point according to the estimated number; embedding the normal return code at the embedding point in the Jailhouse entry code; when the return point can return normally, adjusting the position of the embedding point to the middle position from the embedding point to the end of the entry code; otherwise, adjusting the position of the embedding point to the position from the entry code to the embedding point; returning to the step of adjusting the position of the embedding point to the middle position from the embedding point to the end of the entry code, until the distance between the previous embedding point and the current embedding point is less than the preset distance; determining the maximum number of supported CPUs according to the position of the previous embedding point.
[0070] See also Figure 2 , the memory early mapping method includes:
[0071] Step 210: Determine the estimated number of the maximum supported CPUs, determine an embedding point based on the estimated number, and embed a normal return code at the embedding point in the jailhouse entry code.
[0072] In this embodiment, since the initial memory size of the jailhouse's L2 page table is not fixed, the maximum number of supported CPUs can only be estimated based on the common memory size of the initial L2 page table mapping. However, the exact maximum number of supported CPUs cannot be determined.
[0073] Because the startup failure occurs during the assembly process, it's often impossible to pinpoint the specific cause and location of the crash, making it difficult for developers to identify the issue. Therefore, in this embodiment, a method is employed to determine the maximum number of supported CPUs using a specialized debugger. For example, the maximum supported number can be estimated by initially mapping memory space using a commonly used L2 page table.
[0074] An embedding point is determined based on the estimated number. For example, when the Jailhouse virtual machine monitor is initialized, each CPU needs to enter the arch_entry assembly code. An embedding point can be set in the arch_entry assembly code of CPU N corresponding to the maximum supported number, where N is the corresponding CPU code, which can be obtained by adding 2 to the maximum supported number. That is, an embedding point is set in the CPU after the last CPU that may be supported, and a normal return code is embedded. The normal return code can be a return statement, that is, when the assembly code can run normally, a value is returned to confirm that the code is running normally, otherwise, no value is returned.
[0075] By using this method, it can be determined whether the memory space mapped by the current L2 page table can support the maximum CPU and whether it is the number of the CPU corresponding to the embedding point.
[0076] Step 220, when the return point can return normally, adjust the position of the embedded point to the middle position from the embedded point to the end of the entry code; otherwise, adjust the position of the embedded point to the position from the entry code to the embedded point.
[0077] If the return point can return normally, it means that the CPU corresponding to the embedded point can be supported by the memory space mapped by the L2 page table. Therefore, it is necessary to readjust the embedded point and adjust the position of the embedded point to the middle position between the embedded point and the end of the entry code. In order to gradually narrow the corresponding search range. Since the assembly language cannot support multiple embedded points, the inventor adopts the above-mentioned method of gradually narrowing the range in an attempt to determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor as soon as possible. If it cannot return normally, it means that a crash has occurred in the previous section. Therefore, the search area is limited to the middle position from the startup entry to the current embedded point.
[0078] Step 230, returns to the step of adjusting the position of the embedding point to the middle position between the embedding point and the end of the entry code, until the distance between the previous embedding point and the current embedding point is less than the preset distance.
[0079] Repeat the above steps, gradually narrowing the search range until the distance between the previous embedding point and the current embedding point is less than a preset distance, which can be the code distance between two adjacent CPUs entering the arch_entry assembly code. Using the above method, the last CPU that can start and initialize normally can be determined.
[0080] Step 240: Determine the maximum number of supported CPUs based on the location of the previous embedding point.
[0081] For example, the maximum number of supported CPUs may be determined by the number of the CPU corresponding to the previous embedding point.
[0082] Step 250: Get the size of the percpu variable copy data structure.
[0083] Step 260: Obtain the number of CPUs currently configured on the jailhouse virtual machine monitor, and determine whether the number of CPUs currently configured exceeds the maximum number of supported CPUs.
[0084] Step 270 : When the number of CPUs exceeds the limit, determine the additional memory space required based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure.
[0085] Step 280: Convert the required memory space into the number of newly added page table entries, and add corresponding page table entries in the original L2 page table as the newly added mapping area according to the number of newly added page table entries.
[0086] This embodiment optimizes the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor as follows: determining the estimated number of the maximum supported CPUs, determining the embedding point based on the estimated number, and embedding the normal return code in the Jailhouse entry code; when the return point can return normally, adjusting the position of the embedding point to the middle position between the embedding point and the end of the entry code; otherwise, adjusting the position of the embedding point to the position of the entry code to the embedding point; returning to the step of adjusting the position of the embedding point to the middle position between the embedding point and the end of the entry code until the distance between the previous embedding point and the current embedding point is less than the preset distance; and determining the maximum number of supported CPUs based on the position of the previous embedding point. The maximum number of supported CPUs can be accurately determined through a special debug program according to actual conditions. At the same time, it avoids startup failures occurring in the assembly program stage, and developers cannot obtain the specific reasons for the startup failure due to the inability to map. Not only does it improve the efficiency of determination, but it can also effectively eliminate the causes of startup failures.
[0087] Example 3
[0088] Figure 3 This is a schematic diagram of the structure of the memory early mapping device provided by the third embodiment of the present invention, see Figure 3 , the memory early mapping device comprises:
[0089] A determination module 310 is configured to determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initially formed by the Jailhouse virtual machine monitor;
[0090] An acquisition module 320 is used to obtain the size of the percpu variable replica data structure;
[0091] The determination module 330 is configured to obtain the number of CPUs currently configured in the jailhouse virtual machine monitor and determine whether the number of CPUs currently configured exceeds the maximum number of supported CPUs;
[0092] an additional memory space determination module 340 for determining the additional memory space required based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure when exceeded;
[0093] A conversion module 350 is used to convert the required memory space into the number of newly added page table entries;
[0094] As module 360, it is used to add corresponding page table entries in the original L2 page table as a newly added mapping area according to the number of newly added page table entries.
[0095] The memory early mapping device provided in this embodiment determines the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the initialization of the Jailhouse virtual machine monitor; obtains the size of the percpu variable copy data structure; obtains the number of CPUs currently configured by the Jailhouse virtual machine monitor, and determines whether the number of CPUs currently configured exceeds the maximum number of supported CPUs; when exceeded, determines the additional required memory space based on the number of CPUs currently configured, the maximum number of supported CPUs, and the size of the percpu variable copy data structure; converts the required memory space into the number of newly added page table entries; and adds corresponding page table entries in the original L2 page table as newly added mapping areas based on the number of newly added page table entries. The maximum number of CPUs currently supported is determined by the memory space mapped by the initialized L2 page table, and based on the difference between the number of currently configured CPUs and the maximum number of CPUs currently supported, the percpu variable copy data structure required for each CPU during initialization is used to calculate the additional required memory space, and converts the required space into the number of newly added page table entries, and uses it as a newly added mapping area to accommodate the extra CPUs and the percpu variable copy data structure. Ensure that all spaces that need to be accessed are started in early mapping. This allows the Jailhouse to initialize the CPU normally in the early stages, without initialization failures due to lack of mapping, and without waste due to extra mapping. It achieves on-demand mapping and expands the applicability of the Jailhouse.
[0096] Based on the above embodiments, the modules include:
[0097] an adding unit, configured to add a virtual address and a physical address corresponding to the page table entry based on the newly added page table entry;
[0098] An acquiring unit, configured to acquire an index of the virtual address in a page table entry;
[0099] As a unit, it is used to add a new page table entry to the corresponding physical address in the L2 page table as a newly added mapping area according to the index.
[0100] Based on the above embodiments, the device further includes:
[0101] The maintaining module is used to maintain the original L2 page table mapping table when it is not exceeded.
[0102] Based on the above embodiments, the determining module includes:
[0103] Estimated number determination unit, used to determine the estimated number of the maximum supported CPUs
[0104] An embedding unit is used to determine an embedding point according to the estimated quantity, and embed a normal return code at the embedding point in the jailhouse entrance code;
[0105] An adjustment unit, for adjusting the position of the embedded point to a middle position between the embedded point and the end of the entry code when the return point can return normally;
[0106] Otherwise, adjust the position of the embedding point to the position from the entry code to the embedding point;
[0107] a return unit, configured to return to the step of adjusting the position of the embedding point to an intermediate position between the embedding point and the end of the entry code, until the distance between the previous embedding point and the current embedding point is less than a preset distance;
[0108] The determination unit is used to determine the maximum number of supported CPUs according to the position of the previous embedding point.
[0109] Based on the above embodiments, the acquisition module includes:
[0110] A search unit is used to search the starting address and ending address of percpu data in the assembly macro definition related to CPU variables;
[0111] A calculation unit is used to calculate the size of the percpu variable copy data structure according to the end address and the start address.
[0112] Based on the above embodiments, the additional memory space determination module is implemented in the following manner:
[0113] MEM=((N-NUM)*PERCPU_SIZE) / 1024 / 1024, in MB;
[0114] Among them, MEM is the additional memory space required, N is the number of currently configured CPUs, NUM is the maximum number of supported CPUs, and PERCPU_SIZE is the size of the percpu variable copy data structure.
[0115] Based on the above embodiments, the conversion module is implemented in the following manner:
[0116] Calculate the number of page table entries PAGE_NUM that need to be added based on the size of the excess space, PAGE_NUM=MEM / 2+1.
[0117] The memory early mapping device provided in the embodiment of the present invention can execute the memory early mapping method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0118] Example 4
[0119] Figure 4 A schematic structural diagram of a device provided in Example 4 of the present invention. Figure 4 A block diagram of an exemplary device 12 suitable for use in implementing embodiments of the present invention is shown. Figure 4 The device 12 shown is only an example and should not bring any limitation to the functionality and scope of use of the embodiments of the present invention.
[0120] like Figure 4 As shown, device 12 is implemented as a general-purpose computing device. Components of device 12 may include, but are not limited to, one or more processors or processing units 16, a system memory 28, and a bus 18 that connects various system components (including system memory 28 and processing unit 16).
[0121] Bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures. Examples of these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.
[0122] Device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by device 12, including volatile and non-volatile media, removable and non-removable media.
[0123] System memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. Device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be configured to read and write non-removable, non-volatile magnetic media ( Figure 4 Not shown, usually called a "hard drive"). Although Figure 4Although not shown, a magnetic disk drive for reading and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), as well as an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 18 via one or more data media interfaces. Memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of various embodiments of the present invention.
[0124] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in memory 28. Such program modules 42 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may include an implementation of a network environment. Program modules 42 generally implement the functions and / or methodologies of the embodiments described herein.
[0125] Device 12 may also communicate with one or more external devices 14 (e.g., a keyboard, pointing device, display 24, etc.), one or more terminals that enable a user to interact with device 12, and / or any device that enables device 12 to communicate with one or more other computing terminals (e.g., a network card, a modem, etc.). This communication may occur via input / output (I / O) interface 22. Furthermore, device 12 may communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network such as the Internet) via network adapter 20. As shown, network adapter 20 communicates with other modules of device 12 via bus 18. It should be understood that, although not shown, other hardware and / or software modules may be used in conjunction with device 12, including but not limited to microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.
[0126] The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, such as implementing the display adjustment method based on the modal window provided in the embodiment of the present invention.
[0127] Example 5
[0128] The fifth embodiment of the present invention further provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to execute any of the memory early mapping methods provided in the above embodiments.
[0129] The computer storage medium of the embodiments of the present invention may adopt any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device, or device.
[0130] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.
[0131] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
[0132] Computer program code for performing the operations of the present invention may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0133] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions are possible for those skilled in the art without departing from the scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present invention. The scope of the present invention is determined by the scope of the appended claims.
Claims
1. A memory early mapping method, characterized in that: include: Determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the Jailhouse virtual machine monitor initialization. Address mapping refers to the correspondence between virtual addresses and physical addresses. The mapping is established during system startup or before the module is used. The L2 page table maps 2MB of space. Get the size of the percpu variable copy data structure; Get the number of CPUs currently configured on the Jailhouse virtual machine monitor and determine whether the number of currently configured CPUs exceeds the maximum number of supported CPUs. When it exceeds the limit, the additional memory space required is determined based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure; Convert the required memory space into the number of new page table entries; According to the number of newly added page table entries, corresponding page table entries are added to the original L2 page table as a newly added mapping area.
2. The method according to claim 1, characterized in that Adding corresponding page table entries as a newly added mapping area in the original L2 page table according to the number of newly added page table entries includes: Adding a virtual address and a physical address corresponding to the page table entry based on the newly added page table entry; Obtaining the index of the virtual address in the page table entry; Add a new page table entry to the corresponding physical address in the L2 page table according to the index as a newly added mapping area.
3. The method according to claim 1, characterized in that The method further comprises: If it does not exceed the limit, the original L2 page table mapping table is maintained.
4. The method according to claim 1, wherein Determining the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table initially formed by the Jailhouse virtual machine monitor includes: Determine the estimated maximum number of supported CPUs Determine an embedding point based on the estimated quantity, and embed a normal return code at the embedding point in the jailhouse entry code; When the return point can return normally, adjust the position of the embedded point to the middle position between the embedded point and the end of the entry code; Otherwise, adjust the position of the embedding point to the position from the entry code to the embedding point; Return to the step of adjusting the position of the embedding point to the middle position between the embedding point and the end of the entry code, until the distance between the previous embedding point and the current embedding point is less than the preset distance; The maximum number of supported CPUs is determined based on the location of the previous embedding point.
5. The method according to claim 1, wherein The obtaining of the size of the percpu variable copy data structure includes: Find the starting address and ending address of percpu data in the assembly macro definition related to CPU variables; The size of the percpu variable copy data structure is calculated based on the end address and the start address.
6. The method according to claim 1, wherein The additional memory space required is determined based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure, and is implemented in the following manner: MEM=((N-NUM)*PERCPU_SIZE) / 1024 / 1024, in MB; Among them, MEM is the additional memory space required, N is the number of currently configured CPUs, NUM is the maximum number of supported CPUs, and PERCPU_SIZE is the size of the percpu variable copy data structure.
7. The method according to claim 6, characterized in that The conversion of the required memory space into the number of newly added page table entries is achieved in the following manner: Calculate the number of page table entries PAGE_NUM that need to be added based on the size of the excess space, PAGE_NUM=MEM / 2+1.
8. A memory early mapping device, characterized in that: include: A determination module is used to determine the maximum number of supported CPUs corresponding to the memory space mapped by the L2 page table formed by the Jailhouse virtual machine monitor initialization. Address mapping refers to the correspondence between virtual addresses and physical addresses. The mapping is established during system startup or before the module is used. The L2 page table maps 2MB of space. Get module, used to get the size of percpu variable copy data structure; The judgment module is used to obtain the number of CPUs currently configured in the Jailhouse virtual machine monitor and determine whether the number of CPUs currently configured exceeds the maximum number of supported CPUs; An additional memory space determination module, used to determine the additional required memory space based on the number of currently configured CPUs, the maximum number of supported CPUs, and the size of the percpu variable replica data structure when the number is exceeded; A conversion module, used for converting the required memory space into the number of newly added page table entries; As a module, it is used to add corresponding page table entries in the original L2 page table as a newly added mapping area according to the number of newly added page table entries.
9. A device, characterized in that include: Multiple processors; a storage device for storing one or more programs, When the one or more programs are executed by the multiple processors, the multiple processors implement the memory early mapping method as described in any one of claims 1-7.
10. A storage medium containing computer-executable instructions, characterized in that: When the computer executable instructions are executed by a computer processor, they are used to execute the memory early mapping method according to any one of claims 1 to 7.
Citation Information
Patent Citations
System management memory allocation method, program running method, system and product
CN119003189A