A method for predicting industrial capacitor degradation and related equipment

Abstract

The present invention provides an industrial capacitor degradation prediction method and related equipment. The method comprises the following steps: a capacitor automation test system is used to perform capacitance testing to obtain training capacitance test data; an improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the capacitor automation test system is used to perform capacitance testing on a target capacitor to be predicted to obtain capacitance test data of the target capacitor to be predicted; the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model to perform degradation prediction, and a capacitance prediction result of the target capacitor to be predicted in a future period of time and a time when a threshold value is reached are obtained; the improved long short-term memory network comprises a modal decomposition module, an optimization module, and a long short-term memory network module connected in sequence; and the method helps to improve the degradation prediction accuracy of industrial capacitors.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitor degradation prediction, and in particular to an industrial capacitor degradation prediction method and related equipment. Background Art

[0002] With the rapid development of industrial automation and intelligent manufacturing, the performance requirements for electronic components are becoming increasingly higher, especially the accuracy and reliability requirements for key components such as capacitors are extremely stringent. In the production and application of industrial capacitors, accurate prediction of capacitance is crucial to reflecting capacitor degradation and ensuring circuit performance and safe operation.

[0003] In recent years, data-driven life prediction methods have become mainstream. Testing equipment is used to establish a historical database for the monitoring data of the entire operation process of the capacitor, and a corresponding prediction model is established through this historical database. Then, combined with the monitoring data of the actual operation of the capacitor, its degradation prediction is completed. However, although the current capacitor testing device can operate automatically, the number of capacitors that can be tested at a time is limited. The equipment is bulky and cannot analyze long-term attenuation. The data cost is high and the prediction accuracy is limited. Summary of the Invention

[0004] The present invention provides an industrial capacitor degradation prediction method and related equipment, the purpose of which is to improve the degradation prediction accuracy of industrial capacitors.

[0005] In order to achieve the above object, the present invention provides an industrial capacitor degradation prediction method, comprising:

[0006] Step 1: Carry out capacitance test in the capacitance automatic test system by AC impedance method and constant current source charging method to obtain training capacitance test data. The training capacitance test data includes timestamp, environmental stress value, capacitor model, batch, capacitance test value and test correction value.

[0007] Step 2: Training the improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model;

[0008] Step 3: Using a capacitance automation test system to perform capacitance testing on the target capacitor to be predicted, obtaining capacitance test data of the target capacitor to be predicted, and inputting the capacitance test data of the target capacitor to be predicted into a capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and the time when the capacitance reaches a threshold;

[0009] The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module which are connected in sequence.

[0010] Specifically, the capacitor automated testing system includes:

[0011] The capacitance value test subsystem is used to complete the capacitance value measurement of the capacitor and obtain the capacitance value test value;

[0012] Aging test subsystem, used to complete the aging test of the capacitor and obtain the aging test value;

[0013] A monitoring subsystem is used to monitor the temperature, voltage, and current data of the capacitance test subsystem and the aging test subsystem;

[0014] The automated testing cloud platform is used to obtain and process all data information from the capacitance test subsystem, aging test subsystem, and monitoring subsystem to obtain capacitance test data for training.

[0015] Specifically, the capacitance test subsystem and the aging test subsystem both include:

[0016] The test software runs on the industrial computer and is used to implement command, data interaction, data storage, parameter configuration, and test and calibration functions;

[0017] Test fixtures, set in test chambers at different ambient temperatures, used to install capacitors;

[0018] The tester is used to output the electrical stress of the excitation signal, collect all the capacitance test values ​​in the test fixture, the temperature value of the operating environment of the test fixture, and the working status parameters. The tester is electrically connected to the industrial control machine and the test fixture.

[0019] Specifically, the tester includes multiple test boards, each of which includes:

[0020] a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, and a tenth switch;

[0021] a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor;

[0022] Amplifier, constant voltage source, constant current source, digital-to-analog converter, first capacitor;

[0023] The first end of the constant voltage source and the first end of the constant current source are both grounded;

[0024] The first end of the first switch is connected to the second end of the constant voltage source, the first end of the second switch is connected to the second end of the constant current source, and the second end of the first switch and the second end of the second switch are both connected to the first end of the first resistor;

[0025] The second end of the first resistor is respectively connected to the first end of the amplifier, the first end of the seventh switch, the first end of the eighth switch, and the first end of the ninth switch;

[0026] The second end of the seventh switch is connected to the first end of the second resistor, and the second end of the second resistor is grounded;

[0027] The second end of the eighth switch is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded;

[0028] The second end of the ninth switch is respectively connected to the second end of the sixth switch and the first end of the capacitor to be tested on the test fixture; the first end of the sixth switch is respectively connected to the second end of the fifth switch, the second end of the fourth switch, and the second end of the third switch; the first end of the third switch and the first end of the fourth switch are respectively connected to the positive and negative poles of the mains terminal; and the first end of the fifth switch is connected to the output terminal of the rechargeable battery;

[0029] The second terminal of the amplifier and the third terminal of the amplifier are both connected to the first input terminal of the digital-to-analog converter;

[0030] The fourth end of the amplifier is connected to the second end of the tenth switch and the first end of the fifth resistor, respectively. The second end of the fifth resistor is connected to the third end of the tenth switch and to ground. The fifth end of the amplifier is connected to the first end of the third resistor and the first end of the fourth resistor, respectively. The second end of the third resistor and the sixth end of the amplifier are both connected to the second input end of the digital-to-analog converter. The second end of the fourth resistor is grounded.

[0031] A first end of the tenth switch is connected to a second end of the capacitor to be tested on the test fixture;

[0032] The data transmission end of the digital-to-analog converter is electrically connected to the data transmission end of the industrial computer.

[0033] Furthermore, before step 2, it also includes:

[0034] The 3σ criterion combined with a moving sliding window is used to detect and process outliers in the training capacitance test data to obtain the processed training capacitance test data.

[0035] More specifically, step 2 includes:

[0036] The processed training capacitance test data is input into the modal decomposition module for variational modal decomposition to obtain multimodal components. Based on the multimodal components, the particle swarm optimization algorithm is introduced to optimize the parameter combination of the modal decomposition module to obtain the trained modal decomposition module.

[0037] Input the parameters of the multimodal component and the long short-term memory network module into the optimization module, and use the improved whale optimization algorithm to optimize the optimal parameter combination of the long short-term memory network module;

[0038] Adjusting the parameters of the long short-term memory network module according to the optimal parameter combination to obtain a trained long short-term memory network module;

[0039] A capacitor degradation prediction model is obtained based on the trained modal decomposition module and the trained long short-term memory network module.

[0040] Specifically, the parameters of the LSTM module include:

[0041] Number of hidden layer nodes, batch size, learning rate, number of iterations, and dropout rate.

[0042] The present invention also provides an industrial capacitor degradation prediction device, comprising:

[0043] A test module is used to carry out capacitance test in the capacitance automated test system by using the AC impedance method and the constant current source charging method to obtain capacitance test data for training. The capacitance test data for training includes a timestamp, environmental stress value, capacitor model, batch, capacitance test value, and test correction value.

[0044] A training module is used to train the improved long short-term memory network based on training capacitance test data to obtain a capacitor degradation prediction model;

[0045] A prediction module is used to perform capacitance testing on a target capacitor to be predicted using an automated capacitance testing system to obtain capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into a capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and the time when the capacitance reaches a threshold;

[0046] The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module which are connected in sequence.

[0047] The present invention also provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the industrial capacitor degradation prediction method is implemented.

[0048] The present invention also provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the industrial capacitor degradation prediction method is implemented.

[0049] The above solution of the present invention has the following beneficial effects:

[0050] The present invention uses an automated capacitor testing system to perform capacitance testing in the automated capacitor testing system based on an AC impedance method and a constant current source charging method to obtain training capacitance test data. An improved long-short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model. The automated capacitor testing system is used to perform capacitance testing on a target capacitor to be predicted to obtain capacitance test data of the target capacitor to be predicted. The capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction to obtain a capacitance prediction result of the target capacitor to be predicted in a future period of time and a time when a threshold value is reached. The improved long-short-term memory network includes a modal decomposition module, an optimization module, and a long-short-term memory network module connected in sequence. Compared with the prior art, the present invention uses the automated capacitor testing system to perform capacitance testing to obtain capacitance test data, thereby realizing automated capacitance measurement of multiple types and a wide range of capacitors, supporting long-term stable operation and high-precision data acquisition. The automated capacitor testing system is used to perform capacitance testing on a target capacitor to be predicted to obtain capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction, thereby helping to improve the degradation prediction accuracy of industrial capacitors.

[0051] Other beneficial effects of the present invention will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Schematic diagram of a process of an embodiment of the present invention;

[0053] Figure 2 This is an architectural diagram of a capacitor automatic testing system according to an embodiment of the present invention;

[0054] Figure 3 This is an architectural diagram of a test subsystem in an embodiment of the present invention;

[0055] Figure 4 Schematic diagram of the circuit of the test board in the embodiment of the present invention;

[0056] Figure 5 1 is a training flow chart of the modal decomposition module in an embodiment of the present invention;

[0057] Figure 6 1 is a training flow chart of a long short-term memory network module in an embodiment of the present invention;

[0058] Figure 7 Schematic diagram of the structure of an industrial capacitor degradation prediction device according to an embodiment of the present invention;

[0059] Figure 8 Schematic diagram of the structure of the terminal device in an embodiment of the present invention. DETAILED DESCRIPTION

[0060] To make the technical problems, technical solutions, and advantages to be solved by the present invention more clear, the following is a detailed description with reference to the accompanying drawings and specific embodiments. It is obvious that the embodiments described are only some of the embodiments of the present invention, not all of them. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0061] In the description of the present invention, it should be noted that the terms "first", "second" and "third" are only used for descriptive purposes and should not be understood as indicating or implying relative importance.

[0062] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they may refer to a locking connection, a detachable connection, or an integral connection; they may refer to a mechanical connection or an electrical connection; they may refer to a direct connection or an indirect connection through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0063] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0064] In view of the existing problems, the present invention provides an industrial capacitor degradation prediction method and related equipment.

[0065] like Figure 1 As shown, an embodiment of the present invention provides an industrial capacitor degradation prediction method, comprising:

[0066] Step 1: Carry out capacitance test in the capacitance automatic test system by AC impedance method and constant current source charging method to obtain training capacitance test data. The training capacitance test data includes timestamp, environmental stress value, capacitor model, batch, capacitance test value and test correction value.

[0067] Step 2: Training the improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model;

[0068] Step 3: Using a capacitance automation test system to perform capacitance testing on the target capacitor to be predicted, obtaining capacitance test data of the target capacitor to be predicted, and inputting the capacitance test data of the target capacitor to be predicted into a capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and the time when the capacitance reaches a threshold;

[0069] The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module which are connected in sequence.

[0070] Specifically, if Figure 2 As shown, the capacitor automatic test system includes:

[0071] The capacitance value test subsystem is used to complete the capacitance value measurement of the capacitor and obtain the capacitance value test value;

[0072] Aging test subsystem, used to complete the aging test of the capacitor and obtain the aging test value;

[0073] A monitoring subsystem is used to monitor the temperature, voltage, and current data of the capacitance test subsystem and the aging test subsystem;

[0074] The automated testing cloud platform is used to obtain and process all data information from the capacitance test subsystem, aging test subsystem, and monitoring subsystem to obtain capacitance test data for training.

[0075] In an embodiment of the present invention, the monitoring subsystem is composed of a variety of sensors, such as a temperature sensor for monitoring the temperature of the capacitance value test subsystem and the aging test subsystem, a voltage sensor for monitoring the voltage of the capacitance automation test system, a current sensor for monitoring the current of the capacitance automation test system, etc.

[0076] In an embodiment of the present invention, the automated test cloud platform obtains all data information from the capacitance value test subsystem, the aging test subsystem and the monitoring subsystem, and completes storage, analysis, comparison, prediction, statistics and monitoring processing in the cloud server. The cloud server adopts a conventional cloud server. The embodiment of the present invention does not involve improving its internal algorithm. Therefore, using it to store, analyze, compare, predict, count and monitor data is a function possessed by a conventional cloud server. Therefore, the embodiment of the present invention will not go into details about its specific processing process.

[0077] Specifically, if Figure 3 As shown, the capacitance test subsystem and the aging test subsystem both include:

[0078] The test software runs on the industrial computer and is used to implement command, data interaction, data storage, parameter configuration, and test and calibration functions;

[0079] Test fixtures, set in test chambers at different ambient temperatures, used to install capacitors;

[0080] The tester is used to output the electrical stress of the excitation signal, collect all the capacitance test values ​​in the test fixture, the temperature value of the operating environment of the test fixture, and the working status parameters. The tester is electrically connected to the industrial control machine and the test fixture.

[0081] In the embodiment of the present invention, the test software runs on the industrial computer as a human-computer interaction module, and performs command and data interaction, data storage, tester parameter configuration, test calibration, etc. with the tester through Ethernet.

[0082] In an embodiment of the present invention, the test tooling consists of three test boards, all of which are connected to a tester. Each test board can carry up to 80 capacitors to be tested. The three test boards are fixedly packaged into an integral test tooling using a hollow mesh metal shell and are placed in test chambers with different ambient temperatures. The test chambers include a normal temperature (25°C) ambient temperature test chamber, a low temperature (-40°C) ambient temperature test chamber, a high temperature (60°C) ambient temperature test chamber, and an accelerated (80°C) ambient temperature test chamber.

[0083] In an embodiment of the present invention, a metal chassis is used to encapsulate and fix the various parts on the outside of the tester, and the test software is run on an industrial computer to automatically apply corresponding aging electrical stress (such as 3.3V, 5V, etc.) according to the capacitor's voltage resistance level (such as 25V or ≥50V).

[0084] Specifically, if Figure 4 As shown in the figure, the tester includes multiple test boards. Each test board is pluggable for easy maintenance and replacement. Each test board includes:

[0085] A first switch K1, a second switch K2, a third switch K3, a fourth switch K4, a fifth switch K5, a sixth switch K6, a seventh switch K7, an eighth switch K8, a ninth switch K9, and a tenth switch K10;

[0086] A first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5;

[0087] Amplifier U3, constant voltage source U1, constant current source U2, digital-to-analog converter, first capacitor C1;

[0088] The first end of the constant voltage source U1 and the first end of the constant current source U2 are both grounded;

[0089] A first end of the first switch K1 is connected to the second end of the constant voltage source U1, a first end of the second switch K2 is connected to the second end of the constant current source U2, and a second end of the first switch K1 and a second end of the second switch K2 are both connected to the first end of the first resistor R1;

[0090] The second end of the first resistor R1 is respectively connected to the first end of the amplifier U3, the first end of the seventh switch K7, the first end of the eighth switch K8, and the first end of the ninth switch K9;

[0091] A second end of the seventh switch K7 is connected to a first end of the second resistor R2, and a second end of the second resistor R2 is grounded;

[0092] A second end of the eighth switch K8 is connected to the first end of the first capacitor C1, and a second end of the first capacitor C1 is grounded;

[0093] The second end of the ninth switch K9 is connected to the second end of the sixth switch K6 and the first end of the capacitor to be tested on the test fixture, respectively. The first end of the sixth switch K6 is connected to the second end of the fifth switch K5, the second end of the fourth switch K4, and the second end of the third switch K3, respectively. The first end of the third switch K3 and the first end of the fourth switch K4 are connected to the positive and negative electrodes of the mains power terminal, respectively. The first end of the fifth switch K5 is connected to the output terminal of the rechargeable battery.

[0094] The second terminal of the amplifier U3 and the third terminal of the amplifier U3 are both connected to the first input terminal of the digital-to-analog converter;

[0095] A fourth end of the amplifier U3 is connected to the second end of the tenth switch K10 and the first end of the fifth resistor R5, respectively. The second end of the fifth resistor R5 is connected to the third end of the tenth switch K10 and to ground. A fifth end of the amplifier U3 is connected to the first end of the third resistor R3 and the first end of the fourth resistor R4, respectively. The second end of the third resistor R3 and the sixth end of the amplifier U3 are both connected to the second input end of the digital-to-analog converter. The second end of the fourth resistor R4 is grounded.

[0096] A first end of the tenth switch K10 is connected to a second end of the capacitor to be tested on the test fixture;

[0097] The data transmission end of the digital-to-analog converter is electrically connected to the data transmission end of the industrial computer.

[0098] It should be noted that the digital-to-analog converter used in the embodiment of the present invention is a 24-bit digital-to-analog converter.

[0099] In an embodiment of the present invention, the capacitor automation test system automatically switches to measurement mode every 4 hours, triggering the tester to collect capacitance values. The test software sends instructions through the Modbus TCP protocol, reads the capacitance values ​​collected by the tester, and stores the capacitance values ​​in real time in a MySQL database. It supports queries based on model, batch, time, and other conditions. The automatic test cloud platform extracts capacitance test data from the MySQL database and stores it as a CSV file. The CSV file contains timestamp, environmental stress, capacitor model, batch, capacitance test value, and test correction value.

[0100] The embodiment of the present invention is combined with Figure 4 The test board shown here illustrates the specific principles and steps of the AC impedance method. The specific principles include:

[0101] When the first switch K1 is open, the second switch K2 is closed, the seventh switch K7 and the eighth switch K8 are open, the ninth switch K9 is closed, and the tenth switch K10 is switched to the capacitance measurement terminal, the circuit is in the capacitance measurement state.

[0102] Assume that the output voltage of the constant voltage source is , the first resistor is R1, the circuit equivalent impedance is Z, and the capacitive reactance of the capacitor is , then

[0103] ;

[0104] Where,

[0105] ;

[0106] Where, is the current in the circuit, and

[0107] ;

[0108] In the formula, is the voltage across the first resistor.

[0109] Also because

[0110] ;

[0111] therefore

[0112] ;

[0113] in, Indicates frequency, Indicates the capacitance value of the capacitor being measured.

[0114] During measurement, first the eighth switch K8 and the ninth switch K9 are opened, the seventh switch K7 is closed, and the tenth switch K10 is turned to the capacitance measurement terminal. At this time, the output voltage of the constant voltage source is measured to be Then the seventh switch K7 and the eighth switch K8 are opened, and the ninth switch K9 is closed. When the circuit is stable, the voltage on the first resistor is obtained. , use the above formula to calculate the current ; According to the voltage obtained by measurement , use the above formula to obtain the circuit equivalent impedance Z; use the above formula to obtain the capacitive reactance of the measured capacitor ; Finally, use the above formula to obtain the capacitance value of the measured capacitor .

[0115] Specifically, before step 2, it also includes:

[0116] The 3σ criterion combined with a moving sliding window is used to detect and process outliers in the training capacitance test data to obtain the processed training capacitance test data.

[0117] Most preferably, the 3σ criterion is combined with a moving sliding window to perform outlier detection and processing on the training capacitance test data to obtain processed training capacitance test data, including:

[0118] The training capacitance test data is divided into multiple windows by moving sliding window technology, and the 3σ criterion outliers are removed for each window to obtain the cleaned data;

[0119] The training set and test set are divided by the rolling window partitioning method and the principle of irreversibility of time series;

[0120] Through scale changes, the training set and test set data are normalized and scaled to [0, 1].

[0121] Since the collected training capacitance test data contains a lot of noise and spikes, and these abnormal data will interfere with the algorithm training process, it is necessary to process the original data for outliers. According to the characteristics of industrial capacitance data distribution that conforms to time series changes, the 3σ criterion combined with the moving sliding window technology is used for outlier detection of industrial capacitance data.

[0122] It should be noted that the 3σ criterion proposed in the embodiment of the present invention means that a set of test data is assumed to contain only random errors, and the standard deviation is calculated and processed to obtain the standard deviation. An interval is determined based on a certain probability. Any error exceeding this interval is considered to be a gross error rather than a random error, and the data containing this error should be eliminated.

[0123] The 3σ criterion is:

[0124] The values ​​are distributed in ( , ) has a probability of 0.6827;

[0125] The values ​​are distributed in ( , ) has a probability of 0.9545;

[0126] The values ​​are distributed in ( , ) has a probability of 0.9973;

[0127] It can be considered that the actual values ​​are almost all concentrated in ( , ) interval, the possibility of exceeding this range is less than 0.3%, so ( , ) interval is identified as the confidence interval; the moving sliding window technology can capture the changes in data within a local range and is suitable for processing short-term fluctuations in time series; the range of outlier detection can be dynamically adjusted by combining the 3σ criterion with the moving sliding window technology to adapt to data changes. The number of windows is set to 7 and the confidence interval is identified as ( , ) has the best effect, among which, represents the standard deviation, Represents the mean.

[0128] Specifically, the embodiment of the present invention divides the training test data into a training set and a test set in a ratio of 8:2. The training set is used to train the capacitor degradation prediction model to obtain optimal parameters, and the test set is used to evaluate the prediction effect of the model, so as to improve its prediction ability and accuracy on unknown data when the model is applied in actual environments.

[0129] Specifically, the embodiment of the present invention scales the data to the [0, 1] interval using the min_max normalization technique, and the calculation formula is:

[0130] ;

[0131] in, Represents the new sequence after normalization, is the original input sequence, and are the minimum and maximum values ​​of the input sequence, respectively.

[0132] Most preferably, step 2 comprises:

[0133] The processed training capacitance test data is input into the modal decomposition module for variational modal decomposition to obtain multimodal components. Based on the multimodal components, the particle swarm optimization algorithm is introduced to optimize the parameter combination of the modal decomposition module to obtain the trained modal decomposition module.

[0134] Input the parameters of the multimodal component and the long short-term memory network module into the optimization module, and use the improved whale optimization algorithm to optimize the optimal parameter combination of the long short-term memory network module;

[0135] Adjusting the parameters of the long short-term memory network module according to the optimal parameter combination to obtain a trained long short-term memory network module;

[0136] A capacitor degradation prediction model is obtained based on the trained modal decomposition module and the trained long short-term memory network module.

[0137] Specifically, the parameters of the modal decomposition module include the number of modes and the penalty factor.

[0138] like Figure 5 As shown, the specific steps of optimizing the parameter combination of the modal decomposition module by introducing the particle swarm optimization algorithm based on multimodal components in the embodiment of the present invention are as follows:

[0139] Initialize the parameters of the modal decomposition module; generally set the noise margin and DC component coefficient to 0 (suitable for non-stationary signal processing), set the initial value of the center frequency to 1 (the initial value of 1 means that all random values ​​will be evenly distributed), and set the convergence criterion threshold to 1×10e-7 to ensure that the decomposition accuracy is met;

[0140] Optimize the algorithm parameter system and define the search space dimensions , particle swarm size , the position vector and velocity vector are constrained to the lower limit and upper limit , the inertia weight adopts a linear decreasing strategy, Decrease from 0.9 to 0.4, learning factor , Construct the acceleration factor matrix, the maximum number of iterations ;

[0141] Multi-objective optimization iterative process; establish a fitness function based on minimizing envelope entropy and maximizing modal overlap, calculate the fitness value, and update the individual optimal solution Pbest and the global optimal solution Gbest;

[0142] The optimized The parameter combination is applied to the modal decomposition module.

[0143] Specifically, the modal decomposition module can decompose the original signal into several components with different bandwidths and center frequencies, and construct a variational model to Decompose into Intrinsic Mode Function . No. The eigenmode functions are:

[0144] ;

[0145] Where, is the envelope amplitude, is the instantaneous phase;

[0146] Specifically, the particle swarm optimization algorithm searches for the optimal solution by moving a group of particles (called a "swarm") in the solution space.

[0147] The particle velocity update formula is:

[0148] ;

[0149] The position update formula is:

[0150] ;

[0151] in, It is a particle In time speed; It is a particle In time location; is the inertia weight, which is used to control the moving inertia of the particle; and is the learning factor, which is used to control the step size of the particle moving towards pbest and gbest; and It is a random number between [0,1], used to increase the randomness of the search; It is a particle The individual optimal position of is the global best position.

[0152] Specifically, the parameters of the long short-term memory network module include:

[0153] Number of hidden layer nodes, batch size, learning rate, number of iterations, and dropout rate.

[0154] like Figure 6 As shown, the specific steps of optimizing the optimal parameter combination of the long short-term memory network module using the improved whale optimization algorithm in the embodiment of the present invention include:

[0155] Initialize the algorithm control parameters and define the hyperparameter feasible domain based on the architectural characteristics of the long short-term memory network module;

[0156] Generate an initial population set within the hyperparameter feasible domain, where each individual corresponds to a set of configuration parameters of the long short-term memory network module;

[0157] Calculate the MAE index of each candidate parameter in the long short-term memory network module under various population parameters, construct a fitness function, implement the elite retention strategy, and select the best individuals of the current era to participate in global exploration;

[0158] Adopting an improved position update strategy, continuously iterating to optimize parameters and update network parameters;

[0159] The model evaluation-parameter update process is executed cyclically until the termination condition is met;

[0160] Extract the optimal hyperparameter combination, including key parameters such as the number of hidden layer nodes, batch size, learning rate, number of iterations, and dropout rate;

[0161] Configure the long short-term memory network module based on the optimized hyperparameters.

[0162] Most preferably, the LSTM network module includes the following network layers:

[0163] Input layer: The dimension of the input vector is 3, which means the capacitance data of the past 3 days;

[0164] LSTM layer: iteratively updates the input information;

[0165] Dropout layer: randomly discards output information;

[0166] Fully connected layer: integrates the features extracted by the previous layer;

[0167] Output layer: The output dimension is 1, which is the capacitance value for the next day.

[0168] The number of layers and neurons in the LSTM layer is determined by parameter tuning, and the output of the last LSTM layer is connected to the output vector through a fully connected layer.

[0169] It should be noted that in parameter selection, the Adam algorithm was selected as the model optimization algorithm, and the root mean square error (RMSE) was used as the loss function to conduct experimental analysis on the number of hidden layer nodes (hidden size), batch size (batch size), learning rate (learning-rate), and number of iterations (epochs) to ultimately determine the optimal parameters;

[0170] It should be noted that the mean absolute percentage error (MAPE) is selected as the evaluation indicator.

[0171] The value range of MAPE is [0, +∞]. The smaller the value, the higher the accuracy of the prediction model. The calculation formula is:

[0172] ;

[0173] The formula means that each actual value and predicted value The absolute value of the difference divided by the actual value , then convert these ratios into percentages and finally find the average, where Indicates the sample size.

[0174] The embodiment of the present invention is equipped with a capacitor automatic test system, and performs a capacitor test in the capacitor automatic test system based on an AC impedance method and a constant current source charging method to obtain training capacitance test data. The improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the capacitor automatic test system is used to perform a capacitance test on a target capacitor to be predicted to obtain capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction to obtain a capacitance prediction result of the target capacitor to be predicted in a future period of time and the time when the threshold is reached; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction result of the target capacitor to be predicted in a future period of time and the time when the threshold is reached; the improved long short-term memory network is trained based on the training capacitance test data to obtain a capacitor degradation prediction model ... The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module connected in sequence; compared with the existing technology, the embodiment of the present invention uses the onboard capacitor automation test system to perform capacitance testing to obtain capacitance test data, realizes automated capacitance measurement of multiple types and wide range of capacitors, and supports long-term stable operation and high-precision data acquisition; uses the capacitor automation test system to perform capacitance testing on the target capacitor to be predicted to obtain capacitance test data of the target capacitor to be predicted, and inputs the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction, which helps to improve the degradation prediction accuracy of industrial capacitors.

[0175] Corresponding to the industrial capacitor degradation prediction method described in the above embodiment, as Figure 7 As shown, the present invention further provides an industrial capacitor degradation prediction device 100, the industrial capacitor degradation prediction device 100 comprising:

[0176] A testing module 101 is configured to carry out a capacitance test in an automated capacitance test system by using an AC impedance method and a constant current source charging method to obtain capacitance test data for training. The capacitance test data for training includes a timestamp, an environmental stress value, a capacitor model, a batch, a capacitance test value, and a test correction value.

[0177] A training module 102 is configured to train the improved long short-term memory network based on training capacitance test data to obtain a capacitor degradation prediction model;

[0178] Prediction module 103 is configured to perform capacitance testing on a target capacitor to be predicted using an automated capacitance testing system to obtain capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into a capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and a time when the capacitance reaches a threshold;

[0179] The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module which are connected in sequence.

[0180] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of this application. Their specific functions and technical effects can be found in the method embodiment section and will not be repeated here.

[0181] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0182] The embodiment of the present invention further provides a terminal device, such as Figure 8 As shown, the terminal device D10 of this embodiment includes: at least one processor D100 ( Figure 8 Only one processor is shown in the figure), a memory D101, and a computer program D102 stored in the memory D101 and executable on the at least one processor D100, wherein the processor D100 implements the above-mentioned industrial capacitor degradation prediction method when executing the computer program D102.

[0183] The terminal device D10 can be a computing device such as a desktop computer, a notebook, a PDA, a server, a server cluster, a cloud server, etc. The terminal device may include, but is not limited to, a processor D100 and a memory D101. It will be understood by those skilled in the art that Figure 8 This is merely an example of the terminal device D10 and does not constitute a limitation on the terminal device D10 . The terminal device D10 may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the terminal device D10 may also include input and output devices, network access devices, etc.

[0184] The processor D100 may be a central processing unit (CPU), or may be another general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. A general-purpose processor may be a microprocessor or any conventional processor.

[0185] In some embodiments, the memory D101 may be an internal storage unit of the terminal device D10, such as a hard disk or memory of the terminal device D10. In other embodiments, the memory D101 may also be an external storage device of the terminal device D10, such as a plug-in hard disk, a smart memory card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device D10. Furthermore, the memory D101 may include both an internal storage unit of the terminal device D10 and an external storage device. The memory D101 is used to store an operating system, application programs, a boot loader, data, and other programs, such as the program code of the computer program. The memory D101 may also be used to temporarily store data that has been output or is about to be output.

[0186] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiment of this application. Their specific functions and technical effects can be found in the method embodiment section and will not be repeated here.

[0187] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0188] An embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for predicting industrial capacitor degradation is implemented.

[0189] If the integrated unit is implemented as a software functional unit and sold or used as a standalone product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the process steps in the above-mentioned method embodiments by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When executed by a processor, the computer program can implement the steps of each of the above-mentioned method embodiments. The computer program includes computer program code, which can be in source code form, object code form, executable file, or some intermediate form. The computer-readable medium can include at least: any entity or device capable of carrying the computer program code to a construction device / terminal device, a recording medium, computer memory, read-only memory (ROM), random access memory (RAM), an electrical carrier signal, a telecommunications signal, and a software distribution medium. Examples include a USB flash drive, a removable hard drive, a magnetic disk, or an optical disk.

[0190] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A method for predicting industrial capacitor degradation, characterized in that: include: Step 1: equip a capacitor automated testing system, perform a capacitor test in the capacitor automated testing system using an AC impedance method and a constant current source charging method, and obtain training capacitance test data, wherein the training capacitance test data includes a timestamp, an environmental stress value, a capacitor model, a batch, a capacitance test value, and a test correction value; Step 2: training the improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model; Step 3: Using the capacitance automated testing system to perform capacitance testing on the target capacitor to be predicted, obtaining capacitance test data of the target capacitor to be predicted, and inputting the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and a time when the capacitance reaches a threshold. The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module connected in sequence; Wherein, the capacitance automatic testing system comprises: The capacitance value test subsystem is used to complete the capacitance value measurement of the capacitor and obtain the capacitance value test value; Aging test subsystem, used to complete the aging test of the capacitor and obtain the aging test value; A monitoring subsystem, configured to monitor temperature data, voltage data, and current data of the capacitance test subsystem and the aging test subsystem; An automated testing cloud platform is used to obtain and process all data information from the capacitance test subsystem, the aging test subsystem, and the monitoring subsystem to obtain capacitance test data for training; The capacitance value test subsystem and the aging test subsystem both include: The test software runs on the industrial computer and is used to implement command, data interaction, data storage, parameter configuration, and test and calibration functions; Test fixtures, set in test chambers at different ambient temperatures, used to install capacitors; A tester, configured to output an excitation signal electrical stress, collect all capacitance test values ​​in the test fixture, the temperature value of the operating environment of the test fixture, and operating status parameters, the tester being electrically connected to the industrial computer and the test fixture; The tester includes multiple test boards, each of which includes: a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, and a tenth switch; a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor; Amplifier, constant voltage source, constant current source, digital-to-analog converter, first capacitor; The first end of the constant voltage source and the first end of the constant current source are both grounded; The first end of the first switch is connected to the second end of the constant voltage source, the first end of the second switch is connected to the second end of the constant current source, and the second end of the first switch and the second end of the second switch are both connected to the first end of the first resistor; The second end of the first resistor is respectively connected to the first end of the amplifier, the first end of the seventh switch, the first end of the eighth switch, and the first end of the ninth switch; The second end of the seventh switch is connected to the first end of the second resistor, and the second end of the second resistor is grounded; The second end of the eighth switch is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded; The second end of the ninth switch is respectively connected to the second end of the sixth switch and the first end of the capacitor to be tested on the test fixture; the first end of the sixth switch is respectively connected to the second end of the fifth switch, the second end of the fourth switch, and the second end of the third switch; the first end of the third switch and the first end of the fourth switch are respectively connected to the positive and negative electrodes of the mains power terminal; and the first end of the fifth switch is connected to the output terminal of the rechargeable battery; The second end of the amplifier and the third end of the amplifier are both connected to the first input end of the digital-to-analog converter; The fourth end of the amplifier is connected to the second end of the tenth switch and the first end of the fifth resistor respectively, the second end of the fifth resistor is connected to the third end of the tenth switch and is grounded, the fifth end of the amplifier is connected to the first end of the third resistor and the first end of the fourth resistor respectively, the second end of the third resistor and the sixth end of the amplifier are both connected to the second input end of the digital-to-analog converter, and the second end of the fourth resistor is grounded; The first end of the tenth switch is connected to the second end of the capacitor to be tested on the test fixture; The data transmission end of the digital-to-analog converter is electrically connected to the data transmission end of the industrial computer.

2. The industrial capacitor degradation prediction method according to claim 1, characterized in that: Before step 2, also include: The 3σ criterion is combined with a moving sliding window to perform outlier detection and processing on the training capacitance test data to obtain processed training capacitance test data.

3. The industrial capacitor degradation prediction method according to claim 2, characterized in that: The step 2 includes: Inputting the processed training capacitance test data into the modal decomposition module for variational modal decomposition to obtain multimodal components, and introducing a particle swarm optimization algorithm based on the multimodal components to optimize the parameter combination of the modal decomposition module to obtain a trained modal decomposition module; Inputting the parameters of the multimodal component and the long short-term memory network module into the optimization module, and optimizing the optimal parameter combination of the long short-term memory network module using the improved whale optimization algorithm; Adjusting the parameters of the long short-term memory network module according to the optimal parameter combination to obtain a trained long short-term memory network module; A capacitor degradation prediction model is obtained based on the trained modal decomposition module and the trained long short-term memory network module.

4. The industrial capacitor degradation prediction method according to claim 3, characterized in that: The parameters of the long short-term memory network module include: Number of hidden layer nodes, batch size, learning rate, number of iterations, and dropout rate.

5. An industrial capacitor degradation prediction device, characterized in that: include: A testing module is configured to carry out a capacitance automated testing system, perform capacitance testing in the capacitance automated testing system using an AC impedance method and a constant current source charging method, and obtain capacitance test data for training, wherein the capacitance test data for training includes a timestamp, an environmental stress value, a capacitor model, a batch, a capacitance test value, and a test correction value; A training module, configured to train the improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model; a prediction module, configured to perform a capacitance test on a target capacitor to be predicted using the automatic capacitance test system to obtain capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model to perform degradation prediction, thereby obtaining a capacitance prediction result of the target capacitor to be predicted over a period of time in the future and a time when the capacitance reaches a threshold; The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module connected in sequence; The test module is specifically used to implement: The capacitance automatic testing system comprises: The capacitance value test subsystem is used to complete the capacitance value measurement of the capacitor and obtain the capacitance value test value; Aging test subsystem, used to complete the aging test of the capacitor and obtain the aging test value; A monitoring subsystem, configured to monitor temperature data, voltage data, and current data of the capacitance test subsystem and the aging test subsystem; An automated testing cloud platform is used to obtain and process all data information from the capacitance test subsystem, the aging test subsystem, and the monitoring subsystem to obtain capacitance test data for training; The capacitance value test subsystem and the aging test subsystem both include: The test software runs on the industrial computer and is used to implement command, data interaction, data storage, parameter configuration, and test and calibration functions; Test fixtures, set in test chambers at different ambient temperatures, used to install capacitors; A tester, configured to output an excitation signal electrical stress, collect all capacitance test values ​​in the test fixture, the temperature value of the operating environment of the test fixture, and operating status parameters, the tester being electrically connected to the industrial computer and the test fixture; The tester includes multiple test boards, each of which includes: a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, and a tenth switch; a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor; Amplifier, constant voltage source, constant current source, digital-to-analog converter, first capacitor; The first end of the constant voltage source and the first end of the constant current source are both grounded; The first end of the first switch is connected to the second end of the constant voltage source, the first end of the second switch is connected to the second end of the constant current source, and the second end of the first switch and the second end of the second switch are both connected to the first end of the first resistor; The second end of the first resistor is respectively connected to the first end of the amplifier, the first end of the seventh switch, the first end of the eighth switch, and the first end of the ninth switch; The second end of the seventh switch is connected to the first end of the second resistor, and the second end of the second resistor is grounded; The second end of the eighth switch is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded; The second end of the ninth switch is respectively connected to the second end of the sixth switch and the first end of the capacitor to be tested on the test fixture; the first end of the sixth switch is respectively connected to the second end of the fifth switch, the second end of the fourth switch, and the second end of the third switch; the first end of the third switch and the first end of the fourth switch are respectively connected to the positive and negative electrodes of the mains power terminal; and the first end of the fifth switch is connected to the output terminal of the rechargeable battery; The second end of the amplifier and the third end of the amplifier are both connected to the first input end of the digital-to-analog converter; The fourth end of the amplifier is connected to the second end of the tenth switch and the first end of the fifth resistor respectively, the second end of the fifth resistor is connected to the third end of the tenth switch and is grounded, the fifth end of the amplifier is connected to the first end of the third resistor and the first end of the fourth resistor respectively, the second end of the third resistor and the sixth end of the amplifier are both connected to the second input end of the digital-to-analog converter, and the second end of the fourth resistor is grounded; The first end of the tenth switch is connected to the second end of the capacitor to be tested on the test fixture; The data transmission end of the digital-to-analog converter is electrically connected to the data transmission end of the industrial computer.

6. A terminal device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the industrial capacitor degradation prediction method according to any one of claims 1 to 4 is implemented.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the industrial capacitor degradation prediction method according to any one of claims 1 to 4 is implemented.

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