Memristor based on artificial neural network and implementation method thereof

Abstract

The invention discloses a memristor based on an artificial neural network, and the memristor comprises a cross array, a frequency mixing circuit is connected with the bit line X end of the cross array through a key, the bit line Y end of the cross array is sequentially connected with a detection circuit, the detection circuit is used for recognizing a required low-frequency signal, and the low-frequency signal is connected to a computer through an A / D conversion circuit; memristor conductive channels with different conductance values are constructed between each microelectrode pair of the cross array through different numbers of nano materials, and the key is controlled according to the requirement of synaptic weight. Required pulse voltage V is applied to a bit line, output current I on a word line is calculated through vector matrix multiplication based on the Ohm law and the Kirchhoff law, and the storage and calculation integrated artificial neural network is achieved.

Description

Technical Field

[0001] The present invention belongs to the field of artificial neural networks, and particularly relates to a memristor based on an artificial neural network and a method for implementing the same. Background Art

[0002] With the rapid development of big data and cloud computing, developing artificial intelligence and using electronic devices to construct artificial neural networks to simulate the human brain neural network from the perspective of information processing has become a research hotspot for a new generation of computer systems. Artificial neural networks are mainly implemented in two ways: software and hardware. Software implementation relies on high-performance computers to simulate neural networks through programming. However, limited by the serial working mode of computers, its computing speed far from meets the requirements of neural networks.

[0003] Hardware implementation is based on semiconductor technology and uses new information devices such as microelectronics and optoelectronics to simulate the characteristics of neural synapses. There are mainly two forms of hardware implementation. One is based on traditional CMOS circuits, and transistors are used to prepare artificial neural networks that can simulate neurons and synapses. Since the behavior modes of transistors and synapses are different, additional circuits are required to assist in realizing synaptic bionics, which hinders the hardware implementation of artificial neural networks.

[0004] Memristors have a high degree of similarity with neural synapses in terms of structure and transmission mechanism. It is expected to use memristor arrays to realize large-scale, low-power, and high-energy-efficiency artificial neural networks. Existing memristors are prepared using two-dimensional thin film materials, and the theoretical conductance values of each memristor unit in the memristor array are the same and non-adjustable, resulting in fixed weights of the memristors, and the application of the corresponding artificial neural network chips is limited. Summary of the Invention

[0005] Object of the Invention: The present invention aims to provide a memristor based on an artificial neural network and a method for implementing the same, to promote the application of artificial neural network hardware.

[0006] Technical Solution: A memristor based on an artificial neural network includes a crossbar array. A mixing circuit is electrically connected to the X end of the bit line of the crossbar array through a switch. The Y end of the bit line of the crossbar array is sequentially connected to a detection circuit. The detection circuit is used to identify the required low-frequency signal, and the low-frequency signal is connected to a computer through an A / D conversion circuit;

[0007] Between each pair of microelectrodes of the crossbar array, different numbers of nanomaterials are used to construct memristor conductive channels with different conductance values, and the switch is controlled according to the requirements of synaptic weights;

[0008] Apply the required pulse voltage V on the bit line, and calculate the output current I on the word line based on the vector matrix multiplication of Ohm's law and Kirchhoff's law to realize an artificial neural network with in-memory computing.

[0009] Furthermore, the mixing circuit acts on the microelectrode pairs determined by the bit lines and word lines. The X ends of the bit lines of the cross array are correspondingly connected to the electric keys, and the Y ends of the word lines of the cross array are sequentially connected to the detection circuit. Each time, the electrode pairs on the same word line can be manipulated;

[0010] The high-frequency signal part in the mixing circuit is used for dielectrophoretic manipulation of the nanomaterials between the microelectrode pairs, and the low-frequency signal part is used for monitoring the current change after being screened by the detection circuit, so that the computer can analyze the data and control the electric keys;

[0011] The detection circuit adopts a second-order low-pass filter circuit to filter the high-frequency signals and monitor the low-frequency currents of multiple frequencies in real time, and feeds them back to the computer after AD conversion.

[0012] In the memristor, the cross array is prepared by photolithography. The bit lines and word lines are not connected, and a microelectrode pair is set at the intersection of each bit line and word line. The distance between the microelectrodes is 0.5 - 2 microns.

[0013] Furthermore, the control of the number of nanomaterials by this memristor is determined by the computer according to the actual synaptic weight requirements and the change of the low-frequency signal of the circuit to control the opening and closing of the electric keys;

[0014] The synaptic weight corresponds to the conductance value of the conductive channel of the memristor and is determined by the number of nanomaterials assembled between each microelectrode pair in the cross array.

[0015] Furthermore, in the integrated memory and computing artificial neural network, a required pulse voltage V j is applied to the bit line X j , and the conductance value G j of the memristor at the intersection of the bit line X i and the word line Y ij is used as the weight value of the synapse in the neural network. This memristor stores the weight value data in each memristor unit and performs in-memory computing, and calculates the output current I i on the word line by vector matrix multiplication j I = ∑ j V ij .

[0016] Furthermore, the mixing circuit includes a mixing AC power supply with a frequency of 10 4 -10 8 Hz, and the frequency of the low-frequency AC power supply is 1 - 100 Hz.

[0017] The mixing circuit also includes an adder and a filter.

[0018] Based on the above memristor, the nanomaterials include one of titanium oxide nanowires, zinc oxide nanowires, and tin oxide nanowires, and the length of the nanowires is 0.5 microns larger than the distance between the microelectrode pairs.

[0019] On the other hand, the present invention also provides a method for implementing a memristor based on an artificial neural network, comprising the following steps:

[0020] S1. Construct a circuit for the operation of an artificial neural network, including a high-frequency and low-frequency AC power supply, a mixing circuit, a switch, a crossbar array, a detection circuit, an A / D conversion circuit, and a computer;

[0021] S2. After mixing, the high-frequency and low-frequency AC power supply is connected to the X end of the bit line of the crossbar array through the switch. The Y end of the bit line of the crossbar array is sequentially connected to the detection circuit. The detection circuit identifies the required low-frequency signal, and the low-frequency signal is connected to the computer through the A / D conversion circuit;

[0022] S3. The computer controls the opening and closing of the switch according to the synaptic weight requirement, assembles a certain number of nanomaterials between each microelectrode pair of the crossbar array, constructs a memristor conductive channel with different conductance values, and realizes the intelligent assembly of the memristive artificial neural network hardware;

[0023] S4. Apply the required pulse voltage V to the bit line, and calculate the output current I on the word line by vector matrix multiplication based on Ohm's law and Kirchhoff's law, that is, obtain a high-energy-efficiency artificial neural network with in-memory computing implemented by the memristor array hardware.

[0024] Beneficial effects: The memristor provided by the present invention controls the opening and closing of the switch according to the synaptic weight requirement, assembles a certain number of nanomaterials between each microelectrode pair of the crossbar array, constructs a memristor conductive channel with different conductance values, and realizes the intelligent assembly of the memristive artificial neural network hardware; secondly, apply the required pulse voltage V to the bit line, and calculate the output current I on the word line by "matrix vector multiplication" based on Ohm's law and Kirchhoff's law, that is, obtain a high-energy-efficiency artificial neural network with in-memory computing implemented by the memristor array hardware, which can greatly improve the computing ability of the neural network. Brief Description of the Drawings

[0025] Figure 1 is the hardware circuit structure diagram of the artificial neural network provided by the present invention;

[0026] Figure 2 is the crossbar array diagram of the memristor;

[0027] Figure 3 is the schematic diagram of the memristor unit structure. Detailed Embodiments

[0028] The following combines the accompanying drawings and embodiments to detail the specific implementation steps and technical details of the method for implementing the artificial neural network hardware of the present invention, so that those skilled in the art can implement the present invention based on this description.

[0029] Combined withFigures 1-3 As shown, a realization method of a memristor based on an artificial neural network provided by the present invention mainly includes:

[0030] Step 1: Construction of an artificial neural network system

[0031] (1) Composition of the circuit system

[0032] Power supply module: A high-frequency AC power supply (frequency range 10 4 -10 8 Hz) and a low-frequency AC power supply (frequency range 1 - 100 Hz) are mixed through a mixing circuit (composed of an adder and a band-pass filter) to output a composite signal; the high-frequency signal is used to drive the dielectrophoretic manipulation of the nanomaterials, and the low-frequency signal is used to monitor the circuit state in real time.

[0033] Crossbar array: A memristor crossbar array ( Figure 2 ) is fabricated using photolithography technology, where the bit lines (X) and word lines (Y) are arranged perpendicularly, and microelectrode pairs are set at the intersection points with a microelectrode spacing of 0.5 - 2 micrometers. The X ends of the bit lines of the crossbar array are connected to the switches one by one, and the Y ends of the word lines of the crossbar array are sequentially connected to the detection circuit. Each time, the electrode pairs on the same word line can be manipulated. The microelectrode pairs are not connected in the initial state, and a conductive channel is formed by assembling nanomaterials in the subsequent steps, as shown in Figure 3 .

[0034] Signal processing module: The detection circuit uses a second-order low-pass filter with a cut-off frequency set to the upper limit of the low-frequency signal (100 Hz) to filter out high-frequency noise and extract the low-frequency current signal.

[0035] The A / D conversion circuit converts the analog signal into a digital signal and inputs it into a computer for real-time analysis.

[0036] (2) Connection method

[0037] The output end of the mixing circuit is connected to the X ends of the bit lines of the crossbar array through switches (switch array), and the Y ends of the word lines are sequentially connected to the detection circuit and the A / D converter ( Figure 1 ).

[0038] The computer adjusts the voltage application mode of each microelectrode pair by controlling the opening and closing states of the switches.

[0039] Step 2: Assembly of nanomaterials and construction of memristors

[0040] Selection of nanomaterials: Titanium oxide nanowires (diameter 5 nm, length 1.5 μm) are used, and their length is slightly greater than the microelectrode spacing (1 μm) to ensure that the nanowires can straddle the electrode pairs.

[0041] Process of dielectrophoretic manipulation: High-frequency AC voltage (10 6An electric field with a frequency of 10 Hz and an amplitude of 5 V is applied to the target microelectrode pair to generate a non-uniform electric field, driving the nanowires to move directionally and bridge the electrodes.

[0042] A low-frequency signal (10 Hz) is applied synchronously, and the current change is monitored in real time through a detection circuit to confirm the successful connection of the nanowires ( Figure 2 ).

[0043] Conductance value regulation:

[0044] The computer controls the switch to repeatedly apply pulses to different microelectrode pairs according to the preset synaptic weights, gradually increasing the number of nanowires bridging across.

[0045] The present invention constructs a circuit system for assembling nano-material electronic devices as shown in Figure 1 . The circuit system includes a high-frequency and low-frequency AC power supply, a mixing circuit, a switch, a crossbar array, a detection circuit, an A / D conversion circuit, and a computer. After mixing, the high-frequency and low-frequency AC power supply is connected to the bit line X end of the crossbar array through the switch. The bit line Y end of the crossbar array is sequentially connected to the detection circuit. The detection circuit identifies the required low-frequency signal, and the low-frequency signal is connected to the computer through the A / D conversion circuit. The computer controls the opening and closing of the switch according to the synaptic weight requirements, assembles a certain number of nano-materials between each microelectrode pair of the crossbar array, constructs memristor conductive channels with different conductance values, and realizes the intelligent assembly of the memristive artificial neural network hardware. Finally, a required pulse voltage V j is applied to the bit line X j , and the conductance value G j of the memristor at the intersection of the bit line X i and the word line Y ij is used as the weight value of the synapse in the neural network. This architecture stores the weight data in each memristive unit and performs in-memory computing. The output current I i on the word line is calculated by "matrix-vector multiplication" as I j V j ×G ij , that is, an artificial neural network with in-memory computing is realized.

Claims

1. A memristor based on an artificial neural network, characterized in that, It includes a cross array. The mixing circuit is electrically connected to the X end of the bit line of the cross array through a switch. The Y end of the bit line of the cross array is sequentially connected to a detection circuit. The detection circuit is used to identify the required low-frequency signal, and the low-frequency signal is connected to a computer through an A / D conversion circuit; Between each microelectrode pair of the cross array, different numbers of nanomaterials are used to construct memristor conductive channels with different conductance values. The switch is controlled according to the requirements of synaptic weights; Apply the required pulse voltage V on the bit line. Based on Ohm's law and Kirchhoff's law, calculate the output current I on the word line by vector matrix multiplication to realize a memory and computing integrated artificial neural network.

2. The memristor according to claim 1, characterized in that, The mixing circuit acts on the microelectrode pairs determined by the bit line and the word line. The X end of the bit line of the cross array is correspondingly connected to the switch, and the Y end of the word line of the cross array is sequentially connected to the detection circuit. Each time, the electrode pairs on the same word line can be manipulated; The high-frequency signal part in the mixing circuit is used for dielectrophoretic manipulation of the nanomaterials between the microelectrode pairs. The low-frequency signal part is screened by the detection circuit and used for monitoring current changes, so that the computer can analyze data and control the switch; The detection circuit adopts a second-order low-pass filter circuit to filter high-frequency signals and real-time monitor low-frequency currents of multiple frequencies, and feeds them back to the computer after AD conversion.

3. The memristor according to claim 1 or 2, characterized in that, The cross array is prepared by photolithography. The bit line and the word line are not connected. A microelectrode pair is set at the intersection of each bit line and word line, and the microelectrode spacing is 0.5 - 2 microns.

4. The memristor according to claim 1, wherein The control of the number of nanomaterials is determined by the computer according to the actual synaptic weight requirements and the change of the low-frequency signal in the circuit by controlling the opening and closing of the switch; The synaptic weight corresponds to the conductance value of the memristor conductive channel, which is determined by the number of nanomaterials assembled between each microelectrode pair in the cross array.

5. The memristor according to claim 1, characterized in that, In the memory and computing integrated artificial neural network, apply the required pulse voltage Vj on the bit line Xj. Use the conductance value Gij of the memristor at the intersection of the bit line Xj and the word line Yi as the weight value of the synapse in the neural network. The memristor stores the weight data in each memristor unit and performs in-memory computing. Calculate the output current Ii on the word line by vector matrix multiplication: Ii = vjVj×Gij.

6. The memristor according to claim 1, characterized in that, The described mixing circuit includes a mixing AC power supply with a frequency of 10 4 - 10 8 Hz, where the frequency of the low-frequency AC power supply is 1 - 100 Hz.

7. The memristor according to claim 1 or 6, characterized in that, The mixing circuit also includes an adder and a filter.

8. The memristor according to claim 1, 2 or 4, characterized in that, The nanomaterials include one of titanium oxide nanowires, zinc oxide nanowires, and tin oxide nanowires. The length of the nanowire is 0.5 microns longer than the spacing of the microelectrode pair.

9. A method for implementing a memristor based on an artificial neural network, characterized in that, It includes the following steps: S1. Construct a circuit for the operation of the artificial neural network, including a high- and low-frequency AC power supply, a mixing circuit, a switch, a cross array, a detection circuit, an A / D conversion circuit, and a computer; S2. After mixing, the high- and low-frequency AC power supply is connected to the X end of the bit line of the cross array through a switch. The Y end of the bit line of the cross array is sequentially connected to the detection circuit. The detection circuit identifies the required low-frequency signal, and the low-frequency signal is connected to the computer through the A / D conversion circuit; S3. The computer controls the opening and closing of the switch according to the synaptic weight requirements, assembles a certain number of nanomaterials between each microelectrode pair of the cross array, and constructs memristor conductive channels with different conductance values to realize the intelligent assembly of the memristive artificial neural network hardware; S4. Apply the required pulse voltage V on the bit line, and calculate the output current I on the word line through vector matrix multiplication based on Ohm's law and Kirchhoff's law, thus obtaining a high-energy-efficiency artificial neural network with in-memory computing implemented by the memristive array hardware.

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