Direct hybrid bonding method

Abstract

The invention provides a direct hybrid bonding method, which comprises the following steps of: forming a first opening in a dielectric layer on a substrate of an electronic component to define functional key bonding patterns with different sizes; second openings are formed in the blank area around the first opening in the dielectric layer to define a pseudo bonding pattern, and each second opening is in a Z-like shape formed by four rectangles when being observed from an overlook angle; forming a metal layer filling the first opening and the second opening, grinding the metal layer to the dielectric layer, and then forming a recess on the upper surface of the metal layer so as to form a bonding surface; the bonding surface is bonded with another bonding surface in a direct hybrid bonding process. The universal auxiliary graph is designed, so that the situation that new auxiliary graphs are redesigned according to different functional key graphs is avoided, the publishing efficiency can be improved, and the process quality is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a direct hybrid bonding method. Background Art

[0002] Hybrid bonding technology can significantly improve the operation speed and has been deeply studied and applied to high-performance chips such as high-speed operation / HBM in recent years. Its typical application in CIS (CMOS image sensor) is a product released by Sony Corporation, which stacks CSI / ISP (chips for processing image signals) / DRAM (dynamic random access memory) and is extremely superior in terms of high-speed / high-definition performance.

[0003] Leading manufacturers in the industry have actively laid out the direct hybrid bonding process in recent years, and companies such as TSMC / Yangtze Memory have achieved mass production.

[0004] The key technology of the direct hybrid bonding process is to bond two wafers with both metal copper and dielectric materials on their surfaces. After bonding, there should be no problems such as voids detected by C-SAM (acoustic scanning microscope).

[0005] An important means to solve the bonding failure is to uniformly design the structure of the wafer surface to ensure the local flatness and uniformity of processes such as CMP, thereby improving the bonding window.

[0006] There are many reasons for the generation of bubbles after bonding. Among them, the reason causing systematic problems is generally the lack of local uniformity after Cu CMP (chemical mechanical planarization polishing). The solution in the prior art is to add dummy bonding patterns to maintain uniformity, but the design of the dummy bonding patterns generally keeps the same size as the functional ones. The problem is that when the pitch (distance between the centers of two adjacent units) of the functional bonding metal layers of different products is different, different dummy bonding patterns need to be designed accordingly (such as Figure 1 and Figure 2 the two different-sized dummy bonding patterns shown).

[0007] To solve the above problems, a new direct hybrid bonding method needs to be proposed. Summary of the Invention

[0008] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a direct hybrid bonding method to solve the problem in the prior art that different functional bonding patterns require different corresponding dummy bonding patterns.

[0009] To achieve the above object and other related objects, the present invention provides a direct hybrid bonding method, including:

[0010] Step 1: Form a first opening in the dielectric layer on the substrate of the electronic component to define a functional bonding pattern, and the functional bonding pattern has different sizes; and

[0011] Form a second opening in the blank area around the first opening in the dielectric layer to define a pseudo-bonding pattern. When viewed from a top-down perspective, the morphology of each second opening is a "Z"-shaped pattern composed of four rectangles;

[0012] Step 2: Form a metal layer filling the first and second openings, grind the metal layer to the dielectric layer, and then form a depression on the upper surface of the metal layer to form a bonding surface;

[0013] Step 3: Bond the bonding surface to another bonding surface in a direct hybrid bonding process.

[0014] Preferably, the morphology of the second opening in Step 1 is a "Z"-shaped pattern composed of four squares.

[0015] Preferably, a preset distance is maintained between the second openings in Step 1, and the arrangement patterns are the same.

[0016] Preferably, the second opening in Step 1 needs to fill all the blank areas around the first opening in the dielectric layer.

[0017] Preferably, the first opening and the second opening in Step 1 are formed in the same etching process.

[0018] Preferably, the first opening and the second opening in Step 1 are respectively formed in different etching processes.

[0019] Preferably, the material of the metal layer in Step 2 is copper.

[0020] Preferably, the grinding method in Step 2 is chemical mechanical planarization grinding.

[0021] Preferably, a groove is formed on the upper surface of the metal layer by dry etching in Step 2.

[0022] Preferably, the functional bonding patterns and the pseudo-bonding patterns in the bonding surface and another bonding surface in Step 3 are respectively aligned and bonded.

[0023] As described above, the direct hybrid bonding method of the present invention has the following beneficial effects:

[0024] The present invention designs a universal auxiliary pattern, thereby avoiding the need to redesign a new auxiliary pattern for different functional bonding patterns, which can improve the publishing efficiency and the process quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Shown is a schematic diagram of a pseudo-bonding pattern of the prior art;

[0026] Figure 2 Shown is another schematic diagram of a pseudo-bonding pattern of the prior art;

[0027] Figure 3 Shown is a schematic diagram of the process flow of the present invention;

[0028] Figure 4 Shown is a schematic diagram of the pseudo-bonding pattern of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0029] The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0030] Please refer to Figure 2 , the present invention provides a direct hybrid bonding method, including:

[0031] Step 1, forming a first opening in the dielectric layer on the substrate of the electronic component to define a functional bonding pattern, and the functional bonding pattern has different sizes; and

[0032] forming a second opening in the blank area around the first opening in the dielectric layer to define a pseudo-bonding pattern, and the pseudo-bonding pattern is an auxiliary pattern for increasing the pattern density. When observing each second opening from a top view, the morphology of the second opening is a "Z"-shaped pattern composed of four rectangles, and its size should be adapted to different sizes of the functional bonding patterns, that is, designing a universal auxiliary pattern, thereby avoiding the need to redesign a new auxiliary pattern for different functional bonding patterns, which can improve the publishing efficiency and the process quality;

[0033] In some embodiments, the dielectric layer includes one or more dielectric materials to provide isolation functions for various device components (such as gates) and various conductive components (such as metal lines, contacts, and vias). The dielectric layer includes dielectric materials such as silicon oxide, low-k dielectric materials, other suitable dielectric materials, or combinations thereof. In some instances, the low-k dielectric materials include fluorinated silicon glass (FSG), carbon-doped silicon oxide, xerogel, aerogel, amorphous fluorocarbon, parylene, BCB (bisbenzocyclobutene), polyimide, and / or other suitable dielectric materials with a dielectric constant substantially less than that of thermally grown silicon oxide. For example, the formation of the dielectric layer includes deposition and CMP. Deposition can include spin coating, CVD, other suitable deposition techniques, or combinations thereof.

[0034] In some embodiments, referring to Figure 4 , the topography of the second opening in step one is a "Z"-shaped pattern composed of four squares, that is, there are the first to fourth squares. The first, second squares and the third, fourth squares form two rectangles, and the lower side of the second square coincides with the upper side of the third square. In other embodiments, the second opening can also be arranged in other ways.

[0035] In some embodiments, a preset distance is maintained between the second openings in step one, and the arrangement patterns are all the same.

[0036] In some embodiments, to avoid the influence of the previous layer and design issues on the depression of the current layer, the principle of "insert as much as possible" is adopted in designing the pseudo-bonding pattern. The second opening in step one needs to satisfy filling all the blank areas around the first opening in the dielectric layer.

[0037] In some embodiments, the first opening and the second opening in step one are formed in the same etching.

[0038] In some embodiments, the first opening and the second opening in step one are respectively formed in different etchings.

[0039] Step two: Form a metal layer filling the first and second openings, grind the metal layer to the dielectric layer. Due to the existence of the pseudo-bonding pattern, the depression defect caused by grinding is avoided. Then, a depression is formed on the upper surface of the metal layer to form a bonding surface;

[0040] In some embodiments, the material of the metal layer in step two is copper, and the copper layer can be formed by electroplating, physical vapor deposition, etc.

[0041] In some embodiments, the grinding method in step two is chemical mechanical planarization grinding.

[0042] In some embodiments, the upper surface of the metal layer is formed with a groove by dry etching in step two.

[0043] Step 3: Bond the bonding surface to another bonding surface in a direct hybrid bonding process.

[0044] In some embodiments, the functional bonding bond patterns and pseudo-bonding patterns in the bonding surface and another bonding surface in Step 3 are respectively aligned and bonded.

[0045] It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0046] In summary, the present invention designs a universal auxiliary pattern, thereby avoiding the need to redesign a new auxiliary pattern for different functional bonding patterns, improving the publishing efficiency and the process quality. Therefore, the present invention effectively overcomes various drawbacks in the prior art and has high industrial utilization value.

[0047] The above embodiments are only illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A direct hybrid bonding method, characterized in that, At least including: Step 1: Form a first opening in a dielectric layer above a substrate of an electronic component to define a functional bonding pattern, where the functional bonding pattern has different sizes; and Form a second opening in a blank area around the first opening in the dielectric layer to define a pseudo-bonding pattern. When viewed from a top perspective, the morphology of each second opening is a "Z"-shaped pattern composed of four rectangles; Step 2: Form a metal layer filling the first and second openings, grind the metal layer to the dielectric layer, and then form a depression on the upper surface of the metal layer to form a bonding surface; Step 3: Bond the bonding surface to another bonding surface in a direct hybrid bonding process.

2. The direct hybrid bonding method according to claim 1, characterized in that: The morphology of the second opening in Step 1 is a "Z"-shaped pattern composed of four squares.

3. The direct hybrid bonding method according to claim 1, wherein: A preset distance is maintained between the second openings in Step 1, and their arrangement manners are all the same.

4. The direct hybrid bonding method according to claim 1, characterized in that: The second opening in Step 1 needs to satisfy filling all the blank areas around the first opening in the dielectric layer.

5. The direct hybrid bonding method according to claim 1, characterized in that: The first opening and the second opening in Step 1 are formed in the same etching.

6. The direct hybrid bonding method according to claim 1, characterized in that: The first opening and the second opening in Step 1 are formed separately in different etchings.

7. The direct hybrid bonding method according to claim 1, wherein: The material of the metal layer in Step 2 is copper.

8. The direct hybrid bonding method according to claim 1, wherein: The grinding method in Step 2 is chemical mechanical planarization grinding.

9. The direct hybrid bonding method according to claim 1, characterized in that: A groove is formed on the upper surface of the metal layer in Step 2 by using a dry etching method.

10. The direct hybrid bonding method according to claim 1, characterized in that: The functional bonding patterns and the pseudo-bonding patterns in the bonding surface and another bonding surface in Step 3 are respectively aligned and bonded.

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