Methods, systems, and apparatus for forming threshold voltage offset layers

Abstract

A method includes depositing a threshold voltage offset layer on a substrate, where the layer includes a metal and has the formula M (NxCyOz), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), where (x + y) > = 0.1, where depositing the threshold voltage offset layer further includes one or more of: providing a substrate having a surface within a reaction chamber; providing a metal-containing precursor comprising a metal to the reaction chamber to contact the surface; providing one or more additional precursors comprising at least one of N or C to the reaction chamber to contact the surface; and / or purging the reaction chamber; and repeating one or more of the disclosed operations or any combination thereof in any order until a predetermined thickness of the threshold voltage offset layer is deposited on a surface.

Description

Technical Field

[0001] The present disclosure generally relates to the fields of semiconductor processing methods, systems, and devices, and to the field of electronic devices, and in particular, to methods, systems, and devices suitable for forming a threshold voltage offset layer including a metal. Background Art

[0002] The scaling of semiconductor devices (such as complementary metal oxide semiconductor (CMOS) devices) has led to significant improvements in the speed and density of integrated circuits. However, conventional device scaling techniques face significant challenges for future technology nodes.

[0003] For example, one challenge is to find a suitable conductive material for use as a gate electrode, particularly a threshold voltage offset material, in aggressively scaled CMOS devices. Accordingly, improved materials for gate electrodes are desired. In particular, such materials may include a threshold voltage offset layer and may be used for threshold voltage tuning. Summary of the Invention

[0004] The Summary of the Invention is provided to introduce a selection of concepts in a simplified form. These concepts are further described in detail in the following detailed description of example embodiments of the present disclosure. The Summary of the Invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0005] In one aspect, a method for depositing a threshold voltage offset layer on a substrate is disclosed, where the layer contains a metal and has the formula M(N x C y O z )), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), and where (x + y) ≥ 0.1. In an example, depositing the threshold voltage offset layer may further include: providing a substrate having a surface in a reaction chamber; providing a metal-containing precursor containing a metal to the reaction chamber to contact the surface; providing one or more additional precursors containing at least one of N or C to the reaction chamber to contact the surface; purging the reaction chamber; and / or repeating the above operations in any order and in any combination until a threshold voltage offset layer of a predetermined thickness is deposited on the surface. The method may include where x = 0 to 2 and y = 0 to 2 and where (x + y) ≥ 1 or the method may include where (x + y) ≥ 1.

[0006] In some embodiments, the method may include where at least one of the one or more additional precursors contains O.

[0007] In certain examples, the method may include where the surface includes an intermediate layer material, and the threshold voltage offset layer is directly deposited onto the surface of the intermediate layer material in a dipole-preferred pattern.

[0008] In various examples, the method can include where the surface includes a high-k material, and the threshold voltage shift layer is directly deposited onto the high-k material surface as a dipole last pattern.

[0009] In some embodiments, the method can include where the metal includes cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), scandium (Sc), lutetium (Lu), yttrium (Y), magnesium (Mg), lanthanum (La), or strontium (Sr), or a combination thereof.

[0010] In a specific example, the method can include where the metal-containing precursor includes a cyclopentadienyl ligand.

[0011] In various examples, the method can include where the cyclopentadienyl ligand includes at least one of cyclopentadienyl (Cp), methylcyclopentadienyl (MeCp), ethylcyclopentadienyl (EtCp), isopropylcyclopentadienyl (iPrCp), tert-butylcyclopentadienyl (tBuCp), trimethylsilylcyclopentadienyl (TMSCp), pentamethylcyclopentadienyl (Cp*), 1,2,4-triisopropylcyclopentadienyl (iPr3Cp), and 1,2,4-tri-tert-butylcyclopentadienyl (tBu3Cp).

[0012] In certain examples, the method can include where the metal-containing precursor includes an amido ligand.

[0013] In some embodiments, the method can include where the amido ligand includes at least one of dimethylamido (NMe2), diethylamido (NEt2), ethylmethylamido (NEtMe), diisopropylamido (NiPr2), tert-butylamino (NHtBu), and bis(trimethylsilyl)amido (N(SiMe3)2).

[0014] In a specific example, the method can include where the metal-containing precursor includes an imido ligand.

[0015] In various examples, the method can include where the imido ligand includes at least one of ethylimido (NEt), isopropylimido (NiPr), isobutylimido (NiBu), tert-butylimido (NtBu), and tert-pentylimido (NtPn).

[0016] In an example, the method can include where the metal-containing precursor includes an amidino ligand.

[0017] In some examples, the method can include where the amidine ligand includes at least one of N,N'-diethylacetamidine (Et2AMD), N,N'-diisopropylacetamidine (iPr2AMD), N,N'-diisopropylformamidine (iPr2FMD), N,N'-di-tert-butylacetamidine (tBu2AMD), and N,N'-di-tert-butylformamidine (tBu2FMD).

[0018] In some embodiments, the method can include where the metal-containing precursor includes a halogen ligand.

[0019] In certain examples, the method can include where the halogen ligand includes at least one of fluorine (F), chlorine (Cl), bromine (Br), or iodine (I).

[0020] In some embodiments, the method can include where the metal-containing precursor includes an alkyl ligand.

[0021] In various examples, the method can include where the alkyl ligand includes at least one of methyl (Me), ethyl (Et), isopropyl (iPr), tert-butyl (tBu), isobutyl (iBu), and neopentyl (Np).

[0022] In some examples, the method can include where the metal-containing precursor includes an alkoxide ligand.

[0023] In some embodiments, the method can include where the alkoxide ligand includes at least one of methoxide (OMe), ethoxide (OEt), isopropoxide (OiPr), tert-butoxide (OtBu), 1-methoxy-2-methyl-2-propoxide (mmp), 1-dimethylamino-2-propoxide (dmap), 1-dimethylamino-2-methyl-2-propoxide (dmamp), and 1-dimethylamino-2-methyl-2-butoxide (dmamb).

[0024] In certain examples, the method can include where the metal-containing precursor includes a diketone ligand.

[0025] In various embodiments, the method can include where the diketone ligand includes at least one of acetylacetonate (acac), 2,2,6,6-tetramethylheptane-3,5-dionate (thd), and 1,1,1,5,5,5-hexafluoropentane-2,5-dionate (hfac).

[0026] In various examples, the method can include where the metal-containing precursor includes a diazabutadiene ligand.

[0027] In certain embodiments, the diazabutadiene ligand comprises at least one of 1,4 - di - tert - butyl - 1,4 - diaza - 1,3 - butadiene (tBu2DAD), 1,4 - di - isopropyl - 1,4 - diaza - 1,3 - butadiene (iPr2DAD), 1,4 - di - sec - butyl - 1,4 - diaza - 1,3 - butadiene (sBu2DAD), and 1,4 - di - tert - pentyl - 1,4 - diaza - 1,3 - butadiene (tPN2DAD).

[0028] In some embodiments, the method can include that at least one of one or more additional precursors is a nitrogen - containing precursor.

[0029] In certain examples, the method can include that the nitrogen - containing precursor is selected from: ammonia, hydrazine, tert - butylhydrazine, dimethylhydrazine, methylhydrazine, phenylhydrazine, tert - butylamine, isobutylamine, tert - pentylamine, N2 plasma, NH3 plasma, or N2 / H2 plasma or any combination thereof.

[0030] In certain embodiments, the method can include that at least one of one or more additional precursors is a carbon - containing precursor.

[0031] In various examples, the method can include that the carbon - containing precursor is selected from: methyl iodide, diiodomethane, iodoethane, 1,2 - diiodoethane, bromoethane, 1,2 - dibromoethane, bromobenzene, iodobenzene, 1 - iodobutane, dicyclopentadiene, acetylene, propargyl bromide, allyl bromide, or allyl iodide or a combination thereof.

[0032] In some embodiments, the method can include that at least one of one or more additional precursors is an oxygen - containing precursor.

[0033] In certain embodiments, the method can include that the oxygen - containing precursor is selected from: H2O, ozone, N2O, H2O2, O2, or O2 plasma or any combination thereof.

[0034] In certain examples, the method can include that the metal includes titanium (Ti), and the metal - containing precursor includes TiF4, TiCl4, TiBr4, TiI4, Ti(NMe2)4, Ti(NEtMe)4, Ti(NEt2)4, Ti(OMe)4, Ti(OEt)4, Ti(OiPr)4, Ti(OtBu)4, Ti(MeCp)(OiPr)3, TiCp*(OMe)3, TiCp(NMe2)4, Ti(EtCp)(NMe2)4, Ti(OiPr)2(NMe2)2, Ti(OiPr)2(thd)2, Ti(OiPr)3(iPr2AMD), or Ti(Np)4 or a combination thereof.

[0035] In some examples, the method can include where the metal includes zirconium (Zr), and where the metal precursor includes ZrCl4, ZrI4, Zr(NMe2)4, Zr(NEtMe)4, Zr(NEt2)4, Zr(thd)4, Zr(OiPr)4, Zr(OtBu)4, ZrCp(NMe2)3, Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NEt2)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEtMe)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp2Cl2, ZrCp2Me2, ZrCp2(OMe)2, ZrCp2Me(OMe), ZrCp2(NMe2)2, Zr(MeCp)2Cl2, Zr(MeCp)2Me2, Zr(MeCp)2(OMe)2, Zr(MeCp)2Me(OMe), Zr(MeCp)2(NMe2)2, Zr(EtCp)2Cl2, Zr(EtCp)2Me2, Zr(EtCp)2(OMe)2, Zr(EtCp)2Me(OMe), Zr(EtCp)2(NMe2)2, ZrNp4 or ZrCp(tBu2DAD)(OiPr) or any combination thereof.

[0036] In various examples, the method can include where the metal includes hafnium (Hf), and where the metal-containing precursor includes HfCl4, HfI4, Hf(NMe2)4, Hf(NEtMe)4, Hf(NEt2)4, Hf(thd)4, Hf(OiPr)4, Hf(OtBu)4, Hf(BH4)4, HfCp(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NEt2)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEtMe)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp2Cl2, HfCp2Me2, HfCp2(OMe)2, HfCp2Me(OMe), HfCp2(NMe2)2, Hf(MeCp)2Cl2, Hf(MeCp)2Me2, Hf(MeCp)2(OMe)2, Hf(MeCp)2Me(OMe), Hf(MeCp)2(NMe2)2, Hf(EtCp)2Cl2, Hf(EtCp)2Me2, Hf(EtCp)2(OMe)2, Hf(EtCp)2Me(OMe), Hf(EtCp)2(NMe2)2, Hf(MeCp)2(mmp)Me, Hf(OtBu)2(mmp)2, Hf(iPr2FMD)2(NMe2)2, HfNp4, Hf(dmap)4 or Hf(mmp)4 or any combination thereof.

[0037] In certain examples, the method can include where the metal includes tantalum (Ta), and where the metal-containing precursor includes TaF5, TaCl5, TaBr5, TaI5, Ta(NMe2)5, Ta(NEt2)5, Ta(NEtMe)5, Ta(NtBu)(NMe2)3, Ta(NtBu)(NEt2)3, Ta(NtBu)(NEtMe)3, Ta(NiPr)(NEtMe)3, Ta(NtPn)(NMe2)3, Ta(OEt)5, TaNp3Cl2, Ta(NtBu)Cl3, Ta(NtPn)Cl3 or Ta(NtBu)(iPr2AMD)2(NMe2) or any combination thereof.

[0038] In some embodiments, the method may include where the metal includes scandium (Sc), and where the metal-containing precursor includes ScCp3, Sc(MeCp)3, Sc(EtCp)3, Sc(iPrCp)3, Sc(acac)3, Sc(thd)3, Sc(N(SiMe3)2)3, Sc(Et2AMD)3, Sc(iPr2FMD)3, Sc(iPr2AMD)3, Sc(tBu2FMD)3, Sc(tBu2AMD)3, ScCp2(iPr2FMD), Sc(MeCp)2(iPr2FMD), Sc(EtCp)2(iPr2FMD), Sc(iPrCp)2(iPr2FMD), ScCp2(iPr2AMD), Sc(MeCp)2(iPr2AMD), Sc(EtCp)2(iPr2AMD) or Sc(iPrCp)2(iPr2AMD) or any combination thereof.

[0039] In certain examples, the method may comprise where the metal comprises lutetium (Lu) and where the metal-containing precursor comprises LuCp3, Lu(MeCp)3, Lu(EtCp)3, Lu(iPrCp)3, Lu(acac)3, Lu(thd)3, Lu(OiPr)3, Lu(OtBu)3, Lu(N(SiMe3)2)3, Lu(Et2FMD)3, Lu(iPr2FMD)3, Lu(tBu2FMD)3, Lu(iPr2AMD)3, Lu(tBu2AMD)3, LuCp2(iPr2FMD), Lu(MeCp)2(iPr2FMD), Lu(EtCp)2(iPr2FMD), Lu(iPrCp)2(iPr2FMD), LuCp2(iPr2AMD), Lu(MeCp)2(iPr2AMD), Lu(EtCp)2(iPr2AMD) or Lu(iPrCp)2(iPr2AMD) or any combination thereof.

[0040] In certain examples, the method may include where the metal includes magnesium (Mg), and where the metal-containing precursor includes Mg(acac)2, Mg(hfac)2, Mg(thd)2, MgCp2, Mg(MeCp)2, Mg(EtCp)2, Mg(iPr2AMD)2, Mg(sBu2AMD)2, Mg(tBu2AMD)2, Mg(iPr2DAD)2, Mg(tBu2DAD)2 or Mg(sBu2DAD)2 or any combination thereof.

[0041] In various examples, the method can include where the metal includes lanthanum (La), and where the metal-containing precursor includes LaCp3, La(MeCp)3, La(EtCp)3, La(iPrCp)3, La(tBuCp)3, La(TMSCp)3, La(thd)3, La(N(SiMe3)2)3, La(iPr2FMD)3, La(tBu2FMD)3, La(sBu2FMD)3, La(tPn2FMD)3, La(iPr2AMD)3, La(tBu2AMD)3, La(sBu2AMD)3, La(tPn2AMD)3, LaCp2(iPr2AMD), LaCp2(tBu2AMD), LaCp2(iPr2FMD), LaCp2(tBu2FMD), La(MeCp)2(iPr2AMD), La(MeCp)2(tBu2AMD), La(MeCp)2(iPr2FMD), La(MeCp)2(tBu2FMD), La(EtCp)2(iPr2AMD), La(EtCp)2(tBu2AMD), La(EtCp)2(iPr2FMD), La(EtCp)2(tBu2FMD), La(iPrCp)2(iPr2AMD), La(iPrCp)2(tBu2AMD), La(iPrCp)2(iPr2FMD), La(iPrCp)2(tBu2FMD), La(tBuCp)2(iPr2AMD), La(tBuCp)2(tBu2AMD), La(tBuCp)2(iPr2FMD) or La(tBuCp)2(tBu2FMD) or any combination thereof.

[0042] In some examples, the method may include where the metal precursor includes at least one of the following: KCp3, K(MeCp)3, K(EtCp)3, K(iPrCp)3, K(tBuCp)3, K(TMSCp)3, K(thd)3, K(N(SiMe3)2)3, K(iPr2FMD)3, K(tBu2FMD)3, K(sBu2FMD)3, K(tPn2FMD)3, K(iPr2AMD)3, K(tBu2AMD)3, K(sBu2AMD)3, K(tPn2AMD)3, KCp2(iPr2AMD), KCp2(tBu2AMD), KCp2(iPr2FMD), KCp2(tBu2FMD), K(MeCp)2(iPr2AMD), K(MeCp)2(tBu2AMD), K(MeCp)2(iPr2FMD), K(MeCp)2(tBu2FMD), K(EtCp)2(iPr2AMD), K(EtCp)2(tBu2AMD), K(EtCp)2(iPr2FMD), K(EtCp)2(tBu2FMD), K(iPrCp)2(iPr2AMD), K(iPrCp)2(tBu2AMD), K(iPrCp)2(iPr2FMD), K(iPrCp)2(tBu2FMD), K(tBuCp)2(iPr2AMD), K(tBuCp)2(tBu2AMD), K(tBuCp)2(iPr2FMD) or K(tBuCp)2(tBu2FMD) or any combination thereof, where K is a metal selected from: cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy) or lanthanum (La).

[0043] In some embodiments, the method may include where the metal comprises yttrium (Y), and where the metal precursor comprises YCp3, Y(MeCp)3, Y(EtCp)3, Y(iPrCp)3, Y(tBuCp)3, Y(thd)3, Y(N(SiMe3)2)3, Y(tBu2FMD)3, Y(tBu2AMD)3, Y(iPr2FMD)3, Y(iPr2AMD)3, YCp2(iPr2AMD), YCp2(tBu2AMD), YCp2(iPr2FMD), YCp2(tBu2FMD), Y(MeCp)2(iPr2AMD), Y(MeCp)2(tBu2AMD), Y(MeCp)2(iPr2FMD), Y(MeCp)2(tBu2FMD), Y(EtCp)2(iPr2AMD), Y(EtCp)2(tBu2AMD), Y(EtCp)2(iPr2FMD), Y(EtCp)2(tBu2FMD), Y(iPrCp)2(iPr2AMD), Y(iPrCp)2(tBu2AMD), Y(iPrCp)2(iPr2FMD) or Y(iPrCp)2(tBu2FMD) or any combination thereof.

[0044] In a specific example, the method may comprise where the metal-containing precursor comprises at least one of the following: JCp3, J(MeCp)3, J(EtCp)3, J(iPrCp)3, J(tBuCp)3, J(thd)3, J(N(SiMe3)2)3, J(tBu2FMD)3, J(tBu2AMD)3, J(iPr2FMD)3, J(iPr2AMD)3, JCp2(iPr2AMD), JCp2(tBu2AMD), JCp2(iPr2FMD), JCp2(tBu2FMD), J(MeCp)2(iPr2AMD), J(MeCp)2(tBu2AMD), J(MeCp)2(iPr2FMD), J(MeCp)2(tBu2FMD), J(EtCp)2(iPr2AMD), J(EtCp)2(tBu2AMD), J(EtCp)2(iPr2FMD), J(EtCp)2(tBu2FMD), J(iPrCp)2(iPr2AMD), J(iPrCp)2(tBu2AMD), J(iPrCp)2(iPr2FMD) or J(iPrCp)2(tBu2FMD) or any combination thereof, where J is a metal selected from holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb) or yttrium (Y).

[0045] For the purpose of summarizing the present disclosure and the advantages achieved relative to the prior art, certain objectives and advantages of the present disclosure have been described above. It should be understood, of course, that not all such objectives or advantages may be achieved according to any particular embodiment or example of the present disclosure. Thus, for example, those skilled in the art will recognize that the examples disclosed herein may be implemented or optimized in a manner that achieves or optimizes one advantage or a group of advantages taught or suggested herein, without necessarily achieving other objectives or advantages that may be taught or suggested herein. All such examples are intended to fall within the scope of the present disclosure. These and other embodiments will become apparent to those skilled in the art from the following detailed description of certain examples with reference to the accompanying drawings, and the present disclosure is not limited to any particular example discussed. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] A more complete understanding of the embodiments of the present disclosure can be derived by reference to the detailed description and the claims when considered in conjunction with the following illustrative drawings.

[0047] Figure 1 A method according to an exemplary embodiment of the present disclosure is shown.

[0048] Figures 2A to 2C An exemplary structure according to an embodiment of the present disclosure is shown.

[0049] Figure 3 An exemplary structure according to an embodiment of the present disclosure is shown.

[0050] Figure 4 An exemplary structure according to an embodiment of the present disclosure is shown.

[0051] Figure 5 A reactor system according to another exemplary embodiment of the present disclosure is shown.

[0052] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION

[0053] The detailed description of the various examples in this document refers to the accompanying drawings, which illustrate exemplary examples by way of illustration. Although these exemplary examples are described in sufficient detail to enable those skilled in the art to practice the present disclosure, it should be understood that other examples can be implemented and logical, chemical, and / or mechanical changes can be made without departing from the spirit and scope of the present disclosure. Therefore, the detailed description herein is given for purposes of illustration only and not limitation. For example, the steps recited in any method or process description can be executed in any combination and / or order and are not limited to the presented combination and / or order. In addition, one or more steps from one of the disclosed methods or processes can be combined with one or more steps from another of the disclosed methods or processes in any suitable combination and / or order. Further, any function or step can be outsourced to and / or performed by one or more third parties. Additionally, any reference to the singular includes plural examples, and any reference to more than one component can include a singular example.

[0054] Although certain embodiments and examples are disclosed below, those skilled in the art will understand that the present disclosure extends beyond the specifically disclosed embodiments and / or the uses of the present disclosure and its obvious modifications and equivalents. Accordingly, it is intended that the scope of the present disclosure not be limited by the specific examples described herein.

[0055] The illustrations presented herein are not meant to be actual views of any particular material, device, structure, or equipment, but merely representations for describing the examples of the present disclosure.

[0056] As used herein, the term "atomic layer deposition" (ALD) can refer to a vapor deposition process in which deposition cycles are carried out in a processing chamber, preferably a plurality of consecutive deposition cycles. Generally, during each cycle, a precursor is chemisorbed onto the deposition surface (e.g., a substrate surface or the surface of a previously deposited underlying layer, such as a material from a previous ALD cycle), forming a monolayer or sub-monolayer that does not readily react with additional precursor (i.e., a self-limiting reaction). Thereafter, if desired, a reactant (e.g., another precursor or a reactive gas) can subsequently be introduced into the processing chamber for converting the chemisorbed precursor into the desired material on the deposition surface. Generally, this reactant is capable of further reacting with the precursor. In addition, a purge step can also be utilized during each cycle to remove excess precursor and / or to remove excess reactant and / or reaction by-products from the processing chamber after the conversion of the chemisorbed precursor. Further, as used herein, the term "atomic layer deposition" is also intended to include processes designated by related terms, such as "chemical vapor atomic layer deposition", "atomic layer epitaxy" (ALE), molecular beam epitaxy (MBE), gas-source MBE, or organometallic MBE, as well as chemical beam epitaxy when carried out with alternating pulses of precursor compositions, reactive gases, and purge gases (e.g., an inert carrier gas).

[0057] As used herein, the term "chemical vapor deposition" (CVD) can refer to any process in which a substrate is exposed to one or more volatile precursors that react and / or decompose on the surface of the substrate to produce a desired deposition.

[0058] In addition, in the present disclosure, any two numbers of a variable can constitute a workable range of the variable, and any indicated range can include or exclude the endpoints. Additionally, any value of the indicated variable (whether or not it is indicated with "about") can refer to an exact value or an approximate value and include equivalent values, and can refer to an average value, a median value, a representative value, a majority value, etc. Further, in the present disclosure, the terms "comprising," "consisting of," and "having" can independently refer to "generally or broadly including," "including," "substantially consisting of," or "consisting of" in some examples. In the present disclosure, the meaning of any defined term does not necessarily exclude the ordinary and customary meanings in some examples.

[0059] As transistor scaling in logic devices progresses forward, there will be less available space to increase transistor density and reduce power consumption. Interface dipole engineering has attracted increasing attention as a volumeless effective work function (eWF) and threshold voltage (Vt) tuning technique to address scaling challenges. A threshold voltage offset layer can enhance semiconductor device performance by modulating the effective work function (EWF) of a metal-oxide-semiconductor (MOS) device. In some embodiments, the threshold voltage offset layer can be formed, for example, by a deposition process above or directly on the gate dielectric of a metal-oxide-semiconductor (MOS) device, and the properties of the threshold voltage offset layer (including but not limited to material composition, thickness, and deposition method) can change the band alignment in the MOS device to provide a device with preferred operating performance.

[0060] In some embodiments, the threshold offset layer includes oxygen and can produce SiO at the interface x , which can increase the equivalent oxide thickness (EOT) of the device. Therefore, it may be desirable to fabricate a threshold voltage offset layer made of a material with a lower oxygen content or an oxygen-free material and substantially free of oxygen or having a reduced oxygen composition as a way to control the effective oxide thickness to improve the electrical performance of the final device.

[0061] Compared with the dipole-last (DL) scheme in which the threshold voltage offset layer is deposited on a high-k dielectric, the dipole-first (DF) scheme in which the threshold voltage offset layer is deposited on, for example, a SiO2 interface layer (IL) before depositing the high-k dielectric can achieve a reduced thermal budget for the gate stack process and provide a greater offset. However, this may degrade the interface quality of the IL (e.g., IL regrowth may occur during the drive-in anneal) and result in an increase in the effective oxide thickness (EOT) penalty.

[0062] The present disclosure includes methods, systems, and devices for forming semiconductor structures including a threshold voltage offset layer. The present disclosure describes alternative n-dipole candidates that can have a reduced EOT penalty even in a dipole-first scenario and are more integration-friendly for future logic structures such as gate-all-around (GAA) transistors and complementary field-effect transistors (CFETs). Metal-containing candidates with less oxygen content or no oxygen or substantially no oxygen (e.g., candidates containing cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), scandium (Sc), lutetium (Lu), yttrium (Y), magnesium (Mg), lanthanum (La), or strontium (Sr) or combinations thereof) (e.g., scandium nitride (ScN x ), scandium oxynitride (ScO x N y ), scandium carbide (ScC x ), scandium oxycarbide (ScO x C y ), lanthanum oxynitride (LaO x N y ), lanthanum oxycarbide (LaO x C y ), lanthanum oxycarbide (LaO x C y ) or combinations thereof) can provide finer tunability and a reduced EOT penalty compared to n-dipole candidates with a larger oxygen content or composition). This can help prevent or reduce the extent of IL regrowth because the amount of oxygen around the IL interface can be more sensitive when the threshold voltage offset layer is deposited directly on top.

[0063] Exemplary methods can be used, for example, to form gate electrodes, and / or to form metal layers suitable for metal-oxide semiconductor (MOS) applications (e.g., as work function layers and / or threshold voltage offset layers, dipoles, or flat band shifters), such as in the formation of complementary MOS (CMOS) devices, as an etch stop layer, and / or as a barrier layer or liner layer (e.g., in FEOL, MEOL, and BEOL processing). For example, a metal threshold voltage offset layer can be used to form logic devices, dynamic random access memories (DRAM), three-dimensional NAND devices, metal layer gates for logic devices, n-dipole layers for logic devices, etc. Such n-dipole candidates can reduce the EOT penalty and may be more integration-friendly for future logic structures such as gate-all-around (GAA) transistors and complementary field-effect transistors (CFETs). However, unless otherwise specified, the present invention is not necessarily limited to these examples.

[0064] In the present disclosure, "gas" can include materials that are gases at normal temperature and pressure (NTP), evaporated solids, and / or evaporated liquids, and can be composed of a single gas or a gas mixture, depending on the context. Gases other than those being processed (i.e., gases introduced without passing through a gas distribution assembly, other gas distribution devices, etc.) can be used, for example, to seal a reaction space, and can include sealing gases such as noble gases. In some cases, the term "precursor" can refer to a compound that participates in a chemical reaction to produce another compound, and particularly refers to a compound that constitutes the film matrix or the main backbone of the film; the term "reactant" can be used interchangeably with the term precursor. The term "inert gas" can refer to a gas that does not participate in a chemical reaction and / or does not become a part of the film matrix to a significant extent. Exemplary inert gases include helium, argon, and any combination thereof. In some cases, the inert gas can include nitrogen and / or hydrogen.

[0065] As used herein, the term "substrate" can refer to any one or more underlying materials that can be used to form or on which a device, circuit, or film can be formed. The substrate can comprise a bulk material such as silicon (e.g., single-crystalline silicon), other Group IV materials (e.g., germanium), or other semiconductor materials (e.g., Group II-VI or Group III-V semiconductor materials), and can comprise one or more layers overlying or underlying the bulk material. Additionally, the substrate can include various features formed within or on at least a portion of the layers of the substrate, such as recesses, protrusions, etc. For example, the substrate can include a bulk semiconductor material and an insulating or dielectric material layer covering at least a portion of the bulk semiconductor material.

[0066] As used herein, the terms "film" and / or "layer" can refer to any continuous or discontinuous structure and material, such as a material deposited by the methods disclosed herein. For example, the film and / or layer can include two-dimensional materials, three-dimensional materials, nanoparticles, or even partial or complete molecular layers or partial or complete atomic layers or atomic and / or molecular clusters. The film or layer can include a material or layer having pinholes, which can be at least partially continuous.

[0067] As used herein, "structure" can be or include a substrate as described herein. The structure can include one or more layers covering the substrate, such as one or more layers formed according to the methods described herein. A device portion can be or include a structure.

[0068] The term "cyclic deposition process" or "cyclic deposition process" can refer to the sequential introduction of precursors (and / or reactants) into a reaction chamber to deposit a layer on a substrate, and includes processing techniques such as atomic layer deposition (ALD), cyclic chemical vapor deposition (cyclic CVD), and hybrid cyclic deposition processes that include an ALD component and a cyclic CVD component.

[0069] As used herein, "oxygen-free" or "substantially oxygen-free" can refer to a material that is oxygen-free or substantially oxygen-free, such as a metal layer that contains less than about 7% oxygen, or less than about 5% oxygen, or less than about 4% oxygen, or less than about 3% oxygen, or less than about 2% oxygen, or less than about 1% oxygen, or less than about 0.1% oxygen (in this context, "about" means ±0.05%).

[0070] In some examples, the metal components of the threshold voltage shift layer can include cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), scandium (Sc), lutetium (Lu), yttrium (Y), magnesium (Mg), lanthanum (La), or strontium (Sr), or a combination thereof.

[0071] In addition, in the present disclosure, any two numbers of a variable can constitute a workable range of the variable, and any indicated range can include or exclude endpoints. Additionally, any value of the indicated variable (whether or not it is indicated by "about") can refer to an exact value or an approximate value and include equivalents, and can refer to an average value, a median value, a representative value, a majority value, etc. Further, in the present disclosure, the terms "comprising," "consisting of," and "having" independently refer to "usually or broadly including," "including," "substantially consisting of," or "consisting of" in some embodiments. In the present disclosure, the meaning of any defined term does not necessarily exclude the ordinary and customary meaning in some embodiments.

[0072] The present disclosure may use the following abbreviations: Me may refer to methyl, Et may refer to ethyl, iPr may refer to isopropyl, tBu may refer to tert-butyl, iBu may refer to isobutyl, Np may refer to neopentyl, Cp may refer to cyclopentadienyl, MeCp may refer to methylcyclopentadienyl, EtCp may refer to ethylcyclopentadienyl, iPrCp may refer to isopropylcyclopentadienyl, nPrCp may refer to n-propylcyclopentadienyl, tBuCp may refer to tert-butylcyclopentadienyl, TMSCp may refer to trimethylsilylcyclopentadienyl, nPr may refer to n-propyl, nBu may refer to n-butyl, acac may refer to acetylacetonate, hfac may refer to hexafluoroacetylacetonate, OMe may refer to methoxide, OEt may refer to ethoxide, OiPr may refer to isopropoxide, OtBu may refer to tert-butoxide, mmp may refer to 1-methoxy-2-methyl-2-propoxide, dmap may refer to 1-dimethylamino-2-propoxide, dmamp may refer to 1-dimethylamino-2-methyl-2-propoxide, dmamb may refer to 1-dimethylamino-2-methyl-2-butoxide, acac may refer to acetylacetonate, hfac may refer to 1,1,1,5,5,5-hexafluoropentane-2,5-dionate, thd may refer to 2,2,6,6-tetramethylheptane-3,5-dionate, phen may refer to phenanthroline, tBu2DAD may refer to 1,4-di-tert-butyl-1,4-diaza-1,3-butadiene, iPr2DAD may refer to 1,4-diisopropyl-1,4-diaza-1,3-butadiene, sBu2DAD may refer to 1,4-di-tert-butyl-1,4-diaza-1,3-butadiene, and tPN2DAD may refer to 1,4-di-tert-pentyl-1,4-diaza-1,3-butadiene.

[0073] Figure 1 Illustrated is an example process 100 according to an exemplary embodiment of the present disclosure. The process 100 will be described with reference to Figure 1-2C the description of process 100.

[0074] In the example, the process 100 may be used, for example, to form a structure including a threshold voltage offset layer (e.g., Figures 2A to 2C the threshold voltage offset layer 208 shown in x C y O z ), which may include a metal having the formula M(N x C y O z ), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), and where (x + y) ≥ 0.1. In some embodiments, (x + y) ≥ 1.0. Thus, in the example, the threshold voltage offset layer 208 may include a reduced amount of oxygen, may be oxygen-free, or may be substantially oxygen-free. The threshold voltage offset layer may be used during the formation of a device (such as the devices described herein). However, unless otherwise stated, the method is not limited to such applications.

[0075] Process 100 includes the following steps: providing a substrate in a reaction chamber of a reactor (step 102), and depositing a layer including a threshold voltage shift layer onto a surface of the substrate using a cyclic deposition process (step 104).

[0076] During step 102, a substrate is provided in the reaction chamber. The reaction chamber used during step 102 can be or include the reaction chamber of a chemical vapor deposition reactor system configured to perform a cyclic deposition process. The reaction chamber can be a stand-alone reaction chamber or part of a cluster tool.

[0077] Step 102 can include heating the substrate in the reaction chamber to a desired deposition temperature. In some embodiments of the present disclosure, step 102 includes heating the substrate to a temperature below 800 °C. For example, in some embodiments of the present disclosure, heating the substrate to the deposition temperature can include heating the substrate to a temperature between about 20 °C and 800 °C, between about 100 °C and 400 °C, between about 20 °C and 300 °C, or between about 20 °C and 200 °C.

[0078] In addition to controlling the temperature of the substrate, the pressure in the reaction chamber can also be adjusted. For example, in some embodiments of the present disclosure, the pressure in the reaction chamber during step 102 can be less than 760 Torr or between about 0.1 Torr and 760 Torr, or between about 1 Torr and 100 Torr, or between about 1 Torr and 10 Torr.

[0079] During step 104, a threshold voltage shift layer is deposited onto the surface of the substrate using a cyclic deposition process. As described above, the cyclic deposition process can include cyclic CVD, ALD, or a hybrid cyclic CVD / ALD process. For example, in some embodiments, the growth rate of a particular ALD process may be lower compared to a CVD process. One way to increase the growth rate can be to operate at a deposition temperature higher than the deposition temperature typically employed in an ALD process, resulting in some portions of a chemical vapor deposition process, but still utilizing the sequential introduction of reactants. Such a process can be referred to as cyclic CVD. In some embodiments, the cyclic CVD process can include introducing two or more reactants into the reaction chamber, where there can be an overlapping time period between the two or more reactants in the reaction chamber, resulting in both a deposited ALD component and a deposited CVD component. This is referred to as a hybrid process.

[0080] According to a further example, the cyclic deposition process can include pulsing and / or flowing a metal-containing precursor (step 106) and / or pulsing and / or flowing an additional precursor (step 108) into the reaction chamber. Such pulsing and / or flowing of the metal-containing precursor (step 106) and / or the additional precursor (step 108) can be sequential, simultaneous, cyclic, and / or repetitive, and the claimed subject matter is not limited in this regard. In certain examples, the metal-containing precursor can be an oxygen-free or substantially oxygen-free metal-containing precursor. Similarly, the additional precursor can be an oxygen-free or substantially oxygen-free additional precursor.

[0081] By way of specific example, the metal in the metal-containing precursor can include cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), scandium (Sc), lutetium (Lu), yttrium (Y), magnesium (Mg), lanthanum (La), or strontium (Sr) or a combination thereof. The additional precursor can contain at least one of nitrogen (N) or carbon (C). In some embodiments, the additional precursor can be oxygen-free or substantially oxygen-free. In some embodiments, the additional precursor can contain oxygen (O).

[0082] In some examples, the metal-containing precursor can contain a cyclopentadienyl ligand. In some examples, such a cyclopentadienyl ligand can include at least one of cyclopentadienyl (Cp), methylcyclopentadienyl (MeCp), ethylcyclopentadienyl (EtCp), isopropylcyclopentadienyl (iPrCp), tert-butylcyclopentadienyl (tBuCp), trimethylsilylcyclopentadienyl (TMSCp), pentamethylcyclopentadienyl (Cp*), 1,2,4-triisopropylcyclopentadienyl (iPr3Cp), and 1,2,4-tri-tert-butylcyclopentadienyl (tBu3Cp).

[0083] In various examples, the metal-containing precursor can contain an amido ligand. In some examples, such an amido ligand can include at least one of dimethylamido (NMe2), diethylamido (NEt2), ethylmethylamido (NEtMe), diisopropylamido (NiPr2), tert-butylamido (NHtBu), and bis(trimethylsilyl)amido (N(SiMe3)2).

[0084] In some examples, the metal-containing precursor can include an imido ligand. In certain examples, such an imido ligand can include at least one of ethylimido (NEt), isopropylimido (NiPr), isobutylimido (NiBu), tert-butylimido (NtBu), and tert-pentylimido (NtPn).

[0085] In other specific examples, the metal-containing precursor may include an amidine ligand. In some examples, such an amidine ligand may include at least one of N,N'-diethylacetamidine (Et2AMD), N,N'-diisopropylacetamidine (iPr2AMD), N,N'-diisopropylformamidine (iPr2FMD), N,N'-di-tert-butylacetamidine (tBu2AMD), and N,N'-di-tert-butylformamidine (tBu2FMD).

[0086] In a specific example, the metal-containing precursor may include a halogen ligand. In some examples, such a halogen ligand may include at least one of (F) fluorine, (Cl) chlorine, (Br) bromine, or (I) iodine.

[0087] In some examples, the metal-containing precursor may include an alkyl ligand. In certain examples, such an alkyl ligand may include at least one of methyl (Me), ethyl (Et), isopropyl (iPr), tert-butyl (tBu), isobutyl (iBu), and neopentyl (Np).

[0088] In various embodiments, the metal-containing precursor may include an alkoxide ligand. In some examples, such an alkoxide ligand may include at least one of methoxide (OMe), ethoxide (OEt), isopropoxide (OiPr), tert-butoxide (OtBu), 1-methoxy-2-methyl-2-propoxide (mmp), 1-dimethylamino-2-propoxide (dmap), 1-dimethylamino-2-methyl-2-propoxide (dmamp), and 1-dimethylamino-2-methyl-2-butoxide (dmamb).

[0089] In certain embodiments, the metal-containing precursor may include a diketonate ligand. In some examples, such a diketonate ligand may include at least one of acetylacetonate (acac), 2,2,6,6-tetramethylheptane-3,5-diketonate (thd), and 1,1,1,5,5,5-hexafluoropentane-2,5-diketonate (hfac).

[0090] In some examples, the metal-containing precursor may include a diazabutadiene ligand. In some examples, such a diazabutadiene ligand may include at least one of 1,4-di-tert-butyl-1,4-diaza-1,3-butadiene (tBu2DAD), 1,4-diisopropyl-1,4-diaza-1,3-butadiene (iPr2DAD), 1,4-di-sec-butyl-1,4-diaza-1,3-butadiene (sBu2DAD), and 1,4-di-tert-pentyl-1,4-diaza-1,3-butadiene (tPN2DAD).

[0091] In certain embodiments, one of the one or more additional precursors can be a nitrogen-containing precursor. In some examples, the nitrogen-containing precursor can be selected from: ammonia, hydrazine, tert-butyl hydrazine, dimethyl hydrazine, methyl hydrazine, phenyl hydrazine, tert-butylamine, isobutylamine, tert-pentylamine, N2 plasma, NH3 plasma, or N2 / H2 plasma or any combination thereof.

[0092] In some embodiments, one of the one or more additional precursors can be a carbon-containing precursor. In some examples, the carbon-containing precursor can be selected from: methyl iodide, diiodomethane, iodoethane, 1,2-diiodoethane, bromoethane, 1,2-dibromoethane, bromobenzene, iodobenzene, 1-iodobutane, dicyclopentadiene, acetylene, propargyl bromide, allyl bromide, or allyl iodide or a combination thereof.

[0093] In some embodiments, one of the one or more additional precursors is an oxygen-containing precursor. In some examples, the oxygen-containing precursor can be selected from: H2O, ozone, N2O, H2O2, O2, or O2 plasma or any combination thereof.

[0094] In a specific example, the metal can include titanium (Ti), and the metal-containing precursor can include TiF4, TiCl4, TiBr4, TiI4, Ti(NMe2)4, Ti(NEtMe)4, Ti(NEt2)4, Ti(OMe)4, Ti(OEt)4, Ti(OiPr)4, Ti(OtBu)4, Ti(MeCp)(OiPr)3, TiCp*(OMe)3, TiCp(NMe2)4, Ti(EtCp)(NMe2)4, Ti(OiPr)2(NMe2)2, Ti(OiPr)2(thd)2, Ti(OiPr)3(iPr2AMD), or Ti(Np)4 or a combination thereof.

[0095] In some examples, the metal can include zirconium (Zr), and the metal-containing precursor can include ZrCl4, ZrI4, Zr(NMe2)4, Zr(NEtMe)4, Zr(NEt2)4, Zr(thd)4, Zr(OiPr)4, Zr(OtBu)4, ZrCp(NMe2)3, Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NEt2)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEtMe)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp2Cl2, ZrCp2Me2, ZrCp2(OMe)2, ZrCp2Me(OMe), ZrCp2(NMe2)2, Zr(MeCp)2Cl2, Zr(MeCp)2Me2, Zr(MeCp)2(OMe)2, Zr(MeCp)2Me(OMe), Zr(MeCp)2(NMe2)2, Zr(EtCp)2Cl2, Zr(EtCp)2Me2, Zr(EtCp)2(OMe)2, Zr(EtCp)2Me(OMe), Zr(EtCp)2(NMe2)2, ZrNp4 or ZrCp(tBu2DAD)(OiPr) or any combination thereof.

[0096] In various examples, the metal can include hafnium (Hf), and the metal-containing precursor can include HfCl4, HfI4, Hf(NMe2)4, Hf(NEtMe)4, Hf(NEt2)4, Hf(thd)4, Hf(OiPr)4, Hf(OtBu)4, Hf(BH4)4, HfCp(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NEt2)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEtMe)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp2Cl2, HfCp2Me2, HfCp2(OMe)2, HfCp2Me(OMe), HfCp2(NMe2)2, Hf(MeCp)2Cl2, Hf(MeCp)2Me2, Hf(MeCp)2(OMe)2, Hf(MeCp)2Me(OMe), Hf(MeCp)2(NMe2)2, Hf(EtCp)2Cl2, Hf(EtCp)2Me2, Hf(EtCp)2(OMe)2, Hf(EtCp)2Me(OMe), Hf(EtCp)2(NMe2)2, Hf(MeCp)2(mmp)Me, Hf(OtBu)2(mmp)2, Hf(iPr2FMD)2(NMe2)2, HfNp4, Hf(dmap)4 or Hf(mmp)4 or any combination thereof.

[0097] In a specific example, the metal can include tantalum (Ta), and the metal-containing precursor can include TaF5, TaCl5, TaBr5, TaI5, Ta(NMe2)5, Ta(NEt2)5, Ta(NEtMe)5, Ta(NtBu)(NMe2)3, Ta(NtBu)(NEt2)3, Ta(NtBu)(NEtMe)3, Ta(NiPr)(NEtMe)3, Ta(NtPn)(NMe2)3, Ta(OEt)5, TaNp3Cl2, Ta(NtBu)Cl3, Ta(NtPn)Cl3 or Ta(NtBu)(iPr2AMD)2(NMe2) or any combination thereof.

[0098] In various examples, the metal can include scandium (Sc), and the metal-containing precursor can include ScCp3, Sc(MeCp)3, Sc(EtCp)3, Sc(iPrCp)3, Sc(acac)3, Sc(thd)3, Sc(N(SiMe3)2)3, Sc(Et2AMD)3, Sc(iPr2FMD)3, Sc(iPr2AMD)3, Sc(tBu2FMD)3, Sc(tBu2AMD)3, ScCp2(iPr2FMD), Sc(MeCp)2(iPr2FMD), Sc(EtCp)2(iPr2FMD), Sc(iPrCp)2(iPr2FMD), ScCp2(iPr2AMD), Sc(MeCp)2(iPr2AMD), Sc(EtCp)2(iPr2AMD), or Sc(iPrCp)2(iPr2AMD) or any combination thereof.

[0099] In certain examples, the metal can include lutetium (Lu), and the metal-containing precursor can include LuCp3, Lu(MeCp)3, Lu(EtCp)3, Lu(iPrCp)3, Lu(acac)3, Lu(thd)3, Lu(OiPr)3, Lu(OtBu)3, Lu(N(SiMe3)2)3, Lu(Et2FMD)3, Lu(iPr2FMD)3, Lu(tBu2FMD)3, Lu(iPr2AMD)3, Lu(tBu2AMD)3, LuCp2(iPr2FMD), Lu(MeCp)2(iPr2FMD), Lu(EtCp)2(iPr2FMD), Lu(iPrCp)2(iPr2FMD), LuCp2(iPr2AMD), Lu(MeCp)2(iPr2AMD), Lu(EtCp)2(iPr2AMD), or Lu(iPrCp)2(iPr2AMD) or any combination thereof.

[0100] In various examples, the metal can include magnesium (Mg), and the metal-containing precursor can include Mg(acac)2, Mg(hfac)2, Mg(thd)2, MgCp2, Mg(MeCp)2, Mg(EtCp)2, Mg(iPr2AMD)2, Mg(sBu2AMD)2, Mg(tBu2AMD)2, Mg(iPr2DAD)2, Mg(tBu2DAD)2, or Mg(sBu2DAD)2 or any combination thereof.

[0101] In a specific example, the metal can include lanthanum (La), and the metal-containing precursor can include LaCp3, La(MeCp)3, La(EtCp)3, La(iPrCp)3, La(tBuCp)3, La(TMSCp)3, La(thd)3, La(N(SiMe3)2)3, La(iPr2FMD)3, La(tBu2FMD)3, La(sBu2FMD)3, La(tPn2FMD)3, La(iPr2AMD)3, La(tBu2AMD)3, La(sBu2AMD)3, La(tPn2AMD)3, LaCp2(iPr2AMD), LaCp2(tBu2AMD), LaCp2(iPr2FMD), LaCp2(tBu2FMD), La(MeCp)2(iPr2AMD), La(MeCp)2(tBu2AMD), La(MeCp)2(iPr2FMD), La(MeCp)2(tBu2FMD), La(EtCp)2(iPr2AMD), La(EtCp)2(tBu2AMD), La(EtCp)2(iPr2FMD), La(EtCp)2(tBu2FMD), La(iPrCp)2(iPr2AMD), La(iPrCp)2(tBu2AMD), La(iPrCp)2(iPr2FMD), La(iPrCp)2(tBu2FMD), La(tBuCp)2(iPr2AMD), La(tBuCp)2(tBu2AMD), La(tBuCp)2(iPr2FMD) or La(tBuCp)2(tBu2FMD) or any combination thereof.

[0102] In some examples, the metal precursor may include KCp3, K(MeCp)3, K(EtCp)3, K(iPrCp)3, K(tBuCp)3, K(TMSCp)3, K(thd)3, K(N(SiMe3)2)3, K(iPr2FMD)3, K(tBu2FMD)3, K(sBu2FMD)3, K(tPn2FMD)3, K(iPr2AMD)3, K(tBu2AMD)3, K(sBu2AMD)3, K(tPn2AMD)3, KCp2(iPr2AMD), KCp2(tBu2AMD), KCp2(iPr2FMD), KCp2(tBu2FMD), K(MeCp)2(iPr2AMD), K(MeCp)2(tBu2AMD), K(MeCp)2(iPr2FMD), K(MeCp)2(tBu2FMD), K(EtCp)2(iPr2AMD), K(EtCp)2(tBu2AMD), K(EtCp)2(iPr2FMD), K(EtCp)2(tBu2FMD), K(iPrCp)2(iPr2AMD), K(iPrCp)2(tBu2AMD), K(iPrCp)2(iPr2FMD), K(iPrCp)2(tBu2FMD), K(tBuCp)2(iPr2AMD), K(tBuCp)2(tBu2AMD), K(tBuCp)2(iPr2FMD) or K(tBuCp)2(tBu2FMD) or any combination thereof, where K may be a metal selected from: cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy) or lanthanum (La).

[0103] In some examples, the metal can include yttrium (Y), and the metal-containing precursor can include YCp3, Y(MeCp)3, Y(EtCp)3, Y(iPrCp)3, Y(tBuCp)3, Y(thd)3, Y(N(SiMe3)2)3, Y(tBu2FMD)3, Y(tBu2AMD)3, Y(iPr2FMD)3, Y(iPr2AMD)3, YCp2(iPr2AMD), YCp2(tBu2AMD), YCp2(iPr2FMD), YCp2(tBu2FMD), Y(MeCp)2(iPr2AMD), Y(MeCp)2(tBu2AMD), Y(MeCp)2(iPr2FMD), Y(MeCp)2(tBu2FMD), Y(EtCp)2(iPr2AMD), Y(EtCp)2(tBu2AMD), Y(EtCp)2(iPr2FMD), Y(EtCp)2(tBu2FMD), Y(iPrCp)2(iPr2AMD), Y(iPrCp)2(tBu2AMD), Y(iPrCp)2(iPr2FMD) or Y(iPrCp)2(tBu2FMD) or any combination thereof.

[0104] In certain examples, the metal-containing precursor can include JCp3, J(MeCp)3, J(EtCp)3, J(iPrCp)3, J(tBuCp)3, J(thd)3, J(N(SiMe3)2)3, J(tBu2FMD)3, J(tBu2AMD)3, J(iPr2FMD)3, J(iPr2AMD)3, JCp2(iPr2AMD), JCp2(tBu2AMD), JCp2(iPr2FMD), JCp2(tBu2FMD), J(MeCp)2(iPr2AMD), J(MeCp)2(tBu2AMD), J(MeCp)2(iPr2FMD), J(MeCp)2(tBu2FMD), J(EtCp)2(iPr2AMD), J(EtCp)2(tBu2AMD), J(EtCp)2(iPr2FMD), J(EtCp)2(tBu2FMD), J(iPrCp)2(iPr2AMD), J(iPrCp)2(tBu2AMD), J(iPrCp)2(iPr2FMD) or J(iPrCp)2(tBu2FMD) or any combination thereof, where J can be a metal selected from holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb) or yttrium (Y).

[0105] The cyclic deposition process can include (e.g., individually and / or sequentially) providing a metal-containing precursor to the reaction chamber (step 106) and providing at least one additional precursor to the reaction chamber (step 108). A purge can be performed at any point during the cyclic process, e.g., to remove by-products (step 110). The purge step 110 can be performed before or after providing each of the metal-containing precursor and one or more additional precursors and / or reactants to the chamber.

[0106] In some cases, two or more precursors and / or two or more reactant streams flow into the reaction chamber such that two or more precursors and / or two or more reactants overlap within the reaction chamber. For example, one or more metal-containing precursors and / or one or more additional precursors can co-flow into the reaction chamber.

[0107] In the case of a thermal cyclic deposition process, the duration of the step of providing a metal-containing precursor and / or one or more additional precursors to the reaction chamber can be relatively long to allow the reactants to react with the precursor or its derivatives. For example, the duration can be greater than or equal to 0.1 second or greater than or equal to 60 seconds or between about 0.1 second and 60 seconds.

[0108] As part of step 104, the reaction chamber can be purged using a vacuum and / or an inert gas (step 110) to, e.g., mitigate gas-phase reactions between reactants and enable self-saturating surface reactions—e.g., in the case of ALD. Additionally or alternatively, the substrate can be moved to contact a first gas-phase reactant and a second gas-phase reactant, respectively. Before the substrate contacts the next reactive chemical, excess chemicals and reaction by-products (if any) can be removed from the substrate surface or the reaction chamber, e.g., by purging the reaction space or by moving the substrate. The reaction chamber can be purged before and / or after providing the metal-containing precursor to the reaction chamber (step 106) and / or before and / or after providing one or more additional precursors to the reaction chamber (step 108).

[0109] In some embodiments of the present disclosure, process 100 includes repeating unit deposition cycles that include (1) providing one or more metal-containing precursors to the reaction chamber and (2) providing one or more additional precursors to the reaction chamber, with an optional purge or multiple steps after step (1) and / or step (2). Based on, e.g., the desired thickness of the threshold voltage offset layer, the deposition cycles can be repeated one or more times. For example, if the thickness of the threshold voltage offset layer is less than the thickness required for a particular application, the steps of (1) providing a metal-containing precursor to the reaction chamber and (2) providing one or more additional precursors to the reaction chamber can be repeated one or more times. Once the threshold voltage offset layer has been deposited to the desired thickness, the substrate can be subjected to additional processes to form a device structure and / or a device.

[0110] In some embodiments, on or in a structure having an aspect ratio (height / width) greater than about 2, greater than about 5, greater than about 10, greater than about 25, greater than about 50, greater than about 100, or between about 10 and 100 or between about 5 and 25, the step coverage of the threshold voltage offset layer is equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or about 95%, or about 98%, or about 99% or greater.

[0111] The growth rate of the threshold voltage offset layer can be relatively low - for example, less than 3 Å / cycle, between about 0.2 Å / cycle and 3 Å / cycle, or about 0.1 Å / cycle to about 1 Å / cycle. The relatively low growth rate can facilitate the desired precision of the film thickness and / or film thickness uniformity. In an example, the threshold voltage offset layers can be operative even if not fully closed because their total thickness can be less than one Å. Thus, in the case of such thin layers, a low growth rate and high precision can be advantageous.

[0112] Figure 2A Illustrate the structure / portion of device 200 according to additional examples of the present invention. Device or structure 200 includes a substrate 202, a dielectric or insulating material 205, and a threshold voltage offset layer 208. In one example and as discussed in more detail above, the threshold voltage offset layer 208 can include a metal represented by the formula M(N x C y O z )), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), where (x + y) ≥ 0.1. In some examples, (x + y) ≥ 0. In some examples, (x + y) ≥ 1. In some examples, x = 0 to 2 and y = 0 to 2. In some examples, the threshold voltage offset layer 208 is oxygen-free or substantially oxygen-free. In the illustrated example, structure 200 further includes an additional conductive layer 210. Substrate 202 can be or include any of the substrate materials described herein.

[0113] The dielectric or insulating material 205 can include one or more dielectric or insulating material layers. By way of example, the dielectric or insulating material 205 can include an interface layer 204 and a high-k material 206 deposited on the interface layer 204. The threshold voltage offset layer 208 is directly deposited onto the high-k material 206 surface in a dipole-last pattern.

[0114] In some cases, the interface layer 204 may be absent or may be absent to a perceptible degree. The interface layer 204 may include an oxide, such as silicon oxide, which may be formed on the surface of the substrate 202 using, for example, a chemical oxidation process or an oxide deposition process. The high-k material 206 may be or include, for example, a metal oxide having a dielectric constant greater than about 7. In some embodiments, the high-k material has a dielectric constant higher than that of silicon oxide. Exemplary high-k materials include one or more of the following: hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiO x ), aluminum oxide (Al2O3), lanthanum oxide (La2O3), and mixtures / laminates including one or more such layers.

[0115] In an example, the threshold voltage offset layer 208 may be formed according to the methods described herein. Because the threshold voltage offset layer 208 is formed using a cyclic deposition process, the concentration of metals, nitrogen, carbon, oxygen, and / or other components in the threshold voltage offset layer 208 may vary from the bottom to the top of the threshold voltage offset layer 208 by, for example, controlling the amount and / or the corresponding pulse time of the metal-containing precursor and / or additional precursors during one or more deposition cycles. In some cases, the threshold voltage offset layer 208 may have a stoichiometric composition. In some examples, the threshold voltage offset layer 208 may have a non-stoichiometric composition. The work function and other properties of the threshold voltage offset layer 208 may be changed by varying the amount of metals, nitrogen, carbon, oxygen, and / or other components in the layer or in the deposition cycle.

[0116] In an example, the threshold voltage offset layer 208 may include impurities, such as halides, hydrogen, and / or oxygen, etc., alone or in combination, in an amount less than ten atomic percent, five atomic percent, less than one atomic percent, less than 0.2 atomic percent, less than 0.1 atomic percent, or less than 0.05 atomic percent.

[0117] The thickness of the threshold voltage offset layer 208 may vary according to the application. By way of example, the desired or predetermined thickness of the threshold voltage offset layer 208 may be less than 10 nm or about 0.05 nm to about 10 nm, or about 0.06 nm to about 5 nm, or about 0.07 nm to about 5 nm, or about 0.08 nm to about 4 nm, or about 0.09 nm to about 3 nm, or about 0.1 nm to about 2 nm. In one example, the threshold voltage offset layer 208 may be relatively thin, which may be desirable for many applications, including barrier layers, liners, and work function layers. In an example, the threshold voltage offset layer 208 may form a discontinuous functional layer operable to perform voltage threshold adjustment. In some cases, the thickness of the threshold voltage offset layer 208 may be greater than 2 nm—for example, when the threshold voltage offset layer 208 is used as a barrier layer or a liner.

[0118] The thickness and / or composition of the manipulable threshold voltage offset layer 208 can be adjusted to obtain a desired offset in work function and / or threshold voltage. In an example, the work function of the offset threshold voltage offset layer 208 can be >4.6 eV, >4.7 eV, >4.8 eV, >4.9 eV, >4.95 eV, or >5.0 eV. Using the threshold voltage offset layer 208 as described herein, the work function value of the device can be offset by about 30 meV to about 400 meV, or about 30 meV to about 200 meV, or about 50 meV to about 100 meV.

[0119] Additionally or alternatively, the threshold voltage offset layer 208 can be formed, for example, using process 100, as a continuous film with a thickness of <5 nm, <4 nm, <3 nm, <2 nm, <1.5 nm, <1.2 nm, <1.0 nm, or <0.9 nm. The threshold voltage offset layer 208 can be relatively smooth, with relatively low grain boundary formation.

[0120] In some cases, according to additional examples of the present disclosure, the threshold voltage offset layer 208 can be additionally or alternatively formed directly above the substrate 202, beneath a dielectric or insulating material 205 (which can include various layers and / or topologies), as Figure 2B shown. The device or structure 220 includes a substrate 202, a dielectric or insulating material 205 including an interface layer 204, and a high-k material 206 deposited on the interface layer 204. The structure 220 also includes an additional conductive layer 210. The interface layer 204 is deposited to cover the threshold voltage offset layer 208.

[0121] In some cases, according to additional examples of the present disclosure, the threshold voltage offset layer 208 can be additionally or alternatively formed between the interface layer 204 and the high-k material 206, and / or between layers of the high-k material 206, as Figure 2C shown. Figure 2C Similar to Figure 2A and 2B the structure shown, except that the threshold voltage offset layer 208 is located between the interface layer 204 and the high-k material 206. The threshold voltage offset layer 208 is directly deposited onto the surface of the interface layer 204 in a dipole-preferred pattern.

[0122] The device or structure 230 includes a substrate 202, with the threshold voltage offset layer 208 directly deposited on the interface layer 204, and the high-k material 206 deposited to cover the threshold voltage offset layer 208. The structure 230 also includes an additional conductive layer 210. Additionally, the threshold voltage offset layer 208 can be deposited and at least partially removed, such that the resulting structure may no longer include the threshold voltage offset layer 208 or includes a smaller number of metal layers than the metal layer initially formed on the structure.

[0123] Figure 3 Another exemplary structure 300 in accordance with an example of the present disclosure is illustrated. The device or structure 300 includes a substrate 302, a dielectric or insulating material 304, and a threshold voltage offset layer 306. In one example and as discussed in more detail above, the threshold voltage offset layer 306 may include a metal and is represented by the formula M(N x C y O z )), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), where (x + y) = ≥0.1. In some examples, (x + y) > 0. In some examples, (x + y) ≥ 0. In some examples, (x + y) ≥ 1. In some examples, x = 0 to 2 and y = 0 to 2. In some examples, the threshold voltage offset layer 306 is oxygen-free or substantially oxygen-free. In the illustrated example, the structure 300 further includes an additional conductive layer 312. The substrate 302, the dielectric or insulating material 304, the threshold voltage offset layer 306, and the additional conductive layer 312 may be the same as or similar to the substrate 202, the dielectric or insulating material 205, the threshold voltage offset layer 208, and the conductive layer 210. As described above, the threshold voltage offset layer 306 may alternatively or additionally be formed to cover the substrate 302 (which may include various layers and / or topologies) and / or the underlying insulating material 304, between the interface layer 308 and the high-k material 310. In one example, the threshold voltage offset layer 306 may be directly deposited onto the surface of the interface layer 308 according to a dipole-preferred scheme. In another example, the threshold voltage offset layer 306 may be deposited between the layers of the high-k material 310. Additionally, the threshold voltage offset layer 306 may be deposited and at least partially removed such that the resulting structure may no longer include the threshold voltage offset layer 306 or includes a lesser number of threshold voltage offset layers than the threshold voltage offset layer initially formed on the structure.

[0124] In the illustrated example, the substrate 302 includes a source region 314, a drain region 316, and a channel region 318. Although shown as a horizontal structure, the structures and devices in accordance with examples of the present disclosure may include vertical and / or three-dimensional structures and devices, such as FinFET devices.

[0125] Figure 4 Another structure 400 in accordance with an example of the present disclosure is illustrated. The structure 400 is suitable for use in surround gate field effect transistor (GAA FET) (also known as a lateral nanowire FET) devices and the like.

[0126] In the illustrated example, structure 400 includes a semiconductor material 402, a dielectric material 404, a threshold voltage offset layer 406, and a conductive layer 408. Structure 400 can be formed to cover a substrate, including any of the substrate materials described herein. As discussed in more detail above, the threshold voltage offset layer 406 can include a metal represented by the formula M(N x C y O z ), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), where (x + y) ≥ 0.1. In some embodiments, (x + y) > 0. In some examples, (x + y) ≥ 0. In some examples, (x + y) ≥ 1. In some examples, x = 0 to 2 and y = 0 to 2. In some examples, the threshold voltage offset layer 408 is oxygen-free or substantially oxygen-free.

[0127] The semiconductor material 402 can include any suitable semiconductor material. For example, the semiconductor material 402 can include group-IV, III-V, or II-VI semiconductor materials. By way of example, the semiconductor material 402 includes silicon.

[0128] The dielectric material 404, the threshold voltage offset layer 406, and the conductive layer 408 can be the same as or similar to the dielectric or insulating material 205, the threshold voltage offset layer 208, and the conductive layer 210 described above. According to a further example of the present disclosure, the threshold voltage offset layer 406 can be formed to cover the semiconductor material 402 and / or be under the dielectric material 404.

[0129] Figure 5 System 500 is shown in accordance with another exemplary embodiment of the present disclosure. System 500 can be used to perform the methods described herein and / or form the structures or device portions described herein.

[0130] In the illustrated example, system 500 includes one or more reaction chambers 502, a metal precursor gas source 504, an additional precursor gas source 506, a purge gas source 508, an exhaust source 510, and a controller 512.

[0131] In the example, the reaction chamber 502 can include any suitable reaction chamber, such as an ALD or CVD reaction chamber, and can include a direct plasma source 522 or be coupled to a remote plasma source 520.

[0132] In an example, the metal precursor gas source 504 can include a container and one or more metal precursors 524 as described herein—either alone or mixed with one or more carrier gases (e.g., inert gases). The metal precursor 524 can be oxygen-free or substantially oxygen-free. As used herein, the term "carrier gas" can refer to a gas that is provided to the reactor chamber along with one or more precursors. For example, a carrier gas can be provided to the reactor chamber along with one or more precursors used herein. Exemplary carrier gases include N2, H2, and noble gases such as He, Ne, Kr, Ar, and Xe.

[0133] In an example, the additional precursor gas source 506 can include a container and one or more additional precursors 526 as described herein—either alone or mixed with one or more carrier gases. The one or more additional precursors 526 can be oxygen-free or substantially oxygen-free.

[0134] In an example, the purge gas source 508 can include one or more inert gases 528 as described herein. Although shown as having three sources 504 - 508, the system 500 can include any suitable number of gas sources. The sources 504 - 508 can be coupled to the reaction chamber 502 via lines 514 - 518, which can each include a flow controller, valve, heater, etc. As used herein, "oxygen-free" or "substantially oxygen-free" can refer to a precursor that is oxygen-free or substantially oxygen-free and contains less than about 7% oxygen, or less than about 5% oxygen, or less than about 4% oxygen, or less than about 3% oxygen, or less than about 2% oxygen, or less than about 1% oxygen, or less than about 0.1% oxygen (where "about" in this context means ±0.05%).

[0135] The exhaust source 510 can include one or more vacuum pumps.

[0136] The controller 512 includes electronic circuitry and software to selectively operate valves, manifolds, heaters, pumps, and other components included in the system 500. Such circuitry and components operate to introduce precursors, reactants, and purge gases from the respective sources 504 - 508. The controller 512 can control the timing of gas pulse sequences, the temperature of the substrate and / or reaction chamber, the pressure within the reaction chamber, and various other operations to provide proper operation of the system 500. The controller 512 can include control software to control valves either electrically or pneumatically to control the flow of precursors, reactants, and purge gases into and out of the reaction chamber 502. The controller 512 can include modules that perform certain tasks, such as software or hardware components, e.g., FPGA or ASIC. The modules can advantageously be configured to reside on an addressable storage medium of the control system and be configured to execute one or more processes (e.g., Figure 1 the process 100 shown in

[0137] Other configurations of system 500 are possible, including different numbers and types of precursor and reactant sources and purge gas sources. Additionally, it should be understood that there are many arrangements of valves, conduits, precursor sources, and purge gas sources that can be used to achieve selectively feeding gases to the target in reaction chamber 502. Additionally, as a schematic representation of the system, many components have been omitted for simplicity of illustration, and such components can include, for example, various valves, manifolds, purifiers, heaters, containers, vents, and / or bypasses.

[0138] During operation of reactor system 500, substrate 590 (e.g., a semiconductor wafer) is transferred from, for example, a substrate handling system to reaction chamber 502. Once the substrate(s) is transferred to reaction chamber 502, one or more gases (such as precursors, reactants, carrier gases, and / or purge gases) from sources 504 - 508 are introduced into reaction chamber 502, for example, during the execution of Figure 1 process 100 as shown.

[0139] The example embodiments of the present disclosure described above do not limit the scope of the invention because these embodiments are merely examples of embodiments of the invention, which is defined by the appended claims and their legal equivalents. Any equivalent embodiments are intended to fall within the scope of the invention. Indeed, various modifications of the present disclosure, such as alternative useful combinations of the elements described, may become apparent to those skilled in the art from the description. Such modifications and embodiments are also intended to fall within the scope of the appended claims. Although exemplary examples of the present disclosure are set forth herein, it should be understood that the present disclosure is not limited thereto. Various modifications, variations, and enhancements can be made to the systems and methods described herein without departing from the spirit and scope of the present disclosure.

[0140] The subject matter of the present disclosure includes all novel and non - obvious combinations and sub - combinations of the various systems, components, and configurations, as well as other features, functions, acts, and / or properties disclosed herein, and any and all equivalents thereof.

Claims

1. A method, comprising: Deposit a threshold voltage shift layer on a substrate, wherein the layer contains a metal and has the formula M(N x C y O z ), where M is a metal, N is nitrogen, C is carbon, and O is oxygen, where x = 0 to 5, y = 0 to 5, z = 0 to (x + y), where (x + y) 0.1, wherein the threshold voltage offset layer further comprises: a) Providing a substrate having a surface in a reaction chamber; b) Providing a metal-containing precursor containing a metal to contact the surface in the reaction chamber; c) Providing one or more additional precursors containing at least one of N or C to contact the surface in the reaction chamber; d) Purging the reaction chamber; and Repeating operations b), c) or d) or any combination thereof in any order until a threshold voltage offset layer of a predetermined thickness is deposited on the surface.

2. The method according to claim 1, wherein, x = 0 to 2 and y = 0 to 2.

3. The method according to claim 1, wherein (x + y) 1.

4. The method according to claim 1, wherein, At least one of the one or more additional precursors comprises O.

5. The method according to claim 1, wherein The surface comprises an interlayer material, and the threshold voltage offset layer is directly deposited onto the surface of the interlayer material in a dipole-preferred pattern.

6. The method according to claim 1, wherein, The surface comprises a high-k material, and the threshold voltage offset layer is directly deposited onto the surface of the high-k material in a dipole-last pattern.

7. The method according to claim 1, wherein, The metal comprises cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), scandium (Sc), lutetium (Lu), yttrium (Y), magnesium (Mg), lanthanum (La) or strontium (Sr) or a combination thereof.

8. The method according to claim 7, wherein, The metal-containing precursor comprises a cyclopentadienyl ligand.

9. The method according to claim 8, wherein, The cyclopentadienyl ligand comprises at least one of the following: cyclopentadienyl (Cp), methylcyclopentadienyl (MeCp), ethylcyclopentadienyl (EtCp), isopropylcyclopentadienyl (iPrCp), tert-butylcyclopentadienyl (tBuCp), trimethylsilylcyclopentadienyl (TMSCp), pentamethylcyclopentadienyl (Cp*), 1,2,4-triisopropylcyclopentadienyl (iPr3Cp) and 1,2,4-tri-tert-butylcyclopentadienyl (tBu3Cp).

10. The method according to claim 7, wherein, The metal-containing precursor comprises an amido ligand.

11. The method according to claim 10, wherein, The amido ligand comprises at least one of the following: dimethylamido (NMe2), diethylamido (NEt2), ethylmethylamido (NEtMe), diisopropylamido (NiPr2), tert-butylamino (NHtBu) and bis(trimethylsilyl)amido (N(SiMe3)2).

12. The method according to claim 7, wherein, The metal-containing precursor comprises an imido ligand.

13. The method according to claim 12, wherein, The imido ligand comprises at least one of the following: ethylimido (NEt), isopropylimido (NiPr), isobutylimido (NiBu), tert-butylimido (NtBu) and tert-pentylimido (NtPn).

14. The method according to claim 7, wherein, The metal-containing precursor comprises an amidino ligand.

15. The method according to claim 14, wherein, The amidino ligand comprises at least one of the following: N,N'-diethylacetamidinium (Et2AMD), N,N'-diisopropylacetamidinium (iPr2AMD), N,N'-diisopropylformamidinium (iPr2FMD), N,N'-di-tert-butylacetamidinium (tBu2AMD) and N,N'-di-tert-butylformamidinium (tBu2FMD).

16. The method according to claim 7, wherein, The metal-containing precursor comprises a halogen ligand.

17. The method according to claim 16, wherein, The halogen ligand includes at least one of (F) fluorine, (Cl) chlorine, (Br) bromine, or (I) iodine.

18. The method according to claim 7, wherein, The metal-containing precursor includes an alkyl ligand.

19. The method according to claim 18, wherein, The alkyl ligand includes at least one of the following: methyl (Me), ethyl (Et), isopropyl (iPr), tert-butyl (tBu), isobutyl (iBu), and neopentyl (Np).

20. The method according to claim 7, wherein The metal-containing precursor includes an alkoxide ligand.

21. The method according to claim 20, wherein, The alkoxide ligand includes at least one of the following: methoxide (OMe), ethoxide (OEt), isopropoxide (OiPr), tert-butoxide (OtBu), 1-methoxy-2-methyl-2-propoxide (mmp), 1-dimethylamino-2-propoxide (dmap), 1-dimethylamino-2-propoxide (dmamp), and 1-dimethylamino-2-methyl-2-butoxide (dmamb).

22. The method according to claim 7, wherein, The metal-containing precursor contains a diketone ligand.

23. The method according to claim 22, wherein The diketone ligand includes at least one of acetylacetonate (acac), 2,2,6,6-tetramethylheptane-3,5-diketonate (thd), and 1,1,1,5,5,5-hexafluoropentane-2,5-diketonate (hfac).

24. The method according to claim 7, wherein The metal-containing precursor includes a diazabutadiene ligand.

25. The method according to claim 24, wherein, The diazabutadiene ligand includes at least one of the following: 1,4-di-tert-butyl-1,4-diaza-1,3-butadiene (tBu2DAD), 1,4-diisopropyl-1,4-diaza-1,3-butadiene (iPr2DAD), 1,4-di-sec-butyl-1,4-diaza-1,3-butadiene (sBu2DAD), and 1,4-di-tert-pentyl-1,4-diaza-1,3-butadiene (tPN2DAD).

26. The method according to claim 1, wherein, At least one of the one or more additional precursors is a nitrogen-containing precursor.

27. The method according to claim 26, wherein, The nitrogen-containing precursor is selected from: ammonia, hydrazine, tert-butyl hydrazine, dimethyl hydrazine, methyl hydrazine, phenyl hydrazine, tert-butylamine, isobutylamine, tert-pentylamine, N2 plasma, NH3 plasma, or N2 / H2 plasma or any combination thereof.

28. The method according to claim 1, wherein, At least one of the one or more additional precursors is a carbon-containing precursor.

29. The method according to claim 28, wherein, The carbon-containing precursor is selected from: methyl iodide, diiodomethane, ethyl iodide, 1,2-diiodoethane, ethyl bromide, 1,2-dibromoethane, bromobenzene, iodobenzene, 1-iodobutane, dicyclopentadiene, acetylene, propargyl bromide, allyl bromide, or allyl iodide or a combination thereof.

30. The method according to claim 1, wherein At least one of the one or more additional precursors is an oxygen-containing precursor.

31. The method according to claim 30, wherein, The oxygen-containing precursor is selected from: H2O, ozone, N2O, H2O2, O2, or O2 plasma or any combination thereof.

32. The method according to claim 1, wherein, The metal includes titanium (Ti), and among them, the metal-containing precursor includes TiF4, TiCl4, TiBr4, TiI4, Ti(NMe2)4, Ti(NEtMe)4, Ti(NEt2)4, Ti(OMe)4, Ti(OEt)4, Ti(OiPr)4, Ti(OtBu)4, Ti(MeCp)(OiPr)3, TiCp*(OMe)3, TiCp(NMe2)4, Ti(EtCp)(NMe2)4, Ti(OiPr)2(NMe2)2, Ti(OiPr)2(thd)2, Ti(OiPr)3(iPr2AMD) or Ti(Np)4 or a combination thereof.

33. The method according to claim 1, wherein The metal includes zirconium (Zr), and among them, the metal-containing precursor includes ZrCl4, ZrI4, Zr(NMe2)4, Zr(NEtMe)4, Zr(NEt2)4, Zr(thd)4, Zr(OiPr)4, Zr(OtBu)4, ZrCp(NMe2)3, Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NEt2)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEtMe)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp2Cl2, ZrCp2Me2, ZrCp2(OMe)2, ZrCp2Me(OMe), ZrCp2(NMe2)2, Zr(MeCp)2Cl2, Zr(MeCp)2Me2, Zr(MeCp)2(OMe)2, Zr(MeCp)2Me(OMe), Zr(MeCp)2(NMe2)2, Zr(EtCp)2Cl2, Zr(EtCp)2Me2, Zr(EtCp)2(OMe)2, Zr(EtCp)2Me(OMe), Zr(EtCp)2(NMe2)2, ZrNp4 or ZrCp(tBu2DAD)(OiPr) or any combination thereof.

34. The method according to claim 1, wherein The metal includes hafnium (Hf), and among them, the metal-containing precursor includes HfCl4, HfI4, Hf(NMe2)4, Hf(NEtMe)4, Hf(NEt2)4, Hf(thd)4, Hf(OiPr)4, Hf(OtBu)4, Hf(BH4)4, HfCp(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NEt2)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEtMe)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp2Cl2, HfCp2Me2, HfCp2(OMe)2, HfCp2Me(OMe), HfCp2(NMe2)2, Hf(MeCp)2Cl2, Hf(MeCp)2Me2, Hf(MeCp)2(OMe)2, Hf(MeCp)2Me(OMe), Hf(MeCp)2(NMe2)2, Hf(EtCp)2Cl2, Hf(EtCp)2Me2, Hf(EtCp)2(OMe)2, Hf(EtCp)2Me(OMe), Hf(EtCp)2(NMe2)2, Hf(MeCp)2(mmp)Me, Hf(OtBu)2(mmp)2, Hf(iPr2FMD)2(NMe2)2, HfNp4, Hf(dmap)4 or Hf(mmp)4 or any combination thereof.

35. The method according to claim 1, wherein, The metal includes tantalum (Ta), and among them, the metal-containing precursor includes TaF5, TaCl5, TaBr5, TaI5, Ta(NMe2)5, Ta(NEt2)5, Ta(NEtMe)5, Ta(NtBu)(NMe2)3, Ta(NtBu)(NEt2)3, Ta(NtBu)(NEtMe)3, Ta(NiPr)(NEtMe)3, Ta(NtPn)(NMe2)3, Ta(OEt)5, TaNp3Cl2, Ta(NtBu)Cl3, Ta(NtPn)Cl3 or Ta(NtBu)(iPr2AMD)2(NMe2) or any combination thereof.

36. The method according to claim 1, wherein The metal includes scandium (Sc), and among them, the metal-containing precursor includes ScCp3, Sc(MeCp)3, Sc(EtCp)3, Sc(iPrCp)3, Sc(acac)3, Sc(thd)3, Sc(N(SiMe3)2)3, Sc(Et2AMD)3, Sc(iPr2FMD)3, Sc(iPr2AMD)3, Sc(tBu2FMD)3, Sc(tBu2AMD)3, ScCp2(iPr2FMD), Sc(MeCp)2(iPr2FMD), Sc(EtCp)2(iPr2FMD), Sc(iPrCp)2(iPr2FMD), ScCp2(iPr2AMD), Sc(MeCp)2(iPr2AMD), Sc(EtCp)2(iPr2AMD) or Sc(iPrCp)2(iPr2AMD) or any combination thereof.

37. The method according to claim 1, wherein The metal includes lutetium (Lu), and among them, the metal-containing precursor includes LuCp3, Lu(MeCp)3, Lu(EtCp)3, Lu(iPrCp)3, Lu(acac)3, Lu(thd)3, Lu(OiPr)3, Lu(OtBu)3, Lu(N(SiMe3)2)3, Lu(Et2FMD)3, Lu(iPr2FMD)3, Lu(tBu2FMD)3, Lu(iPr2AMD)3, Lu(tBu2AMD)3, LuCp2(iPr2FMD), Lu(MeCp)2(iPr2FMD), Lu(EtCp)2(iPr2FMD), Lu(iPrCp)2(iPr2FMD), LuCp2(iPr2AMD), Lu(MeCp)2(iPr2AMD), Lu(EtCp)2(iPr2AMD) or Lu(iPrCp)2(iPr2AMD) or any combination thereof.

38. The method according to claim 1, wherein The metal includes magnesium (Mg), and among them, the metal-containing precursor includes Mg(acac)2, Mg(hfac)2, Mg(thd)2, MgCp2, Mg(MeCp)2, Mg(EtCp)2, Mg(iPr2AMD)2, Mg(sBu2AMD)2, Mg(tBu2AMD)2, Mg(iPr2DAD)2, Mg(tBu2DAD)2 or Mg(sBu2DAD)2 or any combination thereof.

39. The method according to claim 1, wherein The metal includes lanthanum (La), and among them, the metal-containing precursor includes LaCp3, La(MeCp)3, La(EtCp)3, La(iPrCp)3, La(tBuCp)3, La(TMSCp)3, La(thd)3, La(N(SiMe3)2)3, La(iPr2FMD)3, La(tBu2FMD)3, La(sBu2FMD)3, La(tPn2FMD)3, La(iPr2AMD)3, La(tBu2AMD)3, La(sBu2AMD)3, La(tPn2AMD)3, LaCp2(iPr2AMD), LaCp2(tBu2AMD), LaCp2(iPr2FMD), LaCp2(tBu2FMD), La(MeCp)2(iPr2AMD), La(MeCp)2(tBu2AMD), La(MeCp)2(iPr2FMD), La(MeCp)2(tBu2FMD), La(EtCp)2(iPr2AMD), La(EtCp)2(tBu2AMD), La(EtCp)2(iPr2FMD), La(EtCp)2(tBu2FMD), La(iPrCp)2(iPr2AMD), La(iPrCp)2(tBu2AMD), La(iPrCp)2(iPr2FMD), La(iPrCp)2(tBu2FMD), La(tBuCp)2(iPr2AMD), La(tBuCp)2(tBu2AMD), La(tBuCp)2(iPr2FMD) or La(tBuCp)2(tBu2FMD) or any combination thereof.

40. The method according to claim 1, wherein, The metal precursor includes at least one of the following: KCp3, K(MeCp)3, K(EtCp)3, K(iPrCp)3, K(tBuCp)3, K(TMSCp)3, K(thd)3, K(N(SiMe3)2)3, K(iPr2FMD)3, K(tBu2FMD)3, K(sBu2FMD)3, K(tPn2FMD)3, K(iPr2AMD)3, K(tBu2AMD)3, K(sBu2AMD)3, K(tPn2AMD)3, KCp2(iPr2AMD), KCp2(tBu2AMD), KCp2(iPr2FMD), KCp2(tBu2FMD), K(MeCp)2(iPr2AMD), K(MeCp)2(tBu2AMD), K(MeCp)2(iPr2FMD), K(MeCp)2(tBu2FMD), K(EtCp)2(iPr2AMD), K(EtCp)2(tBu2AMD), K(EtCp)2(iPr2FMD), K(EtCp)2(tBu2FMD), K(iPrCp)2(iPr2AMD), K(iPrCp)2(tBu2AMD), K(iPrCp)2(iPr2FMD), K(iPrCp)2(tBu2FMD), K(tBuCp)2(iPr2AMD), K(tBuCp)2(tBu2AMD), K(tBuCp)2(iPr2FMD) or K(tBuCp)2(tBu2FMD) or any combination thereof, where K is a metal selected from the following: cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy) or lanthanum (La).

41. The method according to claim 1, wherein, The metal includes yttrium (Y), and among them, the metal precursor includes YCp3, Y(MeCp)3, Y(EtCp)3, Y(iPrCp)3, Y(tBuCp)3, Y(thd)3, Y(N(SiMe3)2)3, Y(tBu2FMD)3, Y(tBu2AMD)3, Y(iPr2FMD)3, Y(iPr2AMD)3, YCp2(iPr2AMD), YCp2(tBu2AMD), YCp2(iPr2FMD), YCp2(tBu2FMD), Y(MeCp)2(iPr2AMD), Y(MeCp)2(tBu2AMD), Y(MeCp)2(iPr2FMD), Y(MeCp)2(tBu2FMD), Y(EtCp)2(iPr2AMD), Y(EtCp)2(tBu2AMD), Y(EtCp)2(iPr2FMD), Y(EtCp)2(tBu2FMD), Y(iPrCp)2(iPr2AMD), Y(iPrCp)2(tBu2AMD), Y(iPrCp)2(iPr2FMD) or Y(iPrCp)2(tBu2FMD) or any combination thereof.

42. The method according to claim 1, wherein The metal-containing precursor includes at least one of the following: JCp3, J(MeCp)3, J(EtCp)3, J(iPrCp)3, J(tBuCp)3, J(thd)3, J(N(SiMe3)2)3, J(tBu2FMD)3, J(tBu2AMD)3, J(iPr2FMD)3, J(iPr2AMD)3, JCp2(iPr2AMD), JCp2(tBu2AMD), JCp2(iPr2FMD), JCp2(tBu2FMD), J(MeCp)2(iPr2AMD), J(MeCp)2(tBu2AMD), J(MeCp)2(iPr2FMD), J(MeCp)2(tBu2FMD), J(EtCp)2(iPr2AMD), J(EtCp)2(tBu2AMD), J(EtCp)2(iPr2FMD), J(EtCp)2(tBu2FMD), J(iPrCp)2(iPr2AMD), J(iPrCp)2(tBu2AMD), J(iPrCp)2(iPr2FMD) or J(iPrCp)2(tBu2FMD) or any combination thereof, where J is a metal selected from holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb) or yttrium (Y).

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