Miniature light emitting diode chip and display panel

Abstract

The present invention relates to a micro light emitting diode chip and a display panel, the micro light emitting diode chip comprising: a micro light emitting diode array, the micro light emitting diode array comprising a plurality of micro light emitting diodes, the micro light emitting diodes being configured to emit light, the micro light emitting diodes comprising a light emitting mesa; the micro light-emitting diodes are arranged on the light-emitting table top, the micro lenses are arranged on the micro light-emitting diodes, the adjacent micro lenses are provided with connecting parts and gaps on the side faces, the gaps are located on the connecting parts, and the bottoms of the gaps are lower than the top of the light-emitting table top. According to the micro light-emitting diode chip provided by the invention, the current expansion structure is arranged between the micro light-emitting diodes, so that light crosstalk of adjacent micro light-emitting diodes can be avoided; the micro lens can gather light emitted by the micro light-emitting diode, so that the luminance and the luminous efficiency of the micro light-emitting diode display chip are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of light-emitting diodes, and particularly to a micro light-emitting diode chip and a display panel. Background Art

[0002] Micro Light Emitting Diode (Micro-LED) is an emerging display technology that is becoming increasingly important due to its use in various applications including, for example, self-emissive microdisplays, visible light communication, and optogenetics. Micro-LED technology is a technology that uses micron-scale LEDs as pixel units, thin-films, miniaturizes, and arrays the LED structure design, and then massively transfers micro light-emitting diode chips to a TFT or CMOS backplane to form a high-density display panel. Compared with traditional LEDs, Micro LED has better strain relaxation, better light extraction efficiency, uniform current diffusion, and higher output performance. Micro LED also has advantages such as improved thermal effects, faster response speed, a wider operating temperature range, higher resolution, a wider color gamut, higher contrast, lower power consumption, and higher current density. Micro light-emitting diodes are regarded as the next-generation display technology and are receiving increasing attention.

[0003] However, there are still many problems with existing micro light-emitting diode chips. For example, the light extraction efficiency (Wall-Plug Efficiency, WPE, also known as the electro-optical conversion efficiency) is too low and needs to be further improved. Summary of the Invention

[0004] In view of some or all of the problems in the prior art, the present invention first provides a first micro light-emitting diode chip, including:

[0005] A micro light-emitting diode array, the micro light-emitting diode array including a plurality of micro light-emitting diodes configured to emit light; and

[0006] A microlens disposed on the micro light-emitting diode, wherein adjacent microlenses are spaced apart from each other between the micro light-emitting diodes.

[0007] Further, the distance between adjacent microlenses is 0 to 1 micron.

[0008] Further, the micro light-emitting diode chip further includes:

[0009] A driving module, the driving module including a driving backplane and a bonding layer; and

[0010] A current spreading structure, the current spreading structure being located between the micro light-emitting diodes, the current spreading structure being arranged to surround the micro light-emitting diodes in an electrically contacting manner.

[0011] Further, the driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, the driving electrode being electrically connected to the bonding layer.

[0012] Further, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au.

[0013] Further, the material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0014] Further, the micro light-emitting diode includes:

[0015] A light-emitting mesa;

[0016] An ohmic contact layer, the ohmic contact layer being located on the lower surface of the light-emitting mesa, and the ohmic contact layer being electrically connected to the bonding layer;

[0017] A top conductive layer, the top conductive layer being located on the side and top surfaces of the light-emitting mesa, the top conductive layer being electrically connected to the current spreading structure; and

[0018] A passivation isolation layer, the passivation isolation layer at least partially covering the side surface of the light-emitting mesa, and the passivation isolation layer being located between the light-emitting mesa and the top conductive layer.

[0019] Further, the electrode polarity of the ohmic contact layer is opposite to the electrode polarity of the top conductive layer.

[0020] Further, adjacent top conductive layers are connected, and all the top conductive layers are connected into a whole.

[0021] Further, adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected into a whole.

[0022] Further, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0023] Further, the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension.

[0024] Further, the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

[0025] Further, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers.

[0026] Furthermore, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

[0027] Furthermore, the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

[0028] Furthermore, the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located therebetween.

[0029] Furthermore, the first-type epitaxial layer is electrically connected to the ohmic contact layer;

[0030] The second-type epitaxial layer is electrically connected to the top conductive layer.

[0031] Furthermore, the material of the first-type epitaxial layer is a material layer of a first conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the second-type epitaxial layer is a material layer of a second conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P;

[0032] The first conductive type is different from the second conductive type.

[0033] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

[0034] Furthermore, the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into a whole.

[0035] Furthermore, the longitudinal profile of adjacent current spreading structures presents a forked peak shape.

[0036] Furthermore, the longitudinal profile shape of adjacent current spreading structures is asymmetric.

[0037] Furthermore, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0038] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0039] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 microns; and / or

[0040] The height of the upper curvature portion of the microlens is 0.5 to 2 microns; and / or

[0041] The spherical width of the microlens is 3 to 4 microns.

[0042] Further, the microlens is in a positive hemispherical shape.

[0043] Further, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0044] The present invention also provides a first display panel, including a first type of micro light-emitting diode chip.

[0045] The present invention also provides a second type of micro light-emitting diode chip, including:

[0046] A micro light-emitting diode array, the micro light-emitting diode array including a plurality of micro light-emitting diodes, the micro light-emitting diodes being configured to emit light, and the micro light-emitting diodes including a light-emitting mesa; and

[0047] A microlens, the microlens being disposed above the micro light-emitting diode, wherein the sides of adjacent microlenses are spaced apart from each other to form a gap, the bottom of the gap being connected, and the bottom of the gap being higher than the top of the light-emitting mesa.

[0048] Further, the micro light-emitting diode chip further includes:

[0049] A driving module, the driving module including a driving backplane and a bonding layer; and

[0050] A current spreading structure, the current spreading structure being located between the micro light-emitting diodes, the current spreading structure being arranged to surround the micro light-emitting diodes in an electrically contacting manner.

[0051] Further, the spacing between the sides of adjacent microlenses is from 0 to 1 micrometer.

[0052] Further, the gap has a multi-level stepped structure.

[0053] Further, the side walls of adjacent bottom steps of the gap are in contact with each other; or

[0054] The side walls of adjacent bottom steps of the gap are not in contact with each other.

[0055] Further, the gap between the side walls of adjacent bottom steps is located between the forked peaks of the current spreading structure.

[0056] Further, the driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, and the driving electrodes being electrically connected to the bonding layer.

[0057] Further, the material of the driving electrodes is an alloy of one or more of the following metals: Al, Cu, and Au.

[0058] Furthermore, the material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0059] Furthermore, the micro light-emitting diode further includes:

[0060] an ohmic contact layer, the ohmic contact layer is located on the lower surface of the light-emitting mesa, and the ohmic contact layer is electrically connected to the bonding layer;

[0061] a top conductive layer, the top conductive layer is located on the side and top surfaces of the light-emitting mesa, and the top conductive layer is electrically connected to the current spreading structure;

[0062] a passivation isolation layer, the passivation isolation layer at least partially covers the side surface of the light-emitting mesa, and the passivation isolation layer is located between the light-emitting mesa and the top conductive layer.

[0063] Furthermore, the electrode polarity of the ohmic contact layer is opposite to the electrode polarity of the top conductive layer.

[0064] Furthermore, adjacent top conductive layers are connected, and all the top conductive layers are connected as a whole.

[0065] Furthermore, adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected as a whole.

[0066] Furthermore, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0067] Furthermore, the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension.

[0068] Furthermore, the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

[0069] Furthermore, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns.

[0070] Furthermore, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

[0071] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0072] Furthermore, the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located therebetween.

[0073] Furthermore, the first-type epitaxial layer is electrically connected to the ohmic contact layer;

[0074] The second type of epitaxial layer is electrically connected to the top conductive layer.

[0075] Further, the material of the first type of epitaxial layer is a material layer of a first conductive type composed of at least two or more elements of Ga, N, As, Al, In, and P, and the second type of epitaxial layer is a material layer of a second conductive type composed of at least two or more elements of Ga, N, As, Al, In, and P;

[0076] The first conductive type is different from the second conductive type.

[0077] Further, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

[0078] Further, the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into one body.

[0079] Further, the longitudinal profile of adjacent current spreading structures presents a bifurcated peak shape.

[0080] Further, the longitudinal profile shapes of adjacent current spreading structures are asymmetric.

[0081] Further, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0082] Further, the microlens has an upper curvature portion and a lower spacer portion.

[0083] Further, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0084] the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0085] the spherical width of the microlens is 3 to 4 micrometers.

[0086] Further, the microlens is a positive hemisphere.

[0087] Further, the material of the microlens is silicon oxide or silicon nitride or silicon carbide or titanium oxide or zirconium oxide or aluminum oxide.

[0088] The present invention also provides a second display panel, including a second micro light-emitting diode chip.

[0089] The present invention also provides a third micro light-emitting diode chip, including:

[0090] A micro light-emitting diode array, the micro light-emitting diode array comprising a plurality of micro light-emitting diodes configured to emit light, the micro light-emitting diodes including a light-emitting mesa; and

[0091] A microlens, the microlens being disposed above the micro light-emitting diode, adjacent microlenses having a connecting portion and a gap on the side, wherein the gap is located above the connecting portion and the bottom of the gap is lower than the top of the light-emitting mesa.

[0092] Further, the micro light-emitting diode chip further comprises:

[0093] A driving module, the driving module including a driving backplane and a bonding layer; and

[0094] A current spreading structure, the current spreading structure being located between the micro light-emitting diodes and being arranged to surround the micro light-emitting diodes in an electrically contacting manner.

[0095] Further, the gap spacing between the sides of adjacent microlenses is from 0 to 1 micrometer.

[0096] Further, the gap is located above the forked peak of the current spreading structure.

[0097] Further, the driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, the driving electrode being electrically connected to the bonding layer.

[0098] Further, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au.

[0099] Further, the material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0100] Further, the micro light-emitting diode further comprises:

[0101] An ohmic contact layer, the ohmic contact layer being located on the lower surface of the light-emitting mesa and the ohmic contact layer being electrically connected to the bonding layer;

[0102] A top conductive layer, the top conductive layer being located on the side and top surfaces of the light-emitting mesa, the top conductive layer being electrically connected to the current spreading structure;

[0103] A passivation isolation layer, the passivation isolation layer at least partially covering the side surface of the light-emitting mesa and the passivation isolation layer being located between the light-emitting mesa and the top conductive layer.

[0104] Furthermore, the electrode polarity of the ohmic contact layer is opposite to that of the top conductive layer.

[0105] Furthermore, adjacent top conductive layers are connected, and all the top conductive layers are integrated into a whole.

[0106] Furthermore, adjacent passivation isolation layers are connected, and all the passivation isolation layers are integrated into a whole.

[0107] Furthermore, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0108] Furthermore, the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension.

[0109] Furthermore, the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

[0110] Furthermore, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns.

[0111] Furthermore, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

[0112] Furthermore, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0113] Furthermore, the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located between the two.

[0114] Furthermore, the first-type epitaxial layer is electrically connected to the ohmic contact layer;

[0115] The second-type epitaxial layer is electrically connected to the top conductive layer.

[0116] Furthermore, the material of the first-type epitaxial layer is a material layer of a first conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the second-type epitaxial layer is a material layer of a second conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P;

[0117] The first conductive type is different from the second conductive type.

[0118] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, where the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

[0119] Further, the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into a whole.

[0120] Further, the longitudinal profile of adjacent current spreading structures presents a forked peak shape.

[0121] Further, the longitudinal profile shape of adjacent current spreading structures is asymmetric.

[0122] Further, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0123] Further, the microlens has an upper curvature portion and a lower spacer portion.

[0124] Further, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0125] the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0126] the spherical width of the microlens is 3 to 4 micrometers.

[0127] Further, the microlens is a positive hemispherical shape.

[0128] Further, the material of the microlens is silicon oxide or silicon nitride or silicon carbide or titanium oxide or zirconium oxide or aluminum oxide.

[0129] The present invention also provides a third display panel, including a third micro light-emitting diode chip.

[0130] The present invention also provides a fourth micro light-emitting diode chip, including:

[0131] A micro light-emitting diode array, the micro light-emitting diode array including a plurality of micro light-emitting diodes configured to emit light, wherein the micro light-emitting diodes include light-emitting mesa; and

[0132] A microlens disposed above the micro light-emitting diode, adjacent microlenses being spaced apart from each other on the side to form a gap, wherein the gap is a closed air gap.

[0133] Further, the micro light-emitting diode chip further includes:

[0134] A driving module, the driving module including a driving backplane and a bonding layer; and

[0135] A current spreading structure located between the micro light-emitting diodes, the current spreading structure being arranged to surround the micro light-emitting diodes in an electrically contacting manner.

[0136] Further, the air gap is an air void.

[0137] Further, the longitudinal cross-section of the air gap is rectangular, circular, oval, crescent-shaped, or irregularly elongated.

[0138] Further, the driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0139] Further, the material of the driving electrodes is an alloy of one or more of the following metals: Al, Cu, and Au.

[0140] Further, the material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0141] Further, the micro light-emitting diode further includes:

[0142] An ohmic contact layer, which is located on the lower surface of the light-emitting mesa, and the ohmic contact layer is electrically connected to the bonding layer;

[0143] A top conductive layer, which is located on the side and top surfaces of the light-emitting mesa, and the top conductive layer is electrically connected to the current spreading structure;

[0144] A passivation isolation layer, which at least partially coats the side surface of the light-emitting mesa, and the passivation isolation layer is located between the light-emitting mesa and the top conductive layer.

[0145] Further, the electrode polarity of the ohmic contact layer is opposite to that of the top conductive layer.

[0146] Further, adjacent top conductive layers are connected, and all the top conductive layers are integrated into one body.

[0147] Further, adjacent passivation isolation layers are connected, and all the passivation isolation layers are integrated into one body.

[0148] Further, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0149] Further, the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension.

[0150] Further, the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

[0151] Further, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers.

[0152] Furthermore, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

[0153] Furthermore, the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

[0154] Furthermore, the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located therebetween.

[0155] Furthermore, the first-type epitaxial layer is electrically connected to the ohmic contact layer;

[0156] The second-type epitaxial layer is electrically connected to the top conductive layer.

[0157] Furthermore, the material of the first-type epitaxial layer is a material layer of a first conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the second-type epitaxial layer is a material layer of a second conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P;

[0158] The first conductive type is different from the second conductive type.

[0159] Furthermore, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, where the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

[0160] Furthermore, the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into one body.

[0161] Furthermore, the longitudinal profile of adjacent current spreading structures presents a forked peak shape.

[0162] Furthermore, the longitudinal profile shapes of adjacent current spreading structures are asymmetric.

[0163] Furthermore, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0164] Furthermore, the microlens has an upper curvature portion and a lower spacer portion.

[0165] Furthermore, the height of the lower spacer portion of the microlens is 0.2 to 3 microns; and / or

[0166] the height of the upper curvature portion of the microlens is 0.5 to 2 microns; and / or

[0167] The spherical width of the microlens is 3 to 4 micrometers.

[0168] Furthermore, the microlens is in the shape of a positive hemisphere.

[0169] Furthermore, the material of the microlens is silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, or aluminum oxide.

[0170] The present invention also provides a fourth display panel, including a fourth type of micro light-emitting diode chip.

[0171] The present invention also provides a fifth type of micro light-emitting diode chip, including:

[0172] A micro light-emitting diode array, the micro light-emitting diode array including a plurality of micro light-emitting diodes, wherein the micro light-emitting diodes are configured to emit light, and the micro light-emitting diodes include light-emitting mesa; and

[0173] A microlens, the microlens being disposed above the micro light-emitting diode, wherein there are voids in the microlens.

[0174] Furthermore, the micro light-emitting diode chip further includes:

[0175] A driving module, the driving module including a driving backplane and a bonding layer; and

[0176] A current spreading structure, the current spreading structure being located between the micro light-emitting diodes. The current spreading structure is arranged to surround the micro light-emitting diodes in an electrically contacting manner.

[0177] Furthermore, the voids are located between the light-emitting mesa and the current spreading structure.

[0178] Furthermore, at least one of the voids is located between the forked peaks of the current spreading structure.

[0179] Furthermore, the driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

[0180] Furthermore, the material of the driving electrodes is an alloy of one or more of the following metals: Al, Cu, and Au.

[0181] Furthermore, the material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

[0182] Furthermore, the micro light-emitting diode further includes:

[0183] An ohmic contact layer, the ohmic contact layer is located on the lower surface of the light-emitting mesa, and the ohmic contact layer is electrically connected to the bonding layer;

[0184] A top conductive layer, the top conductive layer is located on the side and top surfaces of the light-emitting mesa, and the top conductive layer is electrically connected to the current spreading structure;

[0185] A passivation isolation layer, the passivation isolation layer at least partially covers the side surface of the light-emitting mesa, and the passivation isolation layer is located between the light-emitting mesa and the top conductive layer.

[0186] Further, the electrode polarity of the ohmic contact layer is opposite to the electrode polarity of the top conductive layer.

[0187] Further, adjacent top conductive layers are connected, and all the top conductive layers are integrated into one body.

[0188] Further, adjacent passivation isolation layers are connected, and all the passivation isolation layers are integrated into one body.

[0189] Further, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0190] Further, the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension.

[0191] Further, the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

[0192] Further, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns.

[0193] Further, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

[0194] Further, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0195] Further, the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located therebetween.

[0196] Further, the first-type epitaxial layer is electrically connected to the ohmic contact layer;

[0197] The second-type epitaxial layer is electrically connected to the top conductive layer.

[0198] Further, the material of the first-type epitaxial layer is a material layer of a first conductivity type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the second-type epitaxial layer is a material layer of a second conductivity type composed of at least two or more elements including Ga, N, As, Al, In, and P;

[0199] The first conductivity type is different from the second conductivity type.

[0200] Further, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

[0201] Further, the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into a whole.

[0202] Further, the longitudinal profile of adjacent current spreading structures presents a bifurcated peak shape.

[0203] Further, the longitudinal profile shapes of adjacent current spreading structures are asymmetric.

[0204] Further, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0205] Further, the microlens has an upper curvature portion and a lower spacer portion.

[0206] Further, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers; and / or

[0207] the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers; and / or

[0208] the spherical width of the microlens is 3 to 4 micrometers.

[0209] Further, the microlens is a positive hemispherical shape.

[0210] Further, the material of the microlens is silicon oxide or silicon nitride or silicon carbide or titanium oxide or zirconium oxide or aluminum oxide.

[0211] The present invention also provides a fifth display panel, including a fifth micro light-emitting diode chip.

[0212] The technical solution provided by the present invention has the following beneficial effects:

[0213] 1. The first type of micro light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other, which can significantly avoid the optical crosstalk between adjacent micro light-emitting diodes. This is because by spacing the microlenses of adjacent micro light-emitting diodes apart from each other, the light of adjacent micro light-emitting diodes can be blocked from intrusion through the gap. On the contrary, the light that would originally enter the adjacent micro light-emitting diode at the connection of the microlenses is refracted in the desired direction at the gap. Thus, the luminous brightness of each micro light-emitting diode display chip can also be improved, thereby improving the light extraction efficiency of the micro light-emitting diode.

[0214] 2. The second type of micro light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other, and the bottom of this spacing is higher than the top of the light-emitting mesa. In this way, all the light emitted upward will not enter the adjacent micro light-emitting diode, and the light emitted sideways will be reflected by the current spreading structures on both sides, so that all the light can be emitted from the corresponding microlenses. In addition, the shorter spacing will be beneficial to the simplification of the microlens forming process.

[0215] 3. The third type of micro light-emitting diode chip provided by the present invention has a connecting portion and a gap on the side of adjacent microlenses, and the gap is located above the connecting portion and the bottom of the gap is lower than the top of the light-emitting mesa. Thus, the light emitted sideways can be significantly suppressed from intruding into the adjacent micro light-emitting diode. This is particularly advantageous when a spacer is provided to increase the distance between the microlens and the light-emitting mesa (for example, so that the focal point of the microlens falls on the light-emitting mesa), because in this case, the side is extended, and the longer gap between the sides of the microlenses can significantly suppress the light in the side direction from intruding into the adjacent micro light-emitting diode.

[0216] 4. The fourth type of micro light-emitting diode chip provided by the present invention has adjacent microlenses spaced apart from each other on the side to form a gap, and the gap is a closed air gap. Moreover, the air gap can be filled with a low refractive index gas (that is, the refractive index of the gas in the air gap is lower than that of the microlens), such as air. In this way, the light entering the air gap from the microlens will undergo total internal reflection when the incident angle is greater than the critical angle, suppressing its entry into the air gap, and thus suppressing its entry into the adjacent micro light-emitting diode, thereby suppressing optical crosstalk.

[0217] 5. The fifth type of micro light-emitting diode chip provided by the present invention has a gap provided in the microlens, and the intrusion into the adjacent micro light-emitting diode can be suppressed through the gap, thereby suppressing optical crosstalk. For example, the gap can be arranged between the light-emitting mesa and the current spreading structure, or can be arranged at the connection between two microlenses, such as between the forked peaks of the current spreading structure. Thus, the position for preventing optical crosstalk can be flexibly arranged in the microlens.

[0218] 6. In addition, for the micro light-emitting diode chip provided by the present invention, a current spreading structure capable of reflecting light is arranged between the micro light-emitting diodes, which can avoid the optical crosstalk between adjacent micro light-emitting diodes. In addition, the current spreading structure can reflect the light emitted by the micro light-emitting diodes, improve the luminous brightness of the micro light-emitting diode display chip, and thus improve the light extraction efficiency of the micro light-emitting diodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0219] To further clarify the above and other advantages and features of the embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It can be understood that these drawings only depict typical embodiments of the present invention and thus will not be considered as limiting its scope. In the drawings, for clarity, the same or corresponding components will be denoted by the same or similar reference numerals.

[0220] Figure 1 FIG. 9 shows a top view schematic diagram of the first type of micro light-emitting diode chip according to an embodiment of the present invention;

[0221] Figure 2 FIG. 13 shows a longitudinal cross-sectional schematic diagram of the first type of micro light-emitting diode chip according to an embodiment of the present invention;

[0222] Figure 3 FIG. 17 shows a top view schematic diagram of the current spreading structure of the first type of micro light-emitting diode chip according to an embodiment of the present invention;

[0223] Figure 4 FIG. 21 shows a top view schematic diagram of the second type of micro light-emitting diode chip according to an embodiment of the present invention;

[0224] Figure 5 FIG. 25 shows a longitudinal cross-sectional schematic diagram of the second type of micro light-emitting diode chip according to an embodiment of the present invention;

[0225] Figure 6 FIG. 29 shows a top view schematic diagram of the current spreading structure of the second type of micro light-emitting diode chip according to an embodiment of the present invention;

[0226] Figure 7 FIG. 33 shows a longitudinal cross-sectional schematic diagram of the second type of micro light-emitting diode chip according to another embodiment of the present invention;

[0227] Figure 8 FIG. 37 shows a longitudinal cross-sectional schematic diagram of the second type of micro light-emitting diode chip according to still another embodiment of the present invention;

[0228] Figure 9 FIG. 41 shows a top view schematic diagram of the third type of micro light-emitting diode chip according to an embodiment of the present invention;

[0229] Figure 10Shows a longitudinal sectional schematic diagram of the third type of micro light-emitting diode chip according to an embodiment of the present invention;

[0230] Figure 11 Shows a top view schematic diagram of the current spreading structure of the third type of micro light-emitting diode chip according to an embodiment of the present invention;

[0231] Figure 12 Shows a top view schematic diagram of the fourth type of micro light-emitting diode chip according to an embodiment of the present invention;

[0232] Figure 13 Shows a longitudinal sectional schematic diagram of the fourth type of micro light-emitting diode chip according to an embodiment of the present invention;

[0233] Figure 14 Shows a top view schematic diagram of the current spreading structure of the fourth type of micro light-emitting diode chip according to an embodiment of the present invention;

[0234] Figure 15 Shows a top view schematic diagram of the fifth type of micro light-emitting diode chip according to an embodiment of the present invention;

[0235] Figure 16 Shows a longitudinal sectional schematic diagram of the fifth type of micro light-emitting diode chip according to an embodiment of the present invention;

[0236] Figure 17 Shows a top view schematic diagram of the current spreading structure of the fifth type of micro light-emitting diode chip according to an embodiment of the present invention; and

[0237] Figure 18 Shows a longitudinal sectional schematic diagram of the fifth type of micro light-emitting diode chip according to another embodiment of the present invention. Detailed implementation manners

[0238] In the following description, the present invention is described with reference to the embodiments. However, those skilled in the art will recognize that the embodiments can be implemented without one or more specific details or in combination with other alternative and / or additional methods, materials, or components. In other cases, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the inventive points of the present invention. Similarly, for the purpose of explanation, specific quantities, materials, and configurations are set forth to provide a comprehensive understanding of the embodiments of the present invention. However, the present invention is not limited to these specific details. In addition, it should be understood that the embodiments shown in the drawings are illustrative representations and not necessarily drawn to scale.

[0239] In the present invention, the reference to "an embodiment" or "the embodiment" means that the specific features, structures or characteristics described in connection with the embodiment are included in at least one embodiment of the present invention. The phrase "in one embodiment" appearing throughout the present invention does not necessarily refer to the same embodiment.

[0240] In the present invention, unless otherwise specified, the expressions "arranged on", "arranged above" and "arranged over" do not exclude the presence of an intermediate member therebetween. In addition, the expression "arranged on or above" only represents the relative positional relationship between two components, and under certain circumstances, such as after reversing the product direction, it can also be converted to "arranged under or below", and vice versa.

[0241] In the present invention, unless otherwise specified, the terms "upper surface", "lower surface" and "side surface" are only used to describe and distinguish the surfaces of the same component.

[0242] In the present invention, unless otherwise specified, the quantifiers "a" and "one" do not exclude the scenario of multiple elements, and the quantifiers "multiple" and "many" refer to one or more than one element.

[0243] In the present invention, the term "configured" means setting the shape, structure, material and / or function of an object to achieve the desired technical effect, where "configured" includes various alternative technical means for achieving the technical effect, and these technical means become obvious under the teaching of the present application.

[0244] In the present invention, the term "at the bottom of the light-emitting mesa" refers to the side of the light-emitting mesa facing away from the microlens, the term "at the top of the light-emitting mesa" refers to the side of the light-emitting mesa facing the microlens, and the term "side surface of the light-emitting mesa" refers to the two sides between the top and the bottom.

[0245] In the present invention, the term "outline of the metal layer" refers to the maximum dimension, such as the length, in the plane (or the plane perpendicular to the thickness) formed by the length and width of the metal layer. Similarly, the bottom outline of the light-emitting mesa refers to the maximum dimension, such as the length, of the light-emitting mesa in the bottom plane (i.e., the plane perpendicular to the thickness at the bottom).

[0246] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention.

[0247] First, the first type of micro light-emitting diode chip and display panel will be described.

[0248] Figure 1 The top view schematic diagram of the first type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 1 It includes a micro light-emitting diode 101, a microlens 102 and a current spreading structure 103.Figure 2 The longitudinal sectional schematic diagram of the first type of micro light-emitting diode chip according to an embodiment of the present invention is shown. As shown in the figure, the first type of micro light-emitting diode chip includes a driving module, a micro light-emitting diode 101, a current spreading structure 103, and a microlens 102. The driving module includes a driving backplane 108 and a bonding layer 110. The micro light-emitting diode 101 is arranged on the upper surface of the driving module. The micro light-emitting diode 101 is configured to emit light and includes a light-emitting mesa 105. The current spreading structure 103 is located between the micro light-emitting diodes 101. The current spreading structure 103 is arranged to surround the micro light-emitting diodes 101 in an electrically contacting manner. The microlens 102 is arranged on the upper surface of the micro light-emitting diode. Adjacent microlenses 102 are spaced apart between the micro light-emitting diodes 101, and the spacing between adjacent microlenses is from 0 to 1 micrometer.

[0249] The size of each micro light-emitting diode chip does not exceed 1 centimeter, preferably not exceeding 5 millimeters. The micro light-emitting diodes are formed in an array in the micro light-emitting diode display chip, and the resolution is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K or 4K. The diameter of the micro light-emitting diode structure is at the nanometer level, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel element on the micro light-emitting diode display chip.

[0250] For convenience, "upward" is used to indicate away from the driving backplane 108, "downward" indicates toward the driving backplane 108, and other directional terms such as top, bottom, above, below, directly below, beneath, etc. are interpreted accordingly. In one embodiment, the driving backplane 108 includes a substrate, a driving circuit, and driving electrodes 109. Each micro light-emitting diode corresponds to one driving electrode, and the driving electrodes 109 are electrically connected to the bonding layer 110. In one embodiment, the material of the driving electrodes is an alloy of one or more of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is about 700 micrometers thick. The driving circuit forms individual pixel drivers to control the operation of each individual pixel LED device. The driving circuit includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. In one embodiment, the micro light-emitting diodes can be bonded to the surface of the driving backplane 108 through the bonding layer 110, and the bonding can be completed by means of eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 110 can be disposed on the driving backplane 108. In another embodiment, the bonding layer 110 grows on the driving backplane 108. In one embodiment, the thickness of the bonding layer 110 is from 0.1 micrometer to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 110 is 0.6 micrometers. In some embodiments, the bonding layer 110 can include two metal layers. The material of the bonding layer 110 can be, for example, an alloy of one or several of the following metal materials: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 110 can also be used as a reflector to reflect the light emitted from the LED structure above.

[0251] In some embodiments, the driving backplane 108 can employ an integrated circuit (IC) board. The micro light-emitting diodes are electrically connected to the driving backplane 108, and the driving backplane 108 is used to control the lighting and extinguishing of the micro light-emitting diodes. In some embodiments, the integrated circuit board can be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through separate metal interconnections. In some embodiments, each micro light-emitting diode can be individually electrically controlled by the integrated circuit board. In some embodiments, the integrated circuit board can be electrically connected to the electrodes of the micro light-emitting diode display chip through metal interconnections. In some embodiments, a dielectric layer can be formed in the gaps between the micro light-emitting diodes. In some embodiments, the dielectric layer can also be formed in the gaps between the interconnections.

[0252] The micro light-emitting diode chip includes a plurality of micro light-emitting diode arrays, and each micro light-emitting diode array includes a plurality of micro light-emitting diodes. The driving method of the micro light-emitting diodes is, for example, passive matrix (PM) driving, where the cathodes of all the micro light-emitting diodes in each array are commonly connected to the cathode line NL, and the micro light-emitting diodes with the same number in each array are respectively connected to the corresponding anode lines PL. Thus, the on / off and light-emitting brightness of each light-emitting diode can be individually controlled by controlling the signals on the corresponding cathode and anode lines.

[0253] In some embodiments, the micro light-emitting diodes can be arranged on the upper surface of the driving module in a regular or irregular manner as the pixel points of the micro light-emitting diode chip. The micro light-emitting diode includes: a light-emitting mesa 105, an ohmic contact layer 104, a top conductive layer 107, and a passivation isolation layer 106. The ohmic contact layer 104 is located on the lower surface of the light-emitting mesa 105, and the ohmic contact layer 104 is electrically connected to the bonding layer 110. The top conductive layer 107 is located on the side and top surfaces of the light-emitting mesa 105, and the top conductive layer 107 is electrically connected to the current spreading structure 103. The passivation isolation layer 106 at least partially covers the side surface of the light-emitting mesa, and the passivation isolation layer 106 is located between the light-emitting mesa 105 and the top conductive layer 107. In some embodiments, the passivation isolation layer 106 covers a part of the top surface of the light-emitting mesa 105.

[0254] In some embodiments, the electrode polarity of the ohmic contact layer 104 is opposite to that of the top conductive layer 107. The ohmic contact layer 104 can be, for example, a P electrode or an anode electrode, and the top conductive layer 107 is an electrode with a polarity opposite to that of the ohmic contact layer 104, such as an N electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be a combination of one or more of, for example, graphene, indium tin oxide (ITO), antimony doped zinc oxide (AZO), fluorine doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0255] In one embodiment, adjacent top conductive layers are connected, and all the top conductive layers are connected as a whole. In one embodiment, adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected as a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0256] In some embodiments, a top conductive layer may be formed on the top surface of the micro light-emitting diode array. In some embodiments, the top conductive layer may be shared by all the micro light-emitting diodes in the micro light-emitting diode array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro light-emitting diode array may include a single-layer micro light-emitting diode structure. In some embodiments, the micro light-emitting diode array may include a multi-layer vertically stacked micro light-emitting diode structure.

[0257] In one embodiment, the light-emitting mesa may be a trapezoidal platform, and the bottom lateral dimension of the light-emitting mesa is greater than the top lateral dimension. In one embodiment, the inclination angle range of the sidewall of the light-emitting mesa is from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

[0258] Such as Figure 2As shown, the light-emitting mesa 105 includes a first-type epitaxial layer 1052, a second-type epitaxial layer 1051, and a light-emitting layer 1053 therebetween. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro light-emitting diode in the micro light-emitting diode array can be a micron-scale light-emitting mesa. In some embodiments, the micron-scale light-emitting mesa can include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 108; the light-emitting layer is located above the first-type epitaxial layer and is farther from the driving backplane 108; the second-type epitaxial layer is located above the light-emitting layer and is the farthest from the driving backplane 108. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, particularly superlattice-stacked quantum well layers. Preferably, the superlattice-stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material of a first conductivity type and includes a plurality of semiconductor layers. The main matrix material of the first-type light-emitting mesa can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first-type epitaxial layer can include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer can be formed below the window layer. In some embodiments, the second-type epitaxial layer is a semiconductor material of a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second-type epitaxial layer can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second-type epitaxial layer can include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0259] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of the second conduction type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of the first conduction type composed of at least two or more elements including Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In some embodiments, the light-emitting layer further includes an electron blocking layer, and the electron blocking layer is disposed on a first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0260] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0261] In some embodiments, one of the first type of epitaxial layer and the second type of epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is from 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is from 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18cm -3 to 1e 19 cm -3 。In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times that of y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example, 65 nm.

[0262] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example, 20 nm.

[0263] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times that of y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example, 65 nm.

[0264] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3, and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is from 20 nm to 40 nm, such as 30 nm.

[0265] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, such as 20 nm.

[0266] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0267] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0268] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0269] The current spreading structure 103 can reflect the light emitted by the micro light-emitting diode, thereby significantly increasing the total light output. At the same time, the current spreading structure 103 can also isolate the light and prevent light crosstalk between adjacent light-emitting diodes. By arranging the current spreading structure 103 to surround the micro light-emitting diode in an electrical contact manner and electrically connecting it to the top conductive layer 107, the electrical contact area between the current spreading structure 103 and the micro light-emitting diode can be significantly increased, so that the active layer (light-emitting layer) of the micro light-emitting diode can emit light more uniformly, effectively avoiding the situation that only the electrical contact part or its vicinity emits light or the light emission brightness of the electrical contact part or its vicinity is too high.

[0270] Figure 3 Shows a top view schematic diagram of the current spreading structure of the first micro light-emitting diode chip according to an embodiment of the present invention. AsFigure 3 As shown, the bottoms of adjacent current spreading structures 103 are connected, and all the current spreading structures are integrated into a whole. Figure 3 In [description], the top view shape (i.e., cross-sectional shape) of the micro light-emitting diode is circular, and the top view shape of the overall current spreading structure is the remaining grid shape after removing the circle. In one embodiment, the top view shape of the micro light-emitting diode may also be other suitable shapes, such as rectangle, square, or regular polygon, etc., and the top view shape of the overall current spreading structure is the remaining shape after removing the other suitable shape, such as the remaining grid shape after removing rectangle, square, or polygon. As Figure 2 As shown, the longitudinal section of adjacent current spreading structures presents a forked peak shape. In one embodiment, the longitudinal section shape of adjacent current spreading structures is asymmetrical, and the heights may not be the same, which is not limited herein.

[0271] In one embodiment, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0272] Figure 2 In [description], the lateral dimension of the bottom of the microlens 102 is greater than the lateral dimension of the light-emitting area of the micro light-emitting diode. In some embodiments, the lateral dimension of the bottom of the microlens 102 may be equal to the lateral dimension of the light-emitting area of the micro light-emitting diode.

[0273] In some embodiments, one microlens 102 can cover multiple lensless micro light-emitting diodes. Multiple microlenses form a microlens array. The microlens array is disposed above the micro light-emitting diode array, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro light-emitting diode, and the horizontal profile of the microlens is greater than the maximum horizontal profile of the micro light-emitting diode. The microlens is mainly used for converging and / or collimating light. For example, by adjusting parameters such as the thickness and curvature of the microlens, the focal point of the microlens can be located in the light-emitting mesa of the micro light-emitting diode. The microlenses in the microlens array are usually the same. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. As Figure 2 As shown, in one embodiment, the microlens 102 includes an upper curvature portion 1021 and a lower spacer portion 1022. In one embodiment, the typical shape of the lower spacer portion of each microlens 102 includes circle, square, rectangle, and hexagon. The microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, spacer, etc.

[0274] In one embodiment, the centers of curvature at various positions on the sidewalls of the lower spacer do not coincide with the centers of curvature at various positions of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens lies within the light-emitting mesa of the micro light-emitting diode. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens can be, for example, a positive hemisphere.

[0275] In some embodiments, the shape of the microlens 102 can be a curved hemisphere. In some embodiments, the height of the microlens 102 is not greater than 2 micrometers. In some embodiments, the height of the microlens 102 is not greater than 1 micrometer. In some embodiments, the height of the microlens 102 is not greater than 0.5 micrometer. In some embodiments, the width of the microlens 102 is not greater than 4 micrometers. In some embodiments, the width of the microlens 102 is not greater than 3 micrometers. In some embodiments, the width of the microlens 102 is not greater than 2 micrometers. In some embodiments, the width of the microlens 102 is not greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 102 is greater than 1.5.

[0276] In some embodiments, the microlens 102 can be made of various materials that are transparent to light of various wavelengths emitted by the micro light-emitting diode. Exemplary transparent materials for the microlens 102 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 102 is made of photoresist. In some embodiments, the microlens is directly deposited on the surface of the micro light-emitting diode by chemical vapor deposition (CVD) technology.

[0277] In some embodiments, the micro light-emitting diode array can include blue micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, that is, the minimum center-to-center distance between the micro light-emitting diodes, can be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro light-emitting diode chip can be between several thousand and several million.

[0278] In one embodiment of the present invention, a first display panel is further provided, and the display panel includes the above-mentioned first micro light-emitting diode display chip.

[0279] Next, a second micro light-emitting diode chip and a display panel are described.

[0280] Figure 4 A top view schematic diagram of a second micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 4It includes a micro light-emitting diode 201, a microlens 202, and a current spreading structure 203. Figure 5 FIG. shows a longitudinal sectional schematic view of a second micro light-emitting diode chip according to an embodiment of the present invention. As shown in the figure, the second micro light-emitting diode chip includes a driving module, a micro light-emitting diode 201, a current spreading structure 203, and a microlens 202. The driving module includes a driving backplane 208 and a bonding layer 210. The micro light-emitting diode 201 is disposed on the upper surface of the driving module, and the micro light-emitting diode 201 includes a light-emitting mesa. The current spreading structure 203 is located between the micro light-emitting diodes 201, and the current spreading structure 203 is arranged to surround the micro light-emitting diode 201 in an electrically contacting manner. As Figure 5 shown, the microlens 202 is disposed on the upper surface of the micro light-emitting diode, adjacent microlenses 202 are connected between the micro light-emitting diodes 201, the sides of adjacent microlenses 202 are separated to form a gap, the bottom of the gap is higher than the top of the light-emitting mesa, and the distance between adjacent microlenses is 0 to 1 micrometer.

[0281] The size of each micro light-emitting diode chip does not exceed 1 cm, preferably not exceeding 5 mm. The micro light-emitting diodes are formed in an array in the micro light-emitting diode display chip, and the resolution is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro light-emitting diode structure is at the nanometer level, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel element on the micro light-emitting diode display chip.

[0282] For convenience, "upward" is used to indicate away from the driving backplane 208, "downward" indicates toward the driving backplane 208, and other directional terms such as top, bottom, above, below, directly below, underneath, etc. are interpreted accordingly. In one embodiment, the driving backplane 208 includes a substrate, a driving circuit, and driving electrodes 209. Each micro light-emitting diode corresponds to one driving electrode, and the driving electrode 209 is electrically connected to the bonding layer 210. In one embodiment, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is about 700 micrometers thick. The driving circuit forms individual pixel drivers to control the operation of each individual pixel LED device. The driving circuit includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. In one embodiment, the micro light-emitting diodes can be bonded to the surface of the driving backplane 208 through the bonding layer 210, and the bonding can be completed by means of eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 210 can be disposed on the driving backplane 208. In another embodiment, the bonding layer 210 grows on the driving backplane 208. In one embodiment, the thickness of the bonding layer 210 is from 0.1 micrometer to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 210 is 0.6 micrometers. In some embodiments, the bonding layer 210 can include two metal layers. The material of the bonding layer 210 can be, for example, an alloy of one or several of the following metal materials: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 210 can also be used as a reflector to reflect the light emitted from the LED structure above.

[0283] In some embodiments, the driving backplane 208 can employ an integrated circuit (IC) board. The micro light-emitting diodes are electrically connected to the driving backplane 208, and the driving backplane 208 is used to control the lighting and extinguishing of the micro light-emitting diodes. In some embodiments, the integrated circuit board can be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through separate metal interconnections. In some embodiments, each micro light-emitting diode can be individually electrically controlled by the integrated circuit board. In some embodiments, the integrated circuit board can be electrically connected to the electrodes of the micro light-emitting diode display chip through metal interconnections. In some embodiments, a dielectric layer can be formed in the gaps between the micro light-emitting diodes. In some embodiments, the dielectric layer can also be formed in the gaps between the interconnections.

[0284] The micro light-emitting diode chip includes a plurality of micro light-emitting diode arrays, and each micro light-emitting diode array includes a plurality of micro light-emitting diodes. The driving method of the micro light-emitting diodes is, for example, passive matrix (PM) driving, where the cathodes of all the micro light-emitting diodes in each array are commonly connected to the cathode line NL, and the micro light-emitting diodes with the same number in each array are respectively connected to the corresponding anode line PL. Thus, the on / off and light-emitting brightness of each light-emitting diode can be individually controlled by controlling the signals on the corresponding cathode and anode lines.

[0285] In some embodiments, the micro light-emitting diodes may be arranged on the upper surface of the driving module in a regular or irregular manner as the pixel points of the micro light-emitting diode chip. The micro light-emitting diode includes: a light-emitting mesa 205, an ohmic contact layer 204, a top conductive layer 207, and a passivation isolation layer 206. The ohmic contact layer 204 is located on the lower surface of the light-emitting mesa 205, and the ohmic contact layer 204 is electrically connected to the bonding layer 210. The top conductive layer 207 is located on the side and top surfaces of the light-emitting mesa 205, and the top conductive layer 207 is electrically connected to the current spreading structure 203. The passivation isolation layer 206 at least partially covers the side surface of the light-emitting mesa, and the passivation isolation layer 206 is located between the light-emitting mesa 205 and the top conductive layer 207. In some embodiments, the passivation isolation layer 206 covers a part of the top surface of the light-emitting mesa 205.

[0286] In some embodiments, the electrode polarity of the ohmic contact layer 204 is opposite to that of the top conductive layer 207. The ohmic contact layer 204 can be, for example, a P electrode or an anode electrode, and the top conductive layer 207 is an electrode with a polarity opposite to that of the ohmic contact layer 204, such as an N electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be a combination of one or more of materials such as graphene, indium tin oxide (ITO), antimony doped zinc oxide (AZO), fluorine doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0287] In one embodiment, adjacent top conductive layers are connected, and all the top conductive layers are integrated into a whole. In one embodiment, adjacent passivation isolation layers are connected, and all the passivation isolation layers are integrated into a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0288] In some embodiments, a top conductive layer may be formed on the top surface of the micro light-emitting diode array. In some embodiments, the top conductive layer may be shared by all the micro light-emitting diodes in the micro light-emitting diode array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro light-emitting diode array may include a single-layer micro light-emitting diode structure. In some embodiments, the micro light-emitting diode array may include a multi-layer vertically stacked micro light-emitting diode structure.

[0289] In one embodiment, the light-emitting mesa may be a trapezoidal platform, and the bottom lateral dimension of the light-emitting mesa is greater than the top lateral dimension. In one embodiment, the inclination angle range of the sidewall of the light-emitting mesa is: 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns. In one embodiment, the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

[0290] Such as Figure 5As shown, the light-emitting mesa 205 includes a first-type epitaxial layer 2052, a second-type epitaxial layer 2051, and a light-emitting layer 2053 located therebetween. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro light-emitting diode in the micro light-emitting diode array can be a micron-scale light-emitting mesa. In some embodiments, the micron-scale light-emitting mesa can include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is to say, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 208; the light-emitting layer is located above the first-type epitaxial layer and is farther from the driving backplane 208; the second-type epitaxial layer is located above the light-emitting layer and is the farthest from the driving backplane 208. In some embodiments, the light-emitting layer is formed by multiple stacked quantum well layers, particularly superlattice-stacked quantum well layers. Preferably, the superlattice-stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material of a first conductivity type and includes multiple semiconductor layers. The main matrix material of the first-type light-emitting mesa can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first-type epitaxial layer can include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer can be formed below the window layer. In some embodiments, the second-type epitaxial layer is a semiconductor material of a second conductivity type and includes multiple semiconductor layers. The main matrix material of the second-type epitaxial layer can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second-type epitaxial layer can include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0291] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer composed of at least two or more elements including Ga, N, As, Al, In, and P of the second conduction type, and the first type of epitaxial layer can be a material layer composed of at least two or more elements including Ga, N, As, Al, In, and P of the first conduction type. In some embodiments, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In some embodiments, the light-emitting layer further includes an electron blocking layer, and the electron blocking layer is disposed on a first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0292] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0293] In some embodiments, one of the first type of epitaxial layer and the second type of epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is from 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is from 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18cm -3 to 1e 19 cm -3 。In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example, 65 nm.

[0294] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example, 20 nm.

[0295] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example, 65 nm.

[0296] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3 and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is from 20 nm to 40 nm, such as 30 nm.

[0297] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, for example x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, such as 20 nm.

[0298] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0299] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0300] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0301] The current spreading structure 203 can reflect the light emitted by the micro light-emitting diode, thereby significantly increasing the total light output. At the same time, the current spreading structure 203 can also isolate light and prevent light crosstalk between adjacent light-emitting diodes. By arranging the current spreading structure 203 to surround the micro light-emitting diode in an electrical contact manner and being electrically connected to the top conductive layer 207, the electrical contact area between the current spreading structure 203 and the micro light-emitting diode can be significantly increased, so that the active layer (light-emitting layer) of the micro light-emitting diode can emit light more uniformly, effectively avoiding the situation that only the electrical contact part or its vicinity emits light or the light emission brightness of the electrical contact part or its vicinity is too high.

[0302] Figure 6 Shows a top view schematic diagram of the current spreading structure of the second micro light-emitting diode chip according to an embodiment of the present invention. AsFigure 6 As shown, the bottoms of adjacent current spreading structures 203 are connected, and all the current spreading structures are integrated into a whole. Figure 6 In [description], the top view shape (i.e., cross-sectional shape) of the micro light-emitting diode is circular, and the top view shape of the overall current spreading structure is the remaining grid shape after removing the circle. In one embodiment, the top view shape of the micro light-emitting diode may also be other appropriate shapes, such as rectangular, square or regular polygon, etc., and the top view shape of the overall current spreading structure is the remaining shape after removing the other appropriate shape, such as the remaining grid shape after removing the rectangle, square or polygon. As Figure 5 As shown, the longitudinal profile of adjacent current spreading structures presents a forked peak shape. In one embodiment, the longitudinal profile shapes of adjacent current spreading structures are asymmetric and the heights may not be the same, which is not limited herein.

[0303] In one embodiment, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0304] Figure 5 In [description], the lateral dimension of the bottom of the microlens 202 is greater than the lateral dimension of the light-emitting area of the micro light-emitting diode. In some embodiments, the lateral dimension of the bottom of the microlens 102 may be equal to the lateral dimension of the light-emitting area of the micro light-emitting diode.

[0305] Figure 7 Shows a top view schematic diagram of a second type of micro light-emitting diode chip according to another embodiment of the present invention. As Figure 7 As shown, in another embodiment of the second type of micro light-emitting diode chip, the gaps formed by separating the sides of adjacent microlenses 202 have a multi-level step structure, the side walls of the bottom steps of adjacent gaps are in contact, and the gaps between the side walls of the bottom steps are located between the forked peaks of the current spreading structure 203. Figure 8 Shows a top view schematic diagram of a second type of micro light-emitting diode chip according to yet another embodiment of the present invention. As Figure 8 As shown, in yet another embodiment of the second type of micro light-emitting diode chip, the gaps formed by separating the sides of adjacent microlenses 202 have a multi-level step structure, the side walls of the bottom steps of adjacent gaps do not contact and are separated from each other, and the gaps between the side walls of the bottom steps are located between the forked peaks of the current spreading structure 203.

[0306] In some embodiments, a microlens 202 may cover a plurality of lensless micro light-emitting diodes. A plurality of microlenses form a microlens array. The microlens array is disposed above the micro light-emitting diode array, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro light-emitting diode, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro light-emitting diode. The microlens is mainly used for converging and / or collimating light. For example, by adjusting parameters such as the thickness and curvature of the microlens, the focal point of the microlens can be located in the light-emitting mesa of the micro light-emitting diode. The microlenses in the microlens array are usually the same. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. As Figure 2 shown, in one embodiment, the microlens 202 includes an upper curvature portion 2021 and a lower spacer portion 2022. In one embodiment, the typical shape of the lower spacer portion of each microlens 202 includes a circle, a square, a rectangle, and a hexagon. The microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacing.

[0307] In one embodiment, the centers of curvature of the sidewall positions of the lower spacer portion do not coincide with the centers of curvature of the corresponding positions of the upper curvature portion. The thickness of the lower spacer portion is set such that the focal point of the microlens is located in the light-emitting mesa of the micro light-emitting diode. In one embodiment, the height of the lower spacer portion of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens may be, for example, a positive hemisphere.

[0308] In some embodiments, the shape of the microlens 202 may be a curved hemisphere. In some embodiments, the height of the microlens 202 is not greater than 2 micrometers. In some embodiments, the height of the microlens 202 is not greater than 1 micrometer. In some embodiments, the height of the microlens 202 is not greater than 0.5 micrometer. In some embodiments, the width of the microlens 202 is not greater than 4 micrometers. In some embodiments, the width of the microlens 202 is not greater than 3 micrometers. In some embodiments, the width of the microlens 202 is not greater than 2 micrometers. In some embodiments, the width of the microlens 202 is not greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 202 is greater than 1.5.

[0309] In some embodiments, the microlens 202 can be made of various materials that are transparent to light of each wavelength emitted by the micro light-emitting diodes. Exemplary transparent materials for the microlens 202 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 202 is made of photoresist. In some embodiments, the microlens is directly deposited on the surface of the micro light-emitting diode by chemical vapor deposition (CVD) technology.

[0310] In some embodiments, the micro light-emitting diode array can include blue micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, i.e., the minimum center-to-center distance between the micro light-emitting diodes, can be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro light-emitting diode chip can be between several thousand and several million.

[0311] In one embodiment of the present invention, a second display panel is further provided, and the display panel includes the above-mentioned second micro light-emitting diode display chip.

[0312] Next, a third type of micro light-emitting diode chip and display panel are described.

[0313] Figure 9 A top view schematic diagram of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 9 It includes a micro light-emitting diode 301, a microlens 302, and a current spreading structure 303. Figure 10 A longitudinal cross-sectional schematic diagram of a third type of micro light-emitting diode chip according to an embodiment of the present invention is shown. As shown, the third type of micro light-emitting diode chip includes a driving module, a micro light-emitting diode 301, a current spreading structure 303, and a microlens 302. The driving module includes a driving backplane 308 and a bonding layer 310. The micro light-emitting diode 301 is arranged on the upper surface of the driving module, and the micro light-emitting diode 301 includes a light-emitting mesa. The current spreading structure 303 is located between the micro light-emitting diodes 301, and the current spreading structure 303 is arranged to surround the micro light-emitting diodes 301 in an electrically contacting manner. As Figure 10 shown, the microlens 302 is arranged on the upper surface of the micro light-emitting diode, adjacent microlenses 302 are connected between the micro light-emitting diodes 301, the sides of adjacent microlenses 302 are separated to form a gap, the bottom of the gap is lower than the top of the light-emitting mesa, and the gap is above the bifurcated peak of the current spreading structure 303. In one embodiment, the gap spacing between the sides of adjacent microlenses is 0 to 1 micrometer.

[0314] The size of each micro light-emitting diode chip does not exceed 1 cm, preferably not exceeding 5 mm. The micro light-emitting diodes are formed in an array in the micro light-emitting diode display chip, and the resolution is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K or 4K. The diameter of the micro light-emitting diode structure is at the nanometer level, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel elements on the micro light-emitting diode display chip.

[0315] For convenience, "upward" is used to indicate away from the driving backplane 308, "downward" indicates toward the driving backplane 308, and other directional terms such as top, bottom, above, below, directly below, underneath, etc. are also interpreted accordingly. In one embodiment, the driving backplane 308 includes a substrate, a driving circuit, and a driving electrode 309. Each micro light-emitting diode corresponds to a driving electrode, and the driving electrode 309 is electrically connected to the bonding layer 310. In one embodiment, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is about 700 microns thick. The driving circuit forms individual pixel drivers to control the operation of each individual pixel LED device. The driving circuit includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. In one embodiment, the micro light-emitting diode can be bonded to the surface of the driving backplane 308 through the bonding layer 310, and the bonding can be completed by means of eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 310 can be disposed on the driving backplane 308. In another embodiment, the bonding layer 310 grows on the driving backplane 308. In one embodiment, the thickness of the bonding layer 310 is 0.1 micron to 3 microns. In a preferred embodiment, the thickness of the bonding layer 310 is 0.6 micron. In some embodiments, the bonding layer 310 can include two metal layers. The material of the bonding layer 310 can be, for example, an alloy of one or several of the following metal materials: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 310 can also be used as a reflector to reflect the light emitted from the LED structure above.

[0316] In some embodiments, the driving backplane 308 may adopt an integrated circuit (IC) board. The micro light-emitting diodes are electrically connected to the driving backplane 308, and the driving backplane 308 is used to control the lighting and extinguishing of the micro light-emitting diodes. In some embodiments, the integrated circuit board may be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through separate metal interconnections. In some embodiments, each micro light-emitting diode may be individually electrically controlled by the integrated circuit board. In some embodiments, the integrated circuit board may be electrically connected to the electrodes of the micro light-emitting diode display chip through metal interconnections. In some embodiments, a dielectric layer may be formed in the gaps between the micro light-emitting diodes. In some embodiments, the dielectric layer may also be formed in the gaps between the interconnections.

[0317] The micro light-emitting diode chip includes a plurality of micro light-emitting diode arrays, and each micro light-emitting diode array includes a plurality of micro light-emitting diodes. The driving method of the micro light-emitting diodes is, for example, passive matrix (PM) driving, in which the cathodes of all the micro light-emitting diodes in each array are commonly connected to the cathode line NL, and the micro light-emitting diodes with the same number in each array are respectively connected to the corresponding anode lines PL. Thus, the on / off and light-emitting brightness of each light-emitting diode can be individually controlled by controlling the signals on the corresponding cathode line and anode line.

[0318] In some embodiments, the micro light-emitting diodes may be arranged in a regular or irregular manner on the upper surface of the driving module as the pixel points of the micro light-emitting diode chip. The micro light-emitting diode includes: a light-emitting mesa 305, an ohmic contact layer 304, a top conductive layer 307, and a passivation isolation layer 306. The ohmic contact layer 304 is located on the lower surface of the light-emitting mesa 305, and the ohmic contact layer 304 is electrically connected to the bonding layer 310. The top conductive layer 307 is located on the side and top surfaces of the light-emitting mesa 305, and the top conductive layer 307 is electrically connected to the current spreading structure 303. The passivation isolation layer 306 at least partially coats the side surface of the light-emitting mesa, and the passivation isolation layer 306 is located between the light-emitting mesa 305 and the top conductive layer 307. In some embodiments, the passivation isolation layer 306 covers a part of the top surface of the light-emitting mesa 305.

[0319] In some embodiments, the electrode polarity of the ohmic contact layer 304 is opposite to that of the top conductive layer 307. For example, the ohmic contact layer 304 can be a P electrode or an anode electrode, and the top conductive layer 307 is an electrode with a polarity opposite to that of the ohmic contact layer 304, such as an N electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be one or more combinations of, for example, graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0320] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are integrated into one body. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are integrated into one body. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0321] In some embodiments, a top conductive layer can be formed on the top surface of the micro light-emitting diode array. In some embodiments, the top conductive layer can be shared by all the micro light-emitting diodes in the micro light-emitting diode array. In some embodiments, the light-emitting layer can include at least one quantum well layer. In some embodiments, the micro light-emitting diode array can include a single-layer micro light-emitting diode structure. In some embodiments, the micro light-emitting diode array can include a multi-layer vertically stacked micro light-emitting diode structure.

[0322] In one embodiment, the light-emitting mesa can be a trapezoidal platform, and the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension. In one embodiment, the inclination angle range of the side wall of the light-emitting mesa is 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0323] As Figure 10As shown, the light-emitting mesa 305 includes a first-type epitaxial layer 3052, a second-type epitaxial layer 3051, and a light-emitting layer 3053 located therebetween. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro light-emitting diode in the micro light-emitting diode array can be a micron-scale light-emitting mesa. In some embodiments, the micron-scale light-emitting mesa can include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is to say, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 308; the light-emitting layer is located above the first-type epitaxial layer and is farther from the driving backplane 308; the second-type epitaxial layer is located above the light-emitting layer and is the farthest from the driving backplane 308. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, especially superlattice-stacked quantum well layers. Preferably, the superlattice-stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material with a first conductivity type and includes a plurality of semiconductor layers. The main matrix material of the first-type light-emitting mesa can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first-type epitaxial layer can include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer can be formed below the window layer. In some embodiments, the second-type epitaxial layer is a semiconductor material with a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second-type epitaxial layer can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second-type epitaxial layer can include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In one embodiment, the first conductivity type is different from the second conductivity type.

[0324] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer of the second conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer of the first conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In some embodiments, the light-emitting layer further includes an electron blocking layer, and the electron blocking layer is disposed on a first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0325] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where the range of x is 0.5 to 0.9, and the range of y is 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0326] In some embodiments, one of the first type of epitaxial layer and the second type of epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18cm -3 to 1e 19 cm -3 . In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example, 65 nm.

[0327] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example, 20 nm.

[0328] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example, 65 nm.

[0329] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3 and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is from 20 nm to 40 nm, such as 30 nm.

[0330] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, for example x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, such as 20 nm.

[0331] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0332] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0333] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0334] The current spreading structure 303 can reflect the light emitted by the micro light-emitting diode, thus significantly increasing the total light output. At the same time, the current spreading structure 303 can also isolate the light to prevent light crosstalk between adjacent light-emitting diodes. By arranging the current spreading structure 303 to surround the micro light-emitting diode in an electrical contact manner and being electrically connected to the top conductive layer 307, the electrical contact area between the current spreading structure 303 and the micro light-emitting diode can be significantly increased, so that the active layer (light-emitting layer) of the micro light-emitting diode can emit light more uniformly, effectively avoiding the situation that only the electrical contact part or its vicinity emits light or the light emission brightness of the electrical contact part or its vicinity is too high.

[0335] Figure 11 Shows a top view schematic diagram of the current spreading structure of the third micro light-emitting diode chip according to an embodiment of the present invention. AsFigure 11 As shown, the bottoms of adjacent current spreading structures 303 are connected, and all the current spreading structures are integrated into a whole. Figure 11 In [description], the top view shape (i.e., the cross-sectional shape) of the micro light-emitting diode is circular, and the top view shape of the overall current spreading structure is the remaining grid shape after removing the circle. In one embodiment, the top view shape of the micro light-emitting diode may also be other appropriate shapes, such as rectangle, square or regular polygon, etc., and the top view shape of the overall current spreading structure is the remaining shape after removing the other appropriate shape, such as the remaining grid shape after removing rectangle, square or polygon. As Figure 10 As shown, the longitudinal section of adjacent current spreading structures presents a forked peak shape. In one embodiment, the longitudinal section shape of adjacent current spreading structures is asymmetric, and the heights may be different, which is not limited herein.

[0336] In one embodiment, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr and Cu.

[0337] Figure 10 In [description], the lateral dimension of the bottom of the microlens 302 is greater than the lateral dimension of the light-emitting area of the micro light-emitting diode. In some embodiments, the lateral dimension of the bottom of the microlens 302 may be equal to the lateral dimension of the light-emitting area of the micro light-emitting diode.

[0338] In some embodiments, one microlens 302 may cover multiple micro light-emitting diodes without lenses. Multiple microlenses form a microlens array. The microlens array is disposed above the micro light-emitting diode array, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro light-emitting diode, and the horizontal profile of the microlens is greater than the maximum horizontal profile of the micro light-emitting diode. The microlens is mainly used for converging and / or collimating light. For example, by adjusting parameters such as the thickness and curvature of the microlens, the focal point of the microlens can be located in the light-emitting mesa of the micro light-emitting diode. The microlenses in the microlens array are usually the same. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses and cylindrical microlenses. As Figure 10 As shown, in one embodiment, the microlens 302 includes an upper curvature portion 3021 and a lower spacer portion 3022. In one embodiment, the typical shape of the lower spacer portion of each microlens 302 includes circle, square, rectangle and hexagon. The microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, spacer, etc.

[0339] In one embodiment, the centers of curvature at various positions on the side walls of the lower spacer do not coincide with the centers of curvature at various positions of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting mesa of the micro light-emitting diode. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens can be, for example, a positive hemisphere.

[0340] In some embodiments, the shape of the microlens 302 can be a curved hemisphere. In some embodiments, the height of the microlens 302 is not greater than 2 micrometers. In some embodiments, the height of the microlens 302 is not greater than 1 micrometer. In some embodiments, the height of the microlens 302 is not greater than 0.5 micrometer. In some embodiments, the width of the microlens 302 is not greater than 4 micrometers. In some embodiments, the width of the microlens 302 is not greater than 3 micrometers. In some embodiments, the width of the microlens 302 is not greater than 2 micrometers. In some embodiments, the width of the microlens 302 is not greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 302 is greater than 1.5.

[0341] In some embodiments, the microlens 302 can be made of various materials that are transparent to light of various wavelengths emitted by the micro light-emitting diode. Exemplary transparent materials for the microlens 302 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 302 is made of photoresist. In some embodiments, the microlens is directly deposited on the surface of the micro light-emitting diode by chemical vapor deposition (CVD) technology.

[0342] In some embodiments, the micro light-emitting diode array can include blue micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, i.e., the minimum center-to-center distance between micro light-emitting diodes, can be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro light-emitting diode chip can be between several thousand and several million.

[0343] In one embodiment of the present invention, a third display panel is further provided, and the display panel includes the above-mentioned third micro light-emitting diode display chip.

[0344] Next, a fourth micro light-emitting diode chip and a display panel are described.

[0345] Figure 12 A top view schematic diagram of a fourth micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 12It includes a micro light-emitting diode 401, a microlens 402, and a current spreading structure 403. Figure 13 FIG. shows a longitudinal cross-sectional schematic view of a fourth type of micro light-emitting diode chip according to an embodiment of the present invention. As shown in the figure, the fourth type of micro light-emitting diode chip includes a driving module, a micro light-emitting diode 401, a current spreading structure 403, and a microlens 402. The driving module includes a driving backplane 408 and a bonding layer 410. The micro light-emitting diode 401 is disposed on the upper surface of the driving module. The micro light-emitting diode 401 includes a light-emitting mesa. The current spreading structure 403 is located between the micro light-emitting diodes 401. The current spreading structure 403 is arranged to surround the micro light-emitting diodes 401 in an electrically contacting manner. As Figure 13 shown, the microlens 402 is disposed on the upper surface of the micro light-emitting diode. Adjacent microlenses 402 are connected between the micro light-emitting diodes 401. The sides of adjacent microlenses 402 are separated to form a gap. The gap forms a closed air gap 4023. In one embodiment, the air gap 4023 is an air gap. The air gap 4023 is a deposition defect of the microlens material. The longitudinal cross-section of the air gap 4023 can be rectangular, circular, oval, crescent-shaped, or irregularly elongated.

[0346] The size of each micro light-emitting diode chip does not exceed 1 cm, preferably not exceeding 5 mm. The micro light-emitting diodes are formed in an array in the micro light-emitting diode display chip, and the resolution is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro light-emitting diode structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel elements on the micro light-emitting diode display chip.

[0347] For convenience, "upward" is used to indicate away from the driving backplane 408, "downward" indicates toward the driving backplane 408, and other directional terms such as top, bottom, above, below, directly below, underneath, etc. are interpreted accordingly. In one embodiment, the driving backplane 408 includes a substrate, a driving circuit, and driving electrodes 409. Each micro light-emitting diode corresponds to one driving electrode, and the driving electrode 409 is electrically connected to the bonding layer 410. In one embodiment, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is about 700 micrometers thick. The driving circuit forms individual pixel drivers to control the operation of each individual pixel LED device. The driving circuit includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. In one embodiment, the micro light-emitting diodes can be bonded to the surface of the driving backplane 408 through the bonding layer 410, and the bonding can be completed by means of eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 410 can be disposed on the driving backplane 408. In another embodiment, the bonding layer 410 grows on the driving backplane 408. In one embodiment, the thickness of the bonding layer 410 is from 0.1 micrometer to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 410 is 0.6 micrometers. In some embodiments, the bonding layer 410 can include two metal layers. The material of the bonding layer 410 can be, for example, an alloy of one or several of the following metal materials: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 410 can also be used as a reflector to reflect the light emitted from the LED structure above.

[0348] In some embodiments, the driving backplane 408 can adopt an integrated circuit (IC) board. The micro light-emitting diodes are electrically connected to the driving backplane 408, and the driving backplane 408 is used to control the lighting and extinguishing of the micro light-emitting diodes. In some embodiments, the integrated circuit board can be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through separate metal interconnections. In some embodiments, each micro light-emitting diode can be individually electrically controlled by the integrated circuit board. In some embodiments, the integrated circuit board can be electrically connected to the electrodes of the micro light-emitting diode display chip through metal interconnections. In some embodiments, a dielectric layer can be formed in the gaps between the micro light-emitting diodes. In some embodiments, the dielectric layer can also be formed in the gaps between the interconnections.

[0349] The micro light-emitting diode chip includes a plurality of micro light-emitting diode arrays, and each micro light-emitting diode array includes a plurality of micro light-emitting diodes. The driving method of the micro light-emitting diodes is, for example, passive matrix (PM) driving, in which the cathodes of all the micro light-emitting diodes in each array are commonly connected to the cathode line NL, and the micro light-emitting diodes with the same number in each array are respectively connected to the corresponding anode line PL. Thus, the on / off and light-emitting brightness of each light-emitting diode can be individually controlled by controlling the signals on the corresponding cathode line and anode line.

[0350] In some embodiments, the micro light-emitting diodes may be arranged on the upper surface of the driving module in a regular or irregular manner as pixel points of the micro light-emitting diode chip. The micro light-emitting diode includes: a light-emitting mesa 405, an ohmic contact layer 404, a top conductive layer 407, and a passivation isolation layer 406. The ohmic contact layer 404 is located on the lower surface of the light-emitting mesa 405, and the ohmic contact layer 404 is electrically connected to the bonding layer 410. The top conductive layer 407 is located on the side and top surfaces of the light-emitting mesa 405, and the top conductive layer 407 is electrically connected to the current spreading structure 403. The passivation isolation layer 406 at least partially coats the side surface of the light-emitting mesa, and the passivation isolation layer 406 is located between the light-emitting mesa 405 and the top conductive layer 407. In some embodiments, the passivation isolation layer 406 covers a part of the top surface of the light-emitting mesa 405.

[0351] In some embodiments, the electrode polarity of the ohmic contact layer 404 is opposite to that of the top conductive layer 407. The ohmic contact layer 404 may be, for example, a P electrode or an anode electrode, and the top conductive layer 407 is an electrode with a polarity opposite to that of the ohmic contact layer 404, such as an N electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components may be a combination of one or more of, for example, graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0352] In one embodiment, adjacent top conductive layers are connected, and all top conductive layers are connected into a whole. In one embodiment, adjacent passivation isolation layers are connected, and all passivation isolation layers are connected into a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0353] In some embodiments, a top conductive layer may be formed on the top surface of the micro light-emitting diode array. In some embodiments, the top conductive layer may be shared by all the micro light-emitting diodes in the micro light-emitting diode array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro light-emitting diode array may include a single-layer micro light-emitting diode structure. In some embodiments, the micro light-emitting diode array may include a multi-layer vertically stacked micro light-emitting diode structure.

[0354] In one embodiment, the light-emitting mesa may be a trapezoidal platform, and the bottom lateral dimension of the light-emitting mesa is larger than the top lateral dimension. In one embodiment, the inclination angle range of the side wall of the light-emitting mesa is from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 micrometers. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 micrometers. In one embodiment, the lateral dimension of the bonding layer is larger than the bottom lateral dimension of the light-emitting mesa.

[0355] As Figure 13As shown, the light-emitting mesa 405 includes a first-type epitaxial layer 4052, a second-type epitaxial layer 4051, and a light-emitting layer 4053 therebetween. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro light-emitting diode in the micro light-emitting diode array can be a micron-scale light-emitting mesa. In some embodiments, the micron-scale light-emitting mesa can include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is to say, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 408; the light-emitting layer is located above the first-type epitaxial layer and is farther from the driving backplane 408; the second-type epitaxial layer is located above the light-emitting layer and is the farthest from the driving backplane 408. In some embodiments, the light-emitting layer is formed by multiple stacked quantum well layers, particularly superlattice-stacked quantum well layers. Preferably, the superlattice-stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material with a first conduction type and includes multiple semiconductor layers. The main matrix material of the first-type light-emitting mesa can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first-type epitaxial layer can include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer can be formed below the window layer. In some embodiments, the second-type epitaxial layer is a semiconductor material with a second conduction type and includes multiple semiconductor layers. The main matrix material of the second-type epitaxial layer can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second-type epitaxial layer can include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In one embodiment, the first conduction type is different from the second conduction type.

[0356] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer composed of at least two or more elements of the second conduction type including Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer composed of at least two or more elements of the first conduction type including Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In some embodiments, the light-emitting layer further includes an electron blocking layer, and the electron blocking layer is disposed on a first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0357] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where the range of x is 0.5 to 0.9, and the range of y is 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0358] In some embodiments, one of the first type of epitaxial layer and the second type of epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18cm -3 to 1e 19 cm -3 。In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example, 65 nm.

[0359] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example, x is 0.5. In such embodiments, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example, 20 nm.

[0360] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example, 65 nm.

[0361] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3, and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, such as 30 nm.

[0362] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is 10 nm to 30 nm, such as 20 nm.

[0363] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0364] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0365] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0366] The current spreading structure 403 can reflect the light emitted by the micro light-emitting diode, thereby significantly increasing the total light output. At the same time, the current spreading structure 403 can also isolate light and prevent light crosstalk between adjacent light-emitting diodes. By arranging the current spreading structure 403 to surround the micro light-emitting diode in an electrical contact manner and electrically connecting it to the top conductive layer 407, the electrical contact area between the current spreading structure 403 and the micro light-emitting diode can be significantly increased, so that the active layer (light-emitting layer) of the micro light-emitting diode can emit light more uniformly, effectively avoiding the situation that only the electrical contact part or its vicinity emits light or the light emission brightness of the electrical contact part or its vicinity is too high.

[0367] Figure 14 Shows a top view schematic diagram of the current spreading structure of the fourth micro light-emitting diode chip according to an embodiment of the present invention. AsFigure 14 As shown, the bottoms of adjacent current spreading structures 403 are connected, and all the current spreading structures are integrated into one body. Figure 14 In [description], the top view shape (i.e., cross-sectional shape) of the micro light-emitting diode is circular, and the top view shape of the overall current spreading structure is the remaining grid shape after removing the circle. In one embodiment, the top view shape of the micro light-emitting diode may also be other suitable shapes, such as rectangular, square, or regular polygon, etc., and the top view shape of the overall current spreading structure is the remaining shape after removing the other suitable shape, such as the remaining grid shape after removing the rectangle, square, or polygon. As Figure 13 As shown, the longitudinal profile of adjacent current spreading structures presents a forked peak shape. In one embodiment, the longitudinal profile shapes of adjacent current spreading structures are asymmetric, and the heights may not be the same, which is not limited herein.

[0368] In one embodiment, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

[0369] Figure 13 In [description], the lateral dimension of the bottom of the microlens 402 is greater than the lateral dimension of the light-emitting area of the micro light-emitting diode. In some embodiments, the lateral dimension of the bottom of the microlens 402 may be equal to the lateral dimension of the light-emitting area of the micro light-emitting diode.

[0370] In some embodiments, one microlens 402 can cover multiple lensless micro light-emitting diodes. Multiple microlenses form a microlens array. The microlens array is disposed above the micro light-emitting diode array, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro light-emitting diode, and the horizontal profile of the microlens is greater than the maximum horizontal profile of the micro light-emitting diode. The microlens is mainly used for converging and / or collimating light. For example, by adjusting parameters such as the thickness and curvature of the microlens, the focal point of the microlens can be located in the light-emitting mesa of the micro light-emitting diode. The microlenses in the microlens array are usually the same. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses, and cylindrical microlenses. As Figure 2 As shown, in one embodiment, the microlens 402 includes an upper curvature portion 4021 and a lower spacer portion 4022. In one embodiment, the typical shape of the lower spacer portion of each microlens 402 includes circular, square, rectangular, and hexagonal. The microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, and spacer, etc.

[0371] In one embodiment, the centers of curvature at various positions on the sidewalls of the lower spacer do not coincide with the centers of curvature at various positions of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting mesa of the micro light-emitting diode. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens can be, for example, a positive hemispherical shape.

[0372] In some embodiments, the shape of the microlens 402 can be a curved hemispherical shape. In some embodiments, the height of the microlens 402 is not greater than 2 micrometers. In some embodiments, the height of the microlens 402 is not greater than 1 micrometer. In some embodiments, the height of the microlens 402 is not greater than 0.5 micrometer. In some embodiments, the width of the microlens 402 is not greater than 4 micrometers. In some embodiments, the width of the microlens 402 is not greater than 3 micrometers. In some embodiments, the width of the microlens 402 is not greater than 2 micrometers. In some embodiments, the width of the microlens 402 is not greater than 1 micrometer. In some embodiments, the ratio of the width to the height of the microlens 402 is greater than 1.5.

[0373] The sides of adjacent microlenses 402 are spaced apart to form a gap, and the gap forms a closed air gap. Typical shapes of the longitudinal cross-section of the air gap include circular, square, rectangular, hexagonal, elliptical, crescent-shaped, or irregular elongated morphologies.

[0374] In some embodiments, the microlens 402 can be made of various materials that are transparent to light of various wavelengths emitted by the micro light-emitting diode. Exemplary transparent materials for the microlens 402 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 402 is made of photoresist. In some embodiments, the microlens is directly deposited on the surface of the micro light-emitting diode by chemical vapor deposition (CVD) technology.

[0375] In some embodiments, the micro light-emitting diode array can include blue micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, i.e., the minimum center-to-center distance between micro light-emitting diodes, can be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro light-emitting diode chip can be between several thousand and several million.

[0376] In one embodiment of the present invention, a fourth type of display panel is further provided, and the display panel includes the above-mentioned fourth type of micro light-emitting diode display chip.

[0377] Finally, a fifth type of micro light-emitting diode chip and a display panel are described.

[0378] Figure 15 Fig. shows a top view schematic diagram of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention. Figure 15 It includes a micro light-emitting diode 501, a microlens 502, and a current spreading structure 503. Figure 16 Fig. shows a longitudinal cross-sectional schematic diagram of a fifth type of micro light-emitting diode chip according to an embodiment of the present invention. As shown, the fifth type of micro light-emitting diode chip includes a driving module, a micro light-emitting diode 501, a current spreading structure 503, and a microlens 502. The driving module includes a driving backplane 508 and a bonding layer 510. The micro light-emitting diode 501 is arranged on the upper surface of the driving module. The micro light-emitting diode 501 includes a light-emitting mesa. The current spreading structure 503 is located between the micro light-emitting diodes 501. The current spreading structure 503 is arranged to surround the micro light-emitting diode 501 in an electrically contacting manner. As Figure 16 shown, the microlens 502 is arranged on the upper surface of the micro light-emitting diode. Adjacent microlenses 502 are connected between the micro light-emitting diodes 501. The sides of adjacent microlenses 502 are separated to form a gap. The microlens 502 internally contains a closed air gap 5023. The air gap 5023 is located between the light-emitting mesa and the current spreading structure.

[0379] The size of each micro light-emitting diode chip does not exceed 1 cm, preferably not exceeding 5 mm. The micro light-emitting diodes are formed in an array in the micro light-emitting diode display chip. The resolution is, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro light-emitting diode structure is in the nanometer range, for example, 20 nm to 100 nm. Each micro light-emitting diode can form at least a part of the pixel elements on the micro light-emitting diode display chip.

[0380] For convenience, "upward" is used to indicate away from the driving backplane 508, "downward" indicates toward the driving backplane 508, and other directional terms such as top, bottom, above, below, directly below, underneath, etc. are interpreted accordingly. In one embodiment, the driving backplane 508 includes a substrate, a driving circuit, and driving electrodes 509. Each micro light-emitting diode corresponds to one driving electrode, and the driving electrode 509 is electrically connected to the bonding layer 510. In one embodiment, the material of the driving electrode is an alloy of one or more of the following metals: Al, Cu, and Au. In one embodiment, the substrate is a Si substrate. In another embodiment, the substrate is a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is about 700 micrometers thick. The driving circuit forms individual pixel drivers to control the operation of each individual pixel LED device. The driving circuit includes, for example, complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. In one embodiment, the micro light-emitting diodes can be bonded to the surface of the driving backplane 508 through the bonding layer 510, and the bonding can be completed by means of eutectic bonding, thermocompression bonding, and transient liquid phase (TLP) bonding. In one embodiment, the bonding layer 510 can be disposed on the driving backplane 508. In another embodiment, the bonding layer 510 grows on the driving backplane 508. In one embodiment, the thickness of the bonding layer 510 is from 0.1 micrometer to 3 micrometers. In a preferred embodiment, the thickness of the bonding layer 510 is 0.6 micrometers. In some embodiments, the bonding layer 510 can include two metal layers. The material of the bonding layer 510 can be, for example, an alloy of one or several of the following metal materials: Cr, Al, Ti, Ni, Pt, Au, and Sn. In some embodiments, the bonding layer 510 can also be used as a reflector to reflect the light emitted from the LED structure above.

[0381] In some embodiments, the driving backplane 508 can adopt an integrated circuit (IC) board. The micro light-emitting diodes are electrically connected to the driving backplane 508, and the driving backplane 508 is used to control the lighting and extinguishing of the micro light-emitting diodes. In some embodiments, the integrated circuit board can be electrically connected to each micro light-emitting diode in the micro light-emitting diode array through separate metal interconnections. In some embodiments, each micro light-emitting diode can be individually electrically controlled by the integrated circuit board. In some embodiments, the integrated circuit board can be electrically connected to the electrodes of the micro light-emitting diode display chip through metal interconnections. In some embodiments, a dielectric layer can be formed in the gaps between the micro light-emitting diodes. In some embodiments, the dielectric layer can also be formed in the gaps between the interconnections.

[0382] The micro light-emitting diode chip includes a plurality of micro light-emitting diode arrays, and each micro light-emitting diode array includes a plurality of micro light-emitting diodes. The driving method of the micro light-emitting diodes is, for example, passive matrix (PM) driving, in which the cathodes of all the micro light-emitting diodes in each array are commonly connected to the cathode line NL, and the micro light-emitting diodes with the same number in each array are respectively connected to the corresponding anode line PL. Thus, the on / off and light-emitting brightness of each light-emitting diode can be individually controlled by controlling the signals on the corresponding cathode line and anode line.

[0383] In some embodiments, the micro light-emitting diodes may be arranged on the upper surface of the driving module in a regular or irregular manner as the pixel points of the micro light-emitting diode chip. The micro light-emitting diode includes: a light-emitting mesa 505, an ohmic contact layer 504, a top conductive layer 507, and a passivation isolation layer 506. The ohmic contact layer 504 is located on the lower surface of the light-emitting mesa 505, and the ohmic contact layer 504 is electrically connected to the bonding layer 510. The top conductive layer 507 is located on the side and top surfaces of the light-emitting mesa 505, and the top conductive layer 507 is electrically connected to the current spreading structure 503. The passivation isolation layer 506 at least partially covers the side surface of the light-emitting mesa, and the passivation isolation layer 506 is located between the light-emitting mesa 505 and the top conductive layer 507. In some embodiments, the passivation isolation layer 506 covers a part of the top surface of the light-emitting mesa 505.

[0384] In some embodiments, the electrode polarity of the ohmic contact layer 504 is opposite to that of the top conductive layer 507. The ohmic contact layer 504 can be, for example, a P electrode or an anode electrode, and the top conductive layer 507 is an electrode with a polarity opposite to that of the ohmic contact layer 504, such as an N electrode or a cathode electrode. In one embodiment, the ohmic contact layer, the top conductive layer, and their connecting components can be a combination of one or more of, for example, graphene, indium tin oxide (ITO), antimony doped zinc oxide (AZO), fluorine doped tin oxide (FTO), or other transparent conductive oxides (TCO).

[0385] In one embodiment, adjacent top conductive layers are connected, and all the top conductive layers are connected into a whole. In one embodiment, adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected into a whole. In one embodiment, the material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

[0386] In some embodiments, a top conductive layer may be formed on the top surface of the micro light-emitting diode array. In some embodiments, the top conductive layer may be shared by all the micro light-emitting diodes in the micro light-emitting diode array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro light-emitting diode array may include a single-layer micro light-emitting diode structure. In some embodiments, the micro light-emitting diode array may include a multi-layer vertically stacked micro light-emitting diode structure.

[0387] In one embodiment, the light-emitting mesa may be a trapezoidal platform, and the bottom lateral dimension of the light-emitting mesa is greater than the top lateral dimension. In one embodiment, the inclination angle range of the side wall of the light-emitting mesa is from 60° to 85°. In one embodiment, the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns. In one embodiment, the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns. In one embodiment, the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

[0388] Such as Figure 16As shown, the light-emitting mesa 505 includes a first-type epitaxial layer 5052, a second-type epitaxial layer 5051, and a light-emitting layer 5053 therebetween. The first-type epitaxial layer is electrically connected to the ohmic contact layer. The second-type epitaxial layer is electrically connected to the top conductive layer. In some embodiments, the light-emitting mesa of each micro light-emitting diode in the micro light-emitting diode array can be a micron-scale light-emitting mesa. In some embodiments, the micron-scale light-emitting mesa can include, from bottom to top, a first-type epitaxial layer, a light-emitting layer, and a second-type epitaxial layer. That is to say, in the three-layer structure, the first-type epitaxial layer is closest to the driving backplane 508; the light-emitting layer is located above the first-type epitaxial layer and is farther from the driving backplane 508; the second-type epitaxial layer is located above the light-emitting layer and is the farthest from the driving backplane 508. In some embodiments, the light-emitting layer is formed by a plurality of stacked quantum well layers, especially superlattice-stacked quantum well layers. Preferably, the superlattice-stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first-type epitaxial layer is a semiconductor material with a first conduction type and includes a plurality of semiconductor layers. The main matrix material of the first-type light-emitting mesa can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the first-type epitaxial layer can include, from top to bottom, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer can be formed below the window layer. In some embodiments, the second-type epitaxial layer is a semiconductor material with a second conduction type and includes a plurality of semiconductor layers. The main matrix material of the second-type epitaxial layer can be, but is not limited to, materials composed of Ga, N, As, P, In, or Al, etc. In addition, the second-type epitaxial layer can include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer can be formed on the confinement layer. In one embodiment, the first conduction type is different from the second conduction type.

[0389] In some embodiments, the first type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer, and the second type of epitaxial layer is a P-type GaN layer or a P-type AlGaN layer. That is, the material of the second type of epitaxial layer can be a material layer composed of at least two or more elements of the second conductive type including Ga, N, As, Al, In, and P, and the first type of epitaxial layer can be a material layer composed of at least two or more elements of the first conductive type including Ga, N, As, Al, In, and P. In some embodiments, the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, and the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. In some embodiments, the light-emitting layer further includes an electron blocking layer, and the electron blocking layer is disposed on a first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment, the first type of epitaxial layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second type of epitaxial layer is an N-type GaN layer or an N-type AlGaN layer.

[0390] In some embodiments, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, the thickness is 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y.

[0391] In some embodiments, one of the first type of epitaxial layer and the second type of epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al x In 1-x P, where the range of x is from 0.1 to 0.5, for example, x is 0.5. In addition, in these embodiments, the thickness of the N-type cladding layer is not greater than 350 nm. For example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e 17 cm -3 to 1e 18 cm -3 . The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is from 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e 18cm -3 to 1e 19 cm -3 . In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is from 50 nm to 75 nm, for example 65 nm.

[0392] In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer. In some embodiments, the material of the P-type cladding layer is Al x In 1-x P, where x is from 0.3 to 0.5, for example x is 0.5. In such an embodiment, the thickness of the P-type cladding layer is not greater than 380 nm. For example, the thickness of the P-type cladding layer is 360 nm. In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is from 10 nm to 30 nm, for example 20 nm.

[0393] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first doped P-type transition layer formed on the P-type cladding layer, and a second doped P-type transition layer formed on the first doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al x Ga 1-x ) y In 1-y P, where the range of x is from 0.5 to 0.9, and the range of y is from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is from 50 nm to 70 nm, for example 65 nm.

[0394] In some embodiments, the material of the first doped P-type transition layer is (Al x Ga 1-x ) y In 1-yP, where the range of x is from 0.1 to 0.3, and the range of y is from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times of x. In some embodiments, the thickness of the first doped P-type transition layer is from 20 nm to 40 nm, such as 30 nm.

[0395] In some embodiments, the material of the second doped P-type transition layer is Al x Ga 1-x As, where the range of x is from 0.5 to 0.9, such as x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, such as 20 nm.

[0396] In some embodiments, the doping concentration of the second doped P-type transition layer is greater than the doping density of the first doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second doped P-type transition layer.

[0397] In some embodiments, the doping concentration of the doped P-type contact layer is greater than that of the second doped P-type transition layer. In addition, in some embodiments, the doping concentration of the second doped P-type transition layer is 2 to 4 times that of the first doped P-type transition layer.

[0398] For example, the doping concentration of the first doped P-type transition layer is greater than 1e 18 cm -3 , the doping density of the second doped P-type transition layer is in the range of 2e 18 cm -3 -4e 18 cm -3 , and the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0399] The current spreading structure 503 can reflect the light emitted by the micro light-emitting diode, thereby significantly increasing the total light output. At the same time, the current spreading structure 503 can also isolate the light to prevent light crosstalk between adjacent light-emitting diodes. By arranging the current spreading structure 503 to surround the micro light-emitting diode in an electrical contact manner and electrically connecting it to the top conductive layer 507, the electrical contact area between the current spreading structure 503 and the micro light-emitting diode can be significantly increased, so that the active layer (light-emitting layer) of the micro light-emitting diode can emit light more uniformly, effectively avoiding the situation that only the electrical contact part or its vicinity emits light or the light emission brightness of the electrical contact part or its vicinity is too high.

[0400] Figure 17 Shows a top view schematic diagram of the current spreading structure of the fifth micro light-emitting diode chip according to an embodiment of the present invention. AsFigure 17 As shown, the bottoms of adjacent current spreading structures 503 are connected, and all the current spreading structures are integrated into a whole. Figure 17 In [description], the top view shape (i.e., the cross-sectional shape) of the micro light-emitting diode is circular, and the top view shape of the overall current spreading structure is the remaining grid shape after removing the circle. In one embodiment, the top view shape of the micro light-emitting diode may also be other suitable shapes, such as rectangular, square or regular polygon, etc., and the top view shape of the overall current spreading structure is the remaining shape after removing the other suitable shape, such as the remaining grid shape after removing the rectangle, square or polygon. As Figure 16 As shown, the longitudinal section of adjacent current spreading structures presents a forked peak shape. In one embodiment, the longitudinal section shapes of adjacent current spreading structures are asymmetric and the heights may be different, which are not limited herein.

[0401] In one embodiment, the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr and Cu.

[0402] Figure 16 In [description], the lateral dimension of the bottom of the microlens 502 is greater than the lateral dimension of the light-emitting area of the micro light-emitting diode. In some embodiments, the lateral dimension of the bottom of the microlens 502 may be equal to the lateral dimension of the light-emitting area of the micro light-emitting diode.

[0403] In some embodiments, one microlens 502 may cover multiple micro light-emitting diodes without lenses. Multiple microlenses form a microlens array. The microlens array is disposed above the micro light-emitting diode array, wherein at least one microlens is disposed on the surface of the top conductive layer of the micro light-emitting diode, and the horizontal profile of the microlens is greater than the maximum horizontal profile of the micro light-emitting diode. The microlens is mainly used for converging and / or collimating light. For example, by adjusting parameters such as the thickness and curvature of the microlens, the focal point of the microlens can be located in the light-emitting mesa of the micro light-emitting diode. The microlenses in the microlens array are usually the same. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnal microlenses and cylindrical microlenses. As Figure 2 As shown, in one embodiment, the microlens 502 includes an upper curvature portion 5021 and a lower spacer portion 5022. In one embodiment, the typical shape of the lower spacer portion of each microlens 502 includes circular, square, rectangular and hexagonal. The microlenses in the microlens array of the display panel may be the same or different in terms of shape, curvature, optical power, size, base, spacer, etc.

[0404] In one embodiment, the centers of curvature at various positions on the sidewalls of the lower spacer do not coincide with the centers of curvature at various positions of the upper curvature portion. The thickness of the lower spacer is set such that the focal point of the microlens is located in the light-emitting mesa of the micro light-emitting diode. In one embodiment, the height of the lower spacer of the microlens is 0.2 to 3 micrometers, and / or the height of the upper curvature portion of the microlens is 0.5 to 2 micrometers, and / or the spherical width of the microlens is 3 to 4 micrometers. In yet another embodiment, the microlens can be, for example, a positive hemispherical shape.

[0405] In some embodiments, the shape of the microlens 502 can be a curved hemispherical shape. In some embodiments, the height of the microlens 502 is not greater than 2 micrometers. In some embodiments, the height of the microlens 502 is not greater than 1 micrometer. In some embodiments, the height of the microlens 502 is not greater than 0.5 micrometer. In some embodiments, the width of the microlens 502 is not greater than 4 micrometers. In some embodiments, the width of the microlens 502 is not greater than 3 micrometers. In some embodiments, the width of the microlens 502 is not greater than 2 micrometers. In some embodiments, the width of the microlens 502 is not greater than 1 micrometer. In some embodiments, the width-to-height ratio of the microlens 502 is greater than 1.5.

[0406] In some embodiments, the microlens 502 can be made of various materials that are transparent to light of various wavelengths emitted by the micro light-emitting diode. Exemplary transparent materials for the microlens 502 include polymers and dielectric materials. In some embodiments, the dielectric material includes one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, etc. In some embodiments, the microlens 402 is made of photoresist. In some embodiments, the microlens is directly deposited on the surface of the micro light-emitting diode by chemical vapor deposition (CVD) technology.

[0407] The sides of adjacent microlenses 502 are spaced apart to form a gap, and the gap forms a closed air gap 5023, and the air gap 5023 is located between the light-emitting mesa and the current spreading structure.

[0408] Figure 18 A top view schematic diagram of a fifth micro light-emitting diode chip according to another embodiment of the present invention is shown. The microlens 502 contains an air gap 5023 inside, and at least one air gap 5023 is located above the bifurcation peak of the current spreading structure 503. The typical shape of the longitudinal section of the air gap includes a circle or a square or a rectangle or a hexagon or an ellipse or a crescent or an irregular elongated morphology. The shape of the air gap inside the microlens and the air gap above the bifurcation peak of the current spreading structure can be the same or different.

[0409] In some embodiments, the micro light-emitting diode array may include blue micro light-emitting diodes. In some embodiments, the pitch of the micro light-emitting diode array, i.e., the minimum center-to-center distance between the micro light-emitting diodes, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro light-emitting diode chip may be between several thousand and several million.

[0410] In one embodiment of the present invention, there is also provided a fifth type of display panel, which includes the above-mentioned fifth type of micro light-emitting diode display chip.

[0411] Although the embodiments of the present invention have been described above, it should be understood that they are presented only as examples and not as limitations. It will be apparent to those skilled in the relevant art that various combinations, variations, and changes can be made thereto without departing from the spirit and scope of the present invention. Therefore, the width and scope of the present invention disclosed herein should not be limited by the above-described exemplary embodiments, but should be defined only by the appended claims and their equivalents.

Claims

1. A micro light-emitting diode chip, characterized in that, Comprising: A micro light-emitting diode array, the micro light-emitting diode array comprising a plurality of micro light-emitting diodes configured to emit light, the micro light-emitting diodes including light-emitting mesa surfaces; And Micro-lenses, the micro-lenses being arranged above the micro light-emitting diodes, adjacent micro-lenses having connecting portions and gaps on the sides, wherein the gaps are located above the connecting portions and the bottoms of the gaps are lower than the tops of the light-emitting mesa surfaces.

2. The micro light-emitting diode chip according to claim 1, wherein, Further comprising: A driving module, the driving module including a driving backplane and a bonding layer; And A current spreading structure, the current spreading structure being located between the micro light-emitting diodes and being arranged to surround the micro light-emitting diodes in an electrically contacting manner.

3. The micro light-emitting diode chip according to claim 1, wherein The gap spacing between the sides of adjacent micro-lenses is from 0 to 1 micrometer.

4. The micro light-emitting diode chip according to claim 1 or 2, wherein The gap is located above the forked peaks of the current spreading structure.

5. The micro light-emitting diode chip according to claim 2, wherein The driving backplane includes driving electrodes, each micro light-emitting diode corresponding to one driving electrode, and the driving electrodes are electrically connected to the bonding layer.

6. The micro light-emitting diode chip according to claim 5, wherein The material of the driving electrodes is an alloy of one or more of the following metals: Al, Cu, and Au.

7. The micro light-emitting diode chip according to claim 2, wherein The material of the bonding layer is an alloy of one or more of the following metals: Cr, Al, Ti, Ni, Pt, Au, and Sn.

8. The micro light-emitting diode chip according to claim 1 or 2, wherein The micro light-emitting diodes further include: An ohmic contact layer, the ohmic contact layer being located on the lower surface of the light-emitting mesa surface and the ohmic contact layer being electrically connected to the bonding layer; A top conductive layer, the top conductive layer being located on the side and top surfaces of the light-emitting mesa surface, the top conductive layer being electrically connected to the current spreading structure; and A passivation isolation layer, the passivation isolation layer at least partially covering the side surface of the light-emitting mesa surface and the passivation isolation layer being located between the light-emitting mesa surface and the top conductive layer.

9. The micro light-emitting diode chip according to claim 8, wherein The electrode polarity of the ohmic contact layer is opposite to the electrode polarity of the top conductive layer.

10. The micro light-emitting diode chip according to claim 8, wherein Adjacent top conductive layers are connected, and all the top conductive layers are connected into a whole.

11. The micro light-emitting diode chip according to claim 8, wherein Adjacent passivation isolation layers are connected, and all the passivation isolation layers are connected into a whole.

12. The micro light-emitting diode chip according to claim 8, wherein The material of the passivation isolation layer is one or more of silicon oxide, silicon oxynitride, aluminum oxide, and silicon nitride.

13. The micro light-emitting diode chip according to claim 1, wherein The bottom lateral dimension of the light-emitting mesa surface is larger than the top lateral dimension.

14. The micro light-emitting diode chip according to claim 1, wherein the inclination angle range of the side wall of the light-emitting mesa is: 60° to 85°.

15. The micro light-emitting diode chip according to claim 1, wherein the bottom lateral dimension of the light-emitting mesa does not exceed 3 microns.

16. The micro light-emitting diode chip according to claim 1, wherein the top lateral dimension of the light-emitting mesa does not exceed 1.5 microns.

17. The micro light-emitting diode chip according to any one of claims 1-16, wherein the lateral dimension of the bonding layer is greater than the bottom lateral dimension of the light-emitting mesa.

18. The micro light-emitting diode chip according to claim 1, wherein the light-emitting mesa includes a first-type epitaxial layer, a second-type epitaxial layer, and a light-emitting layer located therebetween.

19. The micro light-emitting diode chip according to any one of claims 8-18, wherein the first-type epitaxial layer is electrically connected to the ohmic contact layer; the second-type epitaxial layer is electrically connected to the top conductive layer.

20. The micro light-emitting diode chip according to claim 18, wherein the material of the first-type epitaxial layer is a material layer of a first conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P, and the second-type epitaxial layer is a material layer of a second conductive type composed of at least two or more elements including Ga, N, As, Al, In, and P; the first conductive type is different from the second conductive type.

21. The micro light-emitting diode chip according to claim 18, wherein the light-emitting layer includes a multi-quantum well layer and an electron blocking layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer.

22. The micro light-emitting diode chip according to claim 2, wherein the bottoms of adjacent current spreading structures are connected, and all the current spreading structures are integrated into one body.

23. The micro light-emitting diode chip according to claim 2, wherein the longitudinal profile of adjacent current spreading structures presents a bifurcated peak shape.

24. The micro light-emitting diode chip according to claim 2, wherein the longitudinal profile shape of adjacent current spreading structures is asymmetric.

25. The micro light-emitting diode chip according to claim 2, wherein the material of the current spreading structure is an alloy of one or more of the following metals: Ti, Ni, Au, Ag, Pt, Al, Cr, and Cu.

26. The micro light-emitting diode chip according to claim 1, wherein the microlens has an upper curvature portion and a lower spacer portion.

27. The micro light-emitting diode chip according to claim 26, wherein the height of the lower spacer portion of the microlens is 0.2 to 3 microns; and / or the height of the upper curvature portion of the microlens is 0.5 to 2 microns; and / or The spherical width of the microlens is 3 to 4 micrometers.

28. The micro light-emitting diode chip according to claim 1, wherein the microlens is a positive hemispherical shape.

29. The micro light-emitting diode chip according to claim 1, wherein the material of the microlens is silicon oxide or silicon nitride or silicon carbide or titanium oxide or zirconium oxide or aluminum oxide.

30. A display panel, characterized in that, It includes the micro light-emitting diode display chip according to any one of claims 1-29.

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