Single-layer self-rectification memristor with ultrahigh rectification ratio and preparation method thereof

Abstract

The invention belongs to the technical field of semiconductor devices, and relates to a single-layer self-rectification memristor with an ultrahigh rectification ratio and a preparation method thereof, and the preparation method comprises the steps: sputtering 50 nm Pt onto a pattern wafer, removing light resistance through acetone, and setting the sputtering parameter of Pt deposition as 300 W, 70 s; after the second patterning, under the chamber pressure of 3.72 mTorr, the power of 50 W is utilized for 770 s continuously, and an HfO2-x thin film with the thickness of 10 nm is deposited; an RTP-VT100M system is used for carrying out rapid thermal annealing treatment on the HfO2-x thin film; tiN of 50 nm is deposited under the parameters of 200 W and 240 s; and removing all residual photoresist by using acetone to complete the preparation of the self-rectification memristor. The self-rectification memristor has the beneficial effects that the self-rectification memristor has an ultra-simple structure, low programming voltage (1.5 V), ultra-high rectification ratio and non-linearity.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a single-layer self-rectifying memristor with an ultra-high rectification ratio and a preparation method thereof. Background Art

[0002] Memristors are ideal candidates for in-memory computing systems due to their high-speed read / write, multi-level storage capabilities, non-volatility, low power consumption, and low latency. Unlike traditional silicon devices in the von Neumann architecture, memristors achieve a close integration of data storage and computing through matrix-vector multiplication, and utilize the physical principles of Ohm's law and Kirchhoff's law to promote large-scale parallel computing capabilities.

[0003] However, large-scale integrated memristors often encounter the problem of sneak path current. The sneak path current in the memristor array refers to the voltage drop in the shunt circuit due to the inherent resistance of the metal wire in the cross array structure, resulting in unexpected current branching. This current will flow along the non-target path, interfere with the current on the target path, and cause the programming voltage of the memristor unit to drop. As the scale of the cross array increases, the voltage drop deviation becomes more obvious, which in turn affects the normal operation of the array. The existence of sneak path current will not only cause the array operation results to be unable to be accurately read, but also bring additional energy consumption, reduce the accuracy of the neural network, and increase the training energy consumption. For example, in a large-scale memristor array, the sneak current will reduce the accuracy of the neural network algorithm and reduce the reliability of the system. Therefore, the sneak path current is a major obstacle to the performance and application of the memristor array, and effective suppression measures need to be taken to solve this problem. To meet this challenge, people have proposed various configurations, such as transistors and memristors, diodes and memristors, and selectors and memristors to form composite units. While these approaches can mitigate data misreading and distortion during read operations, they introduce complexity to circuit design and manufacturing, potentially increasing costs and reducing yields.

[0004] In contrast, passive crossbar arrays composed of self-rectifying memristors offer a more reliable solution. Since no additional switching elements are required, these arrays can prevent misreading caused by crosstalk, thereby improving energy efficiency and scalability, while providing a cost-effective solution for neuromorphic computing applications. However, a common problem with self-rectifying memristors at this stage is that the rectification ratio is not large enough, or the rectification ratio, nonlinearity and process difficulty cannot be taken into account at the same time, which greatly limits the scalability of the array.

[0005] Based on the current situation that the scalability of memristor arrays has encountered bottlenecks, most of the current research has proposed self-rectifying memristors with high rectification ratios, which has increased the complexity of the structure and preparation process, and has not provided relevant content on self-rectifying memristors with excellent comprehensive performance. Summary of the Invention Technical Problem to be Solved In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides a single-layer self-rectifying memristor with an ultra-high rectification ratio and a preparation method thereof, which solves the technical problem of how to develop a self-rectifying memristor with a simple structure, a low programming voltage, an ultra-high rectification ratio and a non-linearity degree.

[0006] Technical Solution In order to achieve the above object, the main technical solutions adopted by the present invention include: In a first aspect, the present invention provides a single-layer self-rectifying memristor with an ultra-high rectification ratio, comprising: Sputter 50 nm of Pt onto a patterned wafer, remove the photoresist with acetone, and set the sputtering parameters for Pt deposition to 300 W and 70 s; After the second patterning, deposit a 10-nm-thick HfO 2-x thin film at a chamber pressure of 3.72 mTorr using a power of 50 W for 770 s; Use an RTP-VT100M system to perform rapid thermal annealing treatment on the HfO 2-x thin film; Deposit 50 nm of TiN at parameters of 200 W and 240 s; Remove all remaining photoresist with acetone to complete the preparation of the self-rectifying memristor.

[0007] Optionally, a magnetron sputtering system is used to prepare the thin film.

[0008] Optionally, the structure of the self-rectifying memristor is Pt / HfO 2-x / TiN, with TiN selected as the top electrode and Pt as the bottom electrode.

[0009] Optionally, the conduction mechanism of the self-rectifying memristor is based on Poole-Frenkel emission and Schottky emission.

[0010] In a second aspect, the present invention provides a single-layer self-rectifying memristor with an ultra-high rectification ratio, which is prepared by using the preparation method described in any of the above technical solutions.

[0011] Beneficial Effects The beneficial effects of the present invention are as follows: The preparation method of a single-layer self-rectifying memristor with an ultra-high rectification ratio according to the present invention realizes a self-rectifying memristor with a super-simple structure, a low programming voltage (1.5 V), an ultra-high rectification ratio and a non-linearity degree, and can be widely applied to the field of neuromorphic computing, laying a solid foundation for ultra-large-scale integration and large-scale in-memory computing architectures. Description of the Drawings

[0012] Figure 1 Scanning electron microscope image of the self-rectifying memristor prepared by patterning according to an embodiment of the present invention; Figure 2 Three-dimensional images of the surface roughness of hafnium oxide for four manufacturing batches provided by an embodiment of the present invention; Figure 3 Schematic diagrams of X-ray photoelectron spectroscopy of oxygen in hafnium oxide thin film without rapid thermal annealing and X-ray photoelectron spectroscopy of oxygen in hafnium oxide thin film after rapid thermal annealing provided by an embodiment of the present invention; Figure 4 Schematic diagram of the electrical characterization wiring method of the self-rectifying memristor provided by an embodiment of the present invention; Figure 5 DC current-voltage characteristic curve of the single-layer self-rectifying memristor provided by an embodiment of the present invention; Figure 6 Schematic diagram of the input voltage working scheme provided by an embodiment of the present invention; Figure 7 Pt / HfO without rapid thermal annealing according to an embodiment of the present invention 2-x / TiN memristor DC current-voltage characteristic curve; Figure 8 Schematic energy band diagram of the conduction mechanism of the self-rectifying memristor provided by an embodiment of the present invention. Detailed implementation manners

[0013] To better explain the present invention for easy understanding, the present invention will be described in detail below in conjunction with the accompanying drawings through specific implementation manners. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present invention can be more clearly and thoroughly understood, and the scope of the present invention can be fully conveyed to those skilled in the art.

[0014] In a first aspect, this embodiment provides a preparation method for a single-layer self-rectifying memristor with an ultra-high rectification ratio, including: First, 50 nm of platinum (Pt) is sputtered onto a patterned wafer, and then the photoresist is removed with acetone. The sputtering parameters for Pt deposition are set to 300 W and 70 s.

[0015] After the second patterning, a hafnium oxide (HfO 2-x ) thin film with a thickness of 10 nm is deposited at a chamber pressure of 3.72 mTorr using a power of 50 W for 770 s.

[0016] Subsequently, the hafnium oxide thin film is subjected to rapid thermal annealing treatment using an RTP-VT100M system. Then, 50 nm of titanium nitride (TiN) is deposited at parameters of 200 W and 240 s.

[0017] Finally, all the remaining photoresist is removed with acetone to complete the fabrication of the device, as Figure 1 shown in the scanning electron microscope images.

[0018] Among them, all the thin films are fabricated using a magnetron sputtering system.

[0019] The surface roughness characterization of the memristor thin film is of great significance for its performance and applications. The surface roughness directly affects the electrical properties of the thin film, such as conductivity and resistivity. A rough surface will cause uneven current distribution in the thin film, thus seriously disturbing the switching characteristics of the self-rectifying memristor and the key rectifying characteristics. In addition, the surface roughness also affects the mechanical stability of the thin film and the contact quality with the electrodes, thereby affecting the overall performance and reliability of the device. In this invention, the surface roughness of the hafnium oxide thin film is characterized by atomic force microscopy. Atomic force microscopy uses a tiny probe tip, which is mounted on a movable cantilever. When the probe touches or approaches the sample surface, the cantilever will bend or deflect due to the intermolecular forces (such as van der Waals forces). By precisely measuring this deflection, atomic force microscopy can construct a three-dimensional image of the sample surface, thereby obtaining surface roughness information. Figure 2 shows the atomic force microscopy images of hafnium oxide thin films from four different manufacturing batches, indicating that the surface roughness is stable and the root mean square is low, confirming that the thin film fabrication process adopted in this study can ensure the formation of high-quality hafnium oxide thin films.

[0020] The self-rectifying memristor adopted in this invention has a structure of Pt / HfO 2-x / TiN, and this unique and simple structure design endows the device with excellent self-rectifying characteristics. The working principle of the self-rectifying memristor fundamentally stems from the significant forward and reverse highly asymmetric characteristics of its internal unique energy band structure. This asymmetry of the energy band structure enables the memristor to exhibit completely different conductive behaviors under forward voltage and reverse voltage. Under forward bias conditions, due to the lower potential barrier, charges can be injected into the memristor more easily, allowing the current to flow smoothly; while under reverse bias, the higher potential barrier acts like an insurmountable barrier, greatly hindering the flow of charges, thereby effectively limiting the generation of reverse current, thus achieving a rectifying effect similar to that of a diode. X-ray photoelectron spectroscopy can be used to analyze the oxidation state of the thin film, which is particularly important for memristors based on oxygen vacancy migration, because the concentration and distribution of oxygen vacancies directly affect the switching characteristics of the device. Through these analyses, X-ray photoelectron spectroscopy provides important guidance for optimizing the fabrication process of hafnium oxide thin films and improving the performance of self-rectifying memristor devices. Figure 3The X-ray photoelectron spectrum of hafnium shown in (a) exhibits two spin-orbit peaks corresponding to Hf4f7 / 2 and Hf4f5 / 2 respectively, indicating the existence of the Hf 4+ valence state. The X-ray photoelectron spectrum of oxygen in as-deposited hafnium oxide shows the coexistence of 38.65% lattice oxygen and 61.35% oxygen vacancies, which confirms the presence of a large number of defects in the hafnium oxide thin film produced by magnetron sputtering. Previous studies have shown that a high concentration of oxygen vacancies can hinder the self-rectifying effect of memristors because it forms continuous conductive filaments. The X-ray photoelectron spectrum of oxygen after rapid thermal annealing ( Figure 3 (b)) shows that the oxygen vacancy concentration is significantly reduced to 18.11%, indicating that the vacancies are effectively repaired, which is crucial for achieving an ultra-high rectification ratio and non-linearity of the self-rectifying memristor.

[0021] To characterize the electrical properties of the device, the bottom electrode Pt is connected to the input power supply and the top electrode TiN is grounded ( Figure 4 ). Figure 5 The current-voltage DC characteristic curve of the self-rectifying memristor of the present invention is shown. The selection of the operating voltage scheme has a crucial impact on the performance of the self-rectifying memristor; the 1 / 6V input voltage scheme ( Figure 6 ) is selected to optimize the RR and NL. The rectification ratio (RR) is defined as the ratio of the low-resistance state current at the forward read voltage to the low-resistance state current at 2 / 3 of the negative read voltage, and the non-linearity (NL) is defined as the ratio of the low-resistance state current at the forward read voltage to the low-resistance state (LRS) current at the partial select cell read voltage. Under the 1 / 6V input voltage scheme, the proposed single-layer self-rectifying memristor records an RR value of 10 8 , an NL value of 10 5 , and the negative leakage current is suppressed below an ultra-low 0.1 pA to achieve suppression of crosstalk between device units and ultra-low power standby of the self-rectifying memristor. Figure 7 The current-voltage DC characteristic curve of the Pt / HfO 2-x / TiN memristor without rapid thermal annealing is shown, showing almost negligible RR and NL, further confirming the importance of rapid thermal annealing for the self-rectifying memristor proposed in the present invention.

[0022] The conduction mechanism of the self-rectifying memristor proposed in the present invention is based on Poole-Frenkel (P-F) emission and Schottky emission. The reason for choosing TiN and Pt as the top and bottom electrodes respectively is that their work functions are approximately 4.5 eV and 5.6 eV respectively, resulting in a significantly asymmetric energy band structure. After the rapid thermal annealing process, near the TiN / HfO x interface, HfO xA large number of oxygen vacancies in the layer are repaired, while there are still oxygen vacancies with a similar concentration at the Pt / HfO x interface. Under a negative bias voltage ( Figure 8 (a)), the oxygen vacancies migrate in the direction of the electric field and accumulate near the Pt / HfO x interface, resulting in an unbalanced distribution of oxygen vacancies. As the negative voltage increases, electrons from the bottom electrode undergo Schottky emission and enter the traps (oxygen vacancy defects) in the HfO x layer located near the Pt interface. However, due to the severe aggregation of oxygen vacancies, the formation of a continuous conductive path is inhibited, restricting the flow of current and leading to the rectification phenomenon observed previously. On the contrary, when a positive bias voltage is applied ( Figure 8 (b)), the oxygen vacancies migrate towards the TiN / HfO x interface, resulting in a more uniform distribution and the formation of a continuous electron conductive path. As the positive bias voltage increases, electrons will undergo Schottky and P-F emissions, thus promoting a significant current response.

[0023] To verify the accuracy of the conduction mechanism of the self-rectifying memristor, two important aspects of this mechanism were comprehensively analyzed and fitted: P-F emission and Schottky emission. First, the basic principle of P-F emission lies in the excitation of electrons into the conduction band of the oxide. This phenomenon can be described by mathematical formula 1: (1) where μ represents the electron drift mobility, Nc is the density of states in the conduction band, E is the applied electric field across the oxide, φ T is the depth of the trapped potential well, k is the Boltzmann constant, T is the absolute temperature, q is the elementary charge, and ε is the dielectric constant of the oxide. In addition, the essence of Schottky emission lies in injecting thermally activated electrons from the energy barrier into the conduction band of the oxide. This process is controlled by formula 2: (2) where α represents a constant, m0 is the electron mass, m * is the effective electron mass, and φ B is the height of the junction barrier.

[0024] In terms of device structure, the core of the present invention lies in the synergistic effect of electrode materials with significantly different work functions and an oxide layer with controllable defects to achieve the high-performance characteristics of a self-rectifying memristor. Specifically, the bottom electrode can be selected from high-work-function metals (>5 eV) or other conductive materials, while the top electrode can be made of low-work-function metals (<4.5 eV) or other conductive materials. Such an electrode combination forms a rectifying characteristic of low-barrier conduction under forward bias and high-barrier blocking under reverse bias through the significant asymmetry of the interfacial energy band structure. The oxide functional layer is not limited to hafnium oxide (HfOx), but can also be extended to other high-dielectric-constant (high-k) oxides (such as titanium oxide TiOx, tantalum oxide TaOx, aluminum oxide AlOx, etc.). Their common feature is to regulate the concentration gradient distribution of oxygen vacancy defects through a rapid thermal annealing (RTA) process. For example, after RTA treatment, the TiOx thin film can form local conductive channels through the directional migration of oxygen vacancies, while retaining the defect suppression region near the interface, thereby balancing the rectification ratio and nonlinearity; TaOx can precisely repair surface defects and optimize the energy band alignment after annealing due to its high oxygen affinity. In addition, the stacked structure of the oxide layer can be further extended to a multi-layer heterojunction (such as a HfOx / TiOx bilayer or a gradient doping structure), and the regulation ability of the interfacial barrier can be enhanced through the different defect responses of different oxides, thereby improving the robustness and scalability of the device.

[0025] In terms of application scenarios, the self-rectifying memristor of the present invention can be widely applied to the field of neuromorphic computing due to its ultra-high rectification ratio, low power consumption, and nonlinear characteristics. For example, in an artificial synapse bionic circuit, the device simulates the weight regulation mechanism of biological synapses through the migration of oxygen vacancies. Its self-rectifying characteristic can effectively suppress the sneak path current in the crossbar array, ensuring the accuracy of synapse weight updates, thereby improving the training efficiency and recognition accuracy of a convolutional neural network (CNN). In a pulsed neuron circuit, the high switching speed and low programming voltage of the device support the real-time regulation of the dynamic firing frequency. Combined with the nonlinear current response characteristic, a low-power pulsed neural network (SNN) can be constructed, which is suitable for real-time signal processing of edge computing devices. In addition, in a memory-in-computation architecture, the oxide layer based on the defect concentration gradient can achieve multi-value storage and parallel computing functions. For example, by regulating the oxygen vacancy distribution, analog weight storage can be realized to support in-situ calculation of matrix-vector multiplication, significantly reducing the energy consumption of data transfer and providing a hardware foundation for the large-scale integration of a brain-inspired computing system. Further, combined with the temperature sensitivity of the oxide material, such devices can also be extended to an adaptive learning system, dynamically adjusting the conductive characteristics through changes in the environmental temperature to achieve energy efficiency optimization of an intelligent sensor network.

[0026] In a second aspect, the present embodiment provides a single-layer self-rectifying memristor with an ultra-high rectification ratio, which is prepared by using the preparation method described in any of the above technical solutions. Therefore, the single-layer self-rectifying memristor with an ultra-high rectification ratio proposed in the present embodiment has the same technical effects as the preparation method of the single-layer self-rectifying memristor with an ultra-high rectification ratio in the above embodiment, and will not be elaborated here again.

[0027] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention should also include these modifications and variations.

[0028] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A preparation method of a single-layer self-rectifying memristor with an ultra-high rectification ratio, characterized in that, Including: Sputter 50 nm of Pt onto the patterned wafer, remove the photoresist with acetone, and set the sputtering parameters for Pt deposition to 300 W for 70 s; After the second patterning, a 10-nm-thick HfO film was deposited at a chamber pressure of 3.72 mTorr with a power of 50 W for 770 s. 2-x film; Perform rapid thermal annealing treatment on the HfO 2-x thin film using the RTP-VT100M system; Deposit 50 nm of TiN under the parameters of 200 W for 240 s; Remove all remaining photoresist with acetone to complete the preparation of the self-rectifying memristor.

2. The preparation method of a single-layer self-rectifying memristor with an ultra-high rectification ratio according to claim 1, wherein Use a magnetron sputtering system to prepare the thin film.

3. The preparation method of a single-layer self-rectifying memristor with an ultra-high rectification ratio according to claim 2, wherein The structure of the self-rectifying memristor is Pt / HfO 2-x / TiN, with TiN selected as the top electrode and Pt as the bottom electrode.

4. The preparation method of a single-layer self-rectifying memristor with an ultra-high rectification ratio according to claim 3, characterized in that, The conduction mechanism of the shown self-rectifying memristor is based on Poole-Frenkel emission and Schottky emission.

5. A single-layer self-rectifying memristor with an ultra-high rectification ratio, characterized in that, The preparation is carried out by using the preparation method described in any one of claims 1 to 4.

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