Variable resistance type memory, preparation method thereof and electronic equipment

Abstract

The invention relates to the field of semiconductor device preparation, and provides a variable resistance type memory, a preparation method thereof and electronic equipment, and the method comprises the steps: depositing a bottom electrode layer on a wafer substrate which is of a complementary metal oxide semiconductor structure; depositing a resistive layer on the bottom electrode layer, wherein the resistive layer is made of any one or more of scandium, titanium, strontium, yttrium, lanthanum and barium, and aluminum nitride; depositing a top electrode layer on the resistive layer, and depositing a hard mask layer on the top electrode layer; performing ion beam etching on the resistive layer and the bottom electrode layer based on the hard mask layer; after a dielectric layer is filled in a groove formed by ion beam etching, the variable resistance type memory is prepared. The method and the device are used for solving the defect that the data read-write rate of a common variable resistance type memory in related technologies is relatively low, and the data read-write rate of the prepared variable resistance type memory can be effectively improved by preparing the variable resistance type memory by using aluminum nitride in the scheme of the invention.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device fabrication, and in particular, to a resistive random access memory, a method for fabricating the same, and an electronic device. Background Art

[0002] A resistive random access memory (RRAM), also known as a programmable resistor memory, is an information storage technology based on the electrical properties of materials, which stores and reads information by changing the resistance value of the material. Currently, resistive random access memories are widely used in fields such as storage devices, logic devices, and artificial intelligence accelerators.

[0003] In the currently related technologies, the data read / write rate of the commonly used resistive random access memory is relatively slow and cannot meet the needs of users. Summary of the Invention

[0004] The present invention provides a resistive random access memory, a method for fabricating the same, and an electronic device to solve the defect that the data read / write rate of the commonly used resistive random access memory in the related technologies is relatively slow. In the solution of the present application, by using aluminum nitride to fabricate the resistive random access memory and doping an inert metal element in the resistive switching layer, the data read / write rate of the fabricated resistive random access memory can be effectively improved.

[0005] The present invention provides a method for fabricating a resistive random access memory, including:

[0006] Depositing a bottom electrode layer on a wafer substrate, where the wafer substrate is a complementary metal oxide semiconductor structure;

[0007] Depositing a resistive switching layer on the bottom electrode layer, where the material of the resistive switching layer includes any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium, and aluminum nitride;

[0008] Depositing a top electrode layer on the resistive switching layer, and depositing a hard mask layer on the top electrode layer;

[0009] Based on the hard mask layer, performing ion beam etching on the resistive switching layer and the bottom electrode layer;

[0010] After filling a dielectric layer in the groove formed by the ion beam etching, a resistive random access memory is fabricated.

[0011] According to the method for fabricating a resistive random access memory provided by the present invention, the depositing a resistive switching layer on the bottom electrode layer includes:

[0012] Depositing a resistive switching layer material on the bottom electrode layer;

[0013] In-situ heating is performed on the resistive switching layer material to form the resistive switching layer.

[0014] According to the method for manufacturing a variable resistive memory provided by the present invention, after depositing the hard mask layer and before performing ion beam etching on the resistive switching layer and the bottom electrode layer, it further includes:

[0015] Patterning the hard mask layer to form a set pattern on the hard mask layer;

[0016] Based on the set pattern of the hard mask layer, etching the hard mask layer, and the process of etching the hard mask layer includes dry etching or wet etching.

[0017] According to the method for manufacturing a variable resistive memory provided by the present invention, the ion beam etching of the resistive switching layer and the bottom electrode layer based on the hard mask layer includes:

[0018] Using the hard mask layer as a mask, etching the resistive switching layer and the bottom electrode layer by adjusting the angle of ion beam etching, and grooves are formed on the etched resistive switching layer and bottom electrode layer.

[0019] According to the method for manufacturing a variable resistive memory provided by the present invention, the material of the bottom electrode layer includes any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride;

[0020] The material of the top electrode layer includes any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride.

[0021] According to the method for manufacturing a variable resistive memory provided by the present invention, the method for depositing the bottom electrode layer on the wafer substrate includes physical vapor deposition or chemical vapor deposition;

[0022] The method for depositing the top electrode layer on the resistive switching layer includes physical vapor deposition or chemical vapor deposition.

[0023] According to the method for manufacturing a variable resistive memory provided by the present invention, the deposition of the hard mask layer on the top electrode layer includes:

[0024] By chemical vapor deposition, depositing a hard mask material on the top electrode layer to obtain the hard mask layer, and the hard mask material includes any one or more of silicon oxide, silicon oxynitride, silicon nitride, and silicon carbide.

[0025] According to the method for manufacturing a variable resistive memory provided by the present invention, filling a dielectric in the grooves formed by the ion beam etching includes:

[0026] By means of chemical vapor deposition, a dielectric layer is obtained by filling a dielectric material including silicon oxide into the groove formed by the ion beam etching.

[0027] The present invention also provides a variable resistive memory, which is prepared by applying the above-mentioned preparation method.

[0028] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the preparation method of any one of the above-mentioned variable resistive memories is implemented.

[0029] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the preparation method of any one of the above-mentioned variable resistive memories is implemented.

[0030] The present invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, the preparation method of any one of the above-mentioned variable resistive memories is implemented.

[0031] In the preparation method of the variable resistive memory provided by the present application, the advantages of aluminum nitride having resistive switching properties such as a wide bandgap and high thermal conductivity are utilized, and aluminum nitride is applied to prepare a resistive switching layer. In this way, the data reading and writing efficiency of the prepared variable resistive memory can be effectively improved. On the other hand, relatively inert metal elements such as scandium, titanium, strontium, yttrium, lanthanum, and barium are doped in the resistive switching layer to form a resistive switching material with more excellent performance. Further, the method of ion beam etching is used to solve the technical problem that aluminum nitride is difficult to be etched by conventional halogen group gases. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0033] Figure 1 is a schematic flowchart of the preparation method of the variable resistive memory provided by the embodiment of the present invention;

[0034] Figure 2 is one of the schematic structural diagrams of the variable resistive memory provided by the embodiment of the present invention;

[0035] Figure 3 is another schematic structural diagram of the variable resistive memory provided by the embodiment of the present invention;

[0036] Figure 4 It is the third schematic structural diagram of the variable resistive memory provided by the embodiment of the present invention;

[0037] Figure 5 It is the fourth schematic structural diagram of the variable resistive memory provided by the embodiment of the present invention;

[0038] Figure 6 It is the fifth schematic structural diagram of the variable resistive memory provided by the embodiment of the present invention;

[0039] Figure 7 It is the sixth schematic structural diagram of the variable resistive memory provided by the embodiment of the present invention;

[0040] Figure 8 It is the schematic physical structure diagram of the electronic device provided by the embodiment of the present invention.

[0041] Wherein:

[0042] 100 - wafer substrate; 200 - bottom electrode; 300 - resistive change layer; 400 - top electrode;

[0043] 500 - hard mask layer; 600 - dielectric layer. Specific Embodiments

[0044] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0045] Figure 1 It is the schematic flow diagram of the preparation method of the variable resistive memory provided by the embodiment of the present invention.

[0046] As Figure 1 shown, this embodiment provides a preparation method of a variable resistive memory, including:

[0047] Step 101, depositing a bottom electrode 200 layer on the wafer substrate 100, and the wafer substrate 100 is a complementary metal oxide semiconductor structure;

[0048] Figure 2 An example of the structure of a wafer substrate is given. A wafer is an optical-grade silicon substrate material, usually made of single-crystalline silicon material, with relatively high purity and flatness, and is often used as the basis for chip manufacturing.

[0049] In this embodiment, a complementary metal oxide semiconductor (CMOS) is used to prepare the wafer substrate 100. The CMOS structure has excellent electrical properties such as low leakage current and high switching speed, which helps to improve the performance of the RRAM. For example, it can reduce the power consumption during use and improve the data read / write speed, etc.

[0050] In practical applications, the core structure of CMOS is a pair of complementary transistors, namely N-type MOS transistor (NMOS) and P-type MOS transistor (PMOS). The N-type transistor can be prepared based on N-type semiconductor materials, and the P-type transistor can be prepared based on P-type semiconductor materials. These two transistors work together in the circuit to achieve logical functions. The driving transistor usually refers to the transistor responsible for driving the load (such as subsequent circuits, capacitors, etc.) in the circuit. In CMOS, the driving transistor can achieve logical functions in the CMOS circuit, such as inverters, AND gates, OR gates, etc., through the change of the on and off states, and can also drive loads such as subsequent circuits or capacitors to ensure the correct transmission and processing of signals.

[0051] Furthermore, the driving transistor set in the CMOS structure in this embodiment can be an FDSOI driving transistor, a FinFET driving transistor, a GAA-type driving transistor, an HKMG / Poly SiON-type driving transistor, etc. The above driving transistors are also based on P-type semiconductor materials and / or N-type semiconductor materials, and are obtained through structural innovations or material replacements.

[0052] Among them, the FDSOI driving transistor can achieve a fully depleted channel through an ultra-thin insulating layer based on the traditional CMOS structure. The FDSOI driving transistor is applicable to both P-type and N-type transistors, and can improve the electrostatic performance and power consumption control through structural optimization.

[0053] The FinFET driving transistor can adopt a three-dimensional fin structure to enhance the gate's control ability over the channel. It is applicable to both P-type and N-type transistors, and can improve the circuit performance by reducing leakage.

[0054] The GAA-type driving transistor can achieve more precise current control by surrounding the channel completely with the gate. It can be applied to both P-type and N-type transistors and can improve the scaling ability and performance in advanced processes.

[0055] The HKMG / Poly SiON-type driving transistor replaces silicon dioxide with a high-K material and replaces the polysilicon gate with a metal material. Both are applicable to P-type and N-type transistors and can be used to optimize the gate leakage current and working efficiency.

[0056] In practical applications, the constituent material of the bottom electrode 200 layer may include any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride. The method for depositing the bottom electrode 200 layer may include Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), etc., which are not limited herein. In implementation, the thickness of the bottom electrode 200 layer may be 20 nanometers to 100 nanometers, preferably 60 nanometers.

[0057] Step 102, as Figure 3 shown, deposit a resistive switching layer 300 on the bottom electrode 200 layer. The material of the resistive switching layer 300 includes any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium elements, and aluminum nitride;

[0058] The resistive switching layer 300 realizes the storage and release of information through the change of the material resistance value. Therefore, the resistive switching layer 300 is a key layer in the variable resistive memory. In this embodiment, by using the method of doping aluminum nitride, on the basis of the aluminum nitride material, some relatively inert metal elements are doped to prepare the resistive switching layer 300. Optionally, the material of the resistive switching layer 300 can be deposited on the bottom electrode 200 layer by physical vapor deposition, and then the material of the resistive switching layer 300 is heated in-situ to form the resistive switching layer 300, that is, crystallization is achieved through in-situ heating.

[0059] The structure of the resistive switching layer 300 in this embodiment conforms to the following chemical formula Al 1-x (X) x N or Al 1-x (XY) x N, where X and Y are the doped metal elements such as scandium, titanium, strontium, yttrium, lanthanum, and barium elements. The above two chemical formulas also characterize that the doped metal elements in the resistive switching layer 300 in this embodiment can be one or more. In practical applications, in the above chemical formula, x is 2% - 60%, preferably 10% - 50%.

[0060] The thickness of the resistive switching layer 300 can be 10 nanometers to 50 nanometers, preferably 30 nanometers to 40 nanometers.

[0061] Step 103, as Figure 3 and Figure 4 shown, deposit a top electrode 400 layer on the resistive switching layer 300, and deposit a hard mask layer 500 on the top electrode 400 layer;

[0062] The composition materials of the top electrode 400 layer can include any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride. The method for depositing the top electrode 400 layer can include physical vapor deposition, chemical vapor deposition, etc., which are not limited herein. In implementation, the thickness of the top electrode 400 layer can be 20 nanometers to 100 nanometers, preferably 60 nanometers.

[0063] In practical applications, a hard mask layer 500 can be obtained by depositing a hard mask material on the top electrode 400 layer through chemical vapor deposition. The hard mask material includes any one or more of silicon oxide, silicon oxynitride, silicon nitride, and silicon carbide.

[0064] The thickness of the hard mask layer 500 can be 50 nanometers to 150 nanometers, preferably 100 nanometers.

[0065] Step 104, as Figure 6 shown, based on the hard mask layer 500, an ion beam etching is performed on the resistive change layer 300 and the bottom electrode 200 layer;

[0066] In practical applications, the resistive change layer 300 and the bottom electrode 200 layer can be etched by taking the hard mask layer 500 as a mask and adjusting the angle of the ion beam etching. After etching, grooves are formed on the resistive change layer 300 and the bottom electrode 200 layer.

[0067] In implementation, inert gases such as argon, krypton, or xenon can be used as etching gases to etch the resistive change layer 300 and the bottom electrode 200 layer. The flow rate of the etching gas can be 50 sccm to 500 sccm, preferably 300 sccm, and the etching power can be 50 w to 1000 w.

[0068] In implementation, after the etching of the resistive change layer 300 and the bottom electrode 200 layer is completed, the ion beam etching method can also be used to trim the etched grooves to remove the re-deposits generated during the deposition process.

[0069] Step 105, as Figure 7 shown, after filling a dielectric layer 600 in the grooves formed by the ion beam etching, a variable resistive memory is prepared.

[0070] The dielectric layer 600 is obtained by filling a dielectric material in the grooves formed by the ion beam etching through chemical vapor deposition. The dielectric material includes materials such as silicon oxide and low dielectric constant substances. The low dielectric constant substance is also called low-k, which is a dielectric with a relatively low dielectric constant. Generally speaking, materials with a dielectric constant lower than 3.9 are called low dielectric constant materials.

[0071] As Figure 5As shown, in an exemplary embodiment, after depositing the hard mask layer 500 and before performing ion beam etching on the resistive change layer 300 and the bottom electrode 200 layer, the following steps are further included:

[0072] Pattern the hard mask layer 500 to form a set pattern in the hard mask layer 500;

[0073] Based on the set pattern of the hard mask layer 500, etch the hard mask layer 500. The process of etching the hard mask layer 500 includes dry etching or wet etching.

[0074] Figure 8 An exemplary structural diagram of an electronic device is shown. For example, Figure 8 As shown, the electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840. Among them, the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call the logical instructions in the memory 830 to execute the preparation method of the variable resistive memory. The method includes:

[0075] Deposit a bottom electrode layer on a wafer substrate, where the wafer substrate is a complementary metal oxide semiconductor structure;

[0076] Deposit a resistive change layer on the bottom electrode layer. The material of the resistive change layer includes any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium, as well as aluminum nitride;

[0077] Deposit a top electrode layer on the resistive change layer and deposit a hard mask layer on the top electrode layer;

[0078] Based on the hard mask layer, perform ion beam etching on the resistive change layer and the bottom electrode layer;

[0079] After filling a dielectric layer in the groove formed by the ion beam etching, a variable resistive memory is prepared.

[0080] In addition, when the logical instructions in the above-mentioned memory 830 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.

[0081] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the preparation method of the variable resistive memory provided by the above-mentioned various methods. The method includes:

[0082] Depositing a bottom electrode layer on a wafer substrate, where the wafer substrate is a complementary metal oxide semiconductor structure;

[0083] Depositing a resistive change layer on the bottom electrode layer. The material of the resistive change layer includes any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium, as well as aluminum nitride;

[0084] Depositing a top electrode layer on the resistive change layer and depositing a hard mask layer on the top electrode layer;

[0085] Based on the hard mask layer, performing ion beam etching on the resistive change layer and the bottom electrode layer;

[0086] After filling a dielectric layer in the groove formed by the ion beam etching, a variable resistive memory is prepared.

[0087] On yet another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it realizes the execution of the preparation method of the variable resistive memory provided by the above-mentioned various methods. The method includes:

[0088] Depositing a bottom electrode layer on a wafer substrate, where the wafer substrate is a complementary metal oxide semiconductor structure;

[0089] Deposit a resistive switching layer on the bottom electrode layer, the material of the resistive switching layer including any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium, as well as aluminum nitride;

[0090] Deposit a top electrode layer on the resistive switching layer, and deposit a hard mask layer on the top electrode layer;

[0091] Based on the hard mask layer, perform ion beam etching on the resistive switching layer and the bottom electrode layer;

[0092] After filling a dielectric layer in the groove formed by the ion beam etching, a variable resistive memory is fabricated.

[0093] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative efforts.

[0094] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, also by hardware. Based on such an understanding, the essence of the above technical solutions or the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a variable resistor memory, characterized in that, Comprising: Depositing a bottom electrode layer on a wafer substrate, where the wafer substrate is a complementary metal oxide semiconductor structure; Depositing a resistive switching layer on the bottom electrode layer, and the material of the resistive switching layer includes any one or more of scandium, titanium, strontium, yttrium, lanthanum, and barium, as well as aluminum nitride; Depositing a top electrode layer on the resistive switching layer, and depositing a hard mask layer on the top electrode layer; Based on the hard mask layer, performing ion beam etching on the resistive switching layer and the bottom electrode layer; After filling a dielectric layer in the groove formed by the ion beam etching, a variable resistive memory is prepared.

2. The method for manufacturing a variable resistor type memory according to claim 1, wherein The depositing the resistive switching layer on the bottom electrode layer includes: Depositing a resistive switching layer material on the bottom electrode layer; Performing in-situ heating on the resistive switching layer material to form the resistive switching layer.

3. The manufacturing method of the variable resistor type memory according to claim 1, characterized in that, After depositing the hard mask layer and before performing ion beam etching on the resistive switching layer and the bottom electrode layer, it further includes: Patterning the hard mask layer to form a set pattern on the hard mask layer; Based on the set pattern of the hard mask layer, etching the hard mask layer, and the process of etching the hard mask layer includes dry etching or wet etching.

4. The manufacturing method of the variable resistor type memory according to claim 1, wherein, The performing ion beam etching on the resistive switching layer and the bottom electrode layer based on the hard mask layer includes: Using the hard mask layer as a mask, by adjusting the angle of ion beam etching, etching the resistive switching layer and the bottom electrode layer, and the etched resistive switching layer and bottom electrode layer form a groove.

5. The manufacturing method of the variable resistor type memory according to claim 1, characterized in that, The material of the bottom electrode layer includes any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride; The material of the top electrode layer includes any one or more of tungsten, titanium, tantalum, tungsten nitride, titanium nitride, and tantalum nitride.

6. The manufacturing method of the variable resistor type memory according to claim 1, characterized in that, The method of depositing the bottom electrode layer on the wafer substrate includes physical vapor deposition or chemical vapor deposition; The method of depositing the top electrode layer on the resistive switching layer includes physical vapor deposition or chemical vapor deposition.

7. The method for preparing a variable resistor type memory according to claim 1, characterized in that, The depositing the hard mask layer on the top electrode layer includes: By chemical vapor deposition, depositing a hard mask material on the top electrode layer to obtain the hard mask layer, and the hard mask material includes any one or more of silicon oxide, silicon oxynitride, silicon nitride, and silicon carbide.

8. The manufacturing method of the variable resistor type memory according to claim 1, characterized in that, The filling a dielectric in the groove formed by the ion beam etching includes: By chemical vapor deposition, filling a dielectric material in the groove formed by the ion beam etching to obtain the dielectric layer, and the dielectric material includes silicon oxide.

9. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method for preparing a variable resistive memory according to any one of claims 1-8.

10. A variable resistor type memory, characterized in that, Prepared by applying the method for preparing a variable resistive memory according to any one of claims 1-8.

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