Semiconductor device, display device, display module, and electronic apparatus

Abstract

Provided is a semiconductor device occupying a small area. The semiconductor device at least comprises transistors of two structures which are commonly formed by partial processes on the same plane. A vertical transistor having a very small channel length is used as a transistor in which a large on-state current is required. In another aspect, a planar transistor having a large channel length and including a back gate is used as a transistor for which high saturation characteristics are required.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device and a method for manufacturing the same. One aspect of the present invention relates to a transistor and a method for manufacturing the same. One aspect of the present invention relates to a display device, a display module, and an electronic device including a semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. As an example of the technical field of one aspect of the present invention, semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and drive methods or manufacturing methods of the above devices can be cited.

[0003] In the present specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, a circuit including semiconductor elements (transistors, diodes, photodiodes, etc.), and a device including such a circuit. In addition, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, as examples of semiconductor devices, there are integrated circuits, chips having integrated circuits, and electronic components in which chips are housed in packages. In addition, sometimes storage devices, display devices, light-emitting devices, lighting devices, and electronic devices themselves are semiconductor devices or include semiconductor devices. Background Art

[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, by reducing the occupied area of transistors in a display device, the pixel size can be reduced to achieve high definition. Therefore, there is a need for miniaturization of transistors.

[0005] As devices that require high-definition display devices, for example, the development of devices for virtual reality (VR: Virtual Reality), augmented reality (AR: Augmented Reality), substitutional reality (SR: Substitutional Reality), or mixed reality (MR: Mixed Reality) is very active.

[0006] As a display device, for example, a light-emitting device including an organic EL (Electro Luminescence) element or a light-emitting diode (LED: Light Emitting Diode) is developed.

[0007] Patent Document 1 discloses a high-definition display device using an organic EL element.

[0008] [Prior Art Documents]

[0009] [Patent Documents]

[0010] [Patent Document 1] International Patent Application Publication No. WO 2016 / 038508 Summary of the Invention

[0011] Technical Problem to be Solved by the Invention

[0012] One of the objectives of one embodiment of the present invention is to provide a fine transistor. Another objective of one embodiment of the present invention is to provide a transistor with a small channel length. Another objective of one embodiment of the present invention is to provide a transistor with a large on-state current. Another objective of one embodiment of the present invention is to provide a transistor with good electrical characteristics. Another objective of one embodiment of the present invention is to provide a semiconductor device with a small occupied area. Another objective of one embodiment of the present invention is to provide a semiconductor device with a low wiring resistance. Another objective of one embodiment of the present invention is to provide a semiconductor device or a display device with low power consumption. Another objective of one embodiment of the present invention is to provide a transistor, a semiconductor device, or a display device with high reliability. Another objective of one embodiment of the present invention is to provide a display device that can be easily high-definition. Another objective of one embodiment of the present invention is to provide a display device that can display with high brightness. Another objective of one embodiment of the present invention is to provide a manufacturing method for a semiconductor device or a display device with high productivity. Another objective of one embodiment of the present invention is to provide a novel transistor, semiconductor device, display device, and their manufacturing methods.

[0013] Note that the description of these objectives does not preclude the existence of other objectives. One embodiment of the present invention does not need to achieve all of the above objectives. Objectives other than the above can be extracted from the description of the specification, drawings, and claims.

[0014] Means for Solving the Technical Problem

[0015] One embodiment of the present invention is a semiconductor device, which includes a first transistor and a second transistor, the first transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a first oxide layer, a second oxide layer, a first insulating layer, a second insulating layer, and a third insulating layer, the second transistor includes a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, a third oxide layer, a first insulating layer, a fourth insulating layer, and a fifth insulating layer, the first insulating layer is located on the first conductive layer and the fourth conductive layer, the second insulating layer is located on the first insulating layer, the first oxide layer is located on the second insulating layer, the second conductive layer is located on the first oxide layer, and the first insulating layer, the second insulating layer, the first oxide layer, and the second conductive layer have There is an opening reaching the first conductive layer, the second oxide layer is in contact with at least the top surface of the first conductive layer, the side surface of the first insulating layer, the side surface of the second insulating layer, the side surface of the first oxide layer and the side surface of the second conductive layer in the opening, the third insulating layer is located on the second oxide layer in the opening, the third conductive layer overlaps with the second oxide layer in the opening via the third insulating layer, the fourth insulating layer is located on the first insulating layer, the third oxide layer is located on the fourth insulating layer, the fifth conductive layer and the sixth conductive layer exist separately from each other on the third oxide layer, the fifth insulating layer is located on the third oxide layer and between the fifth conductive layer and the sixth conductive layer, and the seventh conductive layer is located on the fifth insulating layer and has a portion overlapping with the fourth conductive layer via the third oxide layer.

[0016] Preferably, the size of the opening in the second conductive layer when viewed in a plane is larger than the size of the opening in the first oxide layer when viewed in a plane, and the second oxide layer contacts a portion of the top surface of the first oxide layer. Alternatively, the size of the opening in the second conductive layer when viewed in a plane may be consistent or substantially consistent with the size of the opening in the first oxide layer when viewed in a plane.

[0017] Preferably, the first conductive layer has a recessed portion, the opening overlaps with the recessed portion, and the second oxide layer is in contact with an inner wall of the recessed portion of the first conductive layer.

[0018] The third conductive layer preferably overlaps with the side surfaces of the first insulating layer and the second insulating layer via the third insulating layer and the second oxide layer.

[0019] One embodiment of the present invention is a display device, which includes a semiconductor device having any one of the above-mentioned structures and a light-emitting element, wherein a first electrode, a light-emitting layer and a second electrode are stacked in sequence, and the first electrode is electrically connected to a first conductive layer, a second conductive layer, a fifth conductive layer or a sixth conductive layer.

[0020] Preferably, a first layer, a second layer, and a third layer are stacked in this order, the first layer includes a third transistor containing silicon in a channel formation region, the second layer includes the first transistor and the second transistor, and the third layer includes a light-emitting element.

[0021] In addition, one aspect of the present invention is a display module including a display device having any of the above structures, and the display module is mounted with a connector such as a flexible printed circuit board (hereinafter referred to as FPC) or TCP (Tape Carrier Package), or an integrated circuit (IC) is mounted by a method such as COG (Chip On Glass) or COF (Chip On Film).

[0022] In addition, one aspect of the present invention is an electronic device, which includes: the above display module; and at least one of a housing, a battery, a camera, a speaker, and a microphone.

[0023] Advantages of the Invention

[0024] According to one aspect of the present invention, a fine transistor can be provided. In addition, according to one aspect of the present invention, a transistor with a small channel length can be provided. In addition, according to one aspect of the present invention, a transistor with a large on-state current can be provided. In addition, according to one aspect of the present invention, a transistor with good electrical characteristics can be provided. In addition, according to one aspect of the present invention, a semiconductor device with a small occupied area can be provided. In addition, according to one aspect of the present invention, a semiconductor device with a low wiring resistance can be provided. In addition, according to one aspect of the present invention, a semiconductor device or a display device with low power consumption can be provided. In addition, according to one aspect of the present invention, a transistor, a semiconductor device, or a display device with high reliability can be provided. In addition, according to one aspect of the present invention, a display device that can be easily high-definition can be provided. In addition, according to one aspect of the present invention, a display device that can display with high brightness can be provided. In addition, according to one aspect of the present invention, a manufacturing method of a semiconductor device or a display device with high productivity can be provided. In addition, according to one aspect of the present invention, a novel transistor, semiconductor device, display device, and their manufacturing methods can be provided.

[0025] Note that the description of these effects does not prevent the existence of other effects. One aspect of the present invention does not need to have all the above effects. Effects other than the above can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1A and Figure 1B is a top view showing an example of a semiconductor device. Figure 1C is a cross-sectional view showing an example of a semiconductor device.

[0027] Figure 2A and Figure 2B is a cross-sectional view showing an example of a semiconductor device.

[0028] Figures 3A to 3D is a cross-sectional view showing an example of a semiconductor device.

[0029] Figure 4A and Figure 4B is a top view showing an example of a semiconductor device. Figure 4C is a cross-sectional view showing an example of a semiconductor device.

[0030] Figures 5A to 5D is a cross-sectional view showing an example of a semiconductor device.

[0031] Figure 6A and Figure 6B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0032] Figure 7A and Figure 7B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0033] Figure 8 is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0034] Figure 9A and Figure 9B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0035] Figure 10A and Figure 10B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0036] Figure 11A and Figure 11B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0037] Figure 12A and Figure 12B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0038] Figure 13A and Figure 13B is a cross-sectional view showing an example of a manufacturing method of a semiconductor device.

[0039] Figure 14A and Figure 14B is a perspective view showing an example of a display device.

[0040] Figure 15 is a cross-sectional view showing an example of a display device.

[0041] Figure 16 It is a cross-sectional view showing an example of a display device.

[0042] Figure 17 It is a cross-sectional view showing an example of a display device.

[0043] Figure 18 It is a cross-sectional view showing an example of a display device.

[0044] Figure 19 It is a cross-sectional view showing an example of a display device.

[0045] Figures 20A to 20G It is a diagram showing an example of a pixel.

[0046] Figures 21A to 21K It is a diagram showing an example of a pixel.

[0047] Figures 22A to 22F It is a diagram showing an example of the structure of a light-emitting device.

[0048] Figures 23A to 23C It is a diagram showing an example of the structure of a light-emitting device.

[0049] Figures 24A to 24D It is a diagram showing an example of an electronic device.

[0050] Figures 25A to 25F It is a diagram showing an example of an electronic device.

[0051] Figures 26A to 26G It is a diagram showing an example of an electronic device. Detailed implementation

[0052] The embodiments will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and it is easily understood by those of ordinary skill in the art that the manner and details can be changed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited only to the content described in the following embodiments.

[0053] Note that in the structure of the invention described below, the same parts or parts having the same function are denoted by the same reference numerals in different drawings, and repeated description is omitted. In addition, when indicating parts having the same function, the same hatching is sometimes used without particularly attaching reference numerals.

[0054] In addition, for ease of understanding, the positions, sizes, ranges, etc. of the respective structures shown in the drawings do not necessarily represent their actual positions, sizes, ranges, etc. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings.

[0055] Note that in this specification and the like, for convenience, ordinal numbers such as "first" and "second" are added, but they do not limit the number of constituent elements or the order of constituent elements (for example, process order or lamination order). In addition, the ordinal numbers added to a constituent element in a certain part of this specification may sometimes be inconsistent with the ordinal numbers added to the same constituent element in other parts of this specification or in the claims.

[0056] In addition, depending on the situation or state, "film" and "layer" can be interchanged with each other. For example, "conductive layer" can be changed to "conductive film". In addition, "insulating film" can be changed to "insulating layer".

[0057] A transistor is a type of semiconductor device, and can implement functions such as amplifying current or voltage, and performing switching operations for controlling conduction or non-conduction. The transistors in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs: Thin Film Transistors).

[0058] In addition, in cases where transistors with different polarities are used or the direction of the current in the circuit operation changes, etc., the functions of the "source electrode" and "drain electrode" are sometimes interchanged. Therefore, in this specification, "source electrode" and "drain electrode" can be used interchangeably.

[0059] In this specification and the like, "electrically connected" includes cases where connection is made through "elements having a certain electrical effect". Here, there are no particular restrictions on the "elements having a certain electrical effect" as long as they can transmit and receive electrical signals between the connection objects. For example, the "elements having a certain electrical effect" include switching elements such as transistors, resistors, coils, and other elements having various functions in addition to electrodes or wirings.

[0060] In addition, in this specification and the like, in the absence of special description, the off-state current refers to the leakage current between the source electrode and the drain electrode when the transistor is in the off state (also referred to as the non-conduction state, cut-off state). In the absence of special description, in an n-channel transistor, the off state refers to the state where the voltage V between the gate electrode and the source electrode gs is lower than the threshold voltage V th (in a p-channel transistor, V gs is higher than V th ).

[0061] In this specification and the like, the normally-on characteristic refers to the state where a channel exists even when no voltage is applied to the gate electrode, and current flows through the transistor. In addition, the normally-off characteristic refers to the state where no current flows through the transistor when no potential is applied to the gate electrode or when a ground potential is supplied to the gate electrode.

[0062] In the present specification and the like, the top surface shape of a component refers to the contour shape of the component when viewed in a plan view (also referred to as a top view). In addition, the plan view refers to the case of viewing from the normal direction of the surface of the formation surface of the component or the support body (such as a substrate) on which the component is formed.

[0063] In the present specification and the like, "substantially the same top surface shape" means that at least a part of the contours of each layer in the stack overlaps. For example, it includes the case where the upper layer and the lower layer are processed by the same mask pattern or a part of the same mask pattern. However, in practice, there are cases where the contours do not overlap, and sometimes the upper layer is located inside the lower layer or the upper layer is located outside the lower layer, and this case can also be said to have "substantially the same top surface shape". When the top surface shapes are the same or substantially the same, it can also be said that the ends are aligned or substantially aligned, or the side ends are the same or substantially the same.

[0064] In the present specification and the like, the conical shape means a shape in which at least a part of the side surface of the component is inclined with respect to the substrate surface or the formation surface. For example, it preferably has a region where the angle (also referred to as the cone angle) formed by the inclined side surface and the substrate surface or the formation surface is greater than 0 degrees and less than 90 degrees. Note that the side surface of the component, the substrate surface, and the formation surface do not necessarily have to be completely flat, and may be an approximately planar shape with a minute curvature or an approximately planar shape with fine irregularities.

[0065] Note that in the present specification and the like, oxynitride refers to a material in which the oxygen content in its composition is more than the nitrogen content. Nitrogen oxide refers to a material in which the nitrogen content in its composition is more than the oxygen content.

[0066] For example, the contents of elements such as hydrogen, oxygen, and nitrogen can be analyzed by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) or X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy). When the content rate of the target element is high (for example, 0.5 atomic% or more or 1 atomic% or more), XPS is suitable. On the other hand, when the content rate of the target element is low (for example, 0.5 atomic% or less or 1 atomic% or less), SIMS is suitable. When comparing the element contents, it is more preferable to perform a combined analysis using both analysis techniques of SIMS and XPS.

[0067] In the present specification and the like, when there is a description of "A is in contact with B", at least a part of A is in contact with B. Therefore, for example, it can be alternatively described as A having a region in contact with B.

[0068] In this specification and the like, when there is a description that "A is located on B", at least a part of A is located on B. Therefore, for example, it can be alternatively described as A having a region located on B.

[0069] In this specification and the like, when there is a description that "A overlaps with B", at least a part of A overlaps with B. Therefore, for example, it can be alternatively described as A having a region that overlaps with B.

[0070] In this specification and the like, a device manufactured using a metal mask or FMM (Fine Metal Mask, high-precision metal mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification and the like, a device not manufactured using a metal mask or FMM is sometimes referred to as a device having an MML (Metal Mask Less) structure.

[0071] In this specification and the like, a structure in which light-emitting layers are separately manufactured in light-emitting elements (also referred to as light-emitting devices) having different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure allows the materials and structure to be optimized for each light-emitting element, the degree of freedom in the selection of materials and structure is increased, and it is possible to easily achieve improvements in brightness and reliability.

[0072] In this specification and the like, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer is sometimes referred to as a "carrier injection layer", a hole transport layer or an electron transport layer is sometimes referred to as a "carrier transport layer", and a hole blocking layer or an electron blocking layer is sometimes referred to as a "carrier blocking layer". Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer cannot sometimes be clearly distinguished. In addition, sometimes a single layer has the functions of two or three of the carrier injection layer, carrier transport layer, and carrier blocking layer.

[0073] In this specification and the like, a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as the layers included in the EL layer (also referred to as functional layers), examples include a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier blocking layer (hole blocking layer and electron blocking layer). In this specification and the like, a light-receiving element (also referred to as a light-receiving device) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes is sometimes denoted as a pixel electrode, and the other is denoted as a common electrode.

[0074] In this specification and the like, a sacrificial layer (which can also be referred to as a mask layer) is at least located above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers constituting the EL layer), and has a function of protecting the light-emitting layer in the manufacturing process.

[0075] In the present specification and the like, "disconnection" refers to a phenomenon in which a layer, film, or electrode is disconnected due to the shape of the formation surface (e.g., steps, etc.).

[0076] (Embodiment 1)

[0077] In the present embodiment, a semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 1 to 5.

[0078] The semiconductor device of the present embodiment includes at least two types of transistors on the same plane. These two types of transistors can be formed using a part of the processes in common. For example, one of the transistors is used as a transistor required to have a large on-state current, and the other transistor is used as a transistor required to have a high saturation property, whereby a high-performance semiconductor device can be realized. More specifically, as the transistor required to have a large on-state current, a vertical transistor with an extremely small channel length is used. On the other hand, as the transistor required to have a high saturation property, a planar transistor with a large channel length and including a back gate is used.

[0079] [Structural Example 1]

[0080] Figure 1A A top view of the transistor 100 is shown, Figure 1B A top view of the transistor 200 is shown, Figure 1C A cross-sectional view of the transistor 100 and the transistor 200 is shown. Figure 1C It can also be said to be a cross-sectional view in the channel length direction of the transistor 200. Figure 2A An enlarged view of the transistor 100 is shown, Figure 2B An enlarged view of the transistor 200 is shown. Figure 3A and Figure 3B A cross-sectional view of a modified example of the transistor 100 is shown. Figure 3C and Figure 3D A cross-sectional view in the channel width direction of the transistor 200 is shown.

[0081] Any one of the gate, drain, and source of the transistor 100 may be electrically connected to any one of the gate, drain, and source of the transistor 200.

[0082] <Transistor 100>

[0083] As Figure 1A and Figure 1C shown, the transistor 100 includes a conductive layer 205B, a conductive layer 242C, an oxide layer 235, an insulating layer 255, and a conductive layer 265. Furthermore, one or more of the insulating layer 220, the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, and the insulating layer 271C may also be regarded as constituent elements of the transistor 100.

[0084] The insulating layer 255 is used as the gate insulating layer of the transistor 100. The conductive layer 265 is used as the gate electrode of the transistor 100.

[0085] The conductive layer 205B is used as one of the source electrode and the drain electrode of the transistor 100. The conductive layer 242C is used as the other of the source electrode and the drain electrode of the transistor 100.

[0086] The oxide layer 235 has a channel formation region in the transistor 100. In the oxide layer 235, the region in contact with the conductive layer 205B is used as one of the source region and the drain region, the region in contact with the conductive layer 242C is used as the other of the source region and the drain region, and there is a region serving as the channel formation region between the source region and the drain region.

[0087] At least one of the regions in the oxide layer 235 between the side surface of the insulating layer 220 and the conductive layer 265, between the side surface of the insulating layer 222B and the conductive layer 265, and between the side surface of the insulating layer 224B and the conductive layer 265 is used as the channel formation region of the transistor 100. In addition, the diameter of the opening provided in the insulating layer 220, the insulating layer 222B, or the insulating layer 224B corresponds to the channel width of the transistor 100. These diameters of the openings sometimes change in the depth direction. As the diameter of the opening, any one of the diameter of the highest position, the diameter of the lowest position, or half of the sum of the diameter of the highest position and the diameter of the lowest position of the insulating layer 220, the insulating layer 222B, or the insulating layer 224B in the cross-sectional view can also be used.

[0088] The oxide layer 230B is preferably an oxide conductive layer. Alternatively, the oxide layer 230B can also be an oxide semiconductor layer having a lower resistance than the channel formation region of the oxide layer 235. The oxide layer 230B can also be regarded as a part of the other of the source electrode and the drain electrode of the transistor 100. Alternatively, the oxide layer 230B can also be regarded as a part of the other of the source region and the drain region of the transistor 100.

[0089] Figure 2A An enlarged view of the transistor 100 is shown. In Figure 2A the insulating layers provided between the conductive layer 205B and the oxide layer 230B are shown together as the insulating layer 223. The insulating layer 223 can have a single-layer structure or a laminated structure. The insulating layer 223 corresponds to, for example, Figure 1C the laminated structure of the insulating layers 220, 222B, and 224B in

[0090] Figure 2A The channel length L100 and the channel width W100 of the transistor 100 are shown. In Figure 2AIn [description], the channel length L100 can be said to be the shortest distance between the part of the oxide layer 235 in contact with the oxide layer 230B and the part in contact with the conductive layer 205B. Additionally, in Figure 2A In [description], the channel width W100 is represented by the diameter at the highest position of the insulating layer 223 in a cross-sectional view. Note that the diameter of the opening included in the insulating layer 223 sometimes changes in the depth direction. Therefore, as the channel width W100, for example, any one of the diameter at the highest position, the diameter at the lowest position, or the diameter at the position of their midpoint of the insulating layer 223 in a cross-sectional view can be used. Alternatively, as the channel width W100, for example, the average value of the diameter at the highest position, the diameter at the lowest position, and the diameter at the position of their midpoint of the insulating layer 223 in a cross-sectional view can be used.

[0091] Note that depending on the structure of the insulating layer 223, sometimes only a part of the region of the oxide layer 235 in contact with the insulating layer 223 is used as the channel formation region, and sometimes the channel length L100 is smaller than Figure 2A the length shown.

[0092] For example, it is preferable to use an oxide insulating film for the part of the insulating layer 223 in contact with the channel formation region of the oxide layer 235. In particular, it is preferable to use an insulating film that releases oxygen by heating (such as a silicon oxide film, a silicon oxynitride film, etc.). In addition, it is preferable to provide an insulating film that is not easily diffusible to oxygen and hydrogen (such as a silicon nitride film, a silicon oxynitride film, an aluminum oxide film, a hafnium oxide film, etc.) on one or both of the upper and lower sides of this insulating film. Thereby, oxygen can be efficiently supplied to the channel formation region of the oxide layer 235, and hydrogen diffusion can be suppressed. Therefore, stabilization of the electrical characteristics of the transistor 100 can be achieved.

[0093] In Figure 2A In [description], the channel length L100 of the transistor 100 corresponds to the length of the side on the opening side of the insulating layer 223 in a cross-sectional view. That is, the channel length L100 is determined by the thickness of the insulating layer 223 and the angle θ100 formed by the side on the opening side of the insulating layer 223 and the formed surface of the insulating layer 223 (here, the top surface of the conductive layer 205B). Therefore, for example, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a fine transistor can be realized. Specifically, a transistor with an extremely small channel length that cannot be achieved in an exposure apparatus (for example, with a minimum line width of about 2 μm or 1.5 μm) used in the mass production of conventional flat panel displays can be realized. Additionally, a transistor with a channel length less than 10 nm can be realized without using a very expensive exposure apparatus used in the most advanced LSI technology.

[0094] The channel length L100 can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 can be set to 100 nm or more and 1 μm or less.

[0095] By reducing the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of operating at high speed can be fabricated. Furthermore, the occupied area of the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, in the case where the semiconductor device according to one embodiment of the present invention is used in a large display device or a high-definition display device, when the number of wirings increases, the signal delay of each wiring can be reduced, thereby suppressing display unevenness. In addition, since the occupied area of the circuit can be reduced, the frame of the display device can be reduced.

[0096] By adjusting the thickness and the angle θ100 of the insulating layer 223, the channel length L100 can be controlled.

[0097] The thickness of the insulating layer 223 can be at least greater than that of the oxide layer 235. For example, it can be 2 nm or more, 5 nm or more, 10 nm or more, or 50 nm or more and 500 nm or less, 400 nm or less, 300 nm or less, 200 nm or less, 150 nm or less.

[0098] The side surface of the opening side of the insulating layer 223 preferably has a vertical shape or a tapered shape. The angle θ100 formed by the side surface of the opening side of the insulating layer 223 and the surface on which the insulating layer 223 is formed (here, the top surface of the conductive layer 205B) is preferably 90 degrees or less. By reducing the angle θ100, the coverage of the layer provided on the insulating layer 223 (for example, the oxide layer 235) can be improved. In addition, the smaller the angle θ100, the larger the channel length L100 can be, and the larger the angle θ100, the smaller the channel length L100 can be. In the present embodiment, an example in which the side surface of the opening side of the insulating layer 223 has a vertical shape (the angle θ100 is 90°) is shown.

[0099] The angle θ100 can be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more and 90 degrees or less, 85 degrees or less, or 80 degrees or less. In addition, the angle θ100 can also be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.

[0100] When the angle θ100 is 80 degrees or more and 90 degrees or less, it is preferable to form a film covering the insulating layer 223 using a deposition method with high coverage. For example, it is preferable to form the conductive layer 265 using the CVD method and to form the insulating layer 255 and the oxide layer 235 using the ALD method. In addition, for example, it is preferable to form the conductive layer 265, the insulating layer 255, and the oxide layer 235 using the ALD method. Further, when the above-mentioned angle θ100 is 60 degrees or more and 85 degrees or less, it is also possible to form a film covering the insulating layer 223 using a deposition method with higher productivity. For example, it is preferable to form the oxide layer 235 using the sputtering method.

[0101] Figure 1A An example is shown in which the top surface shape of the opening included in the insulating layers 220, 222B, 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C is circular. In this way, when the top surface shape of the opening is circular, a transistor with a smaller channel width can be realized compared to other shapes.

[0102] When forming an opening using photolithography, the diameter of the opening is equal to or greater than the limit resolution of the exposure apparatus. The diameter can be, for example, 20 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more and less than 5.0 μm, 4.5 μm or less, 4.0 μm or less, 3.5 μm or less, 3.0 μm or less, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, or 1.0 μm or less.

[0103] There is no limitation on the top surface shape of the opening provided in each layer. For example, a polygon such as a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a rhombus, a square), a pentagon, a star polygon, or a shape in which the corners of these polygons are rounded can be adopted. The polygon can also be a concave polygon (a polygon in which at least one interior angle exceeds 180 degrees) or a convex polygon (a polygon in which all interior angles are 180 degrees or less). As Figure 1A etc. show, the top surface shape of the opening is preferably circular. By adopting a circular shape as the top surface shape of the opening, the processing accuracy when forming the opening can be improved, and thus a fine opening can be formed. Note that in this specification, etc., a circle is not limited to a perfect circle.

[0104] In this specification, etc., the top surface shape of the opening in a certain film refers to the shape of the top end or the bottom end of the opening side of the film.

[0105] In addition, Figure 1AAn example is shown in which the top surfaces of the insulating layers 222B and 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C are quadrilateral (more specifically, rectangular). There is no limitation on the top surface shape of each layer arranged in an island shape. For example, a circular shape, an elliptical shape, a triangular shape, a quadrilateral shape (including a rectangular shape, a rhombus shape, a square shape), a pentagonal shape, a star-shaped polygon, or a shape in which the corners of these polygons are rounded can be adopted.

[0106] In the transistor 100, the source electrode and the drain electrode are located at different heights, and the current flowing through the semiconductor layer flows in the height direction. That is to say, the channel length direction can be said to have a component in the height direction (vertical direction). Therefore, the transistor 100 can also be referred to as a VFET (Vertical Field Effect Transistor), a vertical transistor, a vertical channel transistor, etc.

[0107] Since the source electrode, the semiconductor layer, and the drain electrode can be arranged overlappingly in the transistor 100, the occupied area can be significantly reduced compared to a so-called planar transistor in which the semiconductor layer is arranged in a planar shape.

[0108] <Transistor 200>

[0109] As Figure 1B and Figure 1C shown, the transistor 200 includes a conductive layer 205A, an insulating layer 220, an insulating layer 222A, an insulating layer 224A, an oxide layer 230A, a conductive layer 242A, a conductive layer 242B, an insulating layer 250, and a conductive layer 260. In addition, the insulating layer 271A and the insulating layer 271B can also be regarded as components of the transistor 200.

[0110] The insulating layer 250 is used as the gate insulating layer (which can also be said to be the first gate insulating layer) of the transistor 200. The conductive layer 260 is used as the gate electrode (which can also be said to be the first gate electrode) of the transistor 200.

[0111] The insulating layer 220, the insulating layer 222A, and the insulating layer 224A are used as the back gate insulating layer (which can also be said to be the second gate insulating layer) of the transistor 200. The conductive layer 205A is used as the back gate electrode (which can also be said to be the second gate electrode) of the transistor 200.

[0112] The conductive layer 242A is used as one of the source electrode and the drain electrode of the transistor 200. The conductive layer 242B is used as the other of the source electrode and the drain electrode of the transistor 200.

[0113] The oxide layer 230A has a channel formation region in the transistor 200, and a source region and a drain region provided in a manner of sandwiching the channel formation region. At least a part of the channel formation region overlaps with the conductive layer 260. One of the source region and the drain region overlaps with the conductive layer 242A, and the other overlaps with the conductive layer 242B. The channel formation region overlaps with the conductive layer 260 with the insulating layer 250 therebetween, and overlaps with the conductive layer 205A with the insulating layers 220, 222A, and 224A therebetween.

[0114] Since the channel length of the transistor 200 can be determined according to the width of the conductive layer 260, the degree of freedom in designing the channel length is higher than that of the transistor 100 which is a vertical transistor. For example, when the semiconductor device includes a plurality of transistors 200, the channel lengths of all the transistors 200 can be made equal, or the channel lengths of some of the transistors 200 can be made different from those of the other transistors 200. By making the channel length of the transistor 200 larger than that of the transistor 100, the transistor 200 can be made a transistor with good saturation characteristics.

[0115] In each transistor, since the oxygen vacancies are fewer or the impurity concentration is lower in the channel formation region than in the source region and the drain region, the channel formation region is a high-resistance region with a low carrier concentration. Therefore, the channel formation region can be said to be an i-type (intrinsic) or substantially i-type region.

[0116] In addition, the source region and the drain region have many oxygen vacancies or a high impurity concentration of hydrogen, nitrogen, metal elements, etc., and thus are low-resistance regions with a high carrier concentration. That is, the source region and the drain region are n-type regions (low-resistance regions) with a higher carrier concentration than the channel formation region.

[0117] The carrier concentration in the channel formation region is preferably 1×10 18 cm -3 or less, lower than 1×10 17 cm -3 or less, lower than 1×10 16 cm -3 or less, lower than 1×10 15 cm -3 or less, lower than 1×10 14 cm -3 or less, lower than 1×10 13 cm -3 or less, lower than 1×10 12 cm -3 or less, lower than 1×10 11 cm -3 or lower than 1×10 10 cm -3 . Note that there is no particular limitation on the lower limit value of the carrier concentration in the channel formation region. For example, it can be 1×10-9 cm -3 。

[0118] In order to reduce the carrier concentration in the oxide layer 230A and the oxide layer 235, the impurity concentration in the oxide layer 230A and the oxide layer 235 is reduced to reduce the density of defect states. In this specification and the like, a state with a low impurity concentration and a low density of defect states is referred to as highly pure intrinsic or substantially highly pure intrinsic. In addition, an oxide semiconductor (or metal oxide) with a low carrier concentration is sometimes referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor (or metal oxide).

[0119] In order to stabilize the electrical characteristics of the transistor 100, it is effective to reduce the impurity concentration in the oxide layer 235. In order to stabilize the electrical characteristics of the transistor 200, it is effective to reduce the impurity concentration in the oxide layer 230A. In order to reduce the impurity concentration in the oxide layer 230A and the oxide layer 235, it is preferable to also reduce the impurity concentration in the nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc. Note that impurities in the oxide layer 230A refer to elements other than the main components constituting the oxide layer 230A. For example, an element with a concentration lower than 0.1 atomic% can be said to be an impurity. The same applies to impurities in the oxide layer 235.

[0120] In the oxide layer 235 and the oxide layer 230A, it is sometimes difficult to clearly detect the boundary of each region. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region do not need to change step by step for each region, and may also change continuously in each region. That is, the closer to the channel formation region, the lower the concentrations of metal elements and impurity elements such as hydrogen and nitrogen can be.

[0121] <Semiconductor device>

[0122] Next, the stacked structure in the Figure 1C semiconductor device shown will be described.

[0123] An insulating layer 216, a conductive layer 205A, and a conductive layer 205B are provided on the insulating layer 215. The conductive layer 205A and the conductive layer 205B are provided in such a way as to be embedded in the opening of the insulating layer 216. The top surfaces of the insulating layer 216, the conductive layer 205A, and the conductive layer 205B are preferably flush or substantially flush.

[0124] An insulating layer 220 is provided on the insulating layer 216, the conductive layer 205A, and the conductive layer 205B.

[0125] On the insulating layer 220, an insulating layer 222B, an insulating layer 224B, an oxide layer 230B, a conductive layer 242C, and an insulating layer 271C are sequentially stacked in such a manner that at least a part thereof overlaps with the conductive layer 205B. An insulating layer 275 is provided so as to cover the side surfaces of the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C and the top surface of the insulating layer 271C, and an insulating layer 280 is provided so as to cover the insulating layer 275.

[0126] The insulating layer 222B, the insulating layer 224B, the oxide layer 230B, and the conductive layer 242C can be processed into islands at one time to form. Thereby, the productivity of the semiconductor device can be improved. When processed into islands at one time, for example, the structure shown can be achieved. Figure 1C Specifically, when the transistor 100 is cross-sectioned, the side end portions of the conductive layer 242C coincide with or are substantially coincident with the side end portions of the oxide layer 230B, the side end portions of the insulating layer 224B, and the side end portions of the insulating layer 222B.

[0127] An insulating layer 271C may also be provided on the conductive layer 242C. The insulating layer 271C can be used as an etch stop layer for protecting the conductive layer 242C in the process of processing into islands at one time.

[0128] Note that although an example in which the insulating layer 222A and the insulating layer 222B are formed into islands is shown in the present embodiment, the insulating layer 222 may also be provided on the entire surface in the same manner as the insulating layer 220. At this time, the transistor 100 and the transistor 200 commonly use the stacked structure of the insulating layer 220 and the insulating layer 222.

[0129] Openings reaching the conductive layer 205B are provided in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, the insulating layer 271C, the insulating layer 275, and the insulating layer 280.

[0130] Here, Figure 1C and Figure 3A the conductive layer 205B shown has a concave portion at a position overlapping with the opening. Alternatively, as shown in Figure 3B the conductive layer 205B may not have a concave portion.

[0131] Further, in a manner covering the inside of the opening, the oxide layer 235 is disposed in contact with the top surface of the conductive layer 205B, the side surfaces of the insulating layer 220, the insulating layer 222B, the insulating layer 224B, the top surface and side surfaces of the oxide layer 230B, the side surface of the conductive layer 242C, the side surface of the insulating layer 271C, the side surfaces of the insulating layer 275, and the side surface of the insulating layer 280. Furthermore, inside the opening, an insulating layer 255 is provided on the oxide layer 235, and a conductive layer 265 is provided on the insulating layer 255.

[0132] As Figure 1C , Figure 3A and Figure 3B shown, the size in plan view of the opening provided in the conductive layer 242C and the insulating layer 271C is preferably larger than the size in plan view of the opening provided in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, and the oxide layer 230B. Thus, the oxide layer 235 is in contact not only with the side surface but also with the top surface of the oxide layer 230B. As described above, the oxide layer 230B can be regarded as part of the source electrode or drain electrode of the transistor 100. By increasing the contact area between the oxide layer 235 and the oxide layer 230B, the contact resistance between the oxide layer 235 and the source electrode or drain electrode can be reduced, thereby improving the on-state current of the transistor 100.

[0133] As Figure 1C and Figure 3A shown, when a recess is provided in the conductive layer 205B, the oxide layer 235 is disposed in contact with the bottom surface and side surface of the recess of the conductive layer 205B.

[0134] The conductive layer 265 is disposed to be embedded inside the opening. The heights of the top surfaces of the oxide layer 235, the insulating layer 255, the conductive layer 265, and the insulating layer 280 are preferably the same or substantially the same.

[0135] In Figure 3B , the region of the oxide layer 235 that contacts the side surface of the insulating layer 224B overlaps with the conductive layer 265. In other words, the region of the oxide layer 235 that contacts the side surface of the insulating layer 224B faces the conductive layer 265. The region of the oxide layer 235 that contacts the side surface of the insulating layer 224B is used as the channel formation region of the transistor 100. Therefore, an oxide insulating film is preferably used as the insulating layer 224B.

[0136] In addition, in Figure 1CIn [the structure], regions in the oxide layer 235 that contact the side surfaces of the insulating layer 224B and regions that contact the side surfaces of the insulating layer 222B overlap with the conductive layer 265. In other words, the regions in the oxide layer 235 that contact the side surfaces of the insulating layer 224B and the regions that contact the side surfaces of the insulating layer 222B face the conductive layer 265. Therefore, compared with Figure 3B the structure shown, regions (bias regions) where it is difficult to apply a gate electric field can be reduced, which is thus preferable. Similarly, in Figure 3A [the structure], regions in the oxide layer 235 that contact the side surface of the insulating layer 220 also overlap with the conductive layer 265 (face the conductive layer 265), so compared with Figure 1C the structure shown, the bias regions can be reduced, which is thus preferable. As a result, a decrease in field-effect mobility due to the bias regions can be suppressed.

[0137] In addition, an insulating layer 222A, an insulating layer 224A, and an oxide layer 230A are sequentially stacked on the insulating layer 220 such that at least a part thereof overlaps with the conductive layer 205A. And on the oxide layer 230A, the conductive layer 242A and the conductive layer 242B are provided separately from each other.

[0138] The insulating layer 222A, the insulating layer 224A, the oxide layer 230A, and the conductive layers that will become the conductive layer 242A and the conductive layer 242B can be formed by processing them into island shapes all at once. Thereby, the productivity of the semiconductor device can be improved. When processing them into island shapes all at once, for example, the structure shown in Figure 1C can be achieved. Specifically, when the transistor 200 is cut in cross-section, one side end of the conductive layer 242A coincides with or is substantially coincident with one side end of the oxide layer 230A, and one side end of the conductive layer 242B coincides with or is substantially coincident with the other side end of the oxide layer 230A. Moreover, the side ends of the insulating layer 222A and the side ends of the insulating layer 224A both coincide with or are substantially coincident with the side ends of the oxide layer 230A.

[0139] An insulating layer 271A may also be provided on the conductive layer 242A, and an insulating layer 271B may also be provided on the conductive layer 242B. The insulating layer 271A and the insulating layer 271B can be used as etch stop layers for protecting the conductive layer 242A and the conductive layer 242B in the above-described process of processing into island shapes all at once.

[0140] An insulating layer 275 is provided so as to cover the side surfaces of the insulating layer 222A, the insulating layer 224A, the oxide layer 230A, the conductive layer 242A, the conductive layer 242B, the insulating layer 271A, and the insulating layer 271B, and an insulating layer 280 is provided so as to cover the insulating layer 275.

[0141] InFigure 1C In this case, openings reaching the oxide layer 230A are provided in the insulating layer 275 and the insulating layer 280. In addition, as Figure 3C shown, the insulating layer 220, the insulating layer 275, and the insulating layer 280 preferably have openings reaching the conductive layer 205A. Alternatively, a structure in which the insulating layer 275 has an opening reaching the insulating layer 220 and the insulating layer 220 has no opening, or a structure in which neither the insulating layer 220 nor the insulating layer 275 has an opening may be employed. In this case, an opening reaching the insulating layer 275 or the insulating layer 220 is provided in the insulating layer 280. Or, as Figure 3D shown, the insulating layer 216, the insulating layer 220, the insulating layer 275, and the insulating layer 280 preferably have openings reaching the insulating layer 215 at positions overlapping with the conductive layer 205A.

[0142] The insulating layer 250 is provided so as to cover the opening reaching the oxide layer 230A and the opening reaching the conductive layer 205A or the insulating layer 215, and the conductive layer 260 is provided on the insulating layer 250. By forming the insulating layers 222A and 224A in an island shape, at least a part of the bottom surface of the conductive layer 260 can be disposed below the bottom surface of the oxide layer 230A. As a result, the conductive layer 260 can be disposed so as to face the top surface and the side surfaces of the oxide layer 230A, and thus the electric field of the conductive layer 260 can act on the top surface and the side surfaces of the oxide layer 230A.

[0143] Here, in the present specification and the like, a transistor structure in which at least the electric field of the first gate electrode electrically surrounds the channel formation region is referred to as a surrounded channel (S-channel) structure. In addition, the S-channel structure disclosed in the present specification and the like is different from the Fin type structure and the planar type structure. On the other hand, the S-channel structure disclosed in the present specification and the like can be regarded as a kind of Fin type structure. In addition, in the present specification and the like, the Fin type structure refers to a structure in which gate electrodes are arranged so as to surround at least two or more surfaces (specifically, two surfaces, three surfaces, four surfaces, etc.) of the channel. By adopting the Fin type structure and the S-channel structure, the tolerance to the short channel effect can be improved. In other words, a transistor in which the short channel effect is not likely to occur can be realized.

[0144] By adopting the above S-channel structure as the transistor 200, the channel formation region can be electrically surrounded. Since the S-channel structure is a structure that electrically surrounds the channel formation region, it can also be said that this structure is substantially the same as the GAA (Gate All Around) structure or the LGAA (Lateral Gate All Around) structure. By making the transistor 200 have the S-channel structure, the GAA structure, or the LGAA structure, the channel formation region formed at or near the interface between the oxide layer 230A and the insulating layer 250 can be regarded as the entire bulk of the oxide layer 230A. Therefore, the current density flowing through the transistor can be increased, so an increase in the on-state current of the transistor or the field-effect mobility of the transistor can be expected.

[0145] Furthermore, an insulating layer 282, an insulating layer 283, and an insulating layer 284 are provided on the transistor 100 and the transistor 200. Conductive layers 240A electrically connected to the conductive layer 205A, conductive layers 240B electrically connected to the conductive layer 242A, conductive layers 240C electrically connected to the conductive layer 260, conductive layers 240D electrically connected to the conductive layer 242B, conductive layers 240E electrically connected to the conductive layer 265, conductive layers 240F electrically connected to the conductive layer 242C, and conductive layers 240G electrically connected to the conductive layer 205B are provided in the openings in the insulating layer 282, the insulating layer 283, and the insulating layer 284, etc. An insulating layer 241 is preferably provided on the side surfaces of the openings provided in the insulating layer 282, the insulating layer 283, and the insulating layer 284, etc., and the conductive layers 205A to 240G are preferably embedded inside the insulating layer 241.

[0146] [Materials]

[0147] Hereinafter, the materials that can be used for the semiconductor device of the present embodiment will be described. In addition, each layer constituting the semiconductor device, the transistor 100, and the transistor 200 of the present embodiment may be a single-layer structure or a laminated structure.

[0148] <Oxide layer 235, oxide layer 230A, and oxide layer 230B>

[0149] The oxide layer 235, the oxide layer 230A, and the oxide layer 230B are preferably made of a metal oxide used as a semiconductor (hereinafter, also referred to as an oxide semiconductor).

[0150] The oxide layer 235 and the oxide layer 230A have a channel formation region, which is of i-type (intrinsic) or substantially i-type. The oxide layer 235 and the oxide layer 230A also have a source region and a drain region, which are n-type regions (low resistance regions) with a carrier concentration higher than that of the channel formation region. The oxide layer 230B may have the same structure as the source region and the drain region. Additionally, the resistance of the oxide layer 230B is preferably lower than that of the channel formation region in the oxide layer 235 and the oxide layer 230A. Further, the oxide layer 230B is preferably a conductive metal oxide (also referred to as an oxide conductor (OC: Oxide Conductor)).

[0151] Hereinafter, the materials that can be used for the oxide layer 235 will be mainly described. The same materials as those that can be used for the oxide layer 235 can also be used for the oxide layer 230A and the oxide layer 230B. The oxide layer 230A and the oxide layer 230B can be formed using the same process and the same materials. The oxide layer 230A and the oxide layer 230B can use the same materials or different materials as the oxide layer 235.

[0152] There is no particular limitation on the crystallinity of the semiconductor material used for the oxide layer 235, and an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than a single crystal semiconductor (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in a part thereof) can be used. When a single crystal semiconductor or a semiconductor having crystallinity is used, deterioration of the transistor characteristics can be suppressed, which is therefore preferred.

[0153] The bandgap of the metal oxide used as a semiconductor is preferably 2.0 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wider bandgap, the off-state current of the transistor can be reduced. Therefore, a transistor including a metal oxide in the channel formation region is called an OS transistor. Since the off-state current of the OS transistor is small, the power consumption of the semiconductor device can be sufficiently reduced. Additionally, since the frequency characteristics of the OS transistor are high, the semiconductor device can operate at high speed.

[0154] As the metal oxide that can be used for the oxide layer 235, indium oxide, gallium oxide, and zinc oxide can be cited as examples. The metal oxide preferably contains at least indium (In) or zinc (Zn). The metal oxide preferably contains two or three selected from indium, element M, and zinc. In addition, element M is a metal element or a metalloid element with a high bond energy with oxygen, for example, a metal element or a metalloid element with a bond energy with oxygen higher than that of indium. Specifically, as element M, aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, antimony, etc. can be cited. Element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and further preferably gallium. In addition, in this specification, etc., metal elements and metalloid elements are sometimes collectively referred to as "metal elements", and the "metal elements" described in this specification, etc. sometimes include metalloid elements.

[0155] For the oxide layer 235, indium zinc oxide (In-Zn oxide, also denoted as IZO (registered trademark)), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also denoted as GZO), aluminum zinc oxide (Al-Zn oxide, also denoted as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also denoted as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also denoted as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also denoted as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also denoted as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also denoted as IGAZO, IGZAO, or IAGZO), etc. can be used. Alternatively, indium tin oxide containing silicon, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. can be used.

[0156] At this time, by increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements in the metal oxide, the field-effect mobility of the transistor can be increased. In addition, a transistor with a large on-state current can be realized.

[0157] Note that metal oxides can also replace indium or contain, in addition to indium, one or more metal elements with a large period number in the periodic table. The greater the orbital overlap of the metal elements, the greater the carrier conduction in the metal oxide tends to be. Therefore, by including metal elements with a large period number, the field-effect mobility of the transistor can sometimes be increased. As metal elements with a large period number, metal elements belonging to the fifth period and metal elements belonging to the sixth period can be cited, etc. Specifically, as such metal elements, the following can be cited: yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. In addition, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0158] In addition, the metal oxide can also contain one or more non-metal elements. When the metal oxide contains non-metal elements, sometimes the carrier concentration increases or the band gap narrows, etc., and the field-effect mobility of the transistor can be increased. As non-metal elements, for example, carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen can be cited.

[0159] In addition, by increasing the ratio of the number of zinc atoms to the total number of atoms of all metal elements in the metal oxide, the crystallinity of the metal oxide is improved, and thereby the diffusion of impurities in the metal oxide can be suppressed. Therefore, the variation in the electrical characteristics of the transistor is suppressed, and thereby the reliability can be improved.

[0160] In addition, by increasing the ratio of the number of atoms of element M to the total number of atoms of all metal elements in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, the generation of carriers due to oxygen vacancies is suppressed, and thereby a transistor with a small off-state current can be realized. In addition, the variation in the electrical characteristics of the transistor is suppressed, and thereby the reliability can be improved.

[0161] Depending on the composition of the metal oxide for the oxide layer 235, the electrical characteristics and reliability of the transistor are different. Therefore, by varying the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be realized.

[0162] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of the atomic ratios of the metal elements in such an In-M-Zn oxide include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:1, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, and compositions in the vicinity thereof. In addition, the compositions in the vicinity include the range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current or field-effect mobility of the transistor can be improved, etc.

[0163] The atomic ratio of In in the In-M-Zn oxide can also be less than the atomic ratio of element M. Examples of the atomic ratios of the metal elements in such an In-M-Zn oxide include In:M:Zn = 1:3:2, In:M:Zn = 1:3:3, In:M:Zn = 1:3:4, and compositions in the vicinity thereof. By increasing the proportion of the number of atoms of M in the metal oxide, the generation of oxygen vacancies can be suppressed.

[0164] Note that when multiple metal elements are included as element M, the total of the atomic ratios of the metal elements can be the atomic ratio of element M.

[0165] In this specification, etc., the atomic ratio of indium relative to the total number of atoms of all the contained metal elements is sometimes referred to as the indium content rate. The same applies to other metal elements.

[0166] The metal oxide can be suitably formed by a sputtering method or an atomic layer deposition (ALD: Atomic Layer Deposition) method. Note that when the metal oxide is formed by the sputtering method, the composition of the deposited metal oxide is sometimes different from the composition of the target. In particular, the zinc content rate in the deposited metal oxide sometimes decreases to about 50% of the zinc content rate in the target.

[0167] The oxide layer 235 can also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the oxide layer 235 can also be the same or substantially the same as each other. By adopting a stacked structure of metal oxide layers having the same composition, for example, it can be formed using the same sputtering target, and thus the manufacturing cost can be reduced.

[0168] The compositions of two or more metal oxide layers included in the oxide layer 235 may also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn = 1:3:4 [atomic ratio] or around it and a second metal oxide layer having a composition of In:M:Zn = 1:1:1 [atomic ratio] or around it provided on the first metal oxide layer can be suitably used. In addition, gallium, aluminum, or tin is particularly preferably used as the element M. For example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) can be used.

[0169] The oxide layer 235 preferably includes a metal oxide layer having crystallinity. As the structure of the metal oxide having crystallinity, for example, a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, or a microcrystal (nc: nano-crystal) structure can be cited. By using the metal oxide layer having crystallinity for the oxide layer 235, the density of defect states in the oxide layer 235 can be reduced, and thus a semiconductor device with high reliability can be realized.

[0170] The higher the crystallinity of the metal oxide layer for the oxide layer 235, the more the density of defect states in the oxide layer 235 can be reduced. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of flowing a large current can be realized.

[0171] When forming the metal oxide layer by sputtering, the higher the substrate temperature (stage temperature) during formation, the more a metal oxide layer with high crystallinity can be formed. In addition, the higher the ratio of the flow rate of oxygen gas to the total flow rate of the deposition gas used during formation (hereinafter, also referred to as the oxygen flow ratio), the more a metal oxide layer with high crystallinity can be formed.

[0172] The oxide layer 235 may also have a stacked structure of two or more metal oxide layers having different crystallinities. For example, it may have a stacked structure of a first metal oxide layer and a second metal oxide layer provided on the first metal oxide layer, and the second metal oxide layer may have a region with higher crystallinity than the first metal oxide layer. Or, the second metal oxide layer may have a region with lower crystallinity than the first metal oxide layer. At this time, the compositions of the first metal oxide layer and the second metal oxide layer may be different, the same, or substantially the same.

[0173] The thickness of the oxide layer 235 is preferably 3 nm or more and 200 nm or less, 3 nm or more and 100 nm or less, more preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 100 nm or less, more preferably 10 nm or more and 70 nm or less, more preferably 15 nm or more and 70 nm or less, more preferably 15 nm or more and 50 nm or less, more preferably 20 nm or more and 50 nm or less.

[0174] When an oxide semiconductor is used as the oxide layer 235, sometimes hydrogen contained in the oxide semiconductor reacts with oxygen bonded to metal atoms to generate water, and oxygen vacancies (V O ) are formed in the oxide semiconductor. Furthermore, sometimes hydrogen enters defects in the oxygen vacancies (hereinafter denoted as V O H) and is used as a donor to generate electrons as carriers. In addition, sometimes electrons as carriers are generated because a part of hydrogen bonds to oxygen bonded to metal atoms. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics (that is, the threshold voltage is negative). In addition, since hydrogen in the oxide semiconductor easily moves due to the action of heat, an electric field, etc., when the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0175] When an oxide semiconductor is used as the oxide layer 235, it is preferable to minimize V O H in the oxide layer 235 to be highly pure intrinsic or substantially highly pure intrinsic. In order to obtain such an oxide semiconductor in which V O H is sufficiently reduced, it is important to remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration and dehydrogenation treatment); and to supply oxygen to the oxide semiconductor to repair oxygen vacancies. By using an oxide semiconductor in which impurities such as V O H are sufficiently reduced for the channel formation region of the transistor, stable electrical characteristics can be imparted. Note that sometimes the treatment of supplying oxygen to the oxide semiconductor to repair oxygen vacancies is referred to as oxidation treatment.

[0176] When an oxide semiconductor is used as the oxide layer 235, the carrier concentration of the oxide semiconductor in the region used as the channel formation region is preferably 1×10 18 cm -3 or less, more preferably less than 1×10 17 cm -3 , further preferably less than 1×10 16 cm -3 , still further preferably less than 1×10 13 cm -3 , still preferably less than 1×10 12 cm -3Note that there is no particular limitation on the lower limit value of the carrier concentration of the oxide semiconductor in the region used as the channel formation region. For example, it can be set to 1×10 -9 cm -3 .

[0177] In addition, transistors using other semiconductor materials for the channel formation region can also be used in the semiconductor device of the present embodiment. As such other semiconductor materials, for example, semiconductors composed of single elements or compound semiconductors can be cited. As semiconductors composed of single elements, for example, silicon and germanium can be cited. As compound semiconductors, for example, gallium arsenide and silicon germanium can be cited. In addition, as compound semiconductors, for example, organic semiconductors and nitride semiconductors can be cited. Note that the above oxide semiconductor is also one kind of compound semiconductors. Note that these semiconductor materials can also contain impurities as dopants.

[0178] As for silicon, which is a semiconductor material that can be used for transistors, single-crystalline silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon can be cited. As for polycrystalline silicon, for example, low-temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon) can be cited.

[0179] The semiconductor layer of the transistor can also contain a layered material used as a semiconductor. The layered material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked by bonds weaker than covalent bonds or ionic bonds such as van der Waals bonds. The layered material has high conductivity in the unit layer, that is, has high two-dimensional conductivity. By using a material used as a semiconductor and having high two-dimensional conductivity for the channel formation region, a transistor with a large on-state current can be provided.

[0180] As the above-mentioned layered materials, for example, graphene, silicene, chalcogenides, etc. can be cited. Chalcogenides are compounds containing chalcogen elements (elements belonging to Group 16). In addition, as chalcogenides, transition metal chalcogenides, Group 13 chalcogenides, etc. can be cited. As transition metal chalcogenides that can be used as the semiconductor layer of the transistor, specifically, molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc. can be cited.

[0181] <Insulating layer 250 and insulating layer 255>

[0182] The insulating layer 250 is in contact with the channel formation region of the oxide layer 230A. The insulating layer 255 is in contact with the channel formation region of the oxide layer 235.

[0183] Hereinafter, the materials that can be used for the insulating layer 250 will be mainly described. The same materials as those that can be used for the insulating layer 250 can also be used for the insulating layer 255. The insulating layer 255 can use the same materials as or different materials from the insulating layer 250.

[0184] The insulating layer 250 preferably has a function of capturing and fixing hydrogen. Thereby, the hydrogen concentration in the channel formation region of the oxide layer 230A can be reduced. Therefore, V O H in the channel formation region can be reduced to make the channel formation region i-type or substantially i-type.

[0185] When the insulating layer 250 has a stacked structure, the layer in contact with the oxide layer 230A preferably has a function of capturing and fixing hydrogen.

[0186] As the material of the insulating layer having a function of capturing and fixing hydrogen, metal oxides having an amorphous structure can be cited. For example, metal oxides such as magnesium oxide or oxides containing one or both of aluminum and hafnium are preferably used. The above-mentioned metal oxides having an amorphous structure sometimes have the following properties: oxygen atoms have dangling bonds and capture and fix hydrogen by these dangling bonds. That is to say, it can be said that the ability of metal oxides having an amorphous structure to capture and fix hydrogen is high.

[0187] In addition, the insulating layer 250 preferably uses a high dielectric constant (high-k) material. As an example of the high-k material, there is an oxide containing one or both of aluminum and hafnium. When a high-k material is used as the insulating layer 250, the gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the gate insulating layer. In addition, the equivalent oxide thickness (EOT) of the insulating layer used as the gate insulating layer can be reduced.

[0188] Therefore, as the layer in the insulating layer 250 in contact with the oxide layer 230A, an oxide containing one or both of aluminum and hafnium is preferably used, more preferably an oxide having an amorphous structure and containing one or both of aluminum and hafnium, and further preferably amorphous alumina. In the present embodiment, as the layer in the insulating layer 250 in contact with the oxide layer 230A, alumina is used. At this time, the layer in the insulating layer 250 in contact with the oxide layer 230A is an insulating layer containing at least oxygen and aluminum. In addition, this alumina has an amorphous structure. At this time, the layer in the insulating layer 250 in contact with the oxide layer 230A has an amorphous structure.

[0189] Furthermore, the insulating layer 250 may also include an insulating layer having a thermally stable structure such as silicon oxide or silicon oxynitride.

[0190] In addition, the insulating layer 250 may also include an insulating layer having a thermally stable structure between a pair of insulating layers having the function of capturing and fixing hydrogen.

[0191] In addition, the insulating layer 250 preferably includes an oxygen barrier insulating layer. Thereby, oxidation of the conductive layer 242A, the conductive layer 242B, the conductive layer 260, etc. can be suppressed. When the insulating layer 250 has a laminated structure, the layers in contact with the conductive layer 242A and the conductive layer 242B and the layer in contact with the conductive layer 260 are preferably oxygen barrier insulating layers.

[0192] Note that in this specification, etc., a barrier insulating layer refers to an insulating layer having barrier properties. In this specification, etc., barrier properties refer to the function of suppressing the diffusion of the corresponding substance (it can also be said to have low permeability). Or, it refers to the function of capturing and fixing the corresponding substance (also called gettering).

[0193] As materials for the oxygen barrier insulating layer, for example, oxides containing one or both of aluminum and hafnium, magnesium oxide, gallium oxide, silicon nitride, and silicon oxynitride can be cited. In addition, as oxides containing one or both of aluminum and hafnium, for example, aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate), and oxides containing hafnium and silicon (hafnium silicate) can be cited.

[0194] The layer of the insulating layer 250 in contact with the conductive layer 242A and the conductive layer 242B is preferably at least less permeable to oxygen than the insulating layer 280. When this layer has oxygen barrier properties, oxidation of the sides of the conductive layer 242A and the conductive layer 242B can be suppressed, and an oxide film can be formed on these sides. Therefore, a decrease in the on-state current or a decrease in the field-effect mobility of the transistor 200 can be suppressed.

[0195] As Figure 3C and Figure 3D shown, the insulating layer 250 is disposed in contact with the sides of the insulating layer 220, the insulating layer 222A, the insulating layer 224A, and the top and side surfaces of the oxide layer 230A. By making the layers of the insulating layer 250 in contact with them have oxygen barrier properties, oxygen detachment from the channel formation region of the oxide layer 230A during heat treatment, etc. can be suppressed. Therefore, formation of oxygen vacancies in the oxide layer 230A can be suppressed. In addition, even if the insulating layer 280 contains too much oxygen, excessive supply of this oxygen to the oxide layer 230A can be suppressed, and an appropriate amount of oxygen can be supplied to the oxide layer 230A through the insulating layer 250. Therefore, over-oxidation of the source region and the drain region of the oxide layer 230A can be prevented, and a decrease in the on-state current and a decrease in the field-effect mobility of the transistor 200 can be suppressed.

[0196] The thickness of the insulating layer 250 is preferably 0.1 nm or more and 30 nm or less, more preferably 0.1 nm or more and 20 nm or less, still more preferably 0.1 nm or more and 10 nm or less, even more preferably 0.1 nm or more and 5.0 nm or less, further preferably 0.5 nm or more and 5.0 nm or less, still further preferably 1.0 nm or more and less than 5.0 nm, and even further preferably 1.0 nm or more and 3.0 nm or less.

[0197] In order to reduce the thickness of the insulating layer 250 as described above, it is preferable to perform deposition by an atomic layer deposition (ALD) method. The ALD method includes a thermal ALD method in which only thermal energy is used to react a precursor and a reactant, and a PEALD (Plasma Enhanced ALD) method in which a reactant excited by plasma is used. In the PEALD method, deposition can be performed at a lower temperature by using plasma, so it is sometimes preferable.

[0198] The ALD method can deposit atoms layer by layer, and thus has effects such as being able to deposit an extremely thin film, being able to deposit on a structure with a high aspect ratio, being able to deposit with fewer defects such as pinholes, being able to perform deposition with high coverage, and being able to perform deposition at a low temperature. Therefore, the insulating layer 250 can be deposited with high coverage and the above-mentioned smaller thickness on the side surfaces of openings formed in the insulating layer 280 and the like, and the side ends of the conductive layers 242A and 242B.

[0199] The precursor used in the ALD method sometimes contains carbon or the like. Therefore, the film formed by the ALD method sometimes contains more impurities such as carbon than the film formed by other deposition methods. In addition, the quantification of impurities can be performed by secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).

[0200] <Insulating layers 241 and 275>

[0201] When the insulating layer 275 is an oxygen barrier insulating layer, oxidation of the conductive layers 242A, 242B, and 242C can be suppressed, so it is preferable. Similarly, when the insulating layer 241 is an oxygen barrier insulating layer, oxidation of the conductive layers 240A to 240G can be suppressed, so it is preferable.

[0202] Regarding the oxygen barrier insulating layer, reference can be made to the description of the insulating layer 250.

[0203] In addition, when the insulating layer 275 is a hydrogen-blocking insulating layer, a decrease in the hydrogen concentration in the source region and the drain region of the oxide layer 230A can be suppressed, which is therefore preferable.

[0204] Examples of materials for the hydrogen-blocking insulating layer include oxides such as alumina, hafnium oxide, tantalum oxide, and nitrides such as silicon nitride.

[0205] <Insulating layer 215, insulating layer 220, insulating layer 222, insulating layer 282, and insulating layer 283>

[0206] In order to suppress hydrogen from mixing into the transistors 100 and 200, it is preferable to use, as one or both of the insulating layer covering the upper side of the transistors 100 and 200 and the insulating layer located on the lower side, an insulating layer having a function of suppressing hydrogen diffusion. Therefore, at least one of the insulating layers 215, 220, and 222 (insulating layers 222A and 222B) located on the lower side of the transistors 100 and 200 is preferably an insulating layer having a function of suppressing hydrogen diffusion. In addition, at least one of the insulating layers 282 and 283 covering the upper side of the transistors 100 and 200 is preferably an insulating layer having a function of suppressing hydrogen diffusion.

[0207] At least one of the insulating layers 215, 220, 222, 282, and 283 is preferably used as a barrier insulating layer that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or above the transistors into the transistors. Therefore, at least one of the insulating layers 215, 220, 222, 282, and 283 preferably contains an insulating material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (not easily allowing the above impurities to pass through). In addition, it preferably includes an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (not easily allowing the above oxygen to pass through).

[0208] Preferably, all of the insulating layers 215, 220, 222, 282, and 283 include an insulating layer having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, alumina, magnesia, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and zirconium (hafnium zirconium oxide), gallium oxide, silicon nitride, or silicon oxynitride can be used. For example, silicon nitride having a higher hydrogen-blocking property is preferably used as the insulating layers 283 and 220. In addition, for example, the insulating layer 282 preferably contains alumina, magnesia, etc. having a high ability to capture and fix hydrogen. In addition, for example, the insulating layer 222 preferably uses hafnium oxide, etc., which has a high ability to capture or fix hydrogen and is a high dielectric constant (high-k) material.

[0209] By adopting such a structure, it is possible to suppress the diffusion of impurities such as water and hydrogen from the interlayer insulating film disposed above the insulating layer 283 or the like to the transistor. In addition, it is possible to suppress the diffusion of impurities such as water and hydrogen from the interlayer insulating film disposed below the insulating layer 220 or the like to the transistor. Further, hydrogen in the insulating layer 280, the insulating layer 224, the insulating layer 250, etc. can be captured or fixed to the insulating layer 282 or the insulating layer 222. In addition, by providing the insulating layer 282 and the insulating layer 283, it is possible to suppress the diffusion of oxygen contained in the insulating layer 280 or the like to above the transistor. In addition, by providing the insulating layer 222 and the insulating layer 220, it is possible to suppress the diffusion of oxygen contained in the insulating layer 224 or the like to below the transistor. Thus, by adopting a structure in which the transistor is surrounded by insulating layers having functions of suppressing the diffusion of impurities such as water and hydrogen and oxygen, the diffusion of excess oxygen and hydrogen to the oxide semiconductor can be reduced. Thereby, improvement in the electrical characteristics and reliability of the semiconductor device can be achieved.

[0210] <Insulating layers 224A and 224B>

[0211] The insulating layers 224A and 224B can be formed using the same process and the same material. Since the insulating layer 224A is in contact with the oxide layer 230A, it is preferably an oxide. Similarly, since the insulating layer 224B is in contact with the oxide layer 235, it is preferably an oxide. For example, the insulating layers 224A and 224B preferably contain silicon oxide or silicon oxynitride. Thereby, oxygen can be supplied from the insulating layer 224A to the oxide layer 230A to reduce oxygen vacancies. Similarly, oxygen can be supplied from the insulating layer 224B to the oxide layer 235 to reduce oxygen vacancies.

[0212] Similar to the oxide layer that will become the oxide layer 230A, it is preferable to process the insulating layer that will become the insulating layer 224A into an island shape. Thereby, when a plurality of transistors 200 are provided, each transistor 200 includes an insulating layer 224A having substantially the same size. Therefore, the amount of oxygen supplied from the insulating layer 224A to the oxide layer 230A in each transistor 200 is substantially equal. Thereby, it is possible to suppress non-uniformity in the electrical characteristics of the transistors 200 within the substrate surface. Note that this is not restrictive, and a structure in which a pattern of the insulating layer 224 is not formed, similar to the insulating layer 220, may also be adopted.

[0213] <Insulating layers 216, 280, and 284>

[0214] The dielectric constants of the insulating layer 216, the insulating layer 280, and the insulating layer 284 are preferably lower than that of the insulating layer 222. By using a material having a low dielectric constant for the interlayer film, the parasitic capacitance generated between wirings can be reduced.

[0215] For example, the insulating layer 216, the insulating layer 280, and the insulating layer 284 preferably include one or more of silicon oxide, silicon oxynitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon- and nitrogen-added silicon oxide, and porous silicon oxide, respectively.

[0216] In particular, silicon oxide and silicon oxynitride have thermal stability, so they are preferred. Specifically, materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are preferred because they easily form regions containing oxygen that dissociates upon heating.

[0217] In addition, the top surfaces of the insulating layer 216, the insulating layer 280, and the insulating layer 284 may also be planarized.

[0218] The concentration of impurities such as water and hydrogen in the insulating layer 280 is preferably reduced. For example, silicon-containing oxides such as silicon oxide and silicon oxynitride are preferably used as the insulating layer 280.

[0219] <Conductive layers 205A, 205B, and 242A to 242C>

[0220] Each of the conductive layers 205A, 205B, and 242A to 242C may have a single-layer structure or a stacked structure. The conductive layers 205A and 205B may be formed using the same process and the same material. The conductive layers 242A to 242C may be formed using the same process and the same material.

[0221] Examples of materials that can be used for the conductive layers 205A, 205B, and 242A to 242C include one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals as components. Low-resistance conductive materials containing one or more of copper, silver, gold, and aluminum can be respectively applied to the conductive layers 205A, 205B, and 242A to 242C. Among them, copper or aluminum has particular advantages in mass production, so they are preferred.

[0222] Since the conductive layers 205B and 242A to 242C are conductive layers in contact with the oxide layer, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, an oxide conductive material, or a conductive material having a function of suppressing oxygen diffusion. Examples of such a conductive material include a conductive material containing nitrogen and a conductive material containing oxygen. Thereby, a decrease in the conductivity of the conductive layers 205B and 242A to 242C can be suppressed.

[0223] The conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C can all use an oxide conductor. As the oxide conductor, for example, indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also referred to as ITSO), zinc oxide doped with gallium, and In-Ga-Zn oxide can be cited. In particular, a conductive oxide containing indium is preferably used because of its high conductivity.

[0224] Oxygen vacancies are formed in a metal oxide having semiconductor characteristics, and hydrogen is added to the oxygen vacancies to form donor energy levels near the conduction band. As a result, the conductivity of the metal oxide increases and it becomes a conductor. The metal oxide that becomes a conductor can be referred to as an oxide conductor.

[0225] As the conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C, a laminated structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy can also be adopted. By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.

[0226] As the conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be used. By using a Cu-X alloy film, it can be processed by a wet etching process, thereby suppressing the manufacturing cost.

[0227] The conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C preferably use, for example, titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel. These are conductive materials that are not easily oxidized or materials that maintain conductivity even when oxidized, so they are preferred. In addition, in the case where the conductive layer 205B and the conductive layers 242A to 242C have a laminated structure, it is preferable to use at least a conductive material that is not easily oxidized for the layer in contact with the oxide layer 230A or the oxide layer 230B.

[0228] The conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C can also use a nitride conductor. As the nitride conductor, for example, tantalum nitride and titanium nitride can be cited.

[0229] For example, the conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C may respectively have a single-layer structure of an oxide conductor film, a stacked structure of a metal film and an oxide conductor film, or a stacked structure of a metal film. As the oxide conductor film, for example, an ITSO film can be cited. As the metal film, for example, a single-layer structure of a tungsten film, a single-layer structure of a titanium film, a single-layer structure of a copper film, and a three-layer structure of a titanium film, an aluminum film, and a titanium film can be cited.

[0230] In addition, for example, it is preferable to use an ITSO film for the conductive layer 205A, the conductive layer 205B, and the conductive layers 242A to 242C.

[0231] In Figure 2B both the conductive layer 242A and the conductive layer 242B have a two-layer structure. The conductive layer 242A is a stacked film of the conductive layer 242a1 and the conductive layer 242a2 on the conductive layer 242a1, and the conductive layer 242B is a stacked film of the conductive layer 242b1 and the conductive layer 242b2 on the conductive layer 242b1. At this time, as the layers (the conductive layer 242a1 and the conductive layer 242b1) in contact with the metal oxide layer 230A, it is preferable to use a conductive material that is not easily oxidized or a conductive material having a function of suppressing oxygen diffusion. Thereby, a decrease in the conductivity of the conductive layer 242A and the conductive layer 242B can be suppressed. In addition, it is possible to suppress oxygen from being extracted from the oxide layer 230A to form an excessive amount of oxygen vacancies. Furthermore, by using a material that easily absorbs (extracts) hydrogen as the layers (the conductive layer 242a1 and the conductive layer 242b1) in contact with the oxide layer 230A, the hydrogen concentration of the oxide layer 230 can be reduced, which is preferable.

[0232] As the conductive layer 242a1 and the conductive layer 242b1, a metal nitride is preferably used. For example, a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, a nitride containing titanium and aluminum, etc. are preferably used. In one aspect of the present invention, a nitride containing tantalum is particularly preferably employed. In addition, for example, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. can also be used. These materials are conductive materials that are not easily oxidized or materials that maintain conductivity even when absorbing oxygen, so they are preferable.

[0233] For example, tantalum nitride or titanium nitride can be used as the conductive layer 242a1 and the conductive layer 242b1, and tungsten can be used as the conductive layer 242a2 and the conductive layer 242b2.

[0234] <Conductive layers 260 and 265>

[0235] Each of the conductive layer 260 and the conductive layer 265 can adopt either a single-layer structure or a laminated structure. As materials that can be used for the conductive layer 260 and the conductive layer 265, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals as components can be cited. A low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be applied to the conductive layer 260 and the conductive layer 265. Among them, copper or aluminum has particular advantages in mass production, and thus is preferred.

[0236] An oxide conductor can be used as the conductive layer 260 and the conductive layer 265. As the oxide conductor, the materials shown in the description of the conductive layer 205A and the like can be cited.

[0237] As the conductive layer 260 and the conductive layer 265, a laminated structure of a conductive film containing the above oxide conductor (metal oxide) and a conductive film containing a metal or an alloy can also be adopted. By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.

[0238] As the conductive layer 260 and the conductive layer 265, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be used. By using a Cu-X alloy film, it can be processed by a wet etching process, thereby suppressing the manufacturing cost.

[0239] In addition, as the conductive layer 260 and the conductive layer 265, a three-layer laminated structure of a titanium film, an aluminum film, and a titanium film is preferably used, for example.

[0240] Figure 2B An example in which the conductive layer 260 has a two-layer structure is shown. Figure 2B The shown conductive layer 260 includes a conductive layer 260a and a conductive layer 260b disposed on the conductive layer 260a. For example, it is preferred to dispose the conductive layer 260a so as to surround the bottom surface and the side surface of the conductive layer 260b. At this time, as the conductive layer 260a, a conductive material that is not easily oxidized or a conductive material having a function of suppressing oxygen diffusion is preferably used.

[0241] As the conductive layer 260a, a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules (N2O, NO, NO2, etc.), nitrogen oxide molecules, and copper atoms is preferably used. In addition, a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is preferably used.

[0242] When the conductive layer 260a has the function of suppressing oxygen diffusion, it is possible to suppress the decrease in conductivity caused by the oxidation of the conductive layer 260b by the oxygen contained in the insulating layer 280 or the like. As the conductive material having the function of suppressing oxygen diffusion, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferably used.

[0243] The conductive layer 260b is preferably a conductive layer with high conductivity. For example, the conductive layer 260b can use a conductive material mainly composed of tungsten, copper, or aluminum. In addition, the conductive layer 260b can have a laminated structure. For example, it can have a laminated structure of titanium or titanium nitride and the above conductive material.

[0244] In addition, the conductive layer 260 and the conductive layer 265 are formed self-aligned in such a manner as to be embedded in the openings formed in the insulating layer 280 or the like. By forming the conductive layer 260 in this way, the conductive layer 260 can be arranged to overlap the region between the conductive layer 242A and the conductive layer 242B without alignment. Similarly, the conductive layer 265 can be arranged at a specified position without alignment.

[0245] <Conductive layers 240A to 240G>

[0246] Each of the conductive layers 240A, 240B, 240C, 240D, 240E, 240F, and 240G can have a single-layer structure or a laminated structure.

[0247] As the layer in contact with the insulating layer 241 among the conductive layers 240A to 240G, a conductive material having the function of suppressing the permeation of impurities such as water and hydrogen is preferably used. For example, it can have a single-layer structure or a laminated structure using one or more of tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, and ruthenium oxide. Thereby, it is possible to suppress impurities such as water and hydrogen from mixing into the oxide layer 230A or the like through the conductive layers 240A to 240G.

[0248] In addition, since the conductive layers 240A to 240G are also used as wirings, a conductive layer with high conductivity is preferably used. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used.

[0249] The conductive layers 240A to 240G preferably have a two-layer structure of titanium nitride and tungsten, for example.

[0250] <Insulating layers 271A to 271C>

[0251] The insulating layers 271A, 271B, and 271C are inorganic insulating layers that are used as an etch stop layer and protect the conductive layers 242A, 242B, and 242C when processing the conductive films that will become the conductive layers 242A, 242B, and 242C. In addition, since the insulating layers 271A, 271B, and 271C are in contact with the conductive layers 242A, 242B, and 242C, they are preferably inorganic insulating layers that do not easily oxidize the conductive layers 242A, 242B, and 242C. For example, the insulating layers 271A, 271B, and 271C preferably have a two-layer structure, and preferably use a nitride insulating film (such as silicon nitride or silicon oxynitride) as the layer in contact with the conductive layers 242A, 242B, and 242C, and form an oxide insulating film as the etch stop layer on the nitride insulating film. As the oxide insulating film, for example, the oxide insulating film that can be used for the insulating layer 250 can be used, and specifically, a silicon oxide film can be cited.

[0252] [Structural Example 2]

[0253] Figure 4A Shows a top view of the transistor 100, Figure 4B Shows a top view of the transistor 200, Figure 4C Shows a cross-sectional view of the transistor 100 and the transistor 200. Figure 4C It can also be said to be a cross-sectional view in the channel length direction of the transistor 200. Figure 5A and Figure 5B Shows a cross-sectional view of a modified example of the transistor 100. Figure 5C and Figure 5D Shows a cross-sectional view in the channel width direction of the transistor 200.

[0254] In Structural Example 1, an example is shown in which the size in plan view of the opening provided in the conductive layer 242C and the insulating layer 271C is larger than the size in plan view of the opening provided in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, and the oxide layer 230B. Structural Example 2 shows an example in which the size in plan view of the opening provided in the conductive layer 242C and the insulating layer 271C is the same as or substantially the same as the size in plan view of the opening provided in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, and the oxide layer 230B.

[0255] In Figure 4C the conductive layer 242C contacts the top surface of the oxide layer 230B, while the oxide layer 235 does not contact the top surface of the oxide layer 230B. The oxide layer 235 contacts the side surface of the conductive layer 242C and the side surface of the oxide layer 230B.

[0256] In the semiconductor device shown in Structural Example 2, openings can be formed in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C all at once (without other processes in between), so misalignment of the openings formed in each layer can be prevented and the manufacturing process can be simplified.

[0257] Here, Figure 4C and Figure 5A the conductive layer 205B shown has a recess at a position overlapping with the opening. Alternatively, as Figure 5B shown, the conductive layer 205B may not have a recess.

[0258] In Figure 5B , the region of the oxide layer 235 in contact with the side surface of the insulating layer 224B overlaps with the conductive layer 265. The region of the oxide layer 235 in contact with the side surface of the insulating layer 224B is used as the channel formation region of the transistor 100. Therefore, an oxide insulating film is preferably used as the insulating layer 224B.

[0259] In addition, in Figure 4C , the region of the oxide layer 235 in contact with the side surface of the insulating layer 224B and the region in contact with the side surface of the insulating layer 222B overlap with the conductive layer 265 (opposite to the conductive layer 265), so the bias region can be reduced compared to the structure shown in Figure 5B , so it is preferable. Similarly, in Figure 5A , the region of the oxide layer 235 in contact with the side surface of the insulating layer 220 also overlaps with the conductive layer 265 (opposite to the conductive layer 265), so the bias region can be reduced compared to the structure shown in Figure 4C , so it is preferable. Thereby, a decrease in the field-effect mobility due to the bias region can be suppressed.

[0260] Note that Figure 4B , Figure 4C , Figure 5C and Figure 5D the structure of the transistor 200 shown is the same as that of Structural Example 1.

[0261] As described above, the semiconductor device of the present embodiment includes transistors of at least two structures formed by sharing partial processes on the same plane. As the transistor required to have a large on-state current, a vertical transistor with an extremely small channel length is used. On the other hand, as the transistor required to have high saturation characteristics, a planar transistor with a large channel length and including a back gate is used. Thereby, a high-performance semiconductor device can be realized.

[0262] This embodiment can be appropriately combined with other embodiments. In addition, in this specification, when multiple structural examples are shown in one embodiment, the structural examples can be appropriately combined.

[0263] (Embodiment 2)

[0264] In this embodiment, a method for manufacturing a semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 6 to 13. Note that, regarding the materials and formation methods of the respective components, the description of parts that are the same as those described in the above Embodiment 1 may sometimes be omitted.

[0265] The thin films (such as insulating films, semiconductor films, and conductive films) constituting the semiconductor device can be formed by sputtering, chemical vapor deposition (CVD: Chemical Vapor Deposition), vacuum evaporation, pulsed laser deposition (PLD: Pulsed Laser Deposition), ALD, etc.

[0266] As sputtering methods, there are an RF sputtering method that uses a high-frequency power source as a sputtering power source, a DC sputtering method that uses a DC power source, and a pulsed DC sputtering method that changes the voltage applied to the electrodes in a pulsed manner. The RF sputtering method is mainly used when depositing insulating films, and the DC sputtering method is mainly used when depositing metal conductive films. In addition, the pulsed DC sputtering method is mainly used when depositing compounds such as oxides, nitrides, and carbides using a reactive sputtering method.

[0267] Note that the CVD method can be classified into a plasma-enhanced CVD (PECVD) method that uses plasma, a thermal CVD (TCVD: Thermal CVD) method that uses heat, a photo CVD (Photo CVD) method that uses light, etc. Furthermore, it can be classified into a metal CVD (MCVD: Metal CVD) method and a metal organic CVD (MOCVD: Metal Organic CVD) method according to the source gas used.

[0268] By using the plasma CVD method, a high-quality film can be obtained at a lower temperature. In addition, since plasma is not used, the thermal CVD method is a deposition method that can reduce plasma damage to the object to be processed. For example, wirings, electrodes, elements (such as transistors and capacitors) included in a semiconductor device sometimes generate charge accumulation due to receiving charges from the plasma. At this time, the wirings, electrodes, elements, etc. included in the semiconductor device may be damaged due to the accumulated charges. On the other hand, since the above-mentioned plasma damage does not occur in the thermal CVD method that does not use plasma, the yield of the semiconductor device can be improved. In addition, in the thermal CVD method, plasma damage during deposition does not occur, so a film with fewer defects can be obtained.

[0269] As the ALD method, there are a thermal ALD method that uses only heat energy to react precursors and reactants, a PEALD method that uses reactants excited by plasma, etc.

[0270] The CVD method and the ALD method are different from the sputtering method in which particles released from a target or the like are deposited. Therefore, the CVD method and the ALD method are deposition methods that are not easily affected by the shape of the object to be processed and have high step coverage. In particular, the ALD method has high step coverage and excellent thickness uniformity, so the ALD method is suitable for covering the surface of openings with a high aspect ratio, etc. However, since the deposition rate of the ALD method is relatively slow, it is sometimes preferably used in combination with other deposition methods such as the CVD method with a high deposition rate.

[0271] In addition, when using the CVD method, a film with an arbitrary composition can be deposited by adjusting the flow rate ratio of the source gases. For example, when using the CVD method, a film with a continuously changing composition can be deposited by changing the flow rate ratio of the source gases during deposition. When depositing while changing the flow rate ratio of the source gases, since the time required for transferring or adjusting the pressure is not required, the deposition time can be shortened compared with the case of depositing using multiple deposition chambers. Therefore, the productivity of semiconductor devices can sometimes be improved.

[0272] When using the ALD method, a film with an arbitrary composition can be deposited by simultaneously introducing different types of precursors. Or, when introducing different types of precursors, a film with an arbitrary composition can be deposited by controlling the number of cycles of each precursor.

[0273] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the semiconductor device can be formed by wet deposition methods such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife method, slot die coating, roll coating, curtain coating, or blade coating method.

[0274] In addition, when processing the thin films constituting the semiconductor device, photolithography or the like can be used. Or, the thin films can be processed by nanoimprinting, sandblasting, lift-off, etc. In addition, island-shaped thin films can be directly formed by a deposition method using a masking mask such as a metal mask.

[0275] Typically, there are the following two photolithography methods. One is a method of forming a resist mask on the thin film to be processed, processing the thin film by etching or the like, and removing the resist mask. The other is a method of depositing a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape.

[0276] In photolithography, as the light for exposure, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these lights can be used. Additionally, ultraviolet light, KrF laser, ArF laser, etc. can also be used. Furthermore, immersion exposure technology can also be utilized for exposure. Moreover, as the light for exposure, extreme ultraviolet (EUV) light or X-rays can also be used. In addition, instead of the light for exposure, an electron beam can also be used. When using extreme ultraviolet light, X-rays, or an electron beam, extremely fine processing can be performed, so it is preferred. Note that when performing exposure by scanning with a light beam such as an electron beam, a photomask is not required.

[0277] As an etching method for the thin film, a dry etching method, a wet etching method, a sandblasting method, etc. can be utilized.

[0278] [Example of manufacturing method 1]

[0279] First, an insulating layer 216 is formed on the insulating layer 215, and an opening reaching the insulating layer 215 is formed in the insulating layer 216. Next, a conductive film that will become the conductive layer 205A and the conductive layer 205B is formed on the insulating layer 215 and the insulating layer 216. And by performing CMP processing, a part of this conductive film is removed to expose the insulating layer 216. As a result, the conductive layer 205A and the conductive layer 205B can be provided in the opening of the insulating layer 216 ( Figure 6A ).

[0280] Each of the insulating layer 215 and the insulating layer 216 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. Since it is not necessary to use a molecule containing hydrogen in the deposition gas when using the sputtering method, the hydrogen concentration in the insulating layer can be reduced, so it is preferred.

[0281] The insulating layer 215 and the insulating layer 216 are preferably continuously deposited in a manner that does not expose them to the atmosphere. For example, it is preferred to use a deposition apparatus of a multi-chamber type. Thereby, the hydrogen in the films of the insulating layer 215 and the insulating layer 216 can be reduced, and the hydrogen incorporation into the films between the respective deposition processes can be decreased.

[0282] In addition, when forming an opening in the insulating layer 216, a recess can also be formed in the insulating layer 215.

[0283] The conductive film that will become the conductive layer 205A and the conductive layer 205B can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or a plating method, etc.

[0284] In addition, when performing CMP processing, a part of the insulating layer 216 can also be removed.

[0285] Next, an insulating layer 220, an insulating layer 222, an insulating layer 224, an oxide layer 230, a conductive layer 242, and an insulating layer 271 are formed on the conductive layer 205A, the conductive layer 205B, and the insulating layer 216( Figure 6A ).

[0286] In the present embodiment, since island-shaped insulating layers 222A and 222B are formed on the insulating layer 220, the insulating layer 222 is preferably a film having a large etching selectivity ratio with respect to the insulating layer 220. For example, as one of the insulating layer 220 and the insulating layer 222, silicon nitride or silicon oxynitride is preferably used. In addition, as the other of the insulating layer 220 and the insulating layer 222, alumina, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or hafnium zirconium oxide is preferably used.

[0287] Note that when the insulating layers 222A and 222B are not formed in an island shape, that is, when island-shaped insulating layers 224A and 224B are formed on the insulating layer 220 and the insulating layer 222, the insulating layer 224 is preferably a film having a large etching selectivity ratio with respect to the insulating layer 222.

[0288] Each of the insulating layer 220, the insulating layer 222, and the insulating layer 224 can be deposited, for example, by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method.

[0289] The insulating layer 224 is preferably formed by a sputtering method. Thus, since it is not necessary to use a molecule containing hydrogen in the deposition gas, the hydrogen concentration in the insulating layer 224 can be reduced. Since the insulating layer 224 is provided in contact with the oxide layer 230, the hydrogen concentration of the insulating layer 224 is preferably reduced.

[0290] Specifically, preferably, silicon nitride or silicon oxynitride is used as the insulating layer 220, alumina, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or hafnium zirconium oxide is used as the insulating layer 222, and silicon oxide or silicon oxynitride is used as the insulating layer 224.

[0291] In addition, a heat treatment can also be performed before depositing the insulating layer 224. This heat treatment can also be performed under reduced pressure, and the insulating layer 224 can be continuously deposited without being exposed to the atmosphere. By performing this treatment, moisture and hydrogen adsorbed on the surface of the insulating layer 222 can be removed, and the moisture concentration and hydrogen concentration of the insulating layer 222 can be reduced. Here, when the insulating layer 220 is provided in contact with the bottom surface of the insulating layer 222, it is possible to prevent impurities such as moisture or hydrogen from entering from below the insulating layer 220 due to this heat treatment. The temperature of the heat treatment is preferably 100°C or higher and 400°C or lower. In the present embodiment, the temperature of this heat treatment is set to 250°C.

[0292] The oxide layer 230 can be deposited, for example, by sputtering, CVD, MBE, PLD, ALD, or the like.

[0293] For example, in the case of depositing the oxide layer 230 by sputtering, oxygen or a mixed gas of oxygen and a noble gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the deposited oxide film can be increased. In addition, in the case of forming and depositing the oxide layer 230 by sputtering, an In-M-Zn oxide target or the like can be used.

[0294] When depositing the oxide layer 230, sometimes a part of the oxygen contained in the sputtering gas is supplied to the insulating layer 224. Therefore, the ratio of oxygen contained in the sputtering gas is preferably 70% or more, more preferably 80% or more, and further preferably 100%.

[0295] In the case of forming the oxide layer 230 by sputtering, when the ratio of oxygen contained in the sputtering gas is set to be more than 30% and 100% or less, preferably 70% or more and 100% or less and deposition is performed, an oxygen-excess type oxide semiconductor is formed. Using an oxygen-excess type oxide semiconductor for a transistor in a channel formation region can provide relatively high reliability. Note that one embodiment of the present invention is not limited thereto. When the ratio of oxygen contained in the sputtering gas is set to be 1% or more and 30% or less, preferably 5% or more and 20% or less and deposition is performed, an oxygen-deficient type oxide semiconductor is formed. Using an oxygen-deficient type oxide semiconductor for a transistor in a channel formation region can have a high field-effect mobility. In addition, by performing deposition while heating the substrate, the crystallinity of the oxide layer can be improved.

[0296] In addition, the oxide layer 230 is preferably deposited by ALD. By depositing the oxide layer 230 by ALD, a thinner film can be deposited with high controllability.

[0297] Note that the insulating layer 224 and the oxide layer 230 are preferably deposited in a manner that does not expose them to the atmosphere. For example, it is preferable to use a deposition apparatus with a multi-chamber system. Thereby, the hydrogen mixing into the insulating layer 224 and the oxide layer 230 during each deposition process can be reduced.

[0298] Next, a heat treatment is preferably performed. The heat treatment may be performed within a temperature range in which the oxide layer 230 does not undergo polycrystallization. The temperature of the heat treatment is preferably 100°C or more and 650°C or less, more preferably 250°C or more and 600°C or less, and further preferably 350°C or more and 550°C or less.

[0299] The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or an atmosphere containing an oxidizing gas of 10 ppm or more, 1% or more, or 10% or more. For example, when the heat treatment is carried out in a mixed atmosphere of nitrogen gas and oxygen gas, the ratio of oxygen gas is preferably set to about 20%. The heat treatment can also be carried out under a reduced pressure state. Alternatively, the heat treatment can be carried out in an atmosphere of nitrogen gas or inert gas, and then, in order to replenish the oxygen that has escaped, the heat treatment is carried out in an atmosphere containing an oxidizing gas of 10 ppm or more, 1% or more, or 10% or more.

[0300] In addition, the gas used in the above heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the above heat treatment is preferably 1 ppb or less, more preferably 0.1 ppb or less, and further preferably 0.05 ppb or less. By carrying out the heat treatment using a highly purified gas, it is possible to prevent, as much as possible, moisture and the like from being absorbed by the oxide layer 230 and the like.

[0301] In the present embodiment, as the heat treatment, a treatment is carried out for 1 hour under the conditions of a flow ratio of nitrogen gas to oxygen gas of 4:1 and a temperature of 450°C. By such a heat treatment containing oxygen gas, impurities such as carbon, water, and hydrogen in the oxide layer 230 can be reduced. By reducing the impurities in the film in this way, the crystallinity of the oxide layer 230 is improved, and a denser structure with a higher density can be achieved. Therefore, the crystalline region in the oxide layer 230 can be increased, and the in-plane non-uniformity of the crystalline region in the oxide layer 230 can be reduced. Therefore, the in-plane non-uniformity of the electrical characteristics of the transistor can be reduced.

[0302] In addition, by carrying out the heat treatment, hydrogen in the insulating layer 216, the insulating layer 224, and the oxide layer 230 is transferred to the insulating layer 222 and absorbed by the insulating layer 222. In other words, hydrogen in the insulating layer 216, the insulating layer 224, and the oxide layer 230 diffuses into the insulating layer 222. Therefore, although the hydrogen concentration in the insulating layer 222 increases, the hydrogen concentrations in the insulating layer 216, the insulating layer 224, and the oxide layer 230 all decrease.

[0303] In particular, the insulating layer 224 has a portion that serves as the gate insulating layer of the transistor 200, and the oxide layer 230 has a portion that serves as the channel formation region of the transistor 200. The transistor 200 formed using the insulating layer 224 and the oxide layer 230 with reduced hydrogen concentration has excellent reliability, and thus is preferable.

[0304] After depositing the oxide layer 230, the conductive layer 242 is deposited in contact with and on the oxide layer 230 without an etching process or the like, whereby the top surface of the oxide layer 230 can be protected by the conductive layer 242. Thereby, diffusion of impurities into the oxide layer 230 constituting the transistor 200 can be suppressed, and thus the electrical characteristics and reliability of the semiconductor device can be improved.

[0305] The conductive layer 242 can be deposited by a sputtering method, a CVD method, an MBE method, a PLD method, an electroplating method, or an ALD method.

[0306] In addition, a heat treatment can be performed before depositing the conductive layer 242. This heat treatment can also be performed under reduced pressure, and the conductive layer 242 can be continuously deposited without being exposed to the atmosphere. By performing this treatment, moisture and hydrogen adsorbed on the surface of the oxide layer 230 can be removed, and the moisture concentration and hydrogen concentration in the oxide layer 230 can be reduced. The temperature of the heat treatment is preferably 100°C or higher and 400°C or lower. In the present embodiment, the temperature of this heat treatment is set to 250°C.

[0307] The insulating layer 271 can be deposited by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method or the like.

[0308] Alternatively, a heat treatment can be performed before depositing the insulating layer 271. This heat treatment can also be performed under reduced pressure, and the insulating layer 271 can be continuously deposited without being exposed to the atmosphere. By performing this treatment, moisture and hydrogen adsorbed on the surface of the conductive layer 242 can be removed, and the moisture concentration and hydrogen concentration in the conductive layer 242 can be reduced. The temperature of the heat treatment is preferably 100°C or higher and 400°C or lower. In the present embodiment, the temperature of this heat treatment is set to 250°C.

[0309] Next, the insulating layer 222, the insulating layer 224, the oxide layer 230, the conductive layer 242, and the insulating layer 271 are processed into island shapes by a lithography technique to form an insulating layer 222A, an insulating layer 222B, an insulating layer 224A, an insulating layer 224B, an oxide layer 230A, an oxide layer 230B, a conductive layer 242C, a conductive layer 242D, an insulating layer 271C, and an insulating layer 271D( Figure 6B ). Note that where these portions are not provided, the insulating layer 220 is exposed.

[0310] Specifically, a stacked structure of an insulating layer 222A, an insulating layer 224A, an oxide layer 230A, a conductive layer 242D, and an insulating layer 271D is formed in such a manner that at least a part thereof overlaps with the conductive layer 205A. In addition, a stacked structure of an insulating layer 222B, an insulating layer 224B, an oxide layer 230B, a conductive layer 242C, and an insulating layer 271C is formed in such a manner that at least a part thereof overlaps with the conductive layer 205B. Furthermore, an opening reaching the insulating layer 220 is provided at a position where the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C overlap with the conductive layer 205B.

[0311] Figure 6B The processes of forming the island-shaped processing and the process of providing the opening in can be performed independently of each other, and there is no limitation on the order thereof. In addition, etching may be performed after exposure using a mask for processing into a square island shape and exposure using a mask for providing a circular opening, thereby simultaneously performing the island-shaped processing and the formation of the opening. In addition, exposure using a multi-level gray-scale mask (typically a halftone mask or a gray-scale mask) may be used.

[0312] Preferably, the insulating layer 222, the insulating layer 224, the oxide layer 230, the conductive layer 242, and the insulating layer 271 are processed into islands at one time. At this time, the side end portion of the conductive layer 242D preferably substantially coincides with the side end portion of the oxide layer 230A. Furthermore, the side end portion of the insulating layer 224A preferably substantially coincides with the side end portion of the oxide layer 230A. Furthermore, the side end portion of the insulating layer 222A preferably substantially coincides with the side end portion of the oxide layer 230A. Furthermore, the side end portion of the insulating layer 271D preferably substantially coincides with the side end portion of the conductive layer 242D. Similarly, the side end portion of the conductive layer 242C preferably substantially coincides with the side end portion of the oxide layer 230B. Furthermore, the side end portion of the insulating layer 224B preferably substantially coincides with the side end portion of the oxide layer 230B. Furthermore, the side end portion of the insulating layer 222B preferably substantially coincides with the side end portion of the oxide layer 230B. Furthermore, the side end portion of the insulating layer 271C preferably substantially coincides with the side end portion of the conductive layer 242C. By adopting the above structure, the number of processes of the semiconductor device according to one aspect of the present invention can be reduced. Thereby, a manufacturing method of a semiconductor device with good productivity can be provided.

[0313] By processing the insulating layer 224 into an island shape, the insulating layer 275 can be provided in a subsequent process in contact with the side surface of the insulating layer 224A and the top surface of the insulating layer 220. That is, the insulating layer 224A can be separated from the insulating layer 280 by the insulating layer 275. By adopting this structure, excessive impurities such as oxygen and hydrogen can be prevented from mixing into the oxide layer 230A from the insulating layer 280 through the insulating layer 224.

[0314] The above processing can be performed by dry etching or wet etching. Dry etching is preferred because it is suitable for fine processing.

[0315] The insulating layer 222 , the insulating layer 224 , the oxide layer 230 , the conductive layer 242 , and the insulating layer 271 may be processed under different conditions.

[0316] Note that in lithography, first, the resist is exposed through a mask. Then, a developer is used to remove or leave the exposed area to form a resist mask. Then, etching is performed through the resist mask to process the conductive layer, semiconductor layer, or insulating layer into a desired shape. For example, a KrF excimer laser, ArF excimer laser, EUV (Extreme Ultraviolet) light, etc. can be used to expose the resist to form a resist mask. In addition, a liquid immersion technique in which the exposure is performed in a state where a liquid (for example, water) is filled between the substrate and the projection lens can also be used. In addition, an electron beam or an ion beam can also be used instead of the above-mentioned light. In addition, when an electron beam or an ion beam is used, a mask may sometimes not be used.

[0317] The resist mask that is unnecessary after processing can be removed by dry etching treatment such as ashing using oxygen plasma (hereinafter sometimes referred to as oxygen plasma treatment), wet etching treatment, dry etching treatment followed by wet etching treatment, or wet etching treatment followed by dry etching treatment.

[0318] Furthermore, a hard mask composed of an insulating layer or a conductive layer can also be used under the resist mask. When a hard mask is used, an insulating film or a conductive film that becomes a hard mask material can be formed on the insulating layer 271 and a resist mask can be formed thereon, and then the hard mask material can be etched to form a hard mask of a desired shape. The etching of the insulating layer 271 and the like can be performed after removing the resist mask or without removing the resist mask. In the case of the latter, the resist mask sometimes disappears during etching. The hard mask can be removed by etching after etching the oxide layer 230 and the like. On the other hand, when the hard mask material does not affect the subsequent process or can be used in the subsequent process, it is not necessarily necessary to remove the hard mask.

[0319] In addition, a SOC (Spin On Carbon) film and a SOG (Spin On Glass) film may be deposited between the workpiece and the resist mask. By using the SOC film and the SOG film as a mask, the adhesion of the resist mask can be improved and the durability of the mask pattern can be improved. For example, a SOC film, a SOG film, and a resist mask may be deposited sequentially on the workpiece to perform lithography.

[0320] As an etching gas for dry etching treatment, an etching gas containing a halogen can be used. Specifically, an etching gas containing one or more of fluorine, chlorine, and bromine can be used. As the etching gas, for example, a mixed gas of one or more of C4F6 gas, C5F6 gas, C4F8 gas, CF4 gas, SF6 gas, CHF3 gas, CH2F2 gas, Cl2 gas, BCl3 gas, SiCl4, and BBr3 gas, etc. can be used. In addition, oxygen gas, carbon dioxide gas, nitrogen gas, helium gas, argon gas, hydrogen gas, or hydrocarbon gas, etc. can be appropriately added to the above etching gas. In addition, depending on the object to be dry-etched, a gas containing a hydrocarbon gas or a hydrogen gas instead of a halogen gas can also be used as the etching gas. As the hydrocarbon for the etching gas, methane (CH4), ethane (C2H6), propane (C3H8), butane (C4H 10 ), ethylene (C2H4), propylene (C3H6), acetylene (C2H2), and propyne (C3H4), etc. can be used. The etching conditions can be appropriately set according to the etching object.

[0321] As a dry etching device, for example, a capacitively coupled plasma (CCP) etching device including parallel plate electrodes can be used. The capacitively coupled plasma etching device including parallel plate electrodes can also adopt a structure in which a high-frequency voltage is applied to one of the parallel plate electrodes. Or, a structure in which different multiple high-frequency voltages are applied to one of the parallel plate electrodes can also be adopted. Or, a structure in which high-frequency voltages with the same frequency are applied to each of the parallel plate electrodes can also be adopted. Or, a structure in which high-frequency voltages with different frequencies are applied to each of the parallel plate electrodes can also be adopted. Or, a dry etching device having a high-density plasma source can be used. For example, as a dry etching device having a high-density plasma source, an inductively coupled plasma (ICP) etching device, etc. can be used. The etching device can be appropriately set according to the etching object.

[0322] Next, an insulating layer 275 is formed on the insulating layer 220 in a manner that contacts the insulating layer 220 and covers the laminated structures of the insulating layer 222A, the insulating layer 224A, the oxide layer 230A, the conductive layer 242D, and the insulating layer 271D, and the laminated structures of the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C, and an insulating layer 280 is formed on the insulating layer 275( Figure 7A ).

[0323] As the insulating layer 280, it is preferable to form an insulating film that will become the insulating layer 280, and perform CMP processing on the insulating film to form an insulating film with a flat top surface.

[0324] The insulating layer 275 and the insulating layer 280 can each be deposited, for example, by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method.

[0325] For example, it is preferable to deposit silicon nitride by the PEALD method as the insulating layer 275. Alternatively, it is preferable to deposit aluminum oxide by the sputtering method as the insulating layer 275 and deposit silicon nitride by the PEALD method thereon. When the insulating layer 275 has the above structure, the function of suppressing the diffusion of impurities such as water and hydrogen and oxygen can be improved.

[0326] In this way, the oxide layer 230A and the conductive layer 242D can be covered by the insulating layer 275 having the function of suppressing oxygen diffusion. Thereby, it is possible to suppress oxygen from directly diffusing from the insulating layer 280 or the like into the insulating layer 222A, the insulating layer 224A, the oxide layer 230A, and the conductive layer 242D in the subsequent processes.

[0327] In addition, it is preferable to deposit silicon oxide by the sputtering method as the insulating layer 280. By depositing the insulating film that will become the insulating layer 280 by the sputtering method in an oxygen-containing atmosphere, an insulating layer 280 containing excess oxygen can be formed. By using a sputtering method that does not require a molecule containing hydrogen in the deposition gas, the hydrogen concentration in the insulating layer 280 can be reduced. In addition, heat treatment can also be performed before depositing the insulating film. The heat treatment can also be performed under reduced pressure, and the insulating film can be continuously deposited in a manner that does not expose it to the atmosphere. By performing this treatment, moisture and hydrogen adsorbed on the surface of the insulating layer 275 or the like can be removed, and the moisture concentration and hydrogen concentration in the oxide layer 230A and the insulating layer 224A can be reduced. The heat treatment can adopt the conditions of the above heat treatment.

[0328] Next, the conductive layer 242D, the insulating layer 271D, the insulating layer 275, and the insulating layer 280 are processed using lithography technology to form an opening that reaches the oxide layer 230A ( Figure 7B ). The opening that reaches the oxide layer 230A is provided in a region where the oxide layer 230A overlaps with the conductive layer 205A.

[0329] The above processing can use a dry etching method or a wet etching method. Since the processing using the dry etching method is suitable for microfabrication, it is preferable. In addition, anisotropic etching can be performed in the dry etching method, so the dry etching method is very suitable for forming an opening with a high aspect ratio. Regarding the conditions of the dry etching method and the dry etching apparatus, reference can be made to the previous description.

[0330] The processing of the conductive layer 242D, the insulating layer 271D, the insulating layer 275, and the insulating layer 280 can also be performed under mutually different conditions.

[0331] Through this processing, the conductive layer 242D is divided into the island-shaped conductive layer 242A and the island-shaped conductive layer 242B. Similarly, the insulating layer 271D is divided into the island-shaped insulating layer 271A and the island-shaped insulating layer 271B.

[0332] Since the width of the above-mentioned opening is reflected in the channel length of the transistor 200, it is preferably small. For example, the width of the above-mentioned opening is preferably 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less and 1 nm or more or 5 nm or more. Thus, in order to process the above-mentioned opening to be small, it is preferable to use a lithography technique using light with a short wavelength such as EUV light or an electron beam.

[0333] For example, an SOC film, an SOG film, and a resist mask can be sequentially deposited on the insulating layer 280 for lithography. A resist mask having an opening is formed using light with a short wavelength such as EUV light or an electron beam, and the SOG film, the SOC film, the insulating layer 280, the insulating layer 275, the insulating layer 271D, and the conductive layer 242D are processed using this resist mask.

[0334] Through the above etching process, impurities sometimes adhere to the top surface and side surfaces of the oxide layer 230A, the side surfaces of the conductive layers 242A and 242B, the side surfaces of the insulating layers 271A and 271B, the side surfaces of the insulating layer 275, the side surfaces of the insulating layer 280, etc. or diffuse into their interiors. A process for removing such impurities can be performed. In addition, a damaged region is sometimes formed on the surface of the oxide layer 230A due to the above dry etching. In addition, such a damaged region can also be removed. As such impurities, for example, impurities caused by the following components can be cited: components contained in the insulating layer 280, the insulating layer 275, the insulating layers 271A and 271B, the conductive layers 242A and 242B; components contained in the members of the apparatus used for forming the above-mentioned opening; and components contained in the gas or liquid used for etching. As such impurities, for example, hafnium, aluminum, silicon, tantalum, fluorine, chlorine, etc. can be cited.

[0335] In particular, impurities such as aluminum and silicon sometimes reduce the crystallinity of the oxide layer 230A. Therefore, on the surface of the oxide layer 230A and in its vicinity, it is preferable to remove impurities such as aluminum and silicon. In addition, it is preferable to reduce the concentration of such impurities. For example, the concentration of aluminum atoms on the surface of the oxide layer 230A and in its vicinity is preferably 5.0 atomic% or less, more preferably 2.0 atomic% or less, further preferably 1.5 atomic% or less, still further preferably 1.0 atomic% or less, and also preferably less than 0.3 atomic%.

[0336] In addition, due to impurities such as aluminum and silicon, the density of the crystal structure decreases in regions with low crystallinity of the oxide layer 230A, resulting in a large amount of V O H, and the transistor 200 is easily turned on constantly. Therefore, it is preferable to reduce or remove regions with low crystallinity in the oxide layer 230A.

[0337] In contrast, the oxide layer 230A preferably has a layered CAAC structure. In particular, it is preferable that the lower end portion of the drain of the oxide layer 230A also has a CAAC structure. Here, in the transistor 200, the conductive layer 242A or the conductive layer 242B is preferably used as the drain. In other words, the oxide layer 230A near the lower end portion of the conductive layer 242A or the conductive layer 242B preferably has a CAAC structure. In this way, by removing the region with low crystallinity of the oxide layer 230A in the drain end portion that significantly affects the drain breakdown voltage and making it have a CAAC structure, the variation in the electrical characteristics of the transistor 200 can be further suppressed. In addition, the reliability of the transistor 200 can be further improved.

[0338] In order to remove impurities and the like attached to the surface of the oxide layer 230A in the above etching process, a washing process is performed. As the washing method, there are wet washing using a washing liquid or the like (which can also be called wet etching treatment), plasma treatment using plasma, washing using heat treatment, etc., and the above washings can also be appropriately combined.

[0339] For wet washing, an aqueous solution obtained by diluting one or more of ammonia water, oxalic acid, phosphoric acid, and hydrofluoric acid with carbonated water or pure water, pure water, carbonated water, etc. can be used. Alternatively, ultrasonic washing can be performed using the above aqueous solution, pure water, or carbonated water. In addition, the above washings can be appropriately combined.

[0340] Note that in this specification and the like, an aqueous solution obtained by diluting hydrofluoric acid with pure water is sometimes called dilute hydrofluoric acid, and an aqueous solution obtained by diluting ammonia water with pure water is called dilute ammonia water. In addition, the concentration, temperature, etc. of this aqueous solution are appropriately adjusted according to the impurities to be removed, the structure of the semiconductor device to be washed, etc. The ammonia concentration of dilute ammonia water is preferably set to 0.01% or more and 5% or less, and more preferably set to 0.1% or more and 0.5% or less. In addition, the hydrogen fluoride concentration of dilute hydrofluoric acid is preferably set to 0.01 ppm or more and 100 ppm or less, and more preferably set to 0.1 ppm or more and 10 ppm or less.

[0341] In addition, as ultrasonic washing, a frequency of 200 kHz or more is preferably used, and more preferably a frequency of 900 kHz or more. By using this frequency, the damage to the oxide layer 230A and the like can be reduced.

[0342] In addition, the above-described washing treatment can be performed multiple times, or the washing liquid can be changed for each washing treatment. For example, a treatment using dilute hydrofluoric acid or dilute ammonia water can be performed as the first washing treatment, and a treatment using pure water or carbonated water can be performed as the second washing treatment.

[0343] As the above-described washing treatment, in the present embodiment, wet washing is performed using dilute ammonia water. By performing this washing treatment, impurities adhering to the surface of the oxide layer 230A or the like or diffused into the inside thereof can be removed. In addition, the crystallinity of the oxide layer 230A can be improved.

[0344] In addition, a heat treatment can be performed after the above-described etching or the above-described washing. The temperature of the heat treatment is preferably 100°C or higher and 650°C or lower, more preferably 250°C or higher and 600°C or lower, further preferably 350°C or higher and 550°C or lower, and even more preferably 350°C or higher and 400°C or lower. The heat treatment is performed in a nitrogen gas or inert gas atmosphere or an atmosphere containing an oxidizing gas of 10 ppm or more, 1% or more, or 10% or more. For example, it is preferable to perform a treatment at a temperature of 350°C for 1 hour with a flow rate ratio of nitrogen gas to oxygen gas of 4:1. Thereby, oxygen can be supplied to the oxide layer 230A to reduce oxygen vacancies. In addition, by performing the above-described heat treatment, the crystallinity of the oxide layer 230A can be improved. Furthermore, by reacting the hydrogen remaining in the oxide layer 230A with the supplied oxygen, the hydrogen can be removed as H2O (dehydration). Thereby, it is possible to suppress the recombination of the hydrogen remaining in the oxide layer 230A with oxygen vacancies to form V O H. The heat treatment can also be performed under a reduced pressure state. Alternatively, the heat treatment can be performed in an oxygen atmosphere, and then the heat treatment can be continuously performed in a nitrogen atmosphere without being exposed to the atmosphere.

[0345] When the heat treatment is performed in a state where the conductive layer 242A and the conductive layer 242B are in contact with the oxide layer 230A, the sheet resistance of the regions of the oxide layer 230A overlapping with the conductive layer 242A and the regions overlapping with the conductive layer 242B sometimes decreases. In addition, the carrier concentration sometimes increases. Therefore, the regions of the oxide layer 230A overlapping with the conductive layer 242A and the regions overlapping with the conductive layer 242B can be self-aligned to have a low resistance. Similarly, by performing the heat treatment in a state where the conductive layer 242C is in contact with the oxide layer 230B, the oxide layer 230B can be made to have a low resistance.

[0346] Next, an insulating film that will become the insulating layer 250 is deposited in such a way as to embed in the above-described opening, and a conductive film that will become the conductive layer 260 is deposited on this insulating film. The insulating film and the conductive film are polished by CMP processing until the insulating layer 280 is exposed. That is, the portions of the insulating film and the conductive film that are exposed from the above-described opening are removed. Thereby, the insulating layer 250 and the conductive layer 260 are formed in the opening that overlaps with the conductive layer 205A( Figure 8 ). Thereby, the insulating layer 250 is provided in such a way as to contact the inner wall and the side surface of the opening that overlaps with the oxide layer 230A. In addition, the conductive layer 260 is disposed in such a way as to embed in the opening with the insulating layer 250 interposed therebetween. Thereby, the transistor 200 is formed.

[0347] The insulating film that will become the insulating layer 250 can be deposited, for example, by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This insulating film is preferably deposited by the ALD method. The insulating layer 250 is preferably formed thin, and it is necessary to make the thickness non-uniformity small. The ALD method is a deposition method in which a precursor and a reactant (for example, an oxidizing agent, etc.) are alternately introduced, and since the thickness can be adjusted according to the number of times this cycle is repeated, the thickness can be precisely adjusted. In addition, the insulating layer 250 needs to be deposited with high coverage on the bottom surface and the side surface of the opening. By using the ALD method, atomic layers of each layer can be deposited on the bottom surface and the side surface of the above-described opening, so the insulating layer 250 can be formed with high coverage in this opening.

[0348] When depositing the insulating film that will become the insulating layer 250 by the ALD method, ozone (O3), oxygen (O2), water (H2O), etc. can be used as the oxidizing agent. By using ozone (O3), oxygen (O2), etc. that do not contain hydrogen as the oxidizing agent, the hydrogen diffusing into the oxide layer 230A can be reduced.

[0349] As the insulating film that will become the insulating layer 250, for example, alumina can be deposited by thermal ALD method, silica can be deposited by PEALD method, and silicon nitride can be deposited by PEALD method to form a three-layer structure insulating film. Alternatively, hafnium oxide can be deposited by thermal ALD method between silica and silicon nitride to form a four-layer structure insulating film.

[0350] Preferably, the microwave treatment is performed in an oxygen-containing atmosphere after depositing the insulating film that will become the insulating layer 250. Here, the microwave treatment refers to, for example, a treatment using a device including a power source that generates high-density plasma with microwaves. In addition, in this specification and the like, microwaves refer to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less. Note that in the case where the insulating layer 250 has a laminated structure, the above microwave treatment is not necessarily performed after depositing all the layers. In the case of forming the above three-layer insulating film, the microwave treatment may also be performed after depositing alumina and silica, and then silicon nitride is deposited. In addition, when forming the above four-layer insulating film, the microwave treatment may also be performed after depositing alumina and silica, and then hafnium oxide is deposited, followed by microwave treatment, and then silicon nitride is deposited. Thus, the microwave treatment in an oxygen-containing atmosphere may be performed multiple times (at least two or more times).

[0351] The microwave treatment preferably uses, for example, a microwave treatment device including a power source that generates high-density plasma with microwaves. Here, the frequency of the microwave treatment device is preferably set to 300 MHz or more and 300 GHz or less, more preferably 2.4 GHz or more and 2.5 GHz or less, and may be, for example, 2.45 GHz. By using high-density plasma, high-density oxygen radicals can be generated. In addition, the power of the power source that applies microwaves of the microwave treatment device is preferably 1000 W or more and 10000 W or less, more preferably 2000 W or more and 5000 W or less. In addition, the microwave treatment device may also include a power source that applies RF to the substrate side. In addition, by applying RF to the substrate side, oxygen ions generated by the high-density plasma can be efficiently introduced into the oxide layer 230A.

[0352] In addition, the above microwave treatment is preferably performed under reduced pressure, and the pressure is preferably 10 Pa or more and 1000 Pa or less, more preferably 300 Pa or more and 700 Pa or less. In addition, the treatment temperature is preferably 750 °C or less, more preferably 500 °C or less, and may be, for example, about 250 °C. In addition, the heat treatment may be continuously performed in a manner that does not expose to external air after the oxygen plasma treatment. The temperature of the heat treatment is preferably 100 °C or more and 750 °C or less, more preferably 300 °C or more and 500 °C or less, for example.

[0353] In addition, for example, the above-described microwave treatment can be performed using oxygen gas and argon gas. Here, the oxygen flow ratio (O2 / (O2+Ar)) is greater than 0% and 100% or less. Preferably, the oxygen flow ratio (O2 / (O2+Ar)) is greater than 0% and 50% or less. More preferably, the oxygen flow ratio (O2 / (O2+Ar)) is 10% or more and 40% or less. Even more preferably, the oxygen flow ratio (O2 / (O2+Ar)) is 10% or more and 30% or less. Thus, by performing the microwave treatment in an oxygen-containing atmosphere, the carrier concentration in the oxide layer 230A can be reduced. In addition, by preventing an excessive amount of oxygen from being introduced into the processing chamber during the microwave treatment, an excessive reduction in the carrier concentration in the oxide layer 230A can be prevented.

[0354] By performing the microwave treatment in an oxygen-containing atmosphere, oxygen gas can be plasmaized using high-frequency waves such as microwaves or RF, and the oxygen plasma can act on the region between the conductive layer 242A and the conductive layer 242B of the oxide layer 230A. Through the action of the plasma, microwaves, etc., the V O H can be separated into oxygen vacancies and hydrogen, and hydrogen can be removed from this region. Here, as the layer in the insulating film that will become the insulating layer 250 and contacts the oxide layer 230A, an insulating film having a function of capturing and fixing hydrogen (for example, alumina, etc.) is preferably used. By adopting such a structure, the hydrogen generated by the microwave treatment can be captured or fixed in the insulating layer 250. Thus, the V O H contained in the channel formation region can be reduced. Thereby, the oxygen vacancies and V O H in the channel formation region can be reduced, and the carrier concentration can be decreased. In addition, by supplying oxygen radicals generated in the above-described oxygen plasma to the oxygen vacancies formed in the channel formation region, the oxygen vacancies in the channel formation region can be further reduced, and thereby the carrier concentration can be decreased.

[0355] As the oxygen injected into the channel formation region, there are various forms such as oxygen atoms, oxygen molecules, oxygen ions, and oxygen radicals (also referred to as O radicals, atoms, molecules, or ions containing unpaired electrons). The oxygen injected into the channel formation region can be any one or more of the above forms, and oxygen radicals are particularly preferred.

[0356] On the other hand, in the oxide layer 230A, there are regions overlapping with the conductive layer 242A and regions overlapping with the conductive layer 242B. Each of these regions can be used as a source region or a drain region. Here, the conductive layer 242A and the conductive layer 242B are preferably used as shielding films that protect against the action of high-frequency waves such as microwaves and RF, and oxygen plasma, etc. during the microwave treatment in an oxygen-containing atmosphere. Therefore, the conductive layer 242A and the conductive layer 242B preferably have a function of shielding electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less.

[0357] The conductive layer 242A and the conductive layer 242B shield the effects of high frequencies such as microwaves or RF, and oxygen plasmas, etc., so they do not act on the region of the oxide layer 230A that overlaps with the conductive layer 242A or the conductive layer 242B. Thus, during microwave treatment, a decrease in VH and an excessive supply of oxygen do not occur in the source region and the drain region. Therefore, a decrease in carrier concentration can be prevented. O H reduction and excessive oxygen supply, so a decrease in carrier concentration can be prevented.

[0358] In addition, an oxygen-barrier insulating layer 250 is provided in contact with the sides of the conductive layer 242A and the conductive layer 242B. Thus, the formation of an oxide film on the sides of the conductive layer 242A and the conductive layer 242B due to microwave treatment can be suppressed.

[0359] Furthermore, since the film quality of the insulating layer 250 can be improved, the reliability of the transistor 200 is improved.

[0360] As described above, oxygen vacancies and VH can be selectively removed in the channel formation region of the oxide semiconductor O so that the channel formation region becomes an i-type or substantially an i-type. Also, an excessive supply of oxygen to the region used as the source region or the drain region can be suppressed to maintain the conductivity (the state of the low-resistance region) before microwave treatment. Thus, variations in the electrical characteristics of the transistor 200 can be suppressed, and non-uniformity in the electrical characteristics of the transistor 200 within the substrate surface can be suppressed.

[0361] In addition, during microwave treatment, sometimes thermal energy is directly transferred to the oxide layer 230A due to the electromagnetic interaction between the microwaves and the molecules in the oxide layer 230A. Sometimes the oxide layer 230A is heated due to this thermal energy. Sometimes this heat treatment is called microwave annealing. By performing microwave treatment in an oxygen-containing atmosphere, sometimes the same effect as oxygen annealing can be obtained. In addition, it is considered that when the oxide layer 230A contains hydrogen, the thermal energy is transferred to the hydrogen in the oxide layer 230A and the activated hydrogen is released from the oxide layer 230A.

[0362] In addition, microwave treatment can also be performed before depositing the insulating film that will become the insulating layer 250, rather than after depositing this insulating film.

[0363] Alternatively, heat treatment may be performed while maintaining a reduced pressure after microwave treatment following the deposition of the insulating film that will become the insulating layer 250. By performing such treatment, hydrogen in the insulating film and in the oxide layer 230A can be efficiently removed. In addition, a part of the hydrogen is sometimes gettering in the conductive layer 242A and the conductive layer 242B. Further, the steps of maintaining a reduced pressure and performing heat treatment after microwave treatment may be repeated. By repeatedly performing the heat treatment, hydrogen in the insulating film and in the oxide layer 230A can be further efficiently removed. Note that the heat treatment temperature is preferably 300°C or higher and 500°C or lower. The above microwave treatment, i.e., microwave annealing, may also serve as this heat treatment. When the oxide layer 230A and the like are sufficiently heated by microwave annealing, this heat treatment may not be performed.

[0364] In addition, by performing microwave treatment to change the film quality of the insulating layer 250, the diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. into the oxide layer 230A through the insulating layer 250 due to subsequent processes such as the deposition of the conductive film that will become the conductive layer 260 or heat treatment.

[0365] The conductive film that will become the conductive layer 260 can be deposited, for example, by sputtering, CVD, MBE, PLD, plating, or ALD. In the present embodiment, titanium nitride is deposited by ALD as the conductive film that will become the conductive layer 260, and tungsten is deposited by CVD, thereby forming a two-layer conductive film.

[0366] Next, the insulating layer 220, the conductive layer 242C, the insulating layer 271C, the insulating layer 275, and the insulating layer 280 are processed using lithography to form an opening ([ Figure 9A ) that reaches the conductive layer 205B.

[0367] The opening formed in this process overlaps with the openings provided in the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C as a whole and is formed larger. Here, by using the oxide layer 230B as an etch stop layer, the opening is formed such that the size in plan view of the opening provided in the conductive layer 242C and the insulating layer 271C is larger than the size in plan view of the openings provided in the insulating layer 220, the insulating layer 222B, the insulating layer 224B, and the oxide layer 230B.

[0368] The above processing can use dry etching or wet etching. Since processing using dry etching is suitable for microfabrication, it is preferred. In addition, anisotropic etching can be performed in dry etching, so dry etching is suitable for forming an opening with a high aspect ratio. The conditions of dry etching and the dry etching apparatus can be referred to the previous description.

[0369] The processing of the insulating layer 220, the conductive layer 242C, the insulating layer 271C, the insulating layer 275, and the insulating layer 280 can also be performed under mutually different conditions.

[0370] Next, a metal oxide film that will become the oxide layer 235 is deposited in such a manner as to embed into the opening reaching the conductive layer 205B. An insulating film that will become the insulating layer 255 is deposited on the metal oxide film, and a conductive film that will become the conductive layer 265 is deposited on the insulating film. The metal oxide film, the insulating film, and the conductive film are polished by CMP processing until the insulating layer 280 is exposed. That is, the portions of the metal oxide film, the insulating film, and the conductive film that are exposed from the above-mentioned opening are removed. Thereby, the oxide layer 235, the insulating layer 255, and the conductive layer 265 are formed in the opening overlapping with the conductive layer 205B( Figure 9B ). Thereby, the oxide layer 235 is disposed in the opening in such a manner as to contact at least the top surface of the conductive layer 205B, the side surfaces of the insulating layer 222B, the side surfaces of the insulating layer 224B, the top surface and side surfaces of the oxide layer 230B, and the side surface of the conductive layer 242C. The insulating layer 255 is disposed along the oxide layer 235 on the oxide layer 235, and the conductive layer 265 is disposed in such a manner as to be embedded into the opening with the insulating layer 255 interposed therebetween. Thereby, the transistor 100 is formed. In addition, as Figure 9A shown, in the case where a part of the conductive layer 205B is removed and a recess is formed in the conductive layer 205B, the oxide layer 235 is disposed in such a manner as to contact the bottom surface and side surfaces (which may also be referred to as inner walls) of the recess of the conductive layer 205B.

[0371] Next, an insulating layer 282 is formed on the oxide layer 235, the insulating layer 255, the conductive layer 265, the insulating layer 250, the conductive layer 260, and the insulating layer 280. An insulating layer 283 is formed on the insulating layer 282, and an insulating layer 284 is formed on the insulating layer 283( Figure 10A ).

[0372] The insulating layer 282, the insulating layer 283, and the insulating layer 284 can be deposited, for example, by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulating layer 282, the insulating layer 283, and the insulating layer 284 are preferably deposited by a sputtering method. By using a sputtering method that does not require a molecule containing hydrogen in the deposition gas, the hydrogen concentration in the insulating layer 282, the insulating layer 283, and the insulating layer 284 can be reduced.

[0373] In the present embodiment, aluminum oxide is deposited as the insulating layer 282 by pulsed DC sputtering using an aluminum target in an oxygen-containing gas atmosphere, silicon nitride is deposited as the insulating layer 283 by a sputtering method, and silicon oxide is deposited as the insulating layer 284 by a sputtering method.

[0374] By depositing the insulating layer 282 in an oxygen-containing atmosphere using a sputtering method, oxygen can be added to the insulating layer 280 while the deposition is being carried out. Thereby, the insulating layer 280 can contain excess oxygen. At this time, it is preferable to deposit the insulating layer 282 while heating the substrate.

[0375] In addition, a heat treatment can also be carried out before depositing the insulating layer 282. This heat treatment can also be carried out under reduced pressure, and the insulating layer 282 can be continuously deposited in a manner not exposed to the atmosphere. By carrying out such a treatment, moisture and hydrogen adsorbed on the surface of the insulating layer 280 can be removed, and the moisture concentration and hydrogen concentration of the insulating layer 280 can be reduced. The temperature of the heat treatment is preferably 100 °C or higher and 400 °C or lower. In the present embodiment, the temperature of the heat treatment is set to 250 °C.

[0376] Here, it is preferable to continuously deposit the insulating layer 282 and the insulating layer 283 in a manner not exposed to the atmospheric environment. By depositing without being exposed to the atmosphere, since impurities or moisture from the atmospheric environment can be prevented from adhering to the insulating layer 282 and the insulating layer 283, the vicinity of the interface between the insulating layer 282 and the insulating layer 283 can be kept clean. Furthermore, it is preferable to continuously deposit the insulating layer 284 in a manner not exposed to the atmospheric environment.

[0377] Then, as Figure 10B shown, openings are formed in the insulating layers 220, 275, 280, 282, 283, 284, an insulating layer 241 is formed inside the openings, and conductive layers 240A to 240G are formed inside the insulating layer 241. The openings for providing the conductive layers 240A to 240G can be formed all at once or in multiple times. Through the above steps, a semiconductor device according to one aspect of the present invention can be manufactured.

[0378] [Example of manufacturing method 2]

[0379] Next, a method for manufacturing the semiconductor device shown in the structural example 2 will be described.

[0380] First, in the same manner as in the manufacturing method example 1, an insulating layer 216, conductive layers 205A, 205B, an insulating layer 220, an insulating layer 222, an insulating layer 224, an oxide layer 230, a conductive layer 242, and an insulating layer 271 are formed on the insulating layer 215 ( Figure 6A ).

[0381] Next, as Figure 11AAs shown, the insulating layer 222A, the insulating layer 224A, the oxide layer 230A, the conductive layer 242D, and the insulating layer 271D are formed in an island shape at positions overlapping with the conductive layer 205A, and the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C are formed in an island shape at positions overlapping with the conductive layer 205B.

[0382] At this time, different from the manufacturing method example 1 ( Figure 6B ), there is no need to provide an opening reaching the insulating layer 220 in the insulating layer 222B, the insulating layer 224B, the oxide layer 230B, the conductive layer 242C, and the insulating layer 271C.

[0383] Next, similar to the manufacturing method example 1 ( Figure 7A and Figure 7B ), after forming the insulating layer 275 and the insulating layer 280, openings are provided in the insulating layer 275, the insulating layer 280, the conductive layer 242D, and the insulating layer 271D. As a result, the conductive layer 242D is divided into the conductive layer 242A and the conductive layer 242B, and the insulating layer 271D is divided into the insulating layer 271A and the insulating layer 271B. And, similar to the manufacturing method example 1 ( Figure 8 ), the insulating layer 250 and the conductive layer 260 ( Figure 11B ) are provided in a manner of embedding the openings.

[0384] Next, as Figure 12A shown, an opening reaching the conductive layer 205B is formed in the insulating layer 280, the insulating layer 275, the insulating layer 271C, the conductive layer 242C, the oxide layer 230B, the insulating layer 224B, the insulating layer 222B, and the insulating layer 220. In the manufacturing method example 2, since the openings can be formed in these layers at once (without other processes in the middle), misalignment of the openings formed in each layer can be prevented, and simplification of the manufacturing process can be achieved.

[0385] And, similar to the manufacturing method example 1 ( Figure 9B ), the oxide layer 235, the insulating layer 255, and the conductive layer 265 ( Figure 12B ) are provided in a manner of embedding the openings. Furthermore, similar to the manufacturing method example 1 ( Figure 10A and Figure 10B ), the insulating layers 282, 283, 284 ( Figure 13A ) are provided in sequence, openings are provided in the insulating layers 282, 283, 284, etc., and then the insulating layer 241 and the conductive layers 240A to 240G are provided, whereby the semiconductor device shown in the structural example 2 can be manufactured ( Figure 13B ).

[0386] This embodiment can be appropriately combined with other embodiments.

[0387] (Embodiment 3)

[0388] In this embodiment, with reference to FIGS. 14 to Figure 19 a display device according to one aspect of the present invention will be described.

[0389] The display device of this embodiment can be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment can be used as a display unit of the following devices: electronic devices with a large screen such as a television device, a desktop or notebook personal computer, a monitor for a computer, etc., a digital signage, a large game machine such as a pachinko machine; a digital camera; a digital video camera; a digital photo frame; a mobile phone; a portable game machine; a portable information terminal; a sound reproduction device.

[0390] In addition, the display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as a display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type, and display units of wearable devices that can be worn on the head such as VR devices such as head-mounted displays (HMD) and glasses-type AR devices.

[0391] A semiconductor device according to one aspect of the present invention can be used for a display device or a module including the display device. As a module including the display device, there can be mentioned a module in which the display device is equipped with connectors such as a flexible printed circuit board (hereinafter referred to as FPC) or TCP (Tape Carrier Package), a module in which an integrated circuit (IC) is mounted by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.

[0392] Furthermore, the display device of this embodiment can also have a function of a touch panel. For example, various detection elements (which can also be called sensor elements) capable of detecting the approach or contact of a detection object such as a finger can be used for the display device.

[0393] As a sensor method, for example, there can be mentioned a capacitive type, a resistive film type, a surface acoustic wave type, an infrared type, an optical type, and a piezoresistive type.

[0394] As the capacitive type, for example, there are a surface capacitive type and a projected capacitive type. In addition, as the projected capacitive type, for example, there are a self-capacitive type and a mutual-capacitive type. The mutual-capacitive type is preferably used because multi-point sensing can be performed simultaneously.

[0395] As a touch panel, for example, an Out-Cell type, an On-Cell type, and an In-Cell type can be cited. Note that the In-Cell type touch panel refers to a structure in which electrodes constituting a detection element are provided on one or both of a substrate supporting a display element and a counter substrate.

[0396] [Display module]

[0397] Figure 14A is a perspective view of the display module 150. The display module 150 includes a display device 100A and an FPC 290. Note that the display device included in the display module 150 is not limited to the display device 100A, and may be any one of the display devices 100B to 100E described later.

[0398] The display module 150 includes a substrate 291 and a substrate 299. The display module 150 includes a display unit 297. The display unit 297 is an image display area in the display module 150, and light from each pixel provided in the following pixel unit 294 can be seen.

[0399] Figure 14B is a perspective schematic view of the structure on the side of the substrate 291. A circuit unit 292 is laminated on the substrate 291, a pixel circuit unit 293 is on the circuit unit 292, and a pixel unit 294 is on the pixel circuit unit 293. In addition, a terminal unit 295 for connecting to the FPC 290 is provided on a portion of the substrate 291 that does not overlap with the pixel unit 294. The terminal unit 295 and the circuit unit 292 are electrically connected through a wiring unit 296 composed of a plurality of wirings.

[0400] The pixel unit 294 includes a plurality of pixels 294a arranged periodically. Figure 14B An enlarged view of one pixel 294a is shown on the right side of Figure 14B shows an example in which the arrangement of sub-pixels is a stripe arrangement.

[0401] The pixel circuit unit 293 includes a plurality of pixel circuits 293a arranged periodically.

[0402] One pixel circuit 293a controls the driving of a plurality of elements included in one pixel 294a. Three circuits for controlling the light emission of one light-emitting element may be provided in one pixel circuit 293a. For example, the pixel circuit 293a may have a structure having at least one selection transistor, one current control transistor (driving transistor), and a capacitor for one light-emitting element. At this time, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. Thus, an active matrix type display device is realized.

[0403] The circuit section 292 includes a circuit for driving each pixel circuit 293a of the pixel circuit section 293. For example, it preferably includes one or both of a gate line driving circuit and a source line driving circuit. In addition, it may also have at least one of an arithmetic circuit, a storage circuit, a power supply circuit, and the like.

[0404] The FPC 290 serves as a wiring for supplying a video signal, a power supply potential, etc. from the outside to the circuit section 292. In addition, an IC may be mounted on the FPC 290.

[0405] The display module 150 may adopt a structure in which one or both of the pixel circuit section 293 and the circuit section 292 are disposed overlappingly below the pixel section 294, so that the display section 297 can have an extremely high aperture ratio (effective display area ratio). For example, the aperture ratio of the display section 297 may be 40% or more and less than 100%, preferably 50% or more and 95% or less, more preferably 60% or more and 95% or less. In addition, the pixels 294a can be arranged with extremely high density, whereby the display section 297 can have extremely high clarity. For example, in the display section 297, the pixels 294a are preferably arranged with a clarity of 2000 ppi or more, more preferably 3000 ppi or more, further preferably 5000 ppi or more, still further preferably 6000 ppi or more and 20000 ppi or less or 30000 ppi or less.

[0406] Such a high-definition display module 150 is suitable for VR devices such as HMDs or glasses-type AR devices. For example, since the display module 150 has a display section 297 with extremely high clarity, in the structure of viewing the display section of the display module 150 through a lens, even if the display section is magnified by the lens, the user cannot see the pixels, whereby a display with a high sense of immersion can be achieved. In addition, the display module 150 can also be applied to an electronic device having a relatively small display section. For example, it can be applied to the display section of a wearable electronic device such as a watch-type device.

[0407] [Display device 100A]

[0408] Figure 15 The shown display device 100A includes a transistor 100, a transistor 200, a light-emitting element 130R, a protective layer 131, a coloring layer 132R, a coloring layer 132G, an adhesive layer 142, a substrate 152, etc. on a substrate 151.

[0409] Figure 14B And Figure 15 The shown light-emitting element 130R is a light-emitting element included in a sub-pixel that emits red light. In addition, Figure 14BThe light-emitting element 130G shown is the light-emitting element included in the sub-pixel that emits green light, and the light-emitting element 130B is the light-emitting element included in the sub-pixel that emits blue light. In each sub-pixel, the light emitted by the light-emitting element is extracted to the outside of the display device 100A through the color filter layer. For example, the light emitted by the light-emitting element 130R is extracted to the outside of the display device 100A as red light through the color filter layer 132R.

[0410] The substrate 151 corresponds to Figure 14A and Figure 14B the substrate 291 in

[0411] The transistor 100 and the transistor 200 have the same structure as the structure described as Structural Example 1 in Embodiment 1, so the description thereof is omitted. In other words, for the details of the stacked structure of the insulating layers 215 to 284, reference can be made to Embodiment 1.

[0412] The transistor 100 is applicable to a switching transistor that needs to hold charge. The channel length of the transistor 200 is long and includes a back gate, so it is suitable for a driving transistor that is required to have saturation characteristics. In addition, compared with the transistor 200, the transistor 100 is easier to miniaturize. Therefore, by making all transistors other than the driving transistor in the pixel circuit the transistor 100, the number of transistors used for one pixel can be increased. Or, the occupied area of one pixel circuit can be reduced.

[0413] The conductive layer 242A used as the source or drain of the transistor 200 is electrically connected to the pixel electrode 111 of the light-emitting element 130R through the conductive layer 240B, the conductive layer 245, and the conductive layer 246. In addition, depending on the structure of the pixel circuit, the source or drain of the transistor 100 may be electrically connected to the pixel electrode 111 of the light-emitting element 130R.

[0414] The conductive layer 245 is formed inside the opening provided in the insulating layers 285 and 286, and the conductive layer 246 is formed inside the opening provided in the insulating layers 287 and 288. The pixel electrode 111 is provided on the insulating layer 288.

[0415] The light-emitting element 130R included in the display device 100A is sequentially stacked with a pixel electrode 111, an EL layer 113, and a common electrode 115.

[0416] In each color sub-pixel of the display device 100A, a light-emitting element including a common EL layer 113 and a color filter layer (such as a color filter) is used.

[0417] The light-emitting elements included in the sub-pixels that emit light of each color commonly include an EL layer 113 and a common electrode 115. Compared with a structure in which different EL layers are respectively provided for the sub-pixels of each color, the structure in which the sub-pixels of each color share the EL layer 113 can reduce the number of manufacturing processes.

[0418] For example, the light-emitting elements included in the sub-pixels that emit light of each color emit white light. By passing the white light emitted by the light-emitting elements through the color filter layer, light of a desired color can be obtained. The light-emitting elements that emit white light preferably adopt a series structure.

[0419] In addition, by adopting a microcavity structure, the light-emitting elements of a structure that emits white light sometimes emit light by enhancing a specific color such as red, green, or blue.

[0420] Alternatively, the light-emitting elements included in the sub-pixels that emit light of each color may also emit blue light. By passing the blue light emitted by the light-emitting elements through the color conversion layer and the color filter layer, light of a desired color can be obtained.

[0421] Regarding the structure and materials of the light-emitting elements, etc., reference can be made to Embodiment 5.

[0422] A pixel electrode 111 is formed in each light-emitting element. The end portion of the pixel electrode 111 is covered by an insulating layer 137. The insulating layer 137 is used as a partition wall. The pixel electrode 111 can be electrically insulated from the common electrode 115 by the insulating layer 137. In addition, the insulating layer 137 can electrically insulate adjacent light-emitting elements from each other.

[0423] The insulating layer 137 can be provided as a single-layer structure or a laminated structure using one or both of an inorganic insulating material and an organic insulating material.

[0424] Preferably, an inorganic insulating film is used as the insulating layer 137. As the inorganic insulating film, for example, an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be cited. As the oxide insulating film, for example, a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, a yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminum oxide film can be cited. As the nitride insulating film, for example, a silicon nitride film and an aluminum nitride film can be cited. As the oxynitride insulating film, for example, a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, a yttrium oxynitride film, and a hafnium oxynitride film can be cited. As the nitrogen oxide insulating film, for example, a silicon nitrogen oxide film and an aluminum nitrogen oxide film can be cited.

[0425] The insulating layer 137 may also use an organic insulating film. As materials that can be used for the organic insulating film, for example, acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimide amide resin, silicone resin, benzocyclobutene resin, phenolic resin, and precursors of these resins can be cited. In addition, the insulating layer 137 may also adopt a laminated structure of an organic insulating film and an inorganic insulating film.

[0426] Preferably, there is a protective layer 131 on the light-emitting element. By providing the protective layer 131, the reliability of the light-emitting element can be improved. The protective layer 131 can be either a single-layer structure or a laminated structure of two or more layers.

[0427] There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film can be used.

[0428] When the protective layer 131 includes an inorganic film, deterioration of the light-emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing entry of impurities (moisture, oxygen, etc.) into the light-emitting element, etc., thereby improving the reliability of the display device.

[0429] As the protective layer 131, for example, inorganic insulating films such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be used. Specific examples of the above inorganic insulating films are as described in the description of the insulating layer 137. In particular, the protective layer 131 preferably includes a nitride insulating film or a nitrogen oxide insulating film, and more preferably includes a nitride insulating film.

[0430] In addition, an inorganic film containing indium-tin oxide (also known as ITO), indium-zinc oxide, gallium-zinc oxide, aluminum-zinc oxide, or indium gallium zinc oxide (also known as In-Ga-Zn oxide, IGZO), etc. can also be used for the protective layer 131. This inorganic film preferably has a high resistance. Specifically, this inorganic film preferably has a higher resistance than the common electrode 115. This inorganic film may also contain nitrogen.

[0431] When extracting the light emission of the light-emitting element through the protective layer 131, the visible light transmittance of the protective layer 131 is preferably high. For example, ITO, IGZO, and alumina are all inorganic materials with high visible light transmittance, so they are preferred.

[0432] As the protective layer 131, for example, a laminated structure of an alumina film and a silicon nitride film on the alumina film or a laminated structure of an alumina film and an IGZO film on the alumina film, etc. can be adopted. By using this laminated structure, entry of impurities (water, oxygen, etc.) into the EL layer side can be suppressed.

[0433] Further, the protective layer 131 may also include an organic film. For example, the protective layer 131 may also include both an organic film and an inorganic film. As the organic material that can be used for the protective layer 131, for example, the organic insulating material that can be used for the insulating layer 137 can be cited.

[0434] The protective layer 131 may also have a two-layer structure formed by using different deposition methods. Specifically, the first layer of the protective layer 131 may be formed by using the ALD method and the second layer of the protective layer 131 may be formed by using the sputtering method.

[0435] The protective layer 131 and the substrate 152 are bonded by the bonding layer 142. The substrate 152 is provided with a coloring layer 132R and a coloring layer 132G. As the sealing of the light-emitting element, for example, a solid sealing structure or a hollow sealing structure can be adopted. In Figure 15 this case, the space between the substrate 152 and the substrate 151 is filled with the bonding layer 142, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure using an inert gas (such as nitrogen or argon) to fill this space can also be adopted. At this time, the bonding layer 142 may also be provided in a manner that does not overlap with the light-emitting element. In addition, this space can also be filled with a resin different from the bonding layer 142 provided in a frame shape.

[0436] The coloring layer is a colored layer that selectively transmits light in a specific wavelength region and absorbs light in other wavelength regions. For example, a red (R) color filter that transmits light in the red wavelength region, a green (G) color filter that transmits light in the green wavelength region, a blue (B) color filter that transmits light in the blue wavelength region, etc. can be used. Each coloring layer can use one or more of a metal material, a resin material, a pigment, and a dye. The coloring layer is formed at a desired position by a printing method, an inkjet method, an etching method using a photolithography method, etc.

[0437] A light-shielding layer such as a black matrix may also be provided on the surface of the substrate 152 on the side of the bonding layer 142. In addition, various optical members can be arranged outside the substrate 152 (the surface on the side opposite to the bonding layer 142 side). As the optical members, for example, a polarizing plate, a retardation plate, a light diffusion layer (diffusion film, etc.), an antireflection layer, and a condensing film can be cited. In addition, an antistatic film that suppresses the attachment of dust, a water-repellent film that is not easily soiled, a hard coating film that suppresses damage during use, a shock absorption layer, etc., which are surface protective layers, can also be arranged outside the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x layer) as the surface protective layer, it is possible to suppress the surface from being soiled or damaged, so it is preferable. In addition, DLC (diamond-like carbon), aluminum oxide (AlO x) Polyester materials, polycarbonate materials, etc. In addition, a material with a high visible light transmittance is preferably used as the surface protective layer. In addition, a material with high hardness is preferably used for the surface protective layer.

[0438] The substrates 151 and 152 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, etc. The substrate on the side from which light is extracted from the light-emitting element uses a material that transmits this light. By using a flexible material for the substrates 151 and 152, the flexibility of the display device can be improved. A polarizing plate can also be used as the substrate 152.

[0439] The display device 100A is a top emission type. The light emitted by the light-emitting element is emitted to the side of the substrate 152. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrode 111 contains a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.

[0440] As the substrates 151 and 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aromatic polyamide, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, and cellulose nanofibers, etc. In addition, glass with a thickness that is flexible can also be used as the substrates 151 and 152.

[0441] When a circular polarizing plate is overlapped on the display device, it is preferable to use a substrate with high optical isotropy as the substrate included in the display device. The birefringence of a substrate with high optical isotropy is low (it can also be said that the amount of birefringence is small).

[0442] The absolute value of the retardation value of a substrate with high optical isotropy is preferably 30 nm or less, more preferably 20 nm or less, and further preferably 10 nm or less.

[0443] As a thin film with high optical isotropy, there can be mentioned a cellulose triacetate (TAC, also known as cellulose acetate) thin film, a cycloolefin polymer (COP) thin film, a cycloolefin copolymer (COC) thin film, and an acrylic resin thin film, etc.

[0444] When using a thin film as a substrate, shape changes such as wrinkles may occur in the display device due to water absorption of the thin film. Therefore, it is preferable to use a thin film with a low water absorption rate as the substrate. For example, it is preferable to use a thin film with a water absorption rate of 1% or less, more preferably a thin film with a water absorption rate of 0.1% or less, and still more preferably a thin film with a water absorption rate of 0.01% or less.

[0445] As the adhesive layer 142, various curable adhesives such as ultraviolet curable adhesives, reaction curable adhesives, thermosetting adhesives, and anaerobic adhesives can be used. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. In particular, it is preferable to use a material with low moisture permeability such as an epoxy resin. In addition, a two-component mixed resin can also be used. In addition, an adhesive sheet or the like can also be used.

[0446] [Display device 100B]

[0447] Figure 16 The main difference between the shown display device 100B and the display device 100A is that it does not include the coloring layers 132R and 132G; the sub-pixels of each color do not include a common EL layer 113; and the sub-pixels of each color are respectively provided with an EL layer.

[0448] The light-emitting element 130R included in the display device 100B is sequentially laminated with a pixel electrode 111, an EL layer 113R, and a common electrode 115. The EL layer 113R includes a light-emitting layer that emits red light. The light-emitting element 130R emits red light. Similarly, a sub-pixel that emits green light is provided with a light-emitting element that emits green light (the EL layer 113G includes a light-emitting layer that emits green light), and a sub-pixel that emits blue light is provided with a light-emitting element that emits blue light.

[0449] The EL layer 113R is provided in an island shape. In Figure 16 , the ends of adjacent EL layers 113R overlap with the ends of the EL layer 113G. When depositing an island-shaped EL layer using a high-precision metal mask, as Figure 16 shown, the ends of adjacent EL layers sometimes overlap with each other, but it is not limited to this. That is, adjacent EL layers may not overlap and may be separated. In addition, in the display device, there may be both a part where adjacent EL layers overlap and a part where adjacent EL layers do not overlap and are separated.

[0450] [Display device 100C]

[0451] Figure 17The display device 100C shown is an example of a display device employing an MML (MetalMask Less) structure. That is, the display device 100C includes light-emitting elements that are not manufactured using a high-precision metal mask.

[0452] In the light-emitting elements included in the display device employing the MML structure, the island-shaped light-emitting layer is formed by depositing the light-emitting layer over the entire surface and then performing processing using photolithography. Therefore, a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now, can be realized. Furthermore, since the light-emitting layer can be formed separately for each color, a display device with extremely vivid colors, high contrast, and high display quality can be realized. For example, when a display device is configured using three types of light-emitting elements that emit blue light, green light, and red light, three island-shaped light-emitting layers can be formed by repeatedly depositing the light-emitting layer three times and performing processing using photolithography.

[0453] Since devices with the MML structure can be manufactured without using a metal mask, the upper limit of the clarity due to the alignment accuracy of the metal mask can be exceeded. In addition, when manufacturing devices without using a metal mask, equipment related to the manufacture of the metal mask and the cleaning process of the metal mask can be omitted. In addition, in the processing using photolithography, the same or similar devices used for manufacturing transistors can be used, so there is no need to introduce special devices for manufacturing devices with the MML structure. Thus, the MML structure can reduce the manufacturing cost and is therefore suitable for mass production of devices.

[0454] For example, a display device employing the MML structure does not need to adopt a special pixel arrangement such as the Pentile arrangement to artificially improve clarity, and thus a display device with a so-called stripe arrangement in which R, G, and B sub-pixels are arranged in one direction and high clarity (for example, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more) can be realized.

[0455] In addition, by providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0456] Furthermore, by adopting a deposition process using a range mask and a processing process using a resist mask, light-emitting elements can be manufactured with a relatively simple process.

[0457] Note that the stacked structure of the substrate 151 to the insulating layer 288 and the stacked structure of the protective layer 131 to the substrate 152 are the same as those of the display device 100A, so the description thereof is omitted.

[0458] In Figure 17On an insulating layer 288, a light-emitting element 130R is provided.

[0459] The light-emitting element 130R includes a pixel electrode 111 on the insulating layer 288, a layer 133R on the pixel electrode 111, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. Figure 17 The illustrated light-emitting element 130R emits red light. The layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, the layer 133R and the common layer 114 may be collectively referred to as an EL layer.

[0460] In the present specification and the like, an island-shaped layer provided for each light-emitting element in the EL layer included in the light-emitting element is denoted as the layer 133R, and a layer shared by a plurality of light-emitting elements is denoted as the common layer 114. In addition, in the present specification and the like, the layer 133R that does not include the common layer 114 may sometimes be referred to as an island-shaped EL layer, formed as an island-shaped EL layer, and the like.

[0461] The island-shaped EL layers included in each light-emitting element are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintended light emission caused by crosstalk can be suppressed, and thus a display device with a very high contrast can be realized.

[0462] The top surface and side surfaces of the pixel electrode 111 are covered by the layer 133R. Therefore, the entire region where the pixel electrode 111 is provided can be used as a light-emitting region of the light-emitting element 130R, and thus the aperture ratio of the pixel can be increased.

[0463] A part of the top surface and the side surfaces of the layer 133R are covered by insulating layers 125 and 127. The common layer 114 is provided on the layer 133R and the insulating layers 125 and 127, and the common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are continuous films shared by a plurality of light-emitting elements.

[0464] In Figure 17 there is no insulating layer Figure 15 such as the insulating layer 137 shown between the pixel electrode 111 and the layer 133R. That is, the display device 100C does not have an insulating layer (also referred to as a partition wall, dam, spacer, etc.) that contacts the pixel electrode and covers the top end portion of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. Thus, a high-definition or high-resolution display device can be realized. In addition, a mask for forming the insulating layer is not required, and thus the manufacturing cost of the display device can be reduced.

[0465] As described above, layer 133R includes a light-emitting layer. Layer 133R preferably includes a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, layer 133R preferably includes a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. Alternatively, layer 133R may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surface of layer 133R is exposed during the manufacturing process of the display device, so by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and the damage to the light-emitting layer can be reduced. In this way, the reliability of the light-emitting element can be improved.

[0466] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light-emitting elements emitting light of each color share the common layer 114. Note that the EL layers included in the light-emitting elements may also be arranged in an island shape without including the common layer 114.

[0467] The side surface of the layer 133R is covered with the insulating layer 125. The insulating layer 127 covers the side surface of the layer 133R via the insulating layer 125.

[0468] By covering the side surface of the layer 133R (and also covering a part of the top surface thereof) by at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) can be prevented from contacting the pixel electrode 111 and the side surface of the layer 133R, thereby preventing the light-emitting element from short-circuiting. Thus, the reliability of the light-emitting element can be improved.

[0469] The insulating layer 125 is preferably in contact with the side surface of the layer 133R. By adopting a structure in which the insulating layer 125 is in contact with the layer 133R, film peeling of the layer 133R can be prevented, and reliability of the light-emitting element can be improved.

[0470] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0471] By providing the insulating layer 125 and the insulating layer 127, the space between adjacent island layers can be filled, so that the unevenness of the formed surface of the layer (for example, the carrier injection layer, the common electrode, etc.) provided on the island layer can be reduced and further flattened. Therefore, the coverage of the carrier injection layer and the common electrode, etc. can be improved.

[0472] The common layer 114 and the common electrode 115 are disposed on the layer 133R, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are disposed, a step is generated due to the region where the pixel electrode and the island-shaped EL layer are disposed and the region where the pixel electrode and the island-shaped EL layer are not disposed (the region between the light-emitting elements). The display device according to one embodiment of the present invention can flatten the step by including the insulating layer 125 and the insulating layer 127, and thereby can improve the coverage of the common layer 114 and the common electrode 115. Therefore, connection failure caused by disconnection can be suppressed. Alternatively, an increase in resistance due to local thinning of the common electrode 115 caused by the step can be suppressed.

[0473] The top surface of the insulating layer 127 preferably has a shape with high flatness. The top surface of the insulating layer 127 may also have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the top surface of the insulating layer 127 preferably has a convex curved surface shape with a large radius of curvature.

[0474] The insulating layer 125 may be an insulating layer containing an inorganic material. As the insulating layer 125, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be used. Specific examples of the above inorganic insulating films are as described above. The insulating layer 125 may have a single-layer structure or a laminated structure. In particular, in etching, the selectivity between alumina and the EL layer is high, and it has a function of protecting the EL layer in the formation of the insulating layer 127 described later, and is therefore preferable. In particular, by using an inorganic insulating film such as an alumina film, a hafnium oxide film, or a silicon oxide film formed by ALD for the insulating layer 125, an insulating layer 125 with fewer pinholes and a good function of protecting the EL layer can be formed. In addition, the insulating layer 125 may also adopt a laminated structure of a film formed by ALD and a film formed by sputtering. For example, the insulating layer 125 may adopt a laminated structure of an alumina film formed by ALD and a silicon nitride film formed by sputtering.

[0475] The insulating layer 125 is preferably used as a barrier insulating layer for at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0476] When the insulating layer 125 is used as a barrier insulating layer, it may have a structure that suppresses the entry of impurities (typically, at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. By adopting this structure, a light-emitting element with high reliability and a display device with high reliability can be provided.

[0477] In addition, the impurity concentration of the insulating layer 125 is preferably low. Thereby, it is possible to suppress impurities from mixing into the EL layer from the insulating layer 125 and deteriorating the EL layer. In addition, by reducing the impurity concentration in the insulating layer 125, the barrier property against at least one of water and oxygen can be improved. For example, it is preferable that one of the hydrogen concentration and the carbon concentration in the insulating layer 125 is sufficiently low, and it is more preferable that both the hydrogen concentration and the carbon concentration are sufficiently low.

[0478] The insulating layer 127 provided on the insulating layer 125 has a function of planarizing the unevenness that makes the height difference of the insulating layer 125 formed between adjacent light-emitting elements large. In other words, by including the insulating layer 127, an effect of improving the flatness of the surface on which the common electrode 115 is formed is produced.

[0479] As the insulating layer 127, an insulating layer containing an organic material can be suitably used. As the organic material, a photosensitive resin is preferably used, and for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification and the like, the acrylic resin does not only refer to polymethyl methacrylate or methacrylic resin, and sometimes refers to the entire acrylic polymer in a broad sense.

[0480] In addition, as the insulating layer 127, an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimide amide resin, a silicone resin, a siloxane resin, a benzocyclobutene resin, a phenolic resin, and precursors of the above resins can also be used. In addition, as the insulating layer 127, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin can also be used. In addition, a photoresist can also be used as the photosensitive resin. As the photosensitive resin, a positive-type material or a negative-type material can be used.

[0481] As the insulating layer 127, a material that absorbs visible light can also be used. By the insulating layer 127 absorbing the light emitted from the light-emitting element, it is possible to suppress light from leaking from the light-emitting element through the insulating layer 127 to an adjacent light-emitting element (stray light). Therefore, the display quality of the display device can be improved. In addition, even when a polarizing plate is not used in the display device, the display quality can be improved, so the display device can be made lighter and thinner.

[0482] Examples of the material that absorbs visible light include materials containing pigments such as black, materials containing dyes, resin materials having light absorption properties (for example, polyimide, etc.), and resin materials (color filter materials) that can be used for color filters. In particular, when using a resin material obtained by mixing or laminating two colors or three or more colors of color filter materials, the effect of shielding visible light can be improved, so it is preferable. In particular, by mixing three or more colors of color filter materials, a black or nearly black resin layer can be achieved.

[0483] [Display Devices 100D and 100E]

[0484] Figure 18 The shown display device 100D has a stacked structure of a substrate 301 to an insulating layer 317 instead of the substrate 151 in the display device 100A. Additionally, Figure 19 The shown display device 100E has a stacked structure of a substrate 301 to an insulating layer 317 instead of the substrate 151 in the display device 100C.

[0485] The transistor 300 is a transistor having a channel formation region in the substrate 301. As the substrate 301, for example, a semiconductor substrate such as a single crystal silicon substrate can be used. The transistor 300 includes a part of the substrate 301, a conductive layer 311, a low resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 is used as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and is used as a gate insulating layer. The low resistance region 312 is a region in the substrate 301 doped with impurities and is used as one of the source and drain. The insulating layer 314 covers the side surface of the conductive layer 311.

[0486] Furthermore, an element isolation layer 315 is provided in a manner of being embedded in the substrate 301 between two adjacent transistors 300. The source or drain of the transistor 300 is electrically connected to at least one of a conductive layer, a wiring, a transistor, etc. provided above the transistor 300 through a conductive layer provided in an opening of the insulating layer 316 and the insulating layer 317.

[0487] The transistor 100 and the transistor 200 can be used as transistors constituting a pixel circuit. Additionally, the transistor 300 can be used as a transistor constituting a pixel circuit or a transistor constituting a driving circuit (gate line driving circuit, source line driving circuit) for driving the pixel circuit. Moreover, the transistor 300 can be used as a transistor constituting various circuits such as an arithmetic circuit or a storage circuit.

[0488] With this structure, not only a pixel circuit but also a driving circuit, etc. can be formed directly under the light-emitting element. Therefore, compared with the case where a driving circuit is provided around the display area, the display device can be miniaturized.

[0489] This embodiment can be appropriately combined with other embodiments.

[0490] (Embodiment 4)

[0491] In this embodiment, a display device according to one aspect of the present invention will be described with reference to FIGS. 20 and 21.

[0492] [Layout of Pixels]

[0493] In the display device according to one embodiment of the present invention, there is no particular limitation on the arrangement of sub-pixels, and various arrangement methods can be adopted. As the arrangement of sub-pixels, for example, stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, Pentile arrangement, etc. can be cited.

[0494] The top surface shape of the sub-pixels shown in the drawings in the present embodiment corresponds to the top surface shape of the light-emitting region (or light-receiving region).

[0495] In addition, as the top surface shape of the sub-pixels, for example, polygons such as triangles, quadrangles (including rectangles, squares), pentagons, shapes in which the corners of these polygons are rounded, ellipses, circles, etc. can be cited.

[0496] Furthermore, the circuit layout constituting the sub-pixels is not limited to the range of the sub-pixels shown in the drawings, and the constituent elements of the circuit can also be arranged outside thereof.

[0497] Figure 20A The pixel 110 shown adopts an S-stripe arrangement. Figure 20A The pixel 110 shown is composed of three sub-pixels, namely sub-pixels 110a, 110b, and 110c.

[0498] Figure 20B The pixel 110 shown includes a sub-pixel 110a having a top surface shape of an approximate triangle or approximate trapezoid with rounded corners, a sub-pixel 110b having a top surface shape of an approximate triangle or approximate trapezoid with rounded corners, and a sub-pixel 110c having a top surface shape of an approximate quadrangle or approximate hexagon with rounded corners. In addition, the light-emitting area of the sub-pixel 110b is larger than that of the sub-pixel 110a. Thus, the shapes and sizes of the respective sub-pixels can be determined independently. For example, the size of the sub-pixel including a highly reliable light-emitting element can be smaller.

[0499] Figure 20C The pixels 124a and 124b shown adopt a Pentile arrangement. Figure 20C An example is shown in which pixels 124a including sub-pixels 110a and 110b and pixels 124b including sub-pixels 110b and 110c are alternately arranged.

[0500] Figures 20D to 20F The pixels 124a and 124b shown adopt a Delta arrangement. The pixel 124a includes two sub-pixels (sub-pixels 110a, 110b) in the upper row (first row) and one sub-pixel (sub-pixel 110c) in the lower row (second row). The pixel 124b includes one sub-pixel (sub-pixel 110c) in the upper row (first row) and two sub-pixels (sub-pixels 110a, 110b) in the lower row (second row).

[0501] Figure 20D An example is shown in which each sub-pixel has a top surface shape that is an approximate quadrangle with rounded corners. Figure 20E An example is shown in which each sub-pixel has a circular top surface shape. Figure 20F An example is shown in which each sub-pixel has a top surface shape that is an approximate hexagon with rounded corners.

[0502] In Figure 20F each sub-pixel is arranged inside a hexagonal region arranged in the closest packing. Each sub-pixel is arranged in such a way that when focusing on one sub-pixel, it is surrounded by six sub-pixels. In addition, it is arranged so that sub-pixels emitting light of the same color are not adjacent. For example, each sub-pixel is arranged in such a way that when focusing on sub-pixel 110a, three sub-pixels 110b and three sub-pixels 110c arranged alternately surround sub-pixel 110a.

[0503] Figure 20G An example is shown in which sub-pixels of each color are arranged in a zigzag shape. Specifically, in a plan view, the positions of the upper sides of two sub-pixels arranged in the row direction (for example, sub-pixel 110a and sub-pixel 110b or sub-pixel 110b and sub-pixel 110c) are offset.

[0504] In Figures 20A to 20G In each pixel shown, for example, preferably, sub-pixel 110a is a sub-pixel R that emits red light, sub-pixel 110b is a sub-pixel G that emits green light, and sub-pixel 110c is a sub-pixel B that emits blue light. Note that the structure of the sub-pixels is not limited to this, and the color and arrangement order of the light emitted by the sub-pixels can be appropriately determined. For example, sub-pixel 110b can also be a sub-pixel R that emits red light, and sub-pixel 110a can also be a sub-pixel G that emits green light.

[0505] In lithography, the finer the pattern to be processed, the more the influence of light diffraction cannot be ignored. Therefore, when transferring the pattern of the photomask by exposure, the fidelity decreases, and it is difficult to process the resist mask into the desired shape. Therefore, even if the pattern of the photomask is rectangular, it is easy to form a pattern with rounded corners. Therefore, the top surface shape of the sub-pixel sometimes has a polygonal shape with rounded corners, an oval shape, a circular shape, or the like.

[0506] Further, in the method of manufacturing a display device according to an aspect of the present invention, the EL layer is processed into an island shape using a resist mask. The resist film formed on the EL layer needs to be cured at a temperature lower than the heat-resistant temperature of the EL layer. Therefore, depending on the heat-resistant temperature of the material of the EL layer and the curing temperature of the resist material, the curing of the resist film may sometimes be insufficient. An insufficiently cured resist film may sometimes take a shape that deviates from the desired shape when processed. As a result, the top surface shape of the EL layer may sometimes be a polygonal shape with rounded corners, an oval shape, or a circular shape, etc. For example, when forming a resist mask with a square top surface shape, a resist mask with a circular top surface shape may sometimes be formed and the top surface shape of the EL layer may be circular.

[0507] In order to make the top surface shape of the EL layer take the desired shape, a technique of pre-correcting the mask pattern so that the design pattern and the transfer pattern are consistent (OPC (Optical Proximity Correction) technique) can also be used. Specifically, in the OPC technique, correction patterns are added to the graphic corners etc. on the mask pattern.

[0508] As Figures 21A to 21I shown, a pixel may include four sub-pixels.

[0509] Figures 21A to 21C The pixel 110 shown adopts a stripe arrangement.

[0510] Figure 21A An example is shown in which each sub-pixel has a rectangular top surface shape, Figure 21B An example is shown in which each sub-pixel has a top surface shape connecting two semi-circles and a rectangle, Figure 21C An example is shown in which each sub-pixel has an oval top surface shape.

[0511] Figures 21D to 21F The pixel 110 shown adopts a matrix arrangement.

[0512] Figure 21D An example is shown in which each sub-pixel has a square top surface shape, Figure 21E An example is shown in which each sub-pixel has an approximate square top surface shape with rounded corners, Figure 21F An example is shown in which each sub-pixel has a circular top surface shape.

[0513] Figure 21G And Figure 21H An example is shown in which one pixel 110 is composed of two rows and three columns.

[0514] Figure 21GThe pixel 110 shown includes three sub-pixels (sub-pixels 110a, 110b, 110c) in the upper row (the first row) and one sub-pixel (sub-pixel 110d) in the lower row (the second row). In other words, the pixel 110 includes sub-pixel 110a in the left column (the first column), sub-pixel 110b in the middle column (the second column), sub-pixel 110c in the right column (the third column), and sub-pixel 110d spanning across these three columns.

[0515] Figure 21H The pixel 110 shown includes three sub-pixels (sub-pixels 110a, 110b, 110c) in the upper row (the first row) and three sub-pixels 110d in the lower row (the second row). In other words, the pixel 110 includes sub-pixel 110a and sub-pixel 110d in the left column (the first column), sub-pixel 110b and sub-pixel 110d in the middle column (the second column), and sub-pixel 110c and sub-pixel 110d in the right column (the third column). As Figure 21H shown, by making the sub-pixel configurations in the upper and lower rows consistent, dust and the like generated in the manufacturing process can be efficiently removed. Therefore, a display device with high display quality can be provided.

[0516] Figure 21I An example of a pixel 110 composed of three rows and two columns is shown.

[0517] Figure 21I The pixel 110 shown includes sub-pixel 110a in the upper row (the first row), sub-pixel 110b in the middle row (the second row), sub-pixel 110c spanning across the first row to the second row, and one sub-pixel (sub-pixel 110d) in the lower row (the third row). In other words, the pixel 110 includes sub-pixels 110a and 110b in the left column (the first column), sub-pixel 110c in the right column (the second column), and sub-pixel 110d spanning across these two columns.

[0518] Figures 21A to 21I The pixel 110 shown is composed of four sub-pixels: sub-pixels 110a, 110b, 110c, and 110d.

[0519] The sub-pixels 110a, 110b, 110c, and 110d may include light-emitting elements that emit light of different colors from each other. Examples of the sub-pixels 110a, 110b, 110c, and 110d include: sub-pixels of four colors: R, G, B, and white (W); sub-pixels of four colors: R, G, B, and Y; and sub-pixels of R, G, B, and infrared light (IR); etc.

[0520] In Figures 21A to 21IAmong the respective pixels 110 shown, for example, preferably, sub-pixel 110a is a sub-pixel R that emits red light, sub-pixel 110b is a sub-pixel G that emits green light, sub-pixel 110c is a sub-pixel B that emits blue light, and sub-pixel 110d is a sub-pixel W that emits white light, a sub-pixel Y that emits yellow light, or a sub-pixel IR that emits near-infrared light. When adopting the above structure, in Figure 21G and Figure 21H In the pixels 110 shown, the layout of R, G, and B is a stripe arrangement, so the display quality can be improved. In addition, in Figure 21I In the pixels 110 shown, the layout of R, G, and B is a so-called S-stripe arrangement, so the display quality can be improved.

[0521] In addition, pixel 110 may also include a sub-pixel having a light-receiving element.

[0522] In Figures 21A to 21I Among the respective pixels 110 shown, any one of sub-pixels 110a to 110d may also be a sub-pixel including a light-receiving element.

[0523] In Figures 21A to 21I Among the respective pixels 110 shown, for example, preferably, sub-pixel 110a is a sub-pixel R that emits red light, sub-pixel 110b is a sub-pixel G that emits green light, sub-pixel 110c is a sub-pixel B that emits blue light, and sub-pixel 110d is a sub-pixel S including a light-receiving element. When adopting the above structure, in Figure 21G and Figure 21H In the pixels 110 shown, the layout of R, G, and B is a stripe arrangement, so the display quality can be improved. In addition, in Figure 21I In the pixels 110 shown, the layout of R, G, and B is a so-called S-stripe arrangement, so the display quality can be improved.

[0524] The wavelength of the light detected by the sub-pixel S including a light-receiving element is not particularly limited. The sub-pixel S can detect one or both of visible light and infrared light.

[0525] As Figure 21J and Figure 21K shown, the pixel may include five types of sub-pixels.

[0526] Figure 21J An example in which one pixel 110 is composed of two rows and three columns is shown.

[0527] Figure 21JThe pixel 110 shown includes three sub-pixels (sub-pixels 110a, 110b, 110c) in the upper row (the first row) and two sub-pixels (sub-pixels 110d, 110e) in the lower row (the second row). In other words, the pixel 110 includes sub-pixels 110a, 110d in the left column (the first column), sub-pixel 110b in the middle column (the second column), sub-pixel 110c in the right column (the third column), and includes sub-pixel 110e spanning the second column to the third column.

[0528] Figure 21K An example is shown where a pixel 110 is composed of three rows and two columns.

[0529] Figure 21K The pixel 110 shown includes sub-pixel 110a in the upper row (the first row), sub-pixel 110b in the middle row (the second row), includes sub-pixel 110c spanning the first row to the second row, and includes two sub-pixels (sub-pixels 110d, 110e) in the lower row (the third row). In other words, the pixel 110 includes sub-pixels 110a, 110b, 110d in the left column (the first column) and sub-pixels 110c, 110e in the right column (the second column).

[0530] In Figure 21J and Figure 21K In each of the pixels 110 shown, for example, preferably, sub-pixel 110a is a sub-pixel R that emits red light, sub-pixel 110b is a sub-pixel G that emits green light, and sub-pixel 110c is a sub-pixel B that emits blue light. When adopting such a structure, in Figure 21J In the pixel 110 shown, the layout of R, G, B is a stripe arrangement, so the display quality can be improved. In addition, in Figure 21K In the pixel 110 shown, the layout of R, G, B is a so-called S stripe arrangement, so the display quality can be improved.

[0531] In addition, in Figure 21J and Figure 21K In each of the pixels 110 shown, for example, preferably, at least one of sub-pixels 110d and sub-pixel 110e uses a sub-pixel S including a light-receiving element. When using light-receiving elements in both sub-pixels 110d and sub-pixel 110e, the structures of the light-receiving elements can also be different from each other. For example, at least a part of the wavelength region of the detected light can also be different from each other. Specifically, one of sub-pixels 110d and sub-pixel 110e can include a light-receiving element that mainly detects visible light, and the other can include a light-receiving element that mainly detects infrared light.

[0532] In addition, in Figure 21J and Figure 21KAmong the respective pixels 110 shown, for example, it is preferable to use a sub-pixel S including a light-receiving element as one of the sub-pixels 110d and 110e and use a sub-pixel including a light-emitting element that can be used as a light source for the other. For example, it is preferable that one of the sub-pixels 110d and 110e is a sub-pixel IR that emits infrared light and the other is a sub-pixel S including a light-receiving element that detects infrared light.

[0533] In a pixel including sub-pixels R, G, B, IR, and S, the sub-pixels R, G, and B can be used to display an image, and the sub-pixel IR can be used as a light source, and the sub-pixel S can detect the reflected light of the infrared light emitted by the sub-pixel IR.

[0534] As described above, in the display device according to one embodiment of the present invention, the pixels composed of sub-pixels including light-emitting elements can adopt various layouts. In addition, the display device according to one embodiment of the present invention can adopt a structure including both a light-emitting element and a light-receiving element in a pixel. In this case, various layouts can also be adopted.

[0535] This embodiment can be appropriately combined with other embodiments.

[0536] (Embodiment 5)

[0537] In this embodiment, a light-emitting device that can be used in the display device according to one embodiment of the present invention will be described.

[0538] As Figure 22A shown, the light-emitting device includes an EL layer 763 between a pair of electrodes (lower electrode 761 and upper electrode 762). The EL layer 763 can be composed of a plurality of layers such as a layer 780, a light-emitting layer 771, and a layer 790.

[0539] The light-emitting layer 771 contains at least a light-emitting substance (also referred to as a light-emitting material).

[0540] When the lower electrode 761 and the upper electrode 762 are an anode and a cathode, respectively, the layer 780 includes one or more of a layer containing a substance with high hole injection property (hole injection layer), a layer containing a substance with high hole transport property (hole transport layer), and a layer containing a substance with high electron blocking property (electron blocking layer). In addition, the layer 790 includes one or more of a layer containing a substance with high electron injection property (electron injection layer), a layer containing a substance with high electron transport property (electron transport layer), and a layer containing a substance with high hole blocking property (hole blocking layer). When the lower electrode 761 and the upper electrode 762 are a cathode and an anode, respectively, the structures of the layer 780 and the layer 790 are reversed from those described above.

[0541] The structure including the layer 780, the light-emitting layer 771, and the layer 790 provided between a pair of electrodes can be used as a single light-emitting unit, and in this specificationFigure 22A The structure is called a single structure.

[0542] In addition, Figure 22B shows Figure 22A A modified example of the EL layer 763 included in the light-emitting device shown. Specifically, Figure 22B The light-emitting device shown includes a layer 781 on the lower electrode 761, a layer 782 on the layer 781, a light-emitting layer 771 on the layer 782, a layer 791 on the light-emitting layer 771, a layer 792 on the layer 791, and an upper electrode 762 on the layer 792.

[0543] When the lower electrode 761 and the upper electrode 762 are an anode and a cathode, respectively, for example, the layer 781, the layer 782, the layer 791, and the layer 792 can be a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, respectively. In addition, when the lower electrode 761 and the upper electrode 762 are a cathode and an anode, respectively, the layer 781, the layer 782, the layer 791, and the layer 792 can be an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer, respectively. By adopting the above layer structure, carriers can be efficiently injected into the light-emitting layer 771, and thus the recombination efficiency of carriers in the light-emitting layer 771 can be improved.

[0544] In addition, as Figure 22C and Figure 22D shown, a structure in which a plurality of light-emitting layers (light-emitting layers 771, 772, 773) are provided between the layer 780 and the layer 790 is also a modified example of the single structure. Note that although Figure 22C and Figure 22D show an example including three light-emitting layers, the light-emitting layer in the light-emitting device having a single structure can be two layers or four or more layers. In addition, the light-emitting device having a single structure may also include a buffer layer between two light-emitting layers. The buffer layer can be formed using a material that can be used for a hole transport layer or an electron transport layer, for example.

[0545] As Figure 22E and Figure 22F shown, a structure in which a plurality of light-emitting units (light-emitting unit 763a and light-emitting unit 763b) are connected in series with a charge generation layer 785 (also referred to as an intermediate layer) interposed therebetween is called a series structure in this specification. In addition, the series structure can also be called a stacked structure. By adopting the series structure, a light-emitting device capable of emitting light with high brightness can be realized. In addition, since the series structure can reduce the current required to obtain the same brightness compared with the single structure, the reliability can be improved.

[0546] Figure 22D and Figure 22F show an example in which the display device includes a layer 764 overlapping the light-emitting device. Figure 22D shows the layer 764 andFigure 22C An example of overlapping light-emitting devices is shown, Figure 22F showing that layer 764 overlaps with Figure 22E an example of overlapping light-emitting devices. In Figure 22D and Figure 22F , the upper electrode 762 uses a light-transmissive conductive film to extract light to the side of the upper electrode 762.

[0547] As layer 764, one or both of a color conversion layer and a color filter (coloring layer) can be used.

[0548] In Figure 22C and Figure 22D , the same light-emitting substance that emits the same color of light, or even the same light-emitting substance, can be used for the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773. For example, a light-emitting substance that emits blue light can be used for the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773. Regarding the sub-pixel that presents blue light, the blue light emitted by the light-emitting device can be extracted. Regarding the sub-pixel that presents red light and the sub-pixel that presents green light, by providing a color conversion layer as Figure 22D shown in layer 764, the blue light emitted by the light-emitting device can be converted into light with a longer wavelength and extracted as red light or green light. In addition, as layer 764, it is preferable to use both a color conversion layer and a coloring layer. Sometimes a part of the light emitted by the light-emitting device is not converted by the color conversion layer and directly passes through. By extracting the light that passes through the color conversion layer with the coloring layer, light other than the light of the desired color can be absorbed in the coloring layer, thereby improving the color purity of the light presented by the sub-pixel.

[0549] In addition, in Figure 22C and Figure 22D , light-emitting substances that emit light of different colors from each other can also be used for the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773. When the lights emitted by the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773 are in a complementary color relationship, white light emission can be obtained. For example, a light-emitting device having a single structure preferably includes a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light with a wavelength longer than that of blue light.

[0550] As Figure 22D shown, a color filter is preferably provided for layer 764. By passing white light through the color filter, light of the desired color can be obtained.

[0551] For example, in the case where a light-emitting device having a single structure includes three light-emitting layers, it is preferable to include a light-emitting layer containing a light-emitting substance that emits red (R) light, a light-emitting layer containing a light-emitting substance that emits green (G) light, and a light-emitting layer containing a light-emitting substance that emits blue (B) light. As the stacking order of the light-emitting layers, for example, the order of stacking R, G, B in sequence from the anode side or the order of stacking R, B, G in sequence from the anode side can be adopted. At this time, a buffer layer can also be provided between R and G or B.

[0552] For example, in the case where a light-emitting device having a single structure includes two light-emitting layers, it is preferable to adopt a structure including a light-emitting layer containing a light-emitting substance that emits blue (B) light and a light-emitting layer containing a light-emitting substance that emits yellow (Y) light. Sometimes this structure is referred to as a BY single structure.

[0553] A light-emitting device that emits white light preferably contains two or more light-emitting substances. In the case of obtaining white light using two light-emitting layers, the light-emitting substances can be selected such that the emission colors of the two light-emitting layers are in a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer be in a complementary color relationship, a light-emitting device that emits white light as a whole can be obtained. In addition, in the case of obtaining white light using three or more light-emitting layers, it is sufficient to mix the emission colors of the three or more light-emitting layers and have the light-emitting device emit white light as a whole.

[0554] Note that in Figure 22C and Figure 22D as Figure 22B shown, layer 780 and layer 790 can also each independently have a stacked structure composed of two or more layers.

[0555] In addition, in Figure 22E and Figure 22F the same light-emitting substance that emits the same color of light, or even the same light-emitting substance, can be used for light-emitting layer 771 and light-emitting layer 772. For example, in a light-emitting device included in sub-pixels that present light of each color, the light-emitting substance that emits blue light can also be used for light-emitting layer 771 and light-emitting layer 772. Regarding the sub-pixel that presents blue light, the blue light emitted by the light-emitting device can be extracted. In addition, regarding the sub-pixel that presents red light and the sub-pixel that presents green light, by providing a color conversion layer as Figure 22F shown in layer 764, the blue light emitted by the light-emitting device can be converted into light with a longer wavelength and extracted as red light or green light. In addition, as layer 764, it is preferable to use both a color conversion layer and a coloring layer.

[0556] In addition, in Figure 22E and Figure 22FIn this case, light-emitting materials that emit light of different colors from each other can also be used for the light-emitting layer 771 and the light-emitting layer 772. When the light emitted from the light-emitting layer 771 and the light emitted from the light-emitting layer 772 are in a complementary color relationship, white light emission can be obtained. As Figure 22F shown, it is preferable to provide a color filter for the layer 764. By passing white light through the color filter, light of a desired color can be obtained.

[0557] Note that although Figure 22E and Figure 22F show an example in which the light-emitting unit 763a includes one light-emitting layer 771 and the light-emitting unit 763b includes one light-emitting layer 772, it is not limited thereto. Each of the light-emitting unit 763a and the light-emitting unit 763b may also include two or more light-emitting layers.

[0558] Although Figure 22E and Figure 22F show an example of a light-emitting device including two light-emitting units, it is not limited thereto. The light-emitting device may also include three or more light-emitting units. In addition, a structure including two light-emitting units and a structure including three light-emitting units may be respectively referred to as a two-stage series structure and a three-stage series structure.

[0559] In addition, in Figure 22E and Figure 22F the light-emitting unit 763a includes a layer 780a, a light-emitting layer 771, and a layer 790a, and the light-emitting unit 763b includes a layer 780b, a light-emitting layer 772, and a layer 790b.

[0560] When the lower electrode 761 and the upper electrode 762 are an anode and a cathode, respectively, each of the layer 780a and the layer 780b includes one or more of a hole injection layer, a hole transport layer, and an electron blocking layer. In addition, each of the layer 790a and the layer 790b includes one or more of an electron injection layer, an electron transport layer, and a hole blocking layer. When the lower electrode 761 and the upper electrode 762 are a cathode and an anode, respectively, the structures of the layer 780a and the layer 790a are reversed from the above, and the structures of the layer 780b and the layer 790b are also reversed from the above.

[0561] In the case where the lower electrode 761 and the upper electrode 762 are an anode and a cathode, respectively, for example, layer 780a includes a hole injection layer and a hole transport layer on the hole injection layer, and may further include an electron blocking layer on the hole transport layer. In addition, layer 790a includes an electron transport layer, and may further include a hole blocking layer between the light-emitting layer 771 and the electron transport layer. In addition, layer 780b includes a hole transport layer, and may further include an electron blocking layer on the hole transport layer. In addition, layer 790b includes an electron transport layer and an electron injection layer on the electron transport layer, and may further include a hole blocking layer between the light-emitting layer 772 and the electron transport layer. In the case where the lower electrode 761 and the upper electrode 762 are a cathode and an anode, respectively, for example, layer 780a includes an electron injection layer and an electron transport layer on the electron injection layer, and may further include a hole blocking layer on the electron transport layer. In addition, layer 790a includes a hole transport layer, and may further include an electron blocking layer between the light-emitting layer 771 and the hole transport layer. In addition, layer 780b includes an electron transport layer, and may further include a hole blocking layer on the electron transport layer. In addition, layer 790b includes a hole transport layer and a hole injection layer on the hole transport layer, and may further include an electron blocking layer between the light-emitting layer 772 and the hole transport layer.

[0562] When manufacturing a light-emitting device having a tandem structure, two light-emitting units are stacked with a charge generation layer 785 therebetween. The charge generation layer 785 has at least a charge generation region. The charge generation layer 785 has a function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes.

[0563] In addition, as an example of a light-emitting device having a tandem structure, there can be cited Figures 23A to 23C the structure shown.

[0564] Figure 23A showing a structure including three light-emitting units. In Figure 23A this, a plurality of light-emitting units (light-emitting unit 763a, light-emitting unit 763b, and light-emitting unit 763c) are connected in series with each other via a charge generation layer 785. In addition, the light-emitting unit 763a includes layer 780a, light-emitting layer 771, and layer 790a, the light-emitting unit 763b includes layer 780b, light-emitting layer 772, and layer 790b, and the light-emitting unit 763c includes layer 780c, light-emitting layer 773, and layer 790c. Layer 780c may adopt a structure applicable to layer 780a and layer 780b, and layer 790c may adopt a structure applicable to layer 790a and layer 790b.

[0565] In Figure 23AAmong them, the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773 may include light-emitting substances that emit light of the same color. Specifically, the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773 may all adopt a structure including a light-emitting substance containing blue (B) (a so-called three-stage tandem structure of B\B\B). Note that "a\b" means that a light-emitting unit containing a light-emitting substance that emits light of a is provided with a light-emitting unit containing a light-emitting substance that emits light of b across a charge generation layer, and a and b represent colors.

[0566] In Figure 23A Among them, light-emitting substances that emit light of different colors may be used for a part or all of the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773. As combinations of the emission colors of the light-emitting layer 771, the light-emitting layer 772, and the light-emitting layer 773, for example, there may be mentioned: a structure in which any two are blue (B) and the remaining one is yellow (Y); and a structure in which any one is red (R), another is green (G), and the remaining one is blue (B).

[0567] Figure 23B is a tandem-type light-emitting device in which a light-emitting unit including a plurality of light-emitting layers is stacked. Figure 23B Shows a structure in which two light-emitting units (light-emitting unit 763a and light-emitting unit 763b) are connected in series across a charge generation layer 785. In addition, the light-emitting unit 763a includes a layer 780a, a light-emitting layer 771a, a light-emitting layer 771b, a light-emitting layer 771c, and a layer 790a, and the light-emitting unit 763b includes a layer 780b, a light-emitting layer 772a, a light-emitting layer 772b, a light-emitting layer 772c, and a layer 790b.

[0568] In Figure 23B Among them, with respect to the light-emitting layer 771a, the light-emitting layer 771b, and the light-emitting layer 771c, light-emitting substances in a complementary color relationship are selected to make the light-emitting unit 763a have a structure capable of achieving white light emission (W). In addition, with respect to the light-emitting layer 772a, the light-emitting layer 772b, and the light-emitting layer 772c, light-emitting substances in a complementary color relationship are selected to make the light-emitting unit 763b have a structure capable of achieving white light emission (W). That is, Figure 23B The structure shown can also be said to be a two-stage tandem structure of W\W. Note that there is no particular limitation on the stacking order of the light-emitting substances in a complementary color relationship. The implementer can appropriately select the most suitable stacking order. Although not shown, a three-stage tandem structure of W\W\W or a tandem structure of four or more stages may also be adopted.

[0569] As a light-emitting device having a series structure, examples include: a B / Y or Y / B two-stage series structure including a light-emitting unit that emits yellow (Y) light and a light-emitting unit that emits blue (B) light; an R·G / B or B / R·G two-stage series structure including a light-emitting unit that emits red (R) light and green (G) light and a light-emitting unit that emits blue (B) light; a B / Y / B three-stage series structure including in sequence a light-emitting unit that emits blue (B) light, a light-emitting unit that emits yellow (Y) light, and a light-emitting unit that emits blue (B) light; a B / YG / B three-stage series structure including in sequence a light-emitting unit that emits blue (B) light, a light-emitting unit that emits yellow-green (YG) light, and a light-emitting unit that emits blue (B) light; and a B / G / B three-stage series structure including in sequence a light-emitting unit that emits blue (B) light, a light-emitting unit that emits green (G) light, and a light-emitting unit that emits blue (B) light. Note that "a·b" means that a light-emitting unit contains a light-emitting substance that emits light of a and a light-emitting substance that emits light of b.

[0570] In addition, as Figure 23C shown, it is also possible to combine a light-emitting unit including one light-emitting layer and a light-emitting unit including a plurality of light-emitting layers.

[0571] Specifically, in the Figure 23C shown structure, a plurality of light-emitting units (light-emitting unit 763a, light-emitting unit 763b, and light-emitting unit 763c) are connected in series with each other via a charge generation layer 785. In addition, the light-emitting unit 763a includes a layer 780a, a light-emitting layer 771, and a layer 790a, the light-emitting unit 763b includes a layer 780b, light-emitting layers 772a, 772b, 772c, and a layer 790b, and the light-emitting unit 763c includes a layer 780c, a light-emitting layer 773, and a layer 790c.

[0572] In the Figure 23C shown structure, for example, a B / R·G·YG / B three-stage series structure can be adopted, where the light-emitting unit 763a is a light-emitting unit that emits blue (B) light, the light-emitting unit 763b is a light-emitting unit that emits red (R) light, green (G) light, and yellow-green (YG) light, and the light-emitting unit 763c is a light-emitting unit that emits blue (B) light.

[0573] As the number of stacked layers and color sequence of the light-emitting unit, for example, a two-stage structure of stacking B and Y from the anode side, a two-stage structure of stacking B and the light-emitting unit X, a three-stage structure of stacking B, Y, and B, a three-stage structure of stacking B, X, and B can be cited. As the number of stacked layers and color sequence of the light-emitting layers in the light-emitting unit X, for example, a two-layer structure of stacking R and Y from the anode side, a two-layer structure of stacking R and G, a two-layer structure of stacking G and R, a three-layer structure of stacking G, R, and G, or a three-layer structure of stacking R, G, and R, etc. can be adopted. In addition, other layers can also be provided between the two light-emitting layers.

[0574] Next, materials that can be used for the light-emitting device will be described.

[0575] As the electrodes on the light extraction side of the lower electrode 761 and the upper electrode 762, a conductive film that transmits visible light is used. In addition, as the electrode on the non-light extraction side, a conductive film that reflects visible light is preferably used. In addition, when the display device includes a light-emitting device that emits infrared light, it is preferable to use a conductive film that transmits visible light and infrared light as the electrode on the light extraction side and a conductive film that reflects visible light and infrared light as the electrode on the non-light extraction side.

[0576] In addition, a conductive film that transmits visible light can also be used as the electrode on the non-light extraction side. In this case, it is preferable to dispose this electrode between the reflective layer and the EL layer 763. In other words, the light emitted from the EL layer 763 can also be reflected by the reflective layer and extracted from the display device.

[0577] As materials for forming a pair of electrodes of the light-emitting device, metals, alloys, conductive compounds, and mixtures thereof can be appropriately used. As such materials, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys obtained by appropriately combining them can be cited. In addition, as such materials, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide can be cited. In addition, as such materials, aluminum-containing alloys (aluminum alloys) such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), silver-containing alloys such as an alloy of silver and magnesium and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC) can be cited. In addition, as such materials, elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (for example, lithium, cesium, calcium, strontium), rare earth metals such as europium and ytterbium, alloys obtained by appropriately combining them, and graphene can be cited.

[0578] The light-emitting device preferably adopts an optical microcavity resonator (microcavity) structure. Therefore, one of the pair of electrodes included in the light-emitting device preferably includes an electrode having visible light transmissivity and visible light reflectivity (semi-transmissive - semi-reflective electrode), and the other preferably includes an electrode having reflectivity to visible light (reflective electrode). When the light-emitting device has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting device can be enhanced.

[0579] In addition, the semi-transmissive - semi-reflective electrode can have a laminated structure of a conductive layer that can be used as a reflective electrode and a conductive layer that can be used as an electrode having transmissivity to visible light (also referred to as a transparent electrode).

[0580] The light transmittance of the transparent electrode is 40% or more. For example, an electrode with a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as the transparent electrode of the light-emitting device. The semi-transmissive - semi-reflective electrode has a reflectance of visible light of 10% or more and 95% or less, preferably 30% or more and 80% or less. The reflective electrode has a reflectance of visible light of 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ω cm or less.

[0581] The light-emitting device includes at least a light-emitting layer. In addition, as layers other than the light-emitting layer, the light-emitting device may also include layers containing substances with high hole injection properties, substances with high hole transport properties, hole blocking materials, substances with high electron transport properties, electron blocking materials, substances with high electron injection properties, or bipolar substances (substances with high electron transport and hole transport properties, also referred to as bipolar materials), etc. For example, in addition to the light-emitting layer, the light-emitting device may include one or more of a hole injection layer, a hole transport layer, a hole blocking layer, a charge generation layer, an electron blocking layer, an electron transport layer, and an electron injection layer.

[0582] The light-emitting device can use low molecular weight compounds or high molecular weight compounds, and may also contain inorganic compounds. The layers constituting the light-emitting device can be formed by methods such as evaporation (including vacuum evaporation), transfer printing, printing, inkjet, or coating.

[0583] The light-emitting layer contains one or more light-emitting substances. As the light-emitting substances, substances that exhibit light-emitting colors such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red are suitably used. In addition, as the light-emitting substances, substances that emit near-infrared light can also be used.

[0584] Examples of the light-emitting substances include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0585] Examples of the fluorescent materials include pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, and naphthalene derivatives.

[0586] Examples of the phosphorescent materials include organometallic complexes (especially iridium complexes) having a 4H-triazole skeleton, a 1H-triazole skeleton, an imidazole skeleton, a pyrimidine skeleton, a pyrazine skeleton, or a pyridine skeleton, organometallic complexes (especially iridium complexes) having a phenylpyridine derivative with an electron-withdrawing group as a ligand, platinum complexes, and rare earth metal complexes.

[0587] In addition to the luminescent material (guest material), the light-emitting layer may contain one or more organic compounds (host materials, auxiliary materials, etc.). As one or more organic compounds, one or both of a material with high hole-transporting property (hole-transporting material) and a material with high electron-transporting property (electron-transporting material) can be used. As the hole-transporting material, a material with high hole-transporting property that can be used for the hole-transporting layer described below can be used. As the electron-transporting material, a material with high electron-transporting property that can be used for the electron-transporting layer described below can be used. In addition, as one or more organic compounds, bipolar materials or TADF materials can also be used.

[0588] For example, the light-emitting layer preferably contains a combination of a phosphorescent material, a hole-transporting material that easily forms an exciplex, and an electron-transporting material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) utilizing energy transfer from the exciplex to the luminescent material (phosphorescent material) can be obtained efficiently. By selecting a combination of exciplexes that form light whose wavelength overlaps with the absorption band on the lowest energy side of the luminescent material, energy transfer can be made smooth, and thus light emission can be obtained efficiently. By adopting the above structure, high efficiency, low-voltage driving, and long life of the light-emitting device can be achieved simultaneously.

[0589] The hole injection layer is a layer containing a material with high hole-injecting property that injects holes from the anode into the hole-transporting layer. Examples of the material with high hole-injecting property include aromatic amine compounds and composite materials containing a hole-transporting material and a receptor material (electron acceptor material).

[0590] As the hole-transporting material, a material with high hole-transporting property that can be used for the hole-transporting layer described below can be used.

[0591] As the receptor material, for example, oxides of metals belonging to Groups 4 to 8 in the periodic table can be used. Specifically, molybdenum oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide, and rhenium oxide can be cited. Molybdenum oxide is particularly preferably used because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle. In addition, a fluorine-containing organic receptor material can also be used. In addition to the above, organic receptor materials such as quinodimethane derivatives, tetrachlorobenzoquinone derivatives, and hexaazatriphenylene derivatives can also be used.

[0592] For example, as the material with high hole-injecting property, a material containing a hole-transporting material and the above-mentioned oxides of metals belonging to Groups 4 to 8 in the periodic table (typically molybdenum oxide) can also be used.

[0593] The hole transport layer is a layer that transports holes injected from the anode through the hole injection layer to the light-emitting layer. The hole transport layer is a layer containing a hole transport material. As the hole transport material, a material with a hole mobility of 1×10 -6 cm 2 / Vs or more is preferably used. Note that as long as the hole transport property is higher than the electron transport property, materials other than the above can be used. As the hole transport material, a hole transport material with high hole transport property such as a π-electron-rich heteroaromatic compound (such as a carbazole derivative, a thiophene derivative, a furan derivative, etc.) or an aromatic amine (a compound having an aromatic amine skeleton) is preferably used.

[0594] The electron blocking layer is provided in contact with the light-emitting layer. The electron blocking layer is a layer having hole transport property and containing a material capable of blocking electrons. A material having electron blocking property among the above hole transport materials can be used for the electron blocking layer.

[0595] Since the electron blocking layer has hole transport property, it can also be referred to as a hole transport layer. In addition, a layer having electron blocking property in the hole transport layer can also be referred to as an electron blocking layer.

[0596] The electron transport layer is a layer that transports electrons injected from the cathode through the electron injection layer to the light-emitting layer. The electron transport layer is a layer containing an electron transport material. As the electron transport material, a material with an electron mobility of 1×10 -6 cm 2 / Vs or more is preferably used. Note that as long as the electron transport property is higher than the hole transport property, materials other than the above can be used. As the electron transport material, a metal complex having a quinoline skeleton, a metal complex having a benzoquinoline skeleton, a metal complex having an oxazole skeleton, or a metal complex having a thiazole skeleton can be used, and an electron transport material with high electron transport property such as an oxadiazole derivative, a triazole derivative, an imidazole derivative, an oxazole derivative, a thiazole derivative, a phenanthroline derivative, a quinoline derivative having a quinoline ligand, a benzoquinoline derivative, a quinoxaline derivative, a dibenzoquinoxaline derivative, a pyridine derivative, a bipyridine derivative, a pyrimidine derivative, or a π-electron-deficient heteroaromatic compound can also be used.

[0597] The hole blocking layer is provided in contact with the light-emitting layer. The hole blocking layer is a layer having electron transport property and containing a material capable of blocking holes. A material having hole blocking property among the above electron transport materials can be used for the hole blocking layer.

[0598] Since the hole blocking layer has electron transport property, it can also be referred to as an electron transport layer. In addition, a layer having hole blocking property in the electron transport layer can also be referred to as a hole blocking layer.

[0599] The electron injection layer is a layer containing a substance with high electron injection property that injects electrons from the cathode into the electron transport layer. As the substance with high electron injection property, an alkali metal, an alkaline earth metal, or a compound thereof can be used. As the substance with high electron injection property, a composite material containing an electron transport material and a donor material (electron donor material) can also be used.

[0600] In addition, preferably, the difference between the LUMO energy level of the substance with high electron injection property and the work function value of the material used for the cathode is small (specifically, 0.5 eV or less).

[0601] For example, lithium, cesium, ytterbium, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF x , where X is an arbitrary number), lithium 8-hydroxyquinolate (abbreviation: Liq), lithium 2-(2-pyridyl)phenolate (abbreviation: LiPP), lithium 2-(2-pyridyl)-3-hydroxypyridinolate (abbreviation: LiPPy), lithium 4-phenyl-2-(2-pyridyl)phenolate (abbreviation: LiPPP), lithium oxide (LiO x ), or cesium carbonate and other alkali metals, alkaline earth metals, or their compounds can be used for the electron injection layer. In addition, the electron injection layer can also have a stacked structure of two or more layers. As such a stacked structure, for example, a structure in which lithium fluoride is used as the first layer and ytterbium is provided as the second layer can be cited.

[0602] The electron injection layer can also contain an electron transport material. For example, a compound having a non-bonding electron pair and an electron-deficient heteroaromatic ring can be used for the electron transport material. Specifically, a compound having at least one of a pyridine ring, a diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), and a triazine ring can be used.

[0603] The lowest unoccupied molecular orbital (LUMO) energy level of the organic compound having a non-bonding electron pair is preferably -3.6 eV or more and -2.3 eV or less. Generally, cyclic voltammetry (CV), photoelectron spectroscopy, absorption spectroscopy, inverse photoelectron spectroscopy, etc. can be used to estimate the highest occupied molecular orbital (HOMO) energy level and LUMO energy level of the organic compound.

[0604] For example, 4,7-diphenyl-1,10-phenanthroline (abbreviation: BPhen), 2,9-bis(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviation: NBPhen), 2,2'-(1,3-phenylene)bis(9-phenyl-1,10-phenanthroline) (abbreviation: mPPhen2P), diquinoxalino[2,3-a:2',3'-c]phenazine (abbreviation: HATNA), 2,4,6-tris[3'-(pyridin-3-yl)biphenyl-3-yl]-1,3,5-triazine (abbreviation: TmPPPyTz), etc. can be used for organic compounds having non-bonding electron pairs. In addition, compared with BPhen, NBPhen has a high glass transition point (Tg), and thus has high heat resistance.

[0605] As described above, the charge generation layer has at least a charge generation region. The charge generation region preferably contains a receptor material, for example, preferably contains a hole transport material and a receptor material that can be used for the above hole injection layer.

[0606] In addition, the charge generation layer preferably includes a layer containing a substance with high electron injection property. This layer can also be referred to as an electron injection buffer layer. The electron injection buffer layer is preferably provided between the charge generation region and the electron transport layer. By providing the electron injection buffer layer, the injection barrier between the charge generation region and the electron transport layer can be alleviated, so that the electrons generated in the charge generation region can be easily injected into the electron transport layer.

[0607] The electron injection buffer layer preferably contains an alkali metal or an alkaline earth metal, for example, it can contain a compound of an alkali metal or a compound of an alkaline earth metal. Specifically, the electron injection buffer layer preferably contains an inorganic compound containing an alkali metal and oxygen or an inorganic compound containing an alkaline earth metal and oxygen, and more preferably contains an inorganic compound containing lithium and oxygen (such as lithium oxide (Li2O), etc.). In addition, as the electron injection buffer layer, the materials that can be used for the above electron injection layer can be suitably used.

[0608] The charge generation layer preferably includes a layer containing a substance with high electron transport property. This layer can also be referred to as an electron relay layer. The electron relay layer is preferably provided between the charge generation region and the electron injection buffer layer. When the charge generation layer does not include an electron injection buffer layer, the electron relay layer is preferably provided between the charge generation region and the electron transport layer. The electron relay layer has the function of suppressing the interaction between the charge generation region and the electron injection buffer layer (or the electron transport layer) and smoothly transferring electrons.

[0609] As the electron relay layer, phthalocyanine materials such as copper(II) phthalocyanine (abbreviation: CuPc) or metal complexes having metal-oxygen bonds and aromatic ligands are preferably used.

[0610] Note that sometimes, the above charge generation region, electron injection buffer layer, and electron relay layer cannot be clearly distinguished according to the cross-sectional shape, characteristics, etc.

[0611] In addition, the charge generation layer may also contain a donor material instead of an acceptor material. For example, as the charge generation layer, a layer containing an electron transport material and a donor material that can be used for the above electron injection layer may also be included.

[0612] When stacking light-emitting units, by providing a charge generation layer between two light-emitting units, an increase in the driving voltage can be suppressed.

[0613] This embodiment can be appropriately combined with other embodiments.

[0614] (Embodiment 6)

[0615] In this embodiment, an electronic device according to one aspect of the present invention will be described with reference to FIGS. 24 to 26.

[0616] The electronic device of this embodiment includes a display device according to one aspect of the present invention in a display unit. The display device according to one aspect of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display units of various electronic devices.

[0617] Examples of the electronic device include, in addition to electronic devices with relatively large screens such as television sets, desktop or notebook personal computers, monitors for computers, digital signage, and large game machines such as pachinko machines, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, portable information terminals, and sound reproduction devices.

[0618] In particular, since the display device according to one aspect of the present invention can improve clarity, it can be applied to electronic devices including relatively small display units. Examples of such electronic devices include watch-type and bracelet-type information terminal devices (wearable devices), wearable devices that can be worn on the head such as VR devices like head-mounted displays, glasses-type AR devices, and MR devices.

[0619] One embodiment of the display device of the present invention preferably has an extremely high resolution such as HD (pixel number 1280×720), FHD (pixel number 1920×1080), WQHD (pixel number 2560×1440), WQXGA (pixel number 2560×1600), 4K (pixel number 3840×2160), 8K (pixel number 7680×4320), etc. In particular, it is preferably set to a resolution of 4K, 8K or higher. In addition, the pixel density (clarity) in one embodiment of the display device of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, further preferably 1000 ppi or more, still further preferably 2000 ppi or more, still further preferably 3000 ppi or more, yet further preferably 5000 ppi or more, and further preferably 7000 ppi or more. By using the above display device having one or both of high resolution and high clarity, the sense of reality and depth can be further improved. In addition, there is no particular limitation on the screen ratio (aspect ratio) of one embodiment of the display device of the present invention. For example, the display device can adapt to various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10, etc.

[0620] The electronic device of the present embodiment may also include a sensor (the sensor has the function of sensing, detecting, and measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, inclination, vibration, odor, or infrared rays).

[0621] The electronic device of the present embodiment can have various functions. For example, it can have the following functions: the function of displaying various information (static images, dynamic images, text images, etc.) on the display unit; the function of a touch panel; the function of displaying a calendar, date, or time, etc.; the function of executing various software (programs); the function of performing wireless communication; the function of reading programs or data stored in a storage medium; etc.

[0622] Use Figures 24A to 24D An example of a wearable device that can be worn on the head is described. These wearable devices have at least one of the functions of displaying AR content, displaying VR content, displaying SR content, and displaying MR content. When the electronic device has the function of displaying at least one of the contents such as AR, VR, SR, MR, etc., the immersion feeling of the user can be improved.

[0623] Figure 24A The shown electronic device 700A and Figure 24BThe illustrated electronic device 700B includes a pair of display panels 751, a pair of frames 721, a communication unit (not shown), a pair of mounting portions 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, an eyeglass frame 757, and a pair of nose pads 758.

[0624] The display panel 751 can apply the display device of one aspect of the present invention. Therefore, an electronic device capable of extremely clear display can be realized.

[0625] Both the electronic device 700A and the electronic device 700B can project the image displayed by the display panel 751 onto the display area 756 in the optical member 753. Since the optical member 753 has light transmissivity, the user can see the image displayed in the display area overlapping with the transmitted image seen through the optical member 753. Therefore, both the electronic device 700A and the electronic device 700B are electronic devices capable of AR display.

[0626] On the electronic device 700A and the electronic device 700B, a camera capable of photographing the front can also be provided as the imaging unit. In addition, by providing an acceleration sensor such as a gyro sensor in the electronic device 700A and the electronic device 700B, the user's head orientation can be detected and an image corresponding to the direction can be displayed on the display area 756.

[0627] The communication unit has a wireless communication device, and an image signal etc. can be supplied through this wireless communication device. In addition, instead of the wireless communication device or in addition to the wireless communication device, a connector capable of connecting a cable for supplying an image signal and a power potential may be included.

[0628] In addition, the electronic device 700A and the electronic device 700B are provided with a battery and can be charged in one or both of a wireless manner and a wired manner.

[0629] The frame 721 may also be provided with a touch sensor module. The touch sensor module has a function of detecting whether the outer surface of the frame 721 is touched. Through the touch sensor module, various processes can be executed by detecting a tap operation or a swipe operation etc. of the user. For example, through a tap operation, processes such as temporarily stopping or playing back a moving image can be executed, and through a swipe operation, processes such as fast forward and rewind can be executed etc. In addition, by providing a touch sensor module in each of the two frames 721, the operation range can be expanded.

[0630] As the touch sensor module, various touch sensors can be used. For example, various methods such as a capacitive method, a resistive film method, an infrared method, an electromagnetic induction method, a surface acoustic wave method, and an optical method can be adopted. In particular, it is preferable to apply a capacitive or optical sensor to the touch sensor module.

[0631] When using an optical touch sensor, a photoelectric conversion element (also referred to as a photoelectric conversion device) can be used as the light-receiving element. Either one or both of an inorganic semiconductor and an organic semiconductor can be used in the active layer of the photoelectric conversion element.

[0632] Figure 24C The electronic device 800A shown and Figure 24D The electronic device 800B shown both include a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.

[0633] The display unit 820 can apply the display device of one aspect of the present invention. Therefore, an electronic device capable of extremely clear display can be realized. Thus, the user can experience a high sense of immersion.

[0634] The display unit 820 is provided at a position inside the housing 821 where it can be seen through the lens 832. In addition, by displaying different images between the pair of display units 820, three-dimensional display using parallax can be performed.

[0635] Both the electronic device 800A and the electronic device 800B can be referred to as VR-oriented electronic devices. The user wearing the electronic device 800A or the electronic device 800B can see the image displayed on the display unit 820 through the lens 832.

[0636] The electronic device 800A and the electronic device 800B preferably have a mechanism in which the left and right positions of the lens 832 and the display unit 820 can be adjusted so that the lens 832 and the display unit 820 are located at the most suitable positions according to the position of the user's eyes. In addition, it preferably has a mechanism in which the focus is adjusted by changing the distance between the lens 832 and the display unit 820.

[0637] The user can mount the electronic device 800A or the electronic device 800B on the head using the mounting unit 823. Note that in Figure 24C etc., an example is shown in which the mounting unit 823 has a shape such as the temple of glasses (also referred to as temple wires, etc.), but it is not limited thereto. As long as the user can mount it, the mounting unit 823 can have a helmet type or a band type shape, for example.

[0638] The imaging unit 825 has a function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used in the imaging unit 825. In addition, multiple cameras can be provided to be able to correspond to various perspectives such as telephoto and wide-angle.

[0639] Note that an example including the imaging unit 825 is shown here, and it is only necessary to provide a distance measurement sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object. In other words, the imaging unit 825 is one form of the detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as a lidar (Light Detection and Ranging) can be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be obtained, and a more accurate attitude operation can be achieved.

[0640] The electronic device 800A may also include a vibration mechanism used as a bone conduction earphone. For example, any one or more of the display unit 820, the housing 821, and the mounting unit 823 may adopt a structure including this vibration mechanism. Thus, there is no need to separately provide audio devices such as a headset, earphones, or speakers, and the user can enjoy images and sounds just by wearing the electronic device 800A.

[0641] Both the electronic device 800A and the electronic device 800B may include input terminals. A cable for supplying an image signal from an image output device or the like and power for charging a battery provided in the electronic device can be connected to the input terminals.

[0642] An electronic device according to one aspect of the present invention may also have a function of wirelessly communicating with the earphone 750. The earphone 750 includes a communication unit (not shown) and has a wireless communication function. The earphone 750 can receive information (such as sound data) from the electronic device through the wireless communication function. For example, Figure 24A the illustrated electronic device 700A has a function of transmitting information to the earphone 750 through the wireless communication function. In addition, for example, Figure 24C the illustrated electronic device 800A has a function of transmitting information to the earphone 750 through the wireless communication function.

[0643] In addition, the electronic device may also include an earphone unit. Figure 24B The illustrated electronic device 700B includes an earphone unit 727. For example, a structure in which the earphone unit 727 and the control unit are connected in a wired manner can be adopted. A part of the wiring connecting the earphone unit 727 and the control unit may also be arranged inside the housing 721 or the mounting unit 723.

[0644] Similarly, Figure 24DThe illustrated electronic device 800B includes a headphone unit 827. For example, a configuration in which the headphone unit 827 and the control unit 824 are connected in a wired manner can be adopted. A part of the wiring connecting the headphone unit 827 and the control unit 824 can also be disposed inside the housing 821 or the mounting portion 823. In addition, the headphone unit 827 and the mounting portion 823 may include magnets. Thus, it is possible to fix the headphone unit 827 to the mounting portion 823 with magnetic force, making storage easier, so it is preferable.

[0645] The electronic device may also include a sound output terminal capable of connecting to a headphone or a headset. In addition, the electronic device may include one or both of a sound input terminal and a sound input mechanism. As the sound input mechanism, for example, a sound collection device such as a microphone can be used. By providing the sound input mechanism to the electronic device, the electronic device can have the function of a so-called headset.

[0646] As described above, as an electronic device according to one aspect of the present invention, both the glasses type (electronic devices 700A and 700B, etc.) and the goggles type (electronic devices 800A and 800B, etc.) are preferable.

[0647] In addition, an electronic device according to one aspect of the present invention can transmit information to a headphone in a wired or wireless manner.

[0648] Figure 25A The illustrated electronic device 6500 is a portable information terminal device that can be used as a smartphone.

[0649] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, etc. The display unit 6502 has a touch panel function.

[0650] A display device according to one aspect of the present invention can be applied to the display unit 6502.

[0651] Figure 25B It is a cross-sectional schematic view of an end portion on the microphone 6506 side including the housing 6501.

[0652] A light-transmissive protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, an optical member 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are provided in a space surrounded by the housing 6501 and the protective member 6510.

[0653] The display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 using an adhesive layer (not shown).

[0654] In a region outside the display unit 6502, a part of the display panel 6511 is folded back, and an FPC 6515 is connected to the folded-back part. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on the printed circuit board 6517.

[0655] The display panel 6511 can be a flexible display according to one aspect of the present invention. Thus, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted while suppressing the thickness of the electronic device. Further, by folding a part of the display panel 6511 to provide a connection portion with the FPC 6515 on the back surface of the pixel portion, a narrow-bezel electronic device can be realized.

[0656] Figure 25C An example of a television device is shown. In the television device 7100, a display unit 7000 is assembled in a housing 7101. A structure in which the housing 7101 is supported by a bracket 7103 is shown here.

[0657] A display device according to one aspect of the present invention can be applied to the display unit 7000.

[0658] The operation of the television device 7100 shown can be performed by using operation switches provided in the housing 7101 and a separately provided remote control unit 7111. Figure 25C Alternatively, a touch sensor can be provided in the display unit 7000, and the operation of the television device 7100 can be performed by touching the display unit 7000 with a finger or the like. Further, a display unit for displaying information output from the remote control unit 7111 can be provided in the remote control unit 7111. By using operation keys or a touch panel provided in the remote control unit 7111, channel and volume operations can be performed, and operations on the image displayed on the display unit 7000 can be performed.

[0659] In addition, the television device 7100 includes a receiver, a modem, etc. General television broadcasts can be received by using the receiver. Further, by connecting to a communication network in a wired or wireless manner through the modem, one-way (from a sender to a receiver) or two-way (between a sender and a receiver or between receivers, etc.) information communication can be performed.

[0660] Figure 25D An example of a notebook personal computer is shown. The notebook personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc. A display unit 7000 is assembled in the housing 7211.

[0661] A display device according to one aspect of the present invention can be applied to the display unit 7000.

[0662] Figure 25E and Figure 25F shows an example of a digital signage.

[0663] Figure 25E The digital signage 7300 shown includes a housing 7301, a display unit 7000, a speaker 7303, etc. In addition, it may also include LED lights, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.

[0664] Figure 25F Shows a digital signage 7400 provided on a cylindrical column 7401. The digital signage 7400 includes a display unit 7000 provided along the curved surface of the column 7401.

[0665] In Figure 25E and Figure 25F , a display device according to one aspect of the present invention can be applied to the display unit 7000.

[0666] The larger the display unit 7000 is, the more information can be provided at one time. The larger the display unit 7000 is, the more likely it is to attract people's attention. For example, it can improve the advertising effect.

[0667] By using a touch panel for the display unit 7000, not only can static images or dynamic images be displayed on the display unit 7000, but also the user can operate intuitively. Therefore, it is preferable. In addition, when used for providing information such as route information or traffic information, the usability can be improved through intuitive operations.

[0668] As Figure 25E and Figure 25F shown, the digital signage 7300 or the digital signage 7400 preferably can be linked with an information terminal device 7311 such as a smart phone carried by the user or an information terminal device 7411 through wireless communication. For example, the advertisement information displayed on the display unit 7000 can be displayed on the screen of the information terminal device 7311 or the information terminal device 7411. In addition, by operating the information terminal device 7311 or the information terminal device 7411, the display of the display unit 7000 can be switched.

[0669] In addition, a game can be executed on the digital signage 7300 or the digital signage 7400 with the screen of the information terminal device 7311 or the information terminal device 7411 as an operation unit (controller). Thus, an unspecified number of users can participate in the game simultaneously and enjoy the fun of the game.

[0670] Figures 26A to 26GThe electronic device shown includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, a sensor 9007 (the sensor has the function of detecting, detecting or measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, inclination, vibration, odor or infrared rays), a microphone 9008, etc.

[0671] In Figures 26A to 26G it, a display device of one embodiment of the present invention can be used for the display unit 9001.

[0672] Figures 26A to 26G The electronic device shown has various functions. For example, it can have the following functions: the function of displaying various infor...

Claims

1. A semiconductor device comprising: a first transistor; as well as The second transistor, The first transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a first oxide layer, a second oxide layer, a first insulating layer, a second insulating layer and a third insulating layer. The second transistor includes a fourth conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, a third oxide layer, the first insulating layer, a fourth insulating layer and a fifth insulating layer, The first insulating layer is located on the first conductive layer and the fourth conductive layer. The second insulating layer is located on the first insulating layer, The first oxide layer is located on the second insulating layer, The second conductive layer is located on the first oxide layer, The first insulating layer, the second insulating layer, the first oxide layer, and the second conductive layer have openings reaching the first conductive layer, The second oxide layer is in contact with at least the top surface of the first conductive layer, the side surface of the first insulating layer, the side surface of the second insulating layer, the side surface of the first oxide layer, and the side surface of the second conductive layer in the opening. The third insulating layer is located on the second oxide layer in the opening, The third conductive layer overlaps the second oxide layer in the opening via the third insulating layer. The fourth insulating layer is located on the first insulating layer, The third oxide layer is located on the fourth insulating layer, The fifth conductive layer and the sixth conductive layer exist separately from each other on the third oxide layer, The fifth insulating layer is located on the third oxide layer and between the fifth conductive layer and the sixth conductive layer. Furthermore, the seventh conductive layer is located on the fifth insulating layer and has a portion overlapping the fourth conductive layer via the third oxide layer.

2. The semiconductor device according to claim 1, The size of the opening in the second conductive layer when viewed in a plane is consistent or substantially consistent with the size of the opening in the first oxide layer when viewed in a plane.

3. The semiconductor device according to claim 1, wherein the size of the opening in the second conductive layer when viewed in a plane is larger than the size of the opening in the first oxide layer when viewed in a plane, And the second oxide layer contacts a portion of a top surface of the first oxide layer.

4. The semiconductor device according to claim 1, wherein the first conductive layer has a concave portion, The opening overlaps with the recess, And the second oxide layer is also in contact with the inner wall of the concave portion of the first conductive layer.

5. The semiconductor device according to claim 4, The third conductive layer overlaps with a side surface of the first insulating layer and a side surface of the second insulating layer via the third insulating layer and the second oxide layer.

6. A display device, comprising: The semiconductor device according to any one of claims 1 to 5; as well as Light emitting element, The light-emitting element comprises a first electrode, a light-emitting layer and a second electrode stacked in sequence. Furthermore, the first electrode is electrically connected to the first conductive layer, the second conductive layer, the fifth conductive layer or the sixth conductive layer.

7. The display device according to claim 6, wherein a first layer, a second layer, and a third layer are sequentially stacked, the first layer includes a third transistor containing silicon in a channel formation region, the second layer includes the first transistor and the second transistor, and the third layer includes the light-emitting element.

8. A display module, comprising: the display device according to claim 6; and at least one of a connector and an integrated circuit.

9. An electronic device, comprising: the display module according to claim 8; and at least one of a housing, a battery, a camera, a speaker, and a microphone.

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