Alternating current slow charging (CP) charging control guide circuit

Abstract

The application belongs to the technical field of new energy vehicles, and specifically relates to an alternating current slow charging CP charging control guide circuit, which comprises a CP signal input end, a power supply wake-up module, a wake-up level back acquisition module and a PWM signal back acquisition module; wherein the CP signal input end is connected with the power supply wake-up module, the wake-up level back acquisition module and the PWM signal back acquisition module. The detection accuracy is improved: by optimizing the signal processing algorithm and the hardware circuit design, various characteristic parameters of the CP signal can be accurately identified, the inaccurate detection problem caused by signal interference, hardware error and other factors in the prior art can be effectively overcome, so that the charging system can accurately judge the connection state between the vehicle and the charging pile, the charging mode and other information, and reliable basis is provided for the safe and stable charging process.

Description

Technical Field

[0001] This invention relates to the field of new energy vehicle technology, specifically to an AC slow-charging CP charging control and guidance circuit. Background Technology

[0002] New energy electric vehicles consist of: electric drive and control systems, mechanical systems such as drive force transmission, and working devices to complete predetermined tasks.

[0003] The electric drive and control system is the core of an electric vehicle and the biggest difference between it and an internal combustion engine vehicle. The electric drive and control system consists of a drive motor, a power supply, and a speed control device for the motor. Other components of an electric vehicle are basically the same as those of an internal combustion engine vehicle.

[0004] Traditional new energy vehicles have the following problems:

[0005] The AC slow charging CP detection circuit does not have a plug-in wake-up function. The AC slow charging CP detection circuit has a complex structure, involving the coordinated operation of multiple analog and digital circuits, which increases the difficulty of hardware design, the number of components, and consequently the cost of the entire charging system. Summary of the Invention

[0006] The purpose of this invention is to provide an AC slow charging CP charging control and guidance circuit to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides the following technical solution: an AC slow charging CP charging control and guiding circuit, comprising:

[0008] CP signal input terminal, power wake-up module, wake-up level sampling module and PWM signal sampling module;

[0009] The CP signal input terminal is connected to the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module.

[0010] Preferably, it also includes an S2 switch, which is located between the CP signal input terminal and the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module.

[0011] Preferably, the S2 switch includes a diode D2, a resistor R2, a resistor R3, a control and guidance circuit switch S2, and an NMOS M1. The CP signal input terminal is connected to the positive terminal of the diode D2, the negative terminal of the diode D2 is connected to the resistor R2, the resistor R3, the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module, the resistor R3 is grounded, the resistor R2 is connected to pin 3 of the NMOS M1, the S2 switch is connected to pin 1 of the NMOS M1, and pin 2 of the NMOS M1 is grounded.

[0012] Preferably, the wake-up level sampling module includes resistors R6, R7, R8 and MCU_AD_CPV. The negative terminal of diode D2 is connected to one end of resistor R6, the other end of resistor R6 is connected to one end of resistors R7 and R8, the other end of resistor R7 is grounded, and the other end of resistor R8 is connected to MCU_AD_CPV.

[0013] Preferably, the power wake-up module includes a resistor R10 and a diode D1. One end of the resistor R10 is connected to the negative terminal of the diode D2, and the other end of the resistor R10 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is output to SBC_WAEK.

[0014] Preferably, the PWM signal retrieval module includes resistors R4 and R5, an NMOS transistor M2, resistors R9, R11, R12, R13, and R14, an MCU_PWM_CP, and a comparator U1A. One end of resistor R4 is connected to the cathode of diode D2, and the other end of resistor R4 is connected to one end of resistor R5 and pin 1 of NMOS transistor M2. The other end of resistor R5 is connected to pin 2 of NMOS transistor M2 and grounded. Pin 3 of M2 is connected to one end of resistor R9 and the negative input pin of comparator U1A. The other end of resistor R9 is connected to one end of resistor R11. The other end of resistor R11 is connected to the positive input pin of comparator U1A and one end of resistor R12. The other end of resistor R12 is grounded. The negative power supply pin of comparator U1A is grounded. The positive power supply pin of comparator U1A is connected to one end of resistor R11 and resistor R13. The output pin of comparator U1A is connected to one end of resistor R14 and the other end of resistor R13. The other end of resistor R14 is connected to MCU_PWM_CP.

[0015] Preferably, the specific CP wake-up input analog quantity acquisition process of the AC slow charging CP charging control guidance circuit is as follows:

[0016] When the slow charging gun is inserted, the slow charging station inputs a 12V level signal, which is divided by resistors R6 and R7 and then input to the MCU acquisition port MCU_AD_CPV.

[0017] Specific CP slow charging digital PWM acquisition process:

[0018] When the slow charging gun is inserted, the slow charging station receives a 12V input, followed by 9V and 6V PWM digital signals;

[0019] When the input is high, the voltage is divided by resistors R4 and R5, triggering NMOS M2 to turn on and pull the negative input pin of comparator U1A low. When the input is low, the voltage is divided by resistors R4 and R5, which does not meet the NMOS M2 turn-on threshold, so NMOS M2 does not turn on, and the negative input pin of comparator U1A is high.

[0020] VCC is divided by resistors R11 and R12 to provide a reference voltage to the positive input pin of comparator U1A;

[0021] Comparator U1A compares the voltages of its negative input pin and positive input pin. When the voltage of the positive input pin is greater than the voltage of the negative input pin, the output pin of comparator U1A outputs a high level.

[0022] When the voltage at the positive input pin is less than the voltage at the negative input pin, the output pin of comparator U1A outputs a low level.

[0023] By detecting AD level and digital signal, the system interacts with the charging station to achieve normal charging.

[0024] Preferably, the MCU_AD_CPV sampling calculation formula is as follows:

[0025] MCU_AD_CPV=12V*R7 / (R6+R7).

[0026] Preferably, the formula for calculating the input voltage at the positive input pin of comparator U1A is as follows:

[0027] Positive input pin voltage = VCC * R12 / (R12 + R11).

[0028] Preferably, the input voltage of the NMOS M2 is calculated as follows:

[0029] The input voltage of NMOS M2 = the voltage at the input terminal of the CP signal * R5 / (R5 + R4).

[0030] Compared with the prior art, the beneficial effects of the present invention are:

[0031] Improved detection accuracy: By optimizing signal processing algorithms and hardware circuit design, various characteristic parameters of the CP signal, such as amplitude, frequency, and duty cycle, can be accurately identified. This effectively overcomes the inaccurate detection problems caused by signal interference and hardware errors in existing technologies, thereby ensuring that the charging system can accurately determine the connection status and charging mode between the vehicle and the charging pile, providing a reliable basis for a safe and stable charging process.

[0032] Enhanced System Stability: The stability of the AC slow-charging CP detection system is improved to ensure reliable operation under various working conditions and environmental environments. Optimized hardware circuit design enhances the circuit's anti-interference capability and reliability, reducing detection interruptions or errors caused by hardware failures.

[0033] Improve compatibility and versatility: Solve compatibility issues between electric vehicles and charging stations of different brands and models, aiming to develop a universal AC slow charging CP detection technology. Attached Figure Description

[0034] Figure 1 This is a system logic block diagram of the present invention;

[0035] Figure 2 This is the circuit schematic diagram of the present invention;

[0036] Figure 3 The timing diagram for AC charging connection control. Detailed Implementation

[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0038] In the description of this invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0039] Example 1:

[0040] Please see Figure 1-3 This invention provides a technical solution: an AC slow charging CP charging control and guidance circuit, comprising:

[0041] CP signal input terminal, power wake-up module, wake-up level sampling module and PWM signal sampling module;

[0042] The CP signal input terminal is connected to the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module.

[0043] It also includes an S2 switch, which is located between the CP signal input terminal and the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module.

[0044] The S2 switch includes a diode D2, resistors R2 and R3, a control and guidance circuit switch S2, and an NMOS M1. The CP signal input terminal is connected to the positive terminal of the diode D2. The negative terminal of the diode D2 is connected to resistors R2 and R3, a power wake-up module, a wake-up level sampling module, and a PWM signal sampling module. Resistor R3 is grounded. Resistor R2 is connected to pin 3 of the NMOS M1. The S2 switch is connected to pin 1 of the NMOS M1. Pin 2 of the NMOS M1 is grounded.

[0045] The wake-up level sampling module includes resistors R6, R7, and R8, and MCU_AD_CPV. The negative terminal of diode D2 is connected to one end of resistor R6, the other end of resistor R6 is connected to one end of resistors R7 and R8, the other end of resistor R7 is grounded, and the other end of resistor R8 is connected to MCU_AD_CPV.

[0046] The power wake-up module includes a resistor R10 and a diode D1. One end of the resistor R10 is connected to the negative terminal of the diode D2, and the other end of the resistor R10 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is output to SBC_WAEK.

[0047] The PWM signal acquisition module includes resistors R4 and R5, an NMOS transistor M2, resistors R9, R11, R12, R13, and R14, an MCU_PWM_CP, and a comparator U1A. One end of resistor R4 is connected to the cathode of diode D2, and the other end of resistor R4 is connected to one end of resistor R5 and pin 1 of NMOS transistor M2. The other end of resistor R5 is connected to pin 2 of NMOS transistor M2 and grounded. Pin 3 of M2 is connected to one end of resistor R9 and the negative input pin of comparator U1A. The other end of resistor R9 is connected to one end of resistor R11. The other end of resistor R11 is connected to the positive input pin of comparator U1A and one end of resistor R12. The other end of resistor R12 is grounded. The negative power supply pin of comparator U1A is grounded. The positive power supply pin of comparator U1A is connected to one end of resistor R11 and resistor R13. The output pin of comparator U1A is connected to one end of resistor R14 and the other end of resistor R13. The other end of resistor R14 is connected to MCU_PWM_CP.

[0048] Analysis of the above content:

[0049] like Figure 1 As shown, the symbols specifically represent the following:

[0050] CP_IN (CP signal input terminal): AC slow charging signal input port;

[0051] Diode D2: CP input signal anti-reverse diode and off to prevent negative voltage from entering the system;

[0052] R2, R3: Vehicle internal control guiding resistors;

[0053] S2, M1: M1 is an NMOS switch, and S2 is the vehicle internal control and guidance circuit switch designed according to the national standard requirements in Table 2.

[0054] R4 and R3 are the voltage divider resistors for the digital PWM input;

[0055] M2: This is NMOS M2. When the digital input voltage is greater than the NMOS turn-on threshold, NMOS M2 is triggered to close.

[0056] R9, R11, R12, U1A: Resistors R9, R11, and R12 are the input level trigger resistors for comparator U1A;

[0057] R13: Pull-up resistor for comparator U1A output;

[0058] R14: Current-limiting resistor for digital signal acquisition;

[0059] MCU_PWM_CP: This is the MCU digital signal acquisition port.

[0060] R6 and R7 are voltage divider resistors for level input acquisition;

[0061] R8: Input voltage sampling current limiting resistor;

[0062] MCU_AD_CPV: The AD sampling port for MCU voltage sampling.

[0063] R10: Current-limiting resistor for wake-up input;

[0064] Diode D1: This is an input-to-input reverse protection diode to prevent interference with other wake-up sources within the system and improve the stability of the wake-up signal.

[0065] The specific CP wake-up input analog signal acquisition process of the AC slow charging CP charging control guidance circuit is as follows:

[0066] When the slow charging gun is inserted, the slow charging station inputs a 12V level signal, which is divided by resistors R6 and R7 and then input to the MCU acquisition port MCU_AD_CPV.

[0067] The MCU_AD_CPV sampling calculation formula is as follows:

[0068] MCU_AD_CPV=12V*R7 / (R6+R7).

[0069] Specific CP slow charging digital PWM acquisition process:

[0070] When the slow charging gun is inserted, the slow charging station receives a 12V input, followed by 9V and 6V PWM digital signals;

[0071] When the input is high, the voltage is divided by resistors R4 and R5, triggering NMOS M2 to turn on and pull the negative input pin of comparator U1A low. When the input is low, the voltage is divided by resistors R4 and R5, which does not meet the NMOS M2 turn-on threshold, so NMOS M2 does not turn on, and the negative input pin of comparator U1A is high.

[0072] VCC is divided by resistors R11 and R12 to provide a reference voltage to the positive input pin of comparator U1A;

[0073] Comparator U1A compares the voltages of its negative input pin and positive input pin. When the voltage of the positive input pin is greater than the voltage of the negative input pin, the output pin of comparator U1A outputs a high level.

[0074] When the voltage at the positive input pin is less than the voltage at the negative input pin, the output pin of comparator U1A outputs a low level.

[0075] By detecting AD levels and digital signals, the system interacts with the charging station to achieve normal charging.

[0076] Digital Acquisition Truth Table

[0077] CP_IN IN+ and IN- OUT1 0 IN+<IN- 0 1 IN+>IN- 1

[0078] Remark:

[0079] 1: Represents a high-level input;

[0080] 0: Represents a low-level input.

[0081] The formula for calculating the input voltage at the positive input pin of comparator U1A is as follows:

[0082] Positive input pin voltage = VCC * R12 / (R12 + R11).

[0083] The NMOS M2 input voltage is calculated as follows:

[0084] The input voltage of NMOS M2 = the voltage at the input terminal of the CP signal * R5 / (R5 + R4).

[0085] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or basic characteristics. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of the invention is defined by the appended claims rather than the foregoing description. Therefore, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention, and no reference numerals in the claims should be construed as limiting the scope of the claims.

[0086] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. An AC slow charging CP charging control and guiding circuit, characterized in that, include: CP signal input terminal, power wake-up module, wake-up level sampling module and PWM signal sampling module; The CP signal input terminal is connected to the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module. It also includes an S2 switch, which is located between the CP signal input terminal and the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module; The S2 switch includes a diode D2, a resistor R2, a resistor R3, a control and guidance circuit switch S2, and an NMOS M1. The CP signal input terminal is connected to the positive terminal of the diode D2. The negative terminal of the diode D2 is connected to the resistor R2, the resistor R3, the power wake-up module, the wake-up level sampling module, and the PWM signal sampling module. The resistor R3 is grounded. The resistor R2 is connected to pin 3 of the NMOS M1. The S2 switch is connected to pin 1 of the NMOS M1. Pin 2 of the NMOS M1 is grounded. The wake-up level sampling module includes resistors R6, R7, and R8, and MCU_AD_CPV. The cathode of diode D2 is connected to one end of resistor R6, the other end of resistor R6 is connected to one end of resistors R7 and R8, the other end of resistor R7 is grounded, and the other end of resistor R8 is connected to MCU_AD_CPV. The power wake-up module includes a resistor R10 and a diode D1. One end of the resistor R10 is connected to the negative terminal of the diode D2, and the other end of the resistor R10 is connected to the positive terminal of the diode D1. The negative terminal of the diode D1 is output to SBC_WAEK. The PWM signal retrieval module includes resistors R4, R5, NMOS M2, R9, R11, R12, R13, R14, MCU_PWM_CP, and comparator U1A.

2. The AC slow charging CP charging control and guiding circuit according to claim 1, characterized in that: One end of resistor R4 is connected to the negative terminal of diode D2. The other end of resistor R4 is connected to one end of resistor R5 and pin 1 of NMOS M2. The other end of resistor R5 is connected to pin 2 of NMOS M2 and grounded. Pin 3 of NMOS M2 is connected to one end of resistor R9 and the negative input pin of comparator U1A. The other end of resistor R9 is connected to one end of resistor R11. The other end of resistor R11 is connected to the positive input pin of comparator U1A and one end of resistor R12. The other end of resistor R12 is grounded. The negative power supply pin of comparator U1A is grounded. The positive power supply pin of comparator U1A is connected to one end of resistor R11 and one end of resistor R13. The output pin of comparator U1A is connected to one end of resistor R14 and the other end of resistor R13. The other end of resistor R14 is connected to MCU_PWM_CP.

3. The AC slow charging CP charging control and guiding circuit according to claim 2, characterized in that: The specific CP wake-up input analog signal acquisition process of the AC slow charging CP charging control guidance circuit is as follows: When the slow charging gun is inserted, the slow charging station inputs a 12V level signal, which is divided by resistors R6 and R7 and then input to the MCU acquisition port MCU_AD_CPV. Specific CP slow charging digital PWM acquisition process: When the slow charging gun is inserted, the slow charging station receives a 12V input, followed by 9V and 6V PWM digital signals; When the input is high, the voltage is divided by resistors R4 and R5, triggering NMOS M2 to turn on and pull the negative input pin of comparator U1A low. When the input is low, the voltage is divided by resistors R4 and R5, which does not meet the NMOS M2 turn-on threshold, so NMOS M2 does not turn on, and the negative input pin of comparator U1A is high. VCC is divided by resistors R11 and R12 to provide a reference voltage to the positive input pin of comparator U1A; Comparator U1A compares the voltages of its negative input pin and positive input pin. When the voltage of the positive input pin is greater than the voltage of the negative input pin, the output pin of comparator U1A outputs a high level. When the voltage at the positive input pin is less than the voltage at the negative input pin, the output pin of comparator U1A outputs a low level. By detecting AD levels and digital signals, the system interacts with the charging station to achieve normal charging.

4. The AC slow charging CP charging control and guiding circuit according to claim 3, characterized in that: The MCU_AD_CPV sampling calculation formula is as follows: MCU_AD_CPV=12V*R7 / (R6+R7).

5. The AC slow charging CP charging control and guiding circuit according to claim 4, characterized in that: The formula for calculating the input voltage at the positive input pin of comparator U1A is as follows: Positive input pin voltage = VCC * R12 / (R12 + R11).

6. The AC slow charging CP charging control and guiding circuit according to claim 5, characterized in that: The NMOSM2 input voltage is calculated as follows: The input voltage of NMOS M2 = CP signal input voltage * R5 / (R5 + R4).

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