Orthogonal signal high-precision real-time error compensation system and method based on ZYNQ system

Abstract

The invention discloses an orthogonal signal high-precision real-time error compensation system and method based on a ZYNQ system, the ZYNQ system is mainly composed of a PS end and a PL end, the core of the PS end is an ARM unit, and the core of the PL end is an FPGA unit. After orthogonal signal data enters a ZYNQ system, a PL end performs mean filtering on collected data, combines a data input time sequence, solves a coefficient matrix by using a pipeline structure, and sends the obtained coefficient matrix to a PS end through an AXI bus, the PS end performs SVD decomposition and Cholesky decomposition on the coefficient matrix, an equation set is solved according to a decomposition matrix, a Hydemann parameter is accurately calculated, and the parameter is calculated. The Hydemann parameters are sent to a PL end through an AXI bus, the PL end carries out error compensation on the signals and then outputs the signals, and meanwhile fine direction distinguishing and displacement solving of the signals are completed. According to the method, a large amount of floating-point operation is completed by utilizing the PS end, the accuracy of Hydemann parameter calculation is ensured, and the real-time performance of signal processing is ensured by utilizing the PL end to process input fixed-point data in parallel, so that high-precision real-time error compensation of orthogonal signals is realized.

Description

Technical Field

[0001] The present invention belongs to the field of precision measurement technology, and specifically relates to a high-precision real-time error compensation system and method for orthogonal signals based on a ZYNQ system. Background Art

[0002] Grid sensors are widely used in the field of precision measurement due to their excellent performance. After the output signals of grid sensors are subjected to optoelectronic conversion, two orthogonal signals can be obtained, which can be used for micro-displacement measurement or precision control after processing. In practical applications, due to factors such as external environmental interference and instrument self-errors, the orthogonal signals output by the measurement system usually have errors, mainly including unequal amplitude error, phase shift error, and error caused by DC drift. These three types of errors have a significant impact on the measurement accuracy and need to be corrected and compensated.

[0003] The Hydemann algorithm is a classic orthogonal error compensation algorithm that can accurately correct the errors of the orthogonal signals output by the measurement system. The process of solving Hydemann parameters can be regarded as a least squares solution problem. Since the calculation involves fifth-order matrix operations, the required amount of resources is large, and it is difficult to achieve high-precision real-time compensation of measurement signal errors on-chip. Currently, the mainstream solution is to perform data operation processing based on the PC side. Summary of the Invention

[0004] The present invention provides a high-precision real-time error compensation system and method for orthogonal signals based on a ZYNQ system, which uses the ZYNQ system to break away from the PC side, achieve on-chip calculation and error correction, improve the processing speed and compensation accuracy of orthogonal signals, and provide a new hardware solution for the analysis and processing of orthogonal signals.

[0005] To solve the above technical problems, a technical solution adopted by the present invention is:

[0006] A high-precision real-time processing system for orthogonal signals based on a ZYNQ system, comprising a ZYNQ system, an AD module, a DA module, and a host computer system; the ZYNQ system includes a PL side and a PS side communicatively connected to it through an AXI bus;

[0007] The AD module converts two orthogonal signals into fixed-point data and inputs it to the PL side;

[0008] The PL side performs mean filtering and multiplication accumulation on the input fixed-point data to obtain a mean filtered signal and a coefficient matrix. The mean filtered signal is stored in on-chip RAM, and the coefficient matrix is sent to the PS side through the AXI bus;

[0009] After receiving the coefficient matrix, the PS side performs matrix decomposition on the coefficient matrix and solves the equations, and sends the obtained Hydemann parameters to the PL side;

[0010] After the PL side receives the data, the obtained Hydemann parameters are used to perform error compensation on the mean-filtered signal to obtain the orthogonal signal after error correction;

[0011] The corrected orthogonal signal is processed in three paths: the first path changes the frequency through the asynchronous FIFO output module at the PL side and outputs the corrected orthogonal signal through the DA module; the second path is reprocessed by the PL side for fine-resolution direction finding and displacement solution, and the results are sent to the host computer system; the third path is directly sent to the host computer system for display and storage.

[0012] Furthermore, the internal data interaction logic of the ZYNQ system is as follows: the PL side calculates the coefficient matrix data, converts it into floating-point numbers, and the converted coefficient matrix data is sent to the PS side through the AXI bus. After the PS side solves the Hydemann parameters, the data is sent to the PL side in the same way.

[0013] Furthermore, the specific method of mean filtering is as follows: the mean-filtered data is grouped by 2 n data as a group, and the rounding operation is realized by shifting, which ensures the data processing accuracy while avoiding division operations, where n is 3 or 4.

[0014] Furthermore, the coefficient matrix solving process adopts a pipeline processing structure, which efficiently completes the high-order power operation of two groups of fixed-point data while avoiding repeated data calculation.

[0015] Furthermore, the specific process of the PS side solving the Hydemann parameters is as follows: the coefficient matrix is decomposed by using the SVD decomposition method, and the obtained singular value matrix is used to judge whether the coefficient matrix is positive definite. If the coefficient matrix is positive definite, the coefficient matrix is decomposed by Cholesky decomposition, and the equations are solved based on the decomposed matrix to calculate the Hydemann parameters. If it is not positive definite, the previous set of valid Hydemann parameters is used as the error correction coefficient of the current data, and it is judged whether there is an abnormal situation in combination with the actual operation of the measurement system and sent to the host computer.

[0016] A high-precision real-time processing method for orthogonal signals based on the ZYNQ system is also provided, including the following steps:

[0017] S1. The measurement system outputs two orthogonal signals, which are converted into fixed-point data through the AD module and input into the ZYNQ system;

[0018] S2. The ZYNQ system caches the signal data;

[0019] S3. The PL side performs mean filtering and coefficient matrix calculation on the cached signal data according to the pipeline structure;

[0020] S4. After obtaining the coefficient matrix, the PL side sends the coefficient matrix to the PS side through the AXI bus for matrix decomposition operation;

[0021] S5. After the PS side receives the coefficient matrix, it performs SVD decomposition on the coefficient matrix;

[0022] S6. After the SVD decomposition is completed, if the coefficient matrix is full rank, then perform Cholesky decomposition, directly solve the equations according to the decomposed triangular matrix, and calculate the Hydemann parameters; if the coefficient matrix is not full rank, use the previous set of valid Hydemann parameters as the error compensation coefficient for the current data group. After obtaining the Hydemann parameters, send the Hydemann parameters to the PL side through the AXI bus;

[0023] S7. After the PL side receives the Hydemann parameters, perform error compensation on the mean-filtered signal. The compensated data is divided into three paths: the first path is stored in the on-chip RAM of the PL side and waits for subsequent processing; the second path is sent to the DA module by the asynchronous FIFO output module after fixed-point conversion, so as to output the compensated orthogonal signal; the third path is directly sent to the host computer for display and storage;

[0024] S8. For the data stored in the on-chip RAM of the PL side, use the CORDIC algorithm to calculate the arctangent function, solve the current phase, normalize the phase, complete signal subdivision, and judge the corresponding displacement direction according to the change direction of the subdivision number, complete fine resolution direction discrimination and displacement solution;

[0025] S9. After solving the displacement, the PL side sends the displacement and direction to the host computer system for subsequent processing.

[0026] Further, in step S2, the ZYNQ system uses the asynchronous FIFO input module in the PL side for data caching to complete cross-clock domain processing of the data.

[0027] Further, in step S3, the specific process of the pipeline structure for completing mean filtering and coefficient matrix calculation of the cached data is as follows:

[0028] It is stipulated that the accumulated data is grouped in sets of 2 n pieces, and the mean value of each data is calculated by means of shifting, where n is 3 or 4;

[0029] The data after mean filtering is divided into two paths: The first path uses a floating-point IP core to convert the coefficient matrix into floating-point numbers and stores them in the on-chip RAM on the PL side for later error correction; the second path continues to be processed through a multiplication and accumulation module, combines data in the way of self-multiplication product and mutual multiplication product, calculates the high-power product value, accumulates the calculation results, obtains the coefficient matrix, and uses the floating-point IP core to convert the coefficient matrix data into floating-point numbers.

[0030] Further, in step S6, the SVD decomposition is realized by multiplying the Givens matrix and the coefficient matrix multiple times to accurately solve the rank of the coefficient matrix. During the iteration process, only the singular value matrix needs to be updated, and it is judged whether the matrix is full rank by the number of 0 elements in the main diagonal elements of the singular value matrix.

[0031] Further, if there are 0 elements in the main diagonal elements of the singular value matrix, it means that the coefficient matrix is not full rank, then the transmitted orthogonal signal may be abnormal, and it is necessary to combine the functions of the front-end measurement system to judge the actual situation. If an abnormality occurs, the abnormal situation will be sent to the host computer system, and at the same time, the previous set of valid Hydemann parameters will be sent to the PL side for signal compensation.

[0032] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0033] The present invention combines the characteristics of orthogonal data and selects the optimal solution algorithm. The pipeline processing structure is adopted on the PL side to calculate the coefficient matrix, optimizing the circuit timing structure; the matrix decomposition method of "SVD+Cholesky" is adopted on the PS side, which can ensure the accuracy and stability of data operation. Based on the ZYNQ system, combined with the mathematical operation requirements of the Hydemann algorithm, the advantages of high-speed parallel processing of FPGA are used for fixed-point data operation, and the powerful floating-point calculation ability of ARM is used to accurately solve the Hydemann parameters. The PS side and the PL side communicate through the AXI bus to complete the high-speed transmission of data, so as to complete the high-precision real-time error compensation of orthogonal signals based on the high integration of the ZYNQ system. Brief Description of the Drawings

[0034] Figure 1 It is a structural diagram of a high-precision real-time error compensation system for orthogonal signals based on the ZYNQ system.

[0035] Figure 2 It is a schematic diagram of the pipeline calculation structure of the coefficient matrix.

[0036] Figure 3 It is a flowchart of a high-precision real-time error compensation method for orthogonal signals based on the ZYNQ system. Detailed Embodiment

[0037] The following elaborates on the preferred embodiments of the present invention in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making the protection scope of the present invention more clearly defined.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this invention belongs. The terms used in the specification of this invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "or / and" used herein includes any and all combinations of one or more of the related listed items.

[0039] The present invention provides an orthogonal signal high-precision real-time error compensation system and method based on a ZYNQ system. Combining the actual data processing requirements and the characteristics of the ZYNQ system, different data processing contents are carried out on the PL side and the PS side respectively. The high-speed data acquisition is carried out by the FPGA unit on the PL side, and the data operation is carried out by the ARM unit on the PS side. The data communication between the two is carried out by using the AXI bus.

[0040] See the atta Figure 1 ched drawings. An orthogonal signal high-precision real-time error compensation system based on a ZYNQ system. The hardware system consists of an AD module 1, a DA module 2, and a ZYNQ system 9. The ZYNQ system 9 mainly consists of a PL side 18 and a PS side 10. The communication between the two is carried out by using the AXI bus 14. The specific working process of the system is as follows:

[0041] The front-end measurement system outputs two analog signals X and Y, which are converted into fixed-point data by the AD module 1 and input into the ZYNQ system 9. The asynchronous FIFO input module 4 in the PL side 18 completes the cross-clock domain processing of the input signals. Specifically, the AD9238 chip is selected as the AD module. This chip has dual-channel input and single-channel output, with a maximum operating frequency of 65Mhz and a bit width of 12 bits. It can convert the two input signals into 12-bit signed fixed-point numbers and input them into the ZYNQ system. Since the operating clock of the PL side 18 is much higher than the clock frequency of the AD module 1, it is necessary to use the asynchronous FIFO input module 4 to complete data caching and achieve cross-clock domain processing of the data.

[0042] After the data is read out from the asynchronous FIFO input module 4, mean filtering 17 is performed. The mean filtering signal is processed in two paths: the first path undergoes floating-point conversion and is stored in the on-chip RAM of the PL side for later signal error compensation; the second path enters the multiplication and accumulation module 15, calculates the coefficient matrix and undergoes floating-point conversion, and finally is sent to the PS side 10 through the AXI bus 14 for subsequent operations.

[0043] The PL side 18 completes the coefficient matrix calculation and mean filtering according to the pipeline structure. For the specific process, please refer to the appendix Figure 2 : Two signals are output from the input FIFO module 4 and undergo mean filtering. Considering the data operation characteristics of the PL side, it is specified that the accumulated data is grouped in sets of 2 n (n is 3 or 4) so that the mean value can be calculated by means of shifting, and the rounding operation can be achieved through shifting to obtain the preliminary mean data x and y, ensuring the data processing accuracy while avoiding division operations.

[0044] Then the data is divided into two paths: For the first path, the signal data x and y after mean filtering are converted into floating-point numbers using the floating-point IP core and stored in the on-chip RAM of the PL side 18 for later error correction; for the second path, it continues to be processed for calculating the coefficient matrix. According to the operation requirements, calculate x*y, x 2 and y 2 , then calculate the data combinations (self-products and mutual products), continue to calculate the high-power product values, and accumulate the calculation results. The accumulated results are converted into floating-point numbers using the floating-point IP core to obtain the coefficient matrix. This pipeline structure makes full use of the parallel computing ability of the PL side 18, performs preliminary data processing while inputting data, efficiently completes the high-power operation of two sets of fixed-point data, avoids the problems of long calculation waiting time and repeated data operations, improves the resource reuse rate of the PL side 18, and also optimizes the timing structure of the circuit.

[0045] The PS side 10 performs SVD decomposition 13 on the received coefficient matrix, calculates the rank of the coefficient matrix, and then determines whether the matrix is positive definite. After receiving the coefficient matrix, the PS side 10 performs SVD decomposition on the matrix. To accurately implement SVD decomposition on hardware, Givens matrices need to be used for iterative processing. Since this decomposition aims to accurately solve the rank of the matrix, during the iterative process, only the singular value matrix needs to be updated, and the left and right singular matrices do not need to be stored. After obtaining the singular value matrix, it can be determined whether the matrix is full rank by the number of 0 elements in the main diagonal elements of the singular value matrix. If there are 0 elements in the main diagonal, it means that the coefficient matrix is not full rank, that is, there are a large number of identical data in the orthogonal signal, and the transmitted orthogonal signal may be abnormal. It is necessary to combine the functions of the front-end measurement system to judge the actual situation and send the specific situation to the host computer system. At the same time, the previous set of valid Hydemann parameters are sent to the PL side 18 for signal compensation. If there are no 0 elements in the main diagonal elements of the singular value matrix, it means that the coefficient matrix is full rank, the coefficient matrix is invertible, and according to the mathematical properties of the coefficient matrix, it can be known that the coefficient matrix is positive definite and subsequent calculations can be performed, that is, the matrix can be subjected to Cholesky decomposition 12, and the system of equations can be solved based on the decomposed matrix. The solution of the system of equations is input into the Hydemann parameter calculation module 11 to solve the Hydemann parameters (α, r, p, q).

[0046] After the Hydemann parameter solution is completed, the PS side 10 sends the solved Hydemann parameters to the PL side 18 through the AXI bus 14. After receiving the Hydemann parameters, the PL side 18 reads the mean filtered signal stored in the on-chip RAM, and performs error compensation on the mean filtered signal in the signal compensation module 16 to complete the error correction of the orthogonal signal.

[0047] The corrected data is processed in three paths:

[0048] The first path is converted into a fixed-point number corresponding to the bit width of the DA module 2 through a floating-point IP core, and is sent to the DA module 2 through the asynchronous FIFO output module 5, so as to convert the corrected data into an analog signal output;

[0049] The second path is transmitted to the fine-resolution direction module 8. The corrected data uses the CORDIC algorithm to solve the arctangent function, solve the signal phase, perform fine-resolution direction after phase normalization, output the signal fine fraction, and judge the corresponding displacement direction according to the change direction of the fine fraction. After obtaining the signal fine fraction, combined with the measured optical wavelength, the displacement is solved through the displacement calculation module 6, and the calculated displacement value can be sent to the host computer system 3 through the data sending module 7.

[0050] The third path is directly sent to the data sending module 7 to send the corrected orthogonal signal data to the host computer system 3 for display and storage. In this way, the PL side 10 sends the displacement, direction, and the corrected orthogonal signal to the host computer system 3 for subsequent processing.

[0051] The internal data interaction logic of the ZYNQ system is as follows: The PL side 18 calculates the coefficient matrix data, converts it into floating-point numbers, and sends it to the PS side 10 via the AXI bus 14. After the PS side 10 solves the Hydemann parameters, the data is sent to the PL side 18 in the same way.

[0052] See the appendix Figure 3 , the high-precision real-time processing method for orthogonal signals based on the ZYNQ system of the present invention includes the following steps:

[0053] S1. The two orthogonal signals output by the measurement system are converted into fixed-point data through the AD module and input into the ZYNQ system;

[0054] S2. The ZYNQ system caches the signal data;

[0055] S3. The PL side performs mean filtering and coefficient matrix calculation on the cached signal data according to the pipeline structure;

[0056] S4. After obtaining the coefficient matrix, the PL side sends the coefficient matrix to the PS side via the AXI bus for matrix calculation;

[0057] S5. After receiving the coefficient matrix, the PS side performs SVD decomposition on the coefficient matrix;

[0058] S6. After the SVD decomposition is completed, if the coefficient matrix is full rank, perform Cholesky decomposition, directly solve the equations based on the decomposed triangular matrix, and calculate the Hydemann parameters. The PS side sends the solved Hydemann parameters to the PL side via the AXI bus. If the coefficient matrix is not full rank, send the previous set of valid Hydemann parameters as the current data error compensation coefficient to the PL side;

[0059] S7. After receiving the Hydemann parameters, the PL side performs error compensation on the mean-filtered signal data. The compensated signal data is divided into three paths: The first path is stored in the RAM of the PL side and waits for subsequent processing. The second path is sent to the DA module by the asynchronous FIFO output module after fixed-point conversion, so as to output the error-compensated orthogonal signal. The third path is directly sent to the host computer module for signal display and storage;

[0060] S8. For the orthogonal signals stored in the on-chip RAM after error compensation, use the CORDIC algorithm to calculate the arctangent function, solve the current phase, normalize the phase, complete signal subdivision, and determine the corresponding displacement direction based on the change direction of the subdivision number, thus completing fine resolution direction discrimination and displacement solution;

[0061] S9. After solving the displacement, the PL side sends the displacement and direction to the host computer system for subsequent processing.

[0062] The specific implementation methods in each step are the same as those described above and will not be elaborated here.

[0063] This invention uses the Hydemann algorithm to perform orthogonal signal error compensation based on the ZYNQ system. The main difficulty lies in using hardware to complete complex matrix operations and system of equations solving. The specific algorithm implementation process is as follows:

[0064] The ideal orthogonal signal mathematical model is:

[0065]

[0066] In actual situations, the orthogonal signal contains various errors and can be expressed as:

[0067]

[0068] Among them: p is the DC drift of the cosine channel, q is the DC drift of the sine channel, α is the phase error (non-orthogonal error), and γ is the channel gain ratio.

[0069] Through trigonometric transformation, it can be obtained that:

[0070]

[0071] Then:

[0072]

[0073] Then:

[0074]

[0075] That is:

[0076]

[0077] Performing equivalent transformation on the above expression, it can be obtained that:

[0078] AX 2 +BY 2 +CXY+DX+EY=1 Among them:

[0079]

[0080] Express the above system of equations in matrix form:

[0081]

[0082] It can be denoted as:

[0083] AX = 1

[0084] Thus, the least squares method can be used for solution, and the equation is transformed into:

[0085] A T AX = A T

[0086] That is:

[0087] CX = B (C = A T A, B = A T )

[0088] Collect multiple groups of data, and we can get:

[0089]

[0090] After obtaining the coefficient matrix, perform SVD decomposition on the coefficient matrix. Perform SVD decomposition on the PS side. The present invention uses the Givens matrix for SVD decomposition. The specific process is as follows:

[0091] The Givens matrix can be expressed as:

[0092]

[0093] Then multiply the coefficient matrix by the fifth-order Givens matrix, that is:

[0094] k1 = G*(C'C)*G'

[0095] After multiple iterations, the final singular value matrix can be obtained. Based on the singular value matrix, it can be judged whether the coefficient matrix C is full rank. When the coefficient matrix is full rank, it is easy to obtain that the coefficient matrix is positive definite:

[0096] C = A T A

[0097] Then C is a positive semi-definite matrix. When C is full rank, it means that all the eigenvalues of C are positive, then C is a positive definite matrix. If the coefficient matrix C is a positive definite matrix, then Cholesky decomposition can be performed, that is:

[0098] C = LL T (L is a lower triangular matrix)

[0099] Then the equation can be equivalently transformed into:

[0100] LL T X = B

[0101] Thus, the forward substitution method can be used to solve the solution of the system of equations. After obtaining the exact values of A, B, C, D, and E, the Hydemann parameters can be solved according to the following formula:

[0102]

[0103] Based on the Hydemann parameters, the signal can be corrected. Denote the signals before correction as X and Y, and the signals after correction as x and y:

[0104]

[0105] Thus, the orthogonal signal after error compensation is obtained. Based on the corrected signal, the current phase can be calculated using trigonometric functions:

[0106] θ = atan(y / x)

[0107] And the calculated phase is normalized to obtain the subdivision number n, that is:

[0108]

[0109] Thus, the integer subdivision number N can be solved according to the subdivision number n. When the subdivision number ranges from 0 to 1 and n = 1, that is, when the signal travels forward one cycle, N is incremented by 1; when the subdivision number ranges from 1 to 0 and n = 0, that is, when the signal travels backward one cycle, N is decremented by 1, thereby completing signal subdivision.

[0110] After obtaining the subdivision number, the displacement D can be calculated according to the specific parameters of the front-end measurement system:

[0111]

[0112] where: λ is the measurement light wavelength.

[0113] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0114] The above are only the embodiments of the present invention, and thus do not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the content of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be included in the patent protection scope of the present invention by the same token.

Claims

1. An orthogonal signal high-precision real-time processing system based on the ZYNQ system, characterized in that: It includes a ZYNQ system, an AD module, a DA module, and a host computer system; the ZYNQ system mainly includes a PL side and a PS side that communicates with it via the AXI bus; The AD module converts two orthogonal signals into fixed-point data and inputs it to the PL side; The PL side performs mean filtering and multiplication accumulation on the input fixed-point data to obtain a mean-filtered signal and a coefficient matrix. The mean-filtered signal is stored in the on-chip RAM, and the coefficient matrix is sent to the PS side via the AXI bus; After receiving the coefficient matrix, the PS side solves the linear equations through matrix decomposition and sends the obtained Hydemann parameters to the PL side; After receiving the Hydemann parameters, the PL side uses the Hydemann parameters to perform error compensation on the mean-filtered signal to obtain a corrected orthogonal signal; The corrected orthogonal signal is processed in three paths: the first path changes the transmission frequency through the asynchronous FIFO output module on the PL side and outputs the corrected orthogonal signal through the DA module. The second path is reprocessed by the PL side for fine direction discrimination and displacement solution, and the calculation results are sent to the host computer system for subsequent processing. The third path is directly sent to the host computer system for display and storage.

2. The high-precision real-time orthogonal signal processing system based on the ZYNQ system according to claim 1, wherein: The internal data interaction logic of the ZYNQ system is as follows: the PL side calculates the coefficient matrix data, converts it into floating-point numbers, and sends the coefficient matrix data to the PS side using the AXI bus. After the PS side solves the Hydemann parameters, the data is sent to the PL side in the same way.

3. The high-precision real-time orthogonal signal processing system based on the ZYNQ system according to claim 1 or 2, characterized in that: The specific method of the mean filtering is as follows: The mean filtering data takes 2 n data as a group, and realizes the rounding operation by means of shifting, which ensures the data processing accuracy while avoiding the division operation, where n is 3 or 4.

4. The high-precision real-time processing system for orthogonal signals based on the ZYNQ system according to claim 1 or 2, characterized in that: The process of solving the coefficient matrix adopts a pipeline processing structure, which efficiently completes the high-order power operation of two groups of fixed-point data while avoiding repeated data calculation.

5. The high-precision real-time orthogonal signal processing system based on the ZYNQ system according to claim 1 or 2, characterized in that: The specific process of the PS side solving the Hydemann parameters is as follows: use the SVD decomposition method to decompose the coefficient matrix, use the obtained singular value matrix to judge whether the coefficient matrix is full rank, and then judge whether it is positive definite. If the coefficient matrix is a positive definite matrix, perform Cholesky decomposition on it, and solve the equations based on the decomposed matrix to calculate the Hydemann parameters. If it is not positive definite, use the previous set of valid Hydemann parameters as the error correction coefficient for the current data.

6. A high-precision real-time processing method for orthogonal signals based on a ZYNQ system, characterized in that: It includes the following steps: S1. The measurement system outputs two orthogonal signals, which are converted into fixed-point data by the AD module and input into the ZYNQ system; S2. The ZYNQ system caches the signal data; S3. The PL side performs mean filtering and coefficient matrix calculation on the cached signal data according to the pipeline structure; S4. After obtaining the coefficient matrix, the PL side sends the coefficient matrix to the PS side via the AXI bus for matrix decomposition operation; S5. After the PS side receives the coefficient matrix, it performs SVD decomposition on the coefficient matrix; S6. After the SVD decomposition is completed, if the coefficient matrix is full rank, perform Cholesky decomposition, solve the equations based on the decomposed triangular matrix, and calculate the Hydemann parameters; if the coefficient matrix is not full rank, use the previous set of valid Hydemann parameters as the error compensation coefficient for the current data group. After obtaining the Hydemann parameters, send the Hydemann parameters to the PL side via the AXI bus; After the PL receives the Hydemann parameters, it compensates for the errors in the signal after mean filtering. The compensated data is divided into three paths: the first path is stored in the on-chip RAM of the PL and waits for subsequent processing; the second path is sent to the DA module by the asynchronous FIFO output module after fixed-point conversion, so as to output the quadrature signal after error compensation; the third path is directly sent to the host computer for display and storage. For the data stored in the on-chip RAM of the PL, use the CORDIC algorithm to calculate the arctangent function, solve the current phase, normalize the phase, complete signal subdivision, and judge the corresponding displacement direction according to the change direction of the subdivision number, so as to complete fine resolution direction finding and displacement solution. After solving the displacement, the PL sends the displacement to the host computer system for subsequent processing.

7. The high-precision real-time processing method for orthogonal signals based on the ZYNQ system according to claim 6, characterized in that: In step S2, the ZYNQ system uses the asynchronous FIFO input module in the PL to cache data and complete cross-clock domain processing of the data.

8. A high-precision real-time processing method for orthogonal signals based on a ZYNQ system according to claim 6, characterized in that: In step S3, the specific process of the pipeline structure to complete mean filtering and coefficient matrix calculation for the cached data is as follows: It is stipulated that the accumulated data is grouped by 2 n for each group, and the mean value of each group of data is calculated by shifting, which realizes rounding while avoiding division operations and ensures the operation accuracy, where n is 3 or 4; The data after mean filtering is divided into two paths: the first path uses a floating-point IP core to convert the coefficient matrix into floating-point numbers and stores them in the on-chip RAM of the PL for later error correction. The second path continues to be processed by the multiplication and accumulation module. The data is combined by self-multiplication product and mutual multiplication product, the high-order power product value is calculated, and the calculation results are accumulated to obtain the coefficient matrix, and the coefficient matrix data is converted into floating-point numbers using a floating-point IP core.

9. The high-precision real-time processing method for orthogonal signals based on the ZYNQ system according to claim 6, wherein: In step S6, the SVD decomposition is realized by the iterative product of the Givens matrix and the coefficient matrix to accurately solve the rank of the coefficient matrix. During the iteration process, only the singular value matrix needs to be updated. Whether the matrix is full rank is judged by the number of 0 elements in the main diagonal elements of the singular value matrix, and then whether the matrix is positive definite is judged.

10. The high-precision real-time processing method for orthogonal signals based on the ZYNQ system according to claim 9, characterized in that: If there is a 0 element in the main diagonal element of the singular value matrix, it means that the coefficient matrix is not full rank, then the transmitted quadrature signal may be abnormal. It is necessary to combine the functions of the front-end measurement system to judge the actual situation. If an abnormality occurs, the abnormal situation will be sent to the host computer system, and at the same time, the previous set of valid Hydemann parameters will be sent to the PL for signal compensation.

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