Unified power quality controller (UPQC) with optical storage direct current access

Abstract

The invention discloses an optical storage direct current access unified power quality controller (UPQC), which relates to the technical field of new energy, and comprises the following steps of: establishing a comprehensive analysis model of a high-frequency voltage signal influence value and a thermal expansion influence value by monitoring voltage signal frequency, conductor temperature and spacing in real time, calculating a parasitic capacitive reactance attenuation coefficient, and calculating an optical storage direct current access parameter; whether capacitive reactance is reduced or not is judged through a dynamic threshold matching algorithm, if the capacitive reactance is abnormal, a common-mode voltage adjusting module is triggered, the switching frequency of a photovoltaic inverter and an energy storage converter is reduced, the problem of common-mode voltage rise caused by high-frequency noise coupling is solved from the source, and intelligent cooperative control and electric energy quality optimization of an optical storage system are achieved. According to the invention, voltage frequency, conductor temperature and spacing are monitored in real time, a model is established to calculate a parasitic capacitive reactance attenuation coefficient, switching frequency adjustment is triggered through dynamic threshold judgment, common-mode voltage rise caused by high-frequency coupling is suppressed, and intelligent cooperative control and electric energy quality optimization of the optical storage system are realized.

Description

Technical Field

[0001] The present invention relates to the technical field of new energy, and particularly to a unified power quality controller (UPQC) for DC access of photovoltaic energy storage. Background Art

[0002] The unified power quality controller (UPQC) for DC access of photovoltaic energy storage, with its innovative collaborative architecture of photovoltaic and energy storage, demonstrates significant commercial value in the trillion-dollar market of distributed energy grid connection. By integrating DC access of photovoltaic and multi-unit collaborative control, it can effectively improve the power grid's ability to absorb clean energy, reduce risks such as voltage fluctuations and reactive power imbalance caused by distributed energy access, significantly reduce line losses and equipment maintenance costs, not only improve the flexibility of power grid power supply, but also continuously supply power through the energy storage module during power grid outages, meeting the needs of industrial and commercial users for highly reliable power supply.

[0003] This device compensates for voltage sags, surges and waveform distortions in real time through a series unit, dynamically adjusts reactive power and filters harmonics through a shunt unit, and combines the DC access of photovoltaic with the energy storage unit to achieve active power smoothing and clean energy consumption. The system adopts a multi-objective collaborative control strategy, which can operate each unit independently or jointly, comprehensively solve problems such as voltage fluctuations, reactive power imbalance, harmonic pollution and active power impact caused by distributed energy grid connection in an active distribution network, and at the same time improve energy efficiency through photovoltaic-energy storage collaborative optimization, providing customized power quality guarantee for smart grids.

[0004] Among them, the photovoltaic inverter and the energy storage converter in the energy storage unit are connected through a common DC bus. When the high-frequency switching actions of both occur, the generated high-frequency noise will be coupled to the load side through parasitic capacitance, causing the common-mode voltage on the load side to rise, leading to faults or performance degradation of the unified power quality controller (UPQC). Summary of the Invention

[0005] Technical Problem to be Solved

[0006] Aiming at the deficiencies of the prior art, the present invention provides a unified power quality controller (UPQC) for DC access of photovoltaic energy storage, which solves the problem that when the photovoltaic inverter and the energy storage converter in the energy storage unit are connected through a common DC bus, the noise generated by high-frequency switching actions is coupled to the load side through parasitic capacitance, resulting in an increase in the common-mode voltage, which is likely to cause faults or performance degradation of the unified power quality controller (UPQC).

[0007] Technical Solution

[0008] To achieve the above object, the present invention is implemented through the following technical solutions: A unified power quality controller UPQC for optical storage DC access, including the following specific modules: Reactance reduction analysis module: Real-time acquisition of voltage signal frequency, conductor temperature, and conductor spacing, analysis of the increment of the voltage signal frequency based on time series to obtain the influence value of the high-frequency voltage signal, establishment of a linear regression model of conductor spacing with respect to conductor temperature to obtain the function of conductor spacing with respect to conductor temperature, and comprehensive analysis to obtain the thermal expansion influence value, and comprehensive analysis of the influence value of the high-frequency voltage signal and the thermal expansion influence value to obtain the parasitic capacitance decay coefficient; Reactance reduction judgment module: Judge whether the reactance of the parasitic capacitance is reduced according to the parasitic capacitance decay coefficient. If it is judged that the reactance of the parasitic capacitance is normal, return to the reactance reduction analysis module to continue repeating the above operations. If it is judged that the reactance of the parasitic capacitance is reduced, trigger the common-mode voltage adjustment module; Common-mode voltage adjustment module: Reduce the switching frequencies of the photovoltaic inverter and the energy storage converter.

[0009] Further, the specific method for obtaining the influence value of the high-frequency voltage signal is as follows: Among them, GY represents the influence value of the high-frequency voltage signal, t represents the time series, DP t represents the voltage signal frequency at the t-th moment, DP t-1 represents the voltage signal frequency at the (t - 1)-th moment.

[0010] Further, the specific method for obtaining the function of conductor spacing with respect to conductor temperature is as follows: Test the asynchrony of conductor temperature and conductor spacing through the Pearson correlation coefficient. When the asynchrony of conductor temperature and conductor spacing holds, set up a two-dimensional coordinate system of conductor temperature and conductor spacing according to the time series. There are t (x t , y t ) conductor temperature-conductor spacing coordinates distributed in the two-dimensional coordinate system. Establish a linear function model according to the conductor temperature-conductor spacing coordinates as y t =kx t +b, where the independent variable x t represents the conductor temperature, k represents the slope and is less than zero, b represents the intercept and is greater than zero, and the dependent variable y t represents the conductor spacing. Calculate the slope and intercept respectively, and substitute them into y t =kx t +b to obtain the function of conductor spacing with respect to conductor temperature.

[0011] Further, the specific steps for testing the asynchrony between the conductor temperature and the conductor spacing through the Pearson correlation coefficient are as follows: Calculate the average of both the conductor temperature and the conductor spacing to obtain the average conductor temperature and the average conductor spacing. Calculate the deviation from the mean for each conductor temperature based on the average conductor temperature to obtain the degree of deviation of the conductor temperature. Calculate the deviation from the mean for each conductor spacing based on the average conductor spacing to obtain the degree of deviation of the conductor spacing. Multiply each degree of deviation of the conductor temperature by the corresponding degree of deviation of the conductor spacing in sequence and sum them up to obtain the asynchrony value. Compare the asynchrony value with zero in real time to verify whether the asynchrony between the conductor temperature and the conductor spacing holds.

[0012] Further, the specific method for verifying that the asynchrony between the conductor temperature and the conductor spacing holds is as follows: If the asynchrony value is less than zero, it is verified that the asynchrony between the conductor temperature and the conductor spacing holds. If the asynchrony value is equal to zero, assign a value of one to the function value of the conductor spacing with respect to the conductor temperature. If the asynchrony value is greater than zero, re-obtain the conductor temperature or the conductor spacing in real time and perform data cleaning and analysis until the asynchrony value is less than or equal to zero.

[0013] Further, the specific method for obtaining the slope and the intercept is as follows: Calculate the variance of the conductor spacing, and then calculate the product of the number of conductor spacings to obtain where JP represents the degree of deviation of the overall conductor spacing, t represents the time series, y t represents the conductor spacing, represents the average conductor spacing, that is Substitute and y t = kx t + b into to obtain a quadratic function of k and b, and find the minimum value of this function to obtain the values of the slope and the intercept.

[0014] Further, the specific method for obtaining the thermal expansion influence value is as follows: Normalize the function value of the conductor spacing with respect to the conductor temperature so that the function value is greater than zero and less than one, and take the reciprocal of the function value, which is denoted as the thermal expansion influence value.

[0015] Further, the specific method for obtaining the parasitic capacitance attenuation coefficient is as follows: Standardize and comprehensively analyze the high-frequency voltage signal influence value and the thermal expansion influence value to obtain the parasitic capacitance attenuation coefficient; JS = GY × RP; where JS represents the parasitic capacitance attenuation coefficient, GY represents the high-frequency voltage signal influence value, and RP represents the thermal expansion influence value.

[0016] Further, in the capacitive reactance reduction judgment module, a dynamic threshold of parasitic capacitive reactance is set. The dynamic threshold of parasitic capacitive reactance is sorted in ascending order through bubble sort, and the parasitic capacitive reactance attenuation coefficient is compared with the dynamic threshold of parasitic capacitive reactance in real time. If the parasitic capacitive reactance attenuation coefficient is greater than or equal to the maximum dynamic threshold of parasitic capacitive reactance, it is determined that the capacitive reactance of the parasitic capacitor is normal, and the result is returned to the capacitive reactance reduction analysis module to continue repeating the above operations. If the parasitic capacitive reactance attenuation coefficient is less than the minimum dynamic threshold of parasitic capacitive reactance, it is determined that the capacitive reactance of the parasitic capacitor has decreased, and the result of the decrease in the capacitive reactance of the parasitic capacitor is sent to the common-mode voltage adjustment module.

[0017] Advantageous Effects

[0018] Compared with the prior art, the embodiments of the present invention have at least the following advantages or beneficial effects:

[0019] 1. The capacitive reactance reduction analysis module monitors the voltage signal frequency, conductor temperature and spacing in real time, quantifies the influence of thermal expansion on parasitic capacitance by combining a linear regression model, and calculates the parasitic capacitive reactance attenuation coefficient through the product of the influence value of the high-frequency voltage signal and the influence value of thermal expansion. When it is detected that the capacitive reactance attenuation coefficient is lower than the dynamic threshold, the common-mode voltage adjustment module is triggered to reduce the switching frequencies of the photovoltaic inverter and the energy storage converter, reducing the generation of high-frequency noise from the source and effectively suppressing the problem of the increase in the common-mode voltage on the load side caused by parasitic capacitance coupling, significantly improving the stability and reliability of the operation of the unified power quality conditioner (UPQC).

[0020] 2. By combining a dynamic threshold matching algorithm optimized by bubble sort, the unified power quality conditioner (UPQC) can accurately identify the critical state of capacitive reactance attenuation, avoiding the lag of traditional fixed-threshold control. When the capacitive reactance shows a downward trend, the UPQC can quickly respond and timely adjust the switching frequencies of the photovoltaic inverter and the energy storage converter, suppressing the increase in the common-mode voltage caused by high-frequency noise coupling from the source.

[0021] Of course, it is not necessary for any product implementing the present invention to achieve all the above-mentioned advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 Structural diagram of a unified power quality conditioner (UPQC) for optical storage DC access according to the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0024] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device.

[0025] As Figure 1 shown, an embodiment of the present invention provides a unified power quality controller UPQC for optical storage DC access, which includes the following specific modules:

[0026] Capacitance reactance reduction analysis module: When a high-frequency voltage is applied to the parasitic capacitance, which is the capacitance naturally formed by the physical layout of the unified power quality controller UPQC or the characteristics of the insulating material, the electric field between the conductor materials changes rapidly, forcing the bound charges in the dielectric to move rapidly. Based on the capacitance reactance formula where X C represents the capacitance reactance of the parasitic capacitance, f represents the voltage signal frequency, and C represents the parasitic capacitance. The displacement current formed by this displacement increases significantly with the increase of the voltage signal frequency, resulting in a reduction of the capacitance reactance of the parasitic capacitance. As a result, the high-frequency voltage signal frequency is more likely to be coupled to the load side through the parasitic capacitance rather than transmitted along the designed copper foil trace, causing an increase in the common-mode voltage on the load side of the unified power quality controller UPQC;

[0027] Therefore, the voltage signal frequency is obtained in real time through a spectrum analyzer, the voltage signal frequency is data-cleaned to remove redundant values of the voltage signal frequency, and the data quality of the voltage signal frequency is improved. Since the faster the electric field changes, the higher the voltage signal frequency, the increment of the voltage signal frequency is analyzed according to the time series to obtain the influence value of the high-frequency voltage signal;

[0028] The specific method for obtaining the influence value of the high-frequency voltage signal is as follows:

[0029]

[0030] where GY represents the influence value of the high-frequency voltage signal, which reflects whether the voltage signal frequency is gradually increasing. If the voltage signal frequency is gradually increasing, the influence value of the high-frequency voltage signal is greater. t represents the time series, and DP t represents the voltage signal frequency at the t-th moment, and DP t-1It represents the voltage signal frequency at the (t - 1)-th moment. When the voltage signal frequency gradually increases, the voltage signal frequency at the t-th moment is greater than that at the (t - 1)-th moment.

[0031] Since the voltage signal frequency gradually increases, it accelerates the displacement of the current, and the generated energy loss increases and is converted into heat energy, causing the temperature of the conductor to rise. The increase in the conductor temperature further causes thermal expansion of the conductor material. According to the physical layout of the parasitic capacitance and through the parallel plate capacitance formula for analysis, where C represents the parasitic capacitance, α represents the vacuum permittivity, reflecting the propagation characteristics of the electric field in vacuum, β represents the relative permittivity of the medium, reflecting the response ability of the conductor material to the electric field, A represents the effective area of the conductor material, and d represents the distance between the conductor materials. Due to the thermal expansion of the conductor material, the effective area of the conductor material becomes larger, and the distance between the conductor materials shrinks. Even if the conductor materials are not parallel, it does not affect the reduction of the distance between the conductor materials. Therefore, the parasitic capacitance increases. Combining with the capacitive reactance formula when the voltage signal frequency increases, the parasitic capacitance increases, and the capacitive reactance of the parasitic capacitance further decreases;

[0032] Therefore, the temperature of the conductor is obtained in real time through a temperature sensor, and the distance between the conductor materials is obtained in real time through a laser displacement sensor and recorded as the conductor distance. Data cleaning is performed on the conductor temperature and the conductor distance to remove redundant values of the conductor temperature and the conductor distance, improve the data quality of the conductor temperature and the conductor distance, and a linear regression model is established for the conductor temperature and the conductor distance to obtain a function of the conductor distance with respect to the conductor temperature.

[0033] The specific method for obtaining the function of the conductor distance with respect to the conductor temperature is as follows:

[0034] The asynchrony between the conductor temperature and the conductor distance is tested through the Pearson correlation coefficient. Asynchrony means that when the conductor temperature gradually increases, whether the conductor distance gradually shrinks. When the asynchrony between the conductor temperature and the conductor distance holds, a two-dimensional coordinate system for the conductor temperature and the conductor distance is set according to the time series. In the two-dimensional coordinate system, there are distributed t (x t , y t ) conductor temperature-conductor distance coordinates. A linear function model is established based on the conductor temperature-conductor distance coordinates as y t = kx t + b, where the independent variable x t represents the conductor temperature, k represents the slope. Since the conductor distance shrinks as the conductor temperature increases, k is less than zero. b represents the intercept, that is, when the conductor temperature is zero, the conductor distance is equal to the intercept. Since usually the distance between the conductor materials is greater than zero to avoid short circuit due to mutual contact, b is greater than zero. The dependent variable y t represents the conductor distance. The slope and the intercept are calculated respectively and substituted into y t= kx t + b, to obtain the function of the conductor spacing with respect to the conductor temperature.

[0035] The specific steps to test the asynchrony between the conductor temperature and the conductor spacing through the Pearson correlation coefficient are as follows:

[0036] Perform average calculations on both the conductor temperature and the conductor spacing to obtain the average conductor temperature and the average conductor spacing, which respectively reflect the central tendency of the conductor temperature and the central tendency of the conductor spacing, facilitating subsequent calculations of the deviation from the mean. Calculate the deviation from the mean for each conductor temperature based on the average conductor temperature to measure the degree of deviation of each conductor temperature relative to the average conductor temperature, obtaining the degree of deviation of the conductor temperature. Calculate the deviation from the mean for each conductor spacing based on the average conductor spacing to measure the degree of deviation of each conductor spacing relative to the average conductor spacing, obtaining the degree of deviation of the conductor spacing. Multiply and sum the degree of deviation of each conductor temperature and the corresponding degree of deviation of the conductor spacing in sequence to reflect the sign characteristics of the overall degree of deviation of the conductor temperature and the overall degree of deviation of the conductor spacing, obtaining the asynchrony value;

[0037] Compare the asynchrony value with zero in real time. If the asynchrony value is less than zero, it is detected that the asynchrony between the conductor temperature and the conductor spacing is established, indicating that the conductor temperature is gradually increasing, the difference from the average conductor temperature is greater than zero, the conductor spacing is gradually decreasing, and the difference from the average conductor spacing is less than zero, reflecting that the influence value of the high-frequency voltage signal affects the capacitive reactance of the parasitic capacitance. If the asynchrony value is equal to zero, it means that the conductor temperature and the conductor spacing have no influence on the capacitive reactance of the parasitic capacitance, that is, the decrease in the capacitive reactance of the parasitic capacitance is only related to the influence value of the high-frequency voltage signal, and assign the function value of the conductor spacing with respect to the conductor temperature as one. If the asynchrony value is greater than zero, it means that the conductor temperature is gradually increasing, the difference from the average conductor temperature is greater than zero, the conductor spacing is gradually increasing, and the difference from the average conductor spacing is greater than zero, or the conductor temperature is gradually decreasing, the difference from the average conductor temperature is less than zero, the conductor spacing is gradually decreasing, and the difference from the average conductor spacing is less than zero. Re-obtain the conductor temperature or the conductor spacing in real time and perform data cleaning and analysis until the asynchrony value is less than or equal to zero.

[0038] The specific methods for obtaining the slope and the intercept are as follows:

[0039] Calculate the variance of the conductor spacing to reflect the degree of deviation of each conductor spacing, and then perform a product calculation on the number of conductor spacings to reflect the degree of deviation of the overall conductor spacing, that is where JP represents the degree of deviation of the overall conductor spacing, t represents the time series, and also represents the number of conductor spacings, y t represents the conductor spacing, represents the average conductor spacing, that is Separate and y t= kx t Substitute it into to obtain a quadratic function of k and b. The opening of the function is upward. Take the derivative of this function. That is, when the derivative of this function is equal to zero, the minimum value is obtained. The reason for calculating the minimum value is to reflect the minimum distance from the conductor temperature-conductor spacing coordinate to y t = kx t + b, that is, the conductor temperature-conductor spacing coordinate is approximately on a straight line. Therefore, the values of the slope and intercept are obtained.

[0040] Since the function of the conductor spacing with respect to the conductor temperature decreases monotonically as the conductor temperature increases, normalize the function value of the conductor spacing with respect to the conductor temperature. The function value is greater than zero and less than one. Take the reciprocal of the function value, denoted as the thermal expansion influence value. The thermal expansion influence value increases monotonically as the conductor temperature increases. Standardize and comprehensively analyze the high-frequency voltage signal influence value and the thermal expansion influence value to obtain the parasitic capacitance attenuation coefficient;

[0041] JS = GY × RP;

[0042] Among them, JS represents the parasitic capacitance attenuation coefficient, reflecting whether the parasitic capacitance decays. GY represents the high-frequency voltage signal influence value, reflecting whether the voltage signal frequency gradually increases. RP represents the thermal expansion influence value. If the asynchronous value is equal to zero, assign a value of one to the function value of the conductor spacing with respect to the conductor temperature. Therefore, the thermal expansion influence value is one, indicating that the thermal expansion influence value has no effect on the parasitic capacitance attenuation coefficient. If the asynchronous value is less than zero, the function value of the conductor spacing with respect to the conductor temperature is greater than zero and less than one. Therefore, the thermal expansion influence value is greater than one, and the higher the conductor temperature, the greater the thermal expansion influence value.

[0043] Capacitance reduction judgment module: Judge whether the parasitic capacitance decreases according to the parasitic capacitance attenuation coefficient. Set the parasitic capacitance dynamic threshold. The parasitic capacitance dynamic threshold is the set of parasitic capacitances under normal operation. Sort the parasitic capacitance dynamic threshold in ascending order through bubble sort. Compare the parasitic capacitance attenuation coefficient with the parasitic capacitance dynamic threshold in real time. If the parasitic capacitance attenuation coefficient is greater than or equal to the largest parasitic capacitance dynamic threshold, it is judged that the capacitance of the parasitic capacitor is normal, and return to the capacitance reduction analysis module to continue repeating the above operations. If the parasitic capacitance attenuation coefficient is less than the smallest parasitic capacitance dynamic threshold, it is judged that the capacitance of the parasitic capacitor decreases, and send the result of the capacitance reduction of the parasitic capacitor to the common-mode voltage adjustment module.

[0044] Common-mode voltage adjustment module: receives the result of the reduction of the reactance of the parasitic capacitance and reduces the switching frequencies of the photovoltaic inverter and the energy storage converter, avoiding at the source that when the two perform high-frequency switching operations, the generated high-frequency noise will be coupled to the load side of the unified power quality conditioner (UPQC) through the parasitic capacitance, preventing the common-mode voltage on the load side from rising and causing equipment failures or performance degradation.

[0045] The preferred embodiments of the present invention disclosed above are only used to help illustrate the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and utilize the present invention well. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A unified power quality controller UPQC for DC access of photovoltaic and energy storage systems, characterized in that: It includes the following specific modules: Capacitive reactance reduction analysis module: Obtain the voltage signal frequency, conductor temperature, and conductor spacing in real time, analyze the increment of the voltage signal frequency based on time series to obtain the high-frequency voltage signal influence value, establish a linear regression model of conductor spacing with respect to conductor temperature, obtain the function of conductor spacing with respect to conductor temperature, and comprehensively analyze to obtain the thermal expansion influence value. Then comprehensively analyze the high-frequency voltage signal influence value and the thermal expansion influence value to obtain the parasitic capacitive reactance attenuation coefficient; Capacitive reactance reduction judgment module: Judge whether the capacitive reactance of the parasitic capacitor is reduced according to the parasitic capacitive reactance attenuation coefficient. If it is judged that the capacitive reactance of the parasitic capacitor is normal, return to the capacitive reactance reduction analysis module to continue repeating the above operations. If it is judged that the capacitive reactance of the parasitic capacitor is reduced, trigger the common-mode voltage adjustment module; Common-mode voltage adjustment module: Reduce the switching frequencies of the photovoltaic inverter and the energy storage converter.

2. The unified power quality controller UPQC for optical storage DC access according to claim 1, wherein: The specific method for obtaining the high-frequency voltage signal influence value is as follows: Among them, GY represents the influence value of the high-frequency voltage signal, t represents the time series, and DP t represents the voltage signal frequency at the t-th moment, and DP t-1 represents the voltage signal frequency at the (t - 1)-th moment.

3. A unified power quality controller UPQC for optical storage DC access according to claim 1, characterized in that: The specific method for obtaining the function of conductor spacing with respect to conductor temperature is as follows: Test the asynchrony between the conductor temperature and the conductor spacing through the Pearson correlation coefficient. When the asynchrony between the conductor temperature and the conductor spacing holds, set up a two-dimensional coordinate system for the conductor temperature and the conductor spacing according to the time series. There are t (x t , y t ) conductor temperature-conductor spacing coordinates in the two-dimensional coordinate system. Establish a linear function model based on the conductor temperature-conductor spacing coordinates as y t = kx t + b, where the independent variable x t represents the conductor temperature, k represents the slope and is less than zero, b represents the intercept and is greater than zero, and the dependent variable y t represents the conductor spacing. Calculate the slope and the intercept respectively, and substitute them into y t = kx t + b to obtain the function of the conductor spacing with respect to the conductor temperature.

4. A unified power quality controller UPQC for optical storage DC access according to claim 3, characterized in that: The specific steps for testing the asynchrony between conductor temperature and conductor spacing through the Pearson correlation coefficient are as follows: Perform average calculations on both the conductor temperature and the conductor spacing to obtain the average conductor temperature and the average conductor spacing. Calculate the deviation from the mean for each conductor temperature based on the average conductor temperature to obtain the deviation degree of the conductor temperature. Calculate the deviation from the mean for each conductor spacing based on the average conductor spacing to obtain the deviation degree of the conductor spacing. Perform product calculations and summations on each deviation degree of the conductor temperature and the corresponding deviation degree of the conductor spacing in sequence to obtain the asynchrony value. Compare the asynchrony value with zero in real time to verify whether the asynchrony between conductor temperature and conductor spacing is established.

5. The unified power quality controller UPQC for optical storage DC access according to claim 4, characterized in that: The specific method for verifying the establishment of the asynchrony between conductor temperature and conductor spacing is as follows: If the asynchrony value is less than zero, it is verified that the asynchrony between conductor temperature and conductor spacing is established. If the asynchrony value is equal to zero, assign a value of one to the function value of conductor spacing with respect to conductor temperature. If the asynchrony value is greater than zero, re-obtain the conductor temperature or conductor spacing in real time and perform data cleaning and analysis until the asynchrony value is less than or equal to zero.

6. The unified power quality conditioner UPQC for optical storage DC access according to claim 3, characterized in that: The specific method for obtaining the slope and intercept is as follows: Calculate the variance of the conductor spacing and then calculate the product of the number of conductor spacings to obtain where JP represents the deviation degree of the overall conductor spacing, t represents the time series, and y t represents the conductor spacing, represents the average value of the conductor spacing, that is Separate the and y t = kx t + b and substitute them into to obtain a quadratic function of k and b, and find the minimum value of this function to obtain the values of the slope and intercept.

7. A unified power quality controller UPQC for optical storage DC access according to claim 1, characterized in that: The specific method for obtaining the thermal expansion influence value is as follows: Normalize the function value of conductor spacing with respect to conductor temperature so that the function value is greater than zero and less than one, and take the reciprocal of the function value, denoted as the thermal expansion influence value.

8. A unified power quality controller UPQC for optical storage DC access according to claim 1, characterized in that: The specific method for obtaining the parasitic capacitive reactance attenuation coefficient is as follows: Perform standardization processing and comprehensive analysis on the high-frequency voltage signal influence value and the thermal expansion influence value to obtain the parasitic capacitive reactance attenuation coefficient; JS = GY × RP; Where, JS represents the parasitic capacitive reactance attenuation coefficient, GY represents the high-frequency voltage signal influence value, and RP represents the thermal expansion influence value.

9. The unified power quality controller UPQC for photovoltaic and energy storage DC access according to claim 1, characterized in that: In the capacitive reactance reduction judgment module, a dynamic threshold for parasitic capacitive reactance is set. The dynamic threshold for parasitic capacitive reactance is sorted in ascending order through bubble sort. The parasitic capacitive reactance attenuation coefficient is compared with the dynamic threshold for parasitic capacitive reactance in real time. If the parasitic capacitive reactance attenuation coefficient is greater than or equal to the largest dynamic threshold for parasitic capacitive reactance, it is determined that the capacitive reactance of the parasitic capacitor is normal, and the above operations are continued to be repeated by returning to the capacitive reactance reduction analysis module. If the parasitic capacitive reactance attenuation coefficient is less than the smallest dynamic threshold for parasitic capacitive reactance, it is determined that the capacitive reactance of the parasitic capacitor has decreased, and the result of the capacitive reactance reduction of the parasitic capacitor is sent to the common-mode voltage adjustment module.

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