Impulse current suppression circuit and earth leakage protection device

Abstract

The invention provides an impulse current suppression circuit which comprises an input end and an output end. The rectification module is coupled to the input end and converts alternating current voltage provided by a power supply through the input end into pulsating direct current voltage; the filtering module is coupled to the rectifying module and the output end and is used for filtering the pulsating direct-current voltage; the current limiting module is coupled to the rectifier module and is used for limiting the current flowing through the rectifier module within a period of time after the input end is connected with the power supply; the shunting module is coupled to the current limiting module and is used for shunting the current flowing through the current limiting module under the condition that the shunting module is triggered to work; and the delay trigger module is coupled to the shunt module and the input end, and triggers the shunt module to work after the input end is connected with the power supply for a period of time. The circuit provided by the invention can effectively restrain impact current when being electrified and started again, related devices in a loop are prevented from being damaged, and the circuit has relatively small heat productivity during working.

Description

Technical Field

[0001] The present invention relates to the field of electricity, and particularly to an inrush current suppression circuit, a leakage protection device, an electrical connection device, and an electrical appliance. Background Art

[0002] With the development of technology, electrical appliances are usually powered by direct current, and the power is also increasing day by day. In the circuit of converting alternating current to direct current, the most common problem is the large inrush current brought about by the large capacitance value of the filter capacitor at the beginning of power-on. The large inrush current will damage the related devices (such as rectifying devices or fuses) in the rectifying circuit. Therefore, it is necessary to suppress the inrush current during power-on to avoid damaging these devices.

[0003] In the prior art, as Figure 1A and 1B shown, a thermistor or a fixed-value resistor is usually connected in series in the rectifying circuit to suppress the inrush current at the beginning of power-on. However, in the solution of connecting a thermistor in series, it has a good effect when the thermistor is in the cold state. But because the temperature of the thermistor is relatively high during operation, if power-on is started again at this time, the thermistor is in the hot state and the resistance value is small, and at this time, the inrush current cannot be effectively suppressed, and the related devices will still be damaged. In the solution of connecting a fixed-value resistor in series, since the resistance value of the fixed-value resistor remains unchanged, the power is relatively large during normal operation, and a large amount of heat will be generated, which will pose high requirements on the resistor itself and the thermal performance of the product. Summary of the Invention

[0004] Based on the above problems, the first aspect of the present invention provides an inrush current suppression circuit, including: an input end and an output end; a rectifying module, which is coupled to the input end and is configured to convert the alternating voltage provided by the power supply via the input end into a pulsating direct current voltage; a filtering module, which is coupled to the rectifying module and the output end and is configured to filter the pulsating direct current voltage; a current limiting module, which is coupled to the rectifying module and is configured to limit the current flowing through the rectifying module for a period of time after the input end is connected to the power supply; a shunting module, which is coupled to the current limiting module and is configured to shunt the current flowing through the current limiting module when it is triggered to work; and a delay trigger module, which is coupled to the shunting module and the input end and is configured to trigger the shunting module to work after the above-mentioned period of time after the input end is connected to the power supply.

[0005] In some embodiments, the delay trigger module is further configured to: trigger the shunt module to operate after a first time period after the input terminal is connected to the power supply; cause the shunt module to stop operating after a second time period after the input terminal is disconnected from the power supply; and trigger the shunt module to operate again after a third time period after the input terminal is connected to the power supply again, and wherein the current limiting module is configured to limit the current flowing through the rectification module during the first time period and the third time period.

[0006] In some embodiments, during the operation of the shunt module, the current flowing through the shunt module is greater than the current flowing through the current limiting module.

[0007] In some embodiments, the delay trigger module includes a trigger diode, a first resistor, and a first capacitor. The first end of the first resistor is coupled to the input terminal, the second end of the first resistor is coupled to the first end of the first capacitor and the first end of the trigger diode, and the second end of the trigger diode and the second end of the first capacitor are coupled to the shunt module.

[0008] In some embodiments, during a first time period after the input terminal is connected to the power supply, the power supply charges the first capacitor via the first resistor. When the voltage at the first end of the first capacitor rises to a first voltage, the trigger diode conducts, thereby triggering the shunt module to operate.

[0009] In some embodiments, during the operation of the shunt module, the first end of the first capacitor remains at a second voltage. During a second time period after the input terminal is disconnected from the power supply, the first capacitor discharges via the trigger diode. When the voltage at the first end of the first capacitor drops to a third voltage, the trigger diode cuts off, thereby causing the shunt module to stop operating.

[0010] In some embodiments, the second voltage is less than the first voltage, and the third voltage is less than the second voltage.

[0011] In some embodiments, the delay trigger module further includes a second resistor, and the second resistor is connected in series with the trigger diode.

[0012] In some embodiments, the delay trigger module further includes at least one rectifier diode, whose anode is coupled to the input terminal and whose cathode is coupled to the first end of the first resistor.

[0013] In some embodiments, the filtering module includes a filtering capacitor, and the filtering capacitor is isolated from the first resistor by a diode.

[0014] In some embodiments, the shunt module includes a switching semiconductor element, which is a thyristor, a triode, or a field effect transistor.

[0015] In some embodiments, the shunt module further includes a relay or an optocoupler. The switching semiconductor element is coupled to the relay or the optocoupler and is configured to control the on and off states of the relay or the optocoupler.

[0016] In some embodiments, the current limiting module includes at least one thermistor or a fixed value resistor.

[0017] In some embodiments, the current limiting module, the shunt module, and / or the delay trigger module are coupled to the DC output terminal of the rectification module.

[0018] A second aspect of the present invention provides a leakage protection device, including an inrush current suppression circuit according to any one of the embodiments of the first aspect.

[0019] A third aspect of the present invention provides an electrical connection device, including: a housing; and a leakage protection device according to any one of the embodiments of the second aspect, where the leakage protection device is accommodated in the housing.

[0020] A fourth aspect of the present invention provides an electrical appliance, including: a load device; and an electrical connection device according to any one of the embodiments of the third aspect, which is coupled to the load device for supplying power to the load device.

[0021] In the present invention, the inrush current suppression circuit includes a shunt module and a delay trigger module, which can not only effectively suppress the inrush current at the beginning of power-on, but also effectively suppress the inrush current during restart after power failure, avoiding damage to related devices in the circuit, eliminating potential safety hazards, and having a small heat generation during operation, reducing the requirements for the heat performance of the resistor itself and the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Embodiments are illustrated and explained with reference to the accompanying drawings. These drawings are used to illustrate the basic principles and thus only show aspects necessary for understanding the basic principles. These drawings are not to scale. In the drawings, the same reference numerals represent similar features. Additionally, the connection lines between each block in the architecture diagram indicate an electrical coupling between two blocks, and the absence of a connection line between two blocks does not mean that the two blocks are not coupled.

[0023] Figure 1A The schematic diagram of an inrush current suppression circuit in the prior art is shown; Figure 1B The schematic diagram of another inrush current suppression circuit in the prior art is shown; Figure 2Shows the architecture diagram of the inrush current suppression circuit of the present invention; Figure 3 Shows the schematic diagram of the first embodiment of the inrush current suppression circuit according to the present invention; Figure 4 Shows in Figure 3 the embodiment of the waveforms of the voltages at the upper ends of capacitors C1 and C2; Figure 5 Shows the schematic diagram of the second embodiment of the inrush current suppression circuit according to the present invention; Figure 6 Shows the schematic diagram of the third embodiment of the inrush current suppression circuit according to the present invention; Figure 7 Shows the schematic diagram of the fourth embodiment of the inrush current suppression circuit according to the present invention; Figure 8 Shows the schematic diagram of the fifth embodiment of the inrush current suppression circuit according to the present invention; Figure 9 Shows the schematic diagram of the sixth embodiment of the inrush current suppression circuit according to the present invention. Detailed Description of the Invention

[0024] In the following detailed description of the preferred embodiments, reference will be made to the accompanying drawings which form a part of the present invention. The accompanying drawings illustrate, by way of example, specific embodiments that can implement the present invention. The example embodiments are not intended to exhaust all embodiments according to the present invention. It can be understood that other embodiments can be utilized and structural or logical modifications can be made without departing from the scope of the present invention. Therefore, the following detailed description is not restrictive, and the scope of the present invention is defined by the appended claims.

[0025] Before introducing the embodiments of the present invention, some terms involved in the present invention are first explained to better understand the present invention.

[0026] The terms "connected", "coupled" or "coupled" and similar terms used in the present invention are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Words such as "one", "a group of" or "a" do not indicate a quantity limitation, but indicate the existence of at least one.

[0027] As used in the present invention, the terms "comprising", "including" and similar terms should be understood as open-ended terms, i.e., "including / including but not limited to", indicating that other contents may also be included. The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment", and so on. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0028] The present invention aims to provide a surge current suppression circuit, which includes a shunt module and a delay trigger module, and can not only effectively suppress the surge current in the initial stage of power-on, but also effectively suppress the surge current when restarting power-on, avoid damaging related devices in the loop, eliminate potential safety hazards, and has a small heat generation during operation, reducing the requirements for the thermal performance of the resistor itself and the product.

[0029] Figure 2 The architecture diagram of the surge current suppression circuit of the present invention is shown.

[0030] As Figure 2 As shown in, the surge current suppression circuit 100 includes an input terminal 101 and an output terminal 102, a rectification module 103, a filtering module 104, a current limiting module 105, a shunt module 106 and a delay trigger module 107. The input terminal 101 can be coupled to a power supply, and the output terminal 102 can be coupled to a load. The rectification module 103 is coupled to the input terminal 101 and is used to convert the AC voltage provided by the power supply via the input terminal 101 into a pulsating DC voltage. The rectification module 103 can be, for example, a rectifier bridge or include at least one independent diode. The filtering module 104 is coupled to the rectification module 103 and the output terminal 102 and is used to filter the pulsating DC voltage. The filtering module 104 can include, for example, an electrolytic capacitor. The current limiting module 105 is coupled to the rectification module 103 and is used to limit the current flowing through the rectification module 103 within a period of time after the input terminal 101 is connected to the power supply, for example, limiting the current flowing through the rectification module 103 to a certain set value. The current limiting module 105 can include, for example, at least one thermistor or a fixed value resistor. The shunt module 106 is coupled to the current limiting module 105, for example, connected in parallel with the current limiting module 105, and shunts the current flowing through the current limiting module 105 when it is triggered to work. The delay trigger module 107 is coupled to the shunt module 106 and the input terminal 101, and triggers the shunt module 106 to work after the above-mentioned period of time after the input terminal 101 is connected to the power supply.

[0031] In the inrush current suppression circuit 100, within a period of time after the input terminal is connected to the power supply each time (i.e., powered on and started), the current limiting module 105 limits the current flowing through the rectification module 103. After this period of time, the delay trigger module 107 triggers the shunt module 106 to work, so that the shunt module 106 shunts the current flowing through the current limiting module 105, thus greatly reducing the current flowing through the current limiting module 105. When the current limiting module 105 includes a thermistor, the inrush current suppression circuit 100 can prevent the thermistor from remaining at a high temperature, resulting in the inability to suppress the inrush current after the input terminal is connected to the power supply again, reducing potential safety hazards. When the current limiting module 105 includes a fixed value resistor, the inrush current suppression circuit 100 can reduce the heat generation of the fixed value resistor and lower the requirements for the thermal performance of the resistor itself and the product.

[0032] In some embodiments, the delay trigger module 107 triggers the shunt module 106 to work after a first time period after the input terminal 101 is connected to the power supply; after a second time period after the input terminal 101 is disconnected from the power supply, the shunt module 106 is made to stop working; after a third time period after the input terminal 101 is connected to the power supply again, the shunt module 106 is triggered to work again. The current limiting module 105 limits the current flowing through the rectification module 103 during the first time period and the third time period. In this way, it is possible to suppress the inrush current during power-on startup again while avoiding excessive current flowing through the shunt module 106 and damaging the components therein.

[0033] In some embodiments, during the operation of the shunt module 106, the current flowing through the shunt module 106 is greater than the current flowing through the current limiting module 105. That is to say, in the loop formed by the input terminal 101, the rectification module 103, the filtering module 104, the current limiting module 105, and the shunt module 106, most of the current flows through the shunt module 106, and a small part of the current flows through the current limiting module 105. For example, more than half of the current flows through the shunt module 106. In this way, it is possible to further prevent the temperature of the thermistor from rising or reduce the heat generation of the fixed value resistor.

[0034] In some embodiments, the delay trigger module includes a trigger diode, a first resistor, and a first capacitor. The first end of the first resistor is coupled to the input terminal, the second end of the first resistor is coupled to the first end of the first capacitor and the first end of the trigger diode, and the second end of the trigger diode and the second end of the first capacitor are coupled to the shunt module.

[0035] In some embodiments, within the first time period after the input terminal is connected to the power supply, the power supply charges the first capacitor via the first resistor. When the voltage at the first end of the first capacitor rises to a first voltage, the trigger diode conducts, thereby triggering the shunt module to work.

[0036] In some embodiments, during the operation of the shunt module, the first end of the first capacitor is maintained at a second voltage. During a second time period after the input terminal is disconnected from the power supply, the first capacitor discharges through the trigger diode. When the voltage at the first end of the first capacitor drops to a third voltage, the trigger diode turns off, thereby stopping the operation of the shunt module.

[0037] In some embodiments, the second voltage is less than the first voltage, and the third voltage is less than the second voltage.

[0038] In some embodiments, the delay trigger module further includes a second resistor, which is connected in series with the trigger diode.

[0039] In some embodiments, the delay trigger module further includes at least one rectifier diode, whose anode is coupled to the input terminal and the cathode is coupled to the first end of the first resistor.

[0040] In some embodiments, the filtering module includes a filtering capacitor. The filtering capacitor is isolated from the first resistor by a diode.

[0041] In some embodiments, the shunt module 106 includes a switching semiconductor element, which can be a thyristor, a triode, or a field effect transistor. The delay trigger module 107 triggers the operation of the shunt module 106 by triggering the conduction of the switching semiconductor element and stops the operation of the shunt module 106 by controlling the switching semiconductor element to turn off. In this way, the circuit structure of the inrush current suppression circuit can be simplified and the cost can be reduced.

[0042] In some embodiments, the shunt module 106 includes a relay or an optocoupler. The switching semiconductor is coupled to the relay or the optocoupler and is used to control the on and off of the relay or the optocoupler. The relay or the optocoupler can be connected in parallel with the current limiting module 105. Thus, when the relay or the optocoupler is turned on, the current limiting module 105 basically does not conduct current due to being short-circuited, further avoiding the temperature rise of the thermistor or reducing the heat generation of the fixed value resistor.

[0043] In some embodiments, the current limiting module 105, the shunt module 106, and / or the delay trigger module 107 are coupled to the DC output terminal of the rectification module. In this way, the complexity of circuit design and timing control can be simplified.

[0044] Figure 3 The schematic diagram of the first embodiment of the inrush current suppression circuit according to the present invention is shown. Figure 4 Shown in Figure 3 the waveform diagram of the voltages at the upper ends of the capacitors C1 and C2 in the embodiment of

[0045] First, refer to Figure 3, the inrush current suppression circuit 200 includes an input terminal L / N, an output terminal, a rectification module 103, a filtering module 104, a current limiting module 105, a shunt module 106, and a delay trigger module 107. The input terminal is connected to a power supply (such as the power grid), and the output terminal is connected to a load device LOAD. In this embodiment, the rectification module 103 is a rectifier bridge DB, which is connected to one side of the input terminal of the inrush current suppression circuit 200 and converts the AC voltage provided by the power supply into a pulsating DC voltage when the input terminal is connected to the power supply. A fuse F1 is provided between the input terminal and the rectification module 103. The filtering module 104 includes an electrolytic capacitor C1, which is connected to the DC output terminal of the rectifier bridge DB, filters the pulsating DC voltage, smooths its waveform, and provides the filtered DC voltage to the output terminal. The current limiting module 105 includes a thermistor T1, the upper end (the first end) of which is connected to the lower end of the electrolytic capacitor C1, and the lower end (the second end) is connected to the rectifier bridge DB. The shunt module 106 includes a thyristor Q1, the anode of which is connected to the lower end of the electrolytic capacitor C1 and the upper end of the thermistor T1, and the cathode is connected to the lower end of the thermistor T1, so as to be connected in parallel with the thermistor T1. The delay trigger module 107 includes two diodes D1 and D6, a trigger diode ZD1, a resistor R1 (the first resistor), a capacitor C2 (the first capacitor), and resistors R2 and R3 (the second resistor). The anodes of the diodes D1 and D6 are respectively connected to two input terminals, and after the cathodes are connected, they are connected to the upper end (the first end) of the resistor R1. The lower end (the second end) of the resistor R1 is connected to the upper end (the first end) of the capacitor C2 and the left end (the first end) of the trigger diode ZD1. The right end (the second end) of the trigger diode ZD1 is connected to the control terminal of the thyristor Q1 through the resistor R3. The lower end (the second end) of the capacitor C2 is connected to the cathode of the thyristor Q1, the lower end (the second end) of the thermistor T1, and the rectifier bridge DB. The resistor R2 is connected in parallel with the capacitor C2.

[0046] In addition, as can be seen from Figure 3 , the filtering capacitor C1 and the resistor R1 are isolated by the rectifier bridge DB. That is to say, the charge on the capacitor C1 cannot charge the capacitor C2 through the rectifier bridge DB and the resistor R1. In other embodiments, an independent diode can also be provided between the filtering capacitor C1 and the resistor R1 for isolation.

[0047] Next, refer to Figure 3 and Figure 4 simultaneously to illustrate the working principle of the inrush current suppression circuit 200 of this embodiment.

[0048] When the input terminals L / N are connected to the power supply (i.e., powered on and started), current flows through the input terminal L - fuse F1 - rectifier bridge DB - capacitor C1 - thermistor T1 - rectifier bridge DB - input terminal N to charge capacitor C1. The resistance value of the thermistor T1 is relatively large, so it limits the magnitude of the charging current (i.e., inrush current) flowing through this loop. At the same time, current flows through the input terminals L / N - diodes D1 / D6 - resistor R1 to charge capacitor C2. After the first time period t1, the voltage at the upper end of capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1, and the trigger diode ZD1 conducts. After the trigger diode ZD1 conducts, the voltage at the upper end of capacitor C2 quickly drops and remains at the second voltage, and current flows through the trigger diode ZD1 and resistor R3 to trigger the thyristor Q1 to conduct, that is, to trigger the shunt module 106 to work. At this time, the voltage at the upper end of capacitor C1 is maintained at a relatively high level and enters the normal working state, providing a filtered DC voltage for the load device LOAD. Most of the current flows through the input terminal L - fuse F1 - rectifier bridge DB - load device LOAD - thyristor Q1 - rectifier bridge DB - input terminal N, and the current flowing through the thermistor T1 decreases significantly, so the temperature of the thermistor T1 remains at a relatively low level and maintains a relatively large resistance value. Therefore, within the first time period t1, the thermistor T1 can well suppress the inrush current, and after the first time period t1, since the thyristor Q1 is triggered to work and shunts the current flowing through the thermistor T1, the current flowing through the thermistor T1 decreases significantly, and the thermistor T1 can maintain a relatively large resistance value. Those skilled in the art can understand that the length of the first time period t1 can be set by setting the parameters of each component in the delay trigger module 107.

[0049] When the input terminals L / N are disconnected from the power supply (i.e., powered off), the charge on capacitor C2 is quickly released through the trigger diode ZD1, and the charge on capacitor C1 cannot charge capacitor C2 through resistor R1 due to being isolated by the rectifier bridge DB, so the voltage at the upper end of capacitor C2 quickly drops. After the second time period t2, the voltage at the upper end of capacitor C2 drops to the cut-off voltage (the third voltage) of the trigger diode ZD1, the trigger diode ZD1 cuts off, and then the thyristor Q1 cuts off. As can be seen from Figure 4 it, the second voltage is less than the first voltage, and the third voltage is less than the second voltage. Those skilled in the art can understand that the length of the second time period t2 can be set by setting the parameters of each component in the delay trigger module 107.

[0050] When the input terminals L / N are reconnected to the power supply, current flows again through the input terminal L - fuse F1 - rectifier bridge DB - capacitor C1 - thermistor T1 - rectifier bridge DB - input terminal N to charge the capacitor C1. Since the thermistor T1 still has a relatively large resistance value, it can still effectively limit the magnitude of the charging current (i.e., inrush current) flowing through this loop, avoiding damage to the components in the loop. Similarly, current flows again through the input terminals L / N - diodes D1 / D6 - resistor R1 to charge the capacitor C2. After passing through the third time period t3, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1 again, and the trigger diode ZD1 conducts. It can be understood that since after the second time period t2 when the input terminals L / N are disconnected from the power supply, the voltage at the upper end of the capacitor C2 has dropped to the cut-off voltage (the third voltage) of the trigger diode ZD1, the third time period t3 is at least the time required for the voltage at the upper end of the capacitor C2 to be charged from the third voltage to the first voltage. Therefore, within the third time period t3 after the input terminals L / N are reconnected to the power supply, current charges the capacitor C1, and the thermistor T1 limits the magnitude of the charging current flowing through this loop. And within this third time period t3, both the trigger diode ZD1 and the thyristor Q1 remain in the cut-off state and will not be damaged by the charging current.

[0051] Therefore, Figure 3 the inrush current suppression circuit 200 can not only effectively suppress the inrush current at the beginning of power-on, but also effectively suppress the inrush current when restarting power-on, avoiding damage to the related devices in the loop and eliminating potential safety hazards.

[0052] Figure 5 shows a schematic diagram of a second embodiment of the inrush current suppression circuit according to the present invention. Compared with Figure 3 the embodiment of Figure 5 the main difference is that in the inrush current suppression circuit 300 of

[0053] When the input terminals L / N are connected to the power supply (i.e., powered on and started), current flows through the input terminal L - fuse F1 - diode D2 - capacitor C1 - resistor R4 - input terminal N to charge the capacitor C1. The resistance value of the resistor R4 is relatively large, so it limits the magnitude of the charging current (i.e., inrush current) flowing through this loop. At the same time, current flows through the input terminal L - fuse F1 - diode D6 - resistor R1 to charge the capacitor C2. After the first time period t1, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1, and the trigger diode ZD1 conducts. After the trigger diode ZD1 conducts, the voltage at the upper end of the capacitor C2 quickly drops and remains at the second voltage, and current flows through the trigger diode ZD1 and resistor R3 to trigger the thyristor Q1 to conduct, that is, to trigger the shunt module 106 to work. At this time, the voltage at the upper end of the capacitor C1 is maintained at a relatively high level and enters the normal working state, providing a filtered DC voltage for the load device LOAD. Most of the current flows through the input terminal L - fuse F1 - diode D2 - load device LOAD - thyristor Q1 - input terminal N, and the current flowing through the resistor R4 decreases significantly, so the resistor R4 will not generate much heat. Therefore, within the first time period t1, the resistor R4 can well suppress the inrush current, and after the first time period t1, since the thyristor Q1 is triggered to work and shunts the current flowing through the resistor R4, the current flowing through the resistor R4 decreases significantly. Those skilled in the art can understand that the length of the first time period t1 can be set by setting the parameters of each component in the delay trigger module 107.

[0054] When the input terminals L / N are disconnected from the power supply (i.e., powered off), the charge on the capacitor C2 is quickly released through the trigger diode ZD1, and the charge on the capacitor C1 cannot charge the capacitor C2 through the resistor R1 due to being isolated by the diode D2, so the voltage at the upper end of the capacitor C2 quickly drops. After the second time period t2, the voltage at the upper end of the capacitor C2 drops to the cut-off voltage (the third voltage) of the trigger diode ZD1, and the trigger diode ZD1 cuts off, and then the thyristor Q1 cuts off. The second voltage is less than the first voltage, and the third voltage is less than the second voltage. Those skilled in the art can understand that the length of the second time period t2 can be set by setting the parameters of each component in the delay trigger module 107.

[0055] When the input terminals L / N are reconnected to the power supply, current flows again through the input terminal L - fuse F1 - diode D2 - capacitor C1 - resistor R4 - input terminal N to charge the capacitor C1. The resistor R4 can still effectively limit the magnitude of the charging current (i.e., inrush current) flowing through this loop, avoiding damage to the components in the loop. Similarly, current flows again through the input terminal L - fuse F1 - diode D6 - resistor R1 to charge the capacitor C2. After passing through the third time period t3, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1 again, and the trigger diode ZD1 conducts. It can be understood that since after the second time period t2 when the input terminals L / N are disconnected from the power supply, the voltage at the upper end of the capacitor C2 has dropped to the cut-off voltage (the third voltage) of the trigger diode ZD1, the third time period t3 is at least the time required for the voltage at the upper end of the capacitor C2 to be charged from the third voltage to the first voltage. Therefore, within the third time period t3 after the input terminals L / N are reconnected to the power supply, current charges the capacitor C1, and the resistor R4 limits the magnitude of the charging current flowing through this loop. And within this third time period t3, both the trigger diode ZD1 and the thyristor Q1 remain in the cut-off state and will not be damaged by the charging current.

[0056] Therefore, Figure 5 the inrush current suppression circuit 300 can not only effectively suppress the inrush current in the initial stage of power-on, but also effectively suppress the inrush current when restarting power-on, avoiding damage to the relevant devices in the loop, and has a relatively small heat generation, reducing the requirements for the thermal performance of the resistor itself and the product.

[0057] Figure 6 shows the schematic diagram of the third embodiment of the inrush current suppression circuit according to the present invention. Compared with Figure 3 the embodiment of Figure 6 the inrush current suppression circuit 400, the main difference is that in the inrush current suppression circuit 400, the rectification module 103 includes four independent diodes D2 - D5, the current limiting module 105 includes a fixed-value resistor R4, the shunt module 106 includes a MOS field-effect transistor Q1, and the delay trigger module 107 includes a diode D6. The trigger diode ZD1 is connected to the gate of the MOS field-effect transistor. The capacitor C1 is isolated from the resistor R1 through the diode D4.

[0058] When the input terminals L / N are connected to the power supply (i.e., powered on and started), current flows through the input terminal L - diode D2 - capacitor C1 - resistor R4 - diode D5 - input terminal N to charge the capacitor C1. The resistance value of the resistor R4 is relatively large, so it limits the magnitude of the charging current (i.e., inrush current) flowing through this loop. At the same time, current flows through the input terminal N - diode D6 - resistor R1 to charge the capacitor C2. After the first time period t1, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1, and the trigger diode ZD1 conducts. After the trigger diode ZD1 conducts, the voltage at the upper end of the capacitor C2 quickly drops and remains at the second voltage, and current flows through the trigger diode ZD1 to trigger the MOS field - effect transistor Q1 to conduct, that is, to trigger the shunt module 106 to work. At this time, the voltage at the upper end of the capacitor C1 remains at a relatively high level and enters the normal working state, providing a filtered DC voltage for the load device LOAD. Most of the current flows through the input terminal L - diode D2 - load device LOAD - MOS field - effect transistor Q1 - diode Q5 - input terminal N, and the current flowing through the resistor R4 decreases significantly, so the resistor R4 does not generate much heat. Therefore, within the first time period t1, the resistor R4 can well suppress the inrush current, and after the first time period t1, since the MOS field - effect transistor Q1 is triggered to work and shunts the current flowing through the resistor R4, the current flowing through the resistor R4 decreases significantly. Those skilled in the art can understand that the length of the first time period t1 can be set by setting the parameters of each component in the delay trigger module 107.

[0059] When the input terminals L / N are disconnected from the power supply (i.e., powered off), the charge on the capacitor C2 is quickly released through the trigger diode ZD1, and the charge on the capacitor C1 cannot charge the capacitor C2 through the resistor R1 due to being isolated by the diode D4, so the voltage at the upper end of the capacitor C2 quickly drops. After the second time period t2, the voltage at the upper end of the capacitor C2 drops to the cut - off voltage (the third voltage) of the trigger diode ZD1, the trigger diode ZD1 cuts off, and then the MOS field - effect transistor Q1 cuts off. The second voltage is less than the first voltage, and the third voltage is less than the second voltage. Those skilled in the art can understand that the length of the second time period t2 can be set by setting the parameters of each component in the delay trigger module 107.

[0060] When the input terminals L / N are reconnected to the power supply, current flows again through the input terminal L - diode D2 - capacitor C1 - resistor R4 - diode D5 - input terminal N to charge the capacitor C1. The resistor R4 can still effectively limit the magnitude of the charging current (i.e., the inrush current) flowing through this loop, avoiding damage to the components in the loop. Similarly, current flows again through the input terminal N - diode D6 - resistor R1 to charge the capacitor C2. After passing through the third time period t3, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1 again, and the trigger diode ZD1 conducts. It can be understood that since after the second time period t2 when the input terminals L / N are disconnected from the power supply, the voltage at the upper end of the capacitor C2 has dropped to the cut-off voltage (the third voltage) of the trigger diode ZD1, the third time period t3 is at least the time required for the voltage at the upper end of the capacitor C2 to be charged from the third voltage to the first voltage. Therefore, within the third time period t3 after the input terminals L / N are reconnected to the power supply, current charges the capacitor C1, and the resistor R4 limits the magnitude of the charging current flowing through this loop. And within this third time period t3, both the trigger diode ZD1 and the thyristor Q1 remain in the cut-off state and will not be damaged by the charging current.

[0061] Therefore, Figure 6 the inrush current suppression circuit 400 can not only effectively suppress the inrush current at the beginning of power-on, but also effectively suppress the inrush current when restarting power-on, avoiding damage to the relevant devices in the loop, and has a relatively small heat generation, reducing the requirements for the heat performance of the resistor itself and the product.

[0062] Figure 7 shows a schematic diagram of a fourth embodiment of the inrush current suppression circuit according to the present invention. Compared with Figure 3 the embodiment of Figure 7 the main difference in the inrush current suppression circuit 500 of

[0063] When the input terminal L / N is connected to the power supply (i.e., powered on), the current flows through the input terminal L-fuse F1-rectifier bridge DB-capacitor C1-thermistor T1-rectifier bridge DB-input terminal N to charge the capacitor C1. The resistance of thermistor T1 is relatively large, so the size of the charging current (i.e., the inrush current) flowing through the loop is limited. At the same time, the current flows through the input terminal L / N-diode D1 / D6-resistor R1 to charge the capacitor C2. After the first time period t1, the upper terminal voltage of the capacitor C2 reaches the conduction voltage (first voltage) of the trigger diode ZD1, and the trigger diode ZD1 is turned on. After the trigger diode ZD1 is turned on, the upper terminal voltage of the capacitor C2 quickly falls back and remains at the second voltage, and the current flows through the trigger diode ZD1 and the resistor R3 to trigger the thyristor Q1 to turn on, that is, trigger the shunt module 106 to work. At this time, the upper terminal voltage of the capacitor C1 is maintained at a relatively high level, entering a normal working state, and providing a filtered DC voltage for the load device LOAD. The current flows through the trigger diode ZD1 to trigger the thyristor Q1 to turn on, and the current flows through the input terminal L / N-diode D1 / D6-resistor R4-relay RL1-thyristor Q1-rectifier bridge DB-input terminal N / L, and the switch of relay RL1 is closed, short-circuiting the thermistor T1. The current basically no longer flows through the thermistor T1, so the temperature of the thermistor T1 is kept at a low level and maintains a large resistance. Therefore, in the first time period t1, the thermistor T1 can well suppress the impact current, and after the first time period t1, since the thyristor Q1 is triggered to work, the switch of relay RL1 is closed, short-circuiting the thermistor T1, and the thermistor T1 can maintain a large resistance. It can be understood by those skilled in the art that the length of the first time period t1 can be set by setting the parameters of each component in the delay trigger module 107.

[0064] When the input terminal L / N is disconnected from the power supply (i.e., the power is turned off), the charge on the capacitor C2 is quickly released through the trigger diode ZD1, and the charge on the capacitor C1 cannot be charged to the capacitor C2 through the resistor R1 due to being isolated by the rectifier bridge DB, so the upper end voltage of the capacitor C2 drops rapidly. After the second time period t2, the upper end voltage of the capacitor C2 is reduced to the cut-off voltage (third voltage) of the trigger diode ZD1, the trigger diode ZD1 is turned off, and then the thyristor Q1 is turned off. The second voltage is less than the first voltage, and the third voltage is less than the second voltage. Those skilled in the art can understand that the length of the second time period t2 can be set by setting the parameters of each component in the delay trigger module 107.

[0065] When the input terminals L / N are reconnected to the power supply, current flows again through the input terminal L - fuse F1 - rectifier bridge DB - capacitor C1 - thermistor T1 - rectifier bridge DB - input terminal N to charge the capacitor C1. Since the thermistor T1 still has a relatively large resistance value, it can still effectively limit the magnitude of the charging current (i.e., inrush current) flowing through this loop, avoiding damage to the components in the loop. Similarly, current flows again through the input terminals L / N - diodes D1 / D6 - resistor R1 to charge the capacitor C2. After passing through the third time period t3, the voltage at the upper end of the capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1 again, and the trigger diode ZD1 conducts, and the switch of the relay RL1 closes again. It can be understood that since after the second time period t2 when the input terminals L / N are disconnected from the power supply, the voltage at the upper end of the capacitor C2 has dropped to the cut-off voltage (the third voltage) of the trigger diode ZD1, the third time period t3 is at least the time required for the voltage at the upper end of the capacitor C2 to be charged from the third voltage to the first voltage. Therefore, within the third time period t3 after the input terminals L / N are reconnected to the power supply, current charges the capacitor C1, and the thermistor T1 limits the magnitude of the charging current flowing through this loop. And within this third time period t3, both the trigger diode ZD1 and the thyristor Q1 remain in the cut-off state and will not be damaged by the charging current.

[0066] Therefore, Figure 7 the inrush current suppression circuit 500 can not only effectively suppress the inrush current at the beginning of power-on, but also effectively suppress the inrush current when restarting power-on, avoiding damage to the related devices in the loop and eliminating potential safety hazards. In addition, in the normal working state, the temperature of the thermistor T1 is further reduced, so that the thermistor T1 maintains a relatively large resistance value.

[0067] Figure 8 shows the schematic diagram of the fifth embodiment of the inrush current suppression circuit according to the present invention. Compared with Figure 7 the embodiment of Figure 8 the main difference in the inrush current suppression circuit 600 of

[0068] is that in the inrush current suppression circuit 600 of Figure 7is basically the same as the inrush current suppression circuit 500, so the description of the inrush current suppression circuit 500 above can be referred to. The difference is that after the thyristor Q1 is triggered, the current flows through the input terminal L / N - diode D1 / D6 - resistor R4 - optocoupler U1 - thyristor Q1 - diode D5 / D3 - input terminal N / L. The output terminal of the optocoupler U1 is turned on, short - circuiting the thermistor T1. The current basically no longer flows through the thermistor T1, so the temperature of the thermistor T1 remains at a low level, maintaining a large resistance value.

[0069] Therefore, Figure 8 the inrush current suppression circuit 600 can not only effectively suppress the inrush current at the beginning of power - on, but also effectively suppress the inrush current when restarting power - on, avoiding damage to related devices in the loop and eliminating potential safety hazards. In addition, in the normal working state, the temperature of the thermistor T1 is further reduced, so that the thermistor T1 maintains a large resistance value.

[0070] Figure 9 shows the schematic diagram of the sixth embodiment of the inrush current suppression circuit according to the present invention. Compared with Figure 3 the embodiment of Figure 3 in the inrush current suppression circuit 200, the current - limiting module 105, the shunt module 106 and the delay - trigger module 107 are all coupled to the DC output terminal of the rectification module 103; while in this embodiment, the current - limiting module 105, the shunt module 106 and the delay - trigger module 107 are all coupled to the AC input terminal of the rectification module 103. In addition, the delay - trigger module 107 only includes a diode D1.

[0071] When the input terminal L / N is connected to the power supply (i.e., powered on), the current flows through the input terminal L-fuse F1-rectifier bridge DB-capacitor C1-rectifier bridge DB-thermistor T1-input terminal N to charge the capacitor C1. The resistance of thermistor T1 is relatively large, so the size of the charging current (i.e., the inrush current) flowing through the loop is limited. At the same time, the current flows through the input terminal L-fuse F1-diode D1-resistor R1 to charge the capacitor C2. After the first time period t1, the upper terminal voltage of the capacitor C2 reaches the conduction voltage (first voltage) of the trigger diode ZD1, and the trigger diode ZD1 is turned on. After the trigger diode ZD1 is turned on, the upper terminal voltage of the capacitor C2 quickly falls back and remains at the second voltage, and the current flows through the trigger diode ZD1 and the resistor R3 to trigger the thyristor Q1 to turn on, that is, trigger the shunt module 106 to work. At this time, the upper terminal voltage of the capacitor C1 is maintained at a relatively high level, entering a normal working state, and providing a filtered DC voltage for the load device LOAD. Most of the current flows through the input terminal L-fuse F1-rectifier bridge DB-load device LOAD-rectifier bridge DB-thyristor Q1-input terminal N, and the current flowing through the thermistor T1 is greatly reduced, so the temperature of the thermistor T1 is kept at a low level and a large resistance is maintained. Therefore, in the first time period t1, the thermistor T1 can well suppress the inrush current, and after the first time period t1, since the thyristor Q1 is triggered to work, the current flowing through the thermistor T1 is shunted, so the current flowing through the thermistor T1 is greatly reduced, and the thermistor T1 can maintain a large resistance. Those skilled in the art can understand that the length of the first time period t1 can be set by setting the parameters of each component in the delay trigger module 107.

[0072] When the input terminal L / N is disconnected from the power supply (i.e., the power is turned off), the charge on the capacitor C2 is quickly released through the trigger diode ZD1, and the charge on the capacitor C1 cannot be charged to the capacitor C2 through the resistor R1 due to being isolated by the rectifier bridge DB, so the upper end voltage of the capacitor C2 drops rapidly. After the second time period t2, the upper end voltage of the capacitor C2 is reduced to the cut-off voltage (third voltage) of the trigger diode ZD1, the trigger diode ZD1 is turned off, and then the thyristor Q1 is turned off. The second voltage is less than the first voltage, and the third voltage is less than the second voltage. Those skilled in the art can understand that the length of the second time period t2 can be set by setting the parameters of each component in the delay trigger module 107.

[0073] When the input terminals L / N are reconnected to the power supply, current flows again through the input terminal L - fuse F1 - rectifier bridge DB - capacitor C1 - rectifier bridge DB - thermistor T1 - input terminal N to charge capacitor C1. Since the thermistor T1 still has a relatively large resistance value, it can still effectively limit the magnitude of the charging current (i.e., inrush current) flowing through this loop, avoiding damage to the components in the loop. Similarly, current flows again through the input terminal L - fuse F1 - diode D1 - resistor R1 to charge capacitor C2. After the third time period t3, the voltage at the upper end of capacitor C2 reaches the conduction voltage (the first voltage) of the trigger diode ZD1 again, and the trigger diode ZD1 conducts. It can be understood that since after the second time period t2 when the input terminals L / N are disconnected from the power supply, the voltage at the upper end of capacitor C2 has dropped to the cut-off voltage (the third voltage) of the trigger diode ZD1, the third time period t3 is at least the time required for the voltage at the upper end of capacitor C2 to be charged from the third voltage to the first voltage. Therefore, within the third time period t3 after the input terminals L / N are reconnected to the power supply, current charges capacitor C1, and the thermistor T1 limits the magnitude of the charging current flowing through this loop. And within this third time period t3, both the trigger diode ZD1 and the thyristor Q1 remain in the cut-off state and will not be damaged by the charging current.

[0074] Therefore, Figure 9 the inrush current suppression circuit 700 can not only effectively suppress the inrush current at the beginning of power - on, but also effectively suppress the inrush current when restarting power - on again, avoiding damage to the related devices in the loop and eliminating potential safety hazards.

[0075] The second aspect of the present invention provides a leakage protection device, which includes an inrush current suppression circuit according to any one of the above - mentioned embodiments.

[0076] The third aspect of the present invention provides an electrical connection device, including: a housing; and a leakage protection device, which is accommodated in the housing and includes an inrush current suppression circuit according to any one of the above - mentioned embodiments.

[0077] The fourth aspect of the present invention provides an electrical appliance, including: a load device; and an electrical connection device, which is coupled to the load device and used to supply power to the load device. The electrical connection device includes a housing and a leakage protection device, which is accommodated in the housing and includes an inrush current suppression circuit according to any one of the above - mentioned embodiments.

[0078] Accordingly, while the present invention has been described with reference to specific examples, which are merely illustrative and not restrictive of the present invention, it will be apparent to those of ordinary skill in the art that changes, additions, or deletions can be made to the disclosed embodiments without departing from the spirit and scope of the present invention.

Claims

1. An impact current suppression circuit, comprising: An input terminal and an output terminal; A rectification module, which is coupled to the input terminal and is configured to convert an alternating voltage provided by a power supply via the input terminal into a pulsating DC voltage; A filtering module, which is coupled to the rectification module and the output terminal and is configured to filter the pulsating DC voltage; A current limiting module, which is coupled to the rectification module and is configured to limit the current flowing through the rectification module within a period of time after the input terminal is connected to the power supply; A shunt module, which is coupled to the current limiting module and is configured to shunt the current flowing through the current limiting module when triggered to work; And A delay trigger module, which is coupled to the shunt module and the input terminal and is configured to trigger the shunt module to work after the above-mentioned period of time after the input terminal is connected to the power supply.

2. The impulse current suppression circuit according to claim 1, wherein, The delay trigger module is further configured to: Trigger the shunt module to work after a first period of time after the input terminal is connected to the power supply; Make the shunt module stop working after a second period of time after the input terminal is disconnected from the power supply; Trigger the shunt module to work again after a third period of time after the input terminal is connected to the power supply again, and wherein, The current limiting module is configured to limit the current flowing through the rectification module within the first period of time and the third period of time.

3. The impulse current suppression circuit according to claim 1 or 2, wherein, During the working period of the shunt module, the current flowing through the shunt module is greater than the current flowing through the current limiting module.

4. The impact current suppression circuit according to claim 2, wherein, The delay trigger module includes a trigger diode, a first resistor and a first capacitor. The first end of the first resistor is coupled to the input terminal, the second end of the first resistor is coupled to the first end of the first capacitor and the first end of the trigger diode, and the second end of the trigger diode and the second end of the first capacitor are coupled to the shunt module.

5. The impulse current suppression circuit according to claim 4, wherein, Within the first period of time after the input terminal is connected to the power supply, the power supply charges the first capacitor via the first resistor. When the voltage at the first end of the first capacitor rises to a first voltage, the trigger diode conducts, thereby triggering the shunt module to work.

6. The impulse current suppression circuit according to claim 5, wherein During the working period of the shunt module, the first end of the first capacitor remains at a second voltage. Within the second period of time after the input terminal is disconnected from the power supply, the first capacitor discharges via the trigger diode. When the voltage at the first end of the first capacitor drops to a third voltage, the trigger diode cuts off, thereby making the shunt module stop working.

7. The impulse current suppression circuit according to claim 6, wherein, The second voltage is less than the first voltage, and the third voltage is less than the second voltage.

8. The impact current suppression circuit according to claim 4, wherein, The delay trigger module further includes a second resistor, and the second resistor is connected in series with the trigger diode.

9. The impulse current suppression circuit according to claim 4, wherein The delay trigger module further includes at least one rectifier diode, whose anode is coupled to the input terminal and whose cathode is coupled to the first end of the first resistor.

10. The impulse current suppression circuit according to claim 4, wherein, The filtering module includes a filtering capacitor, and the filtering capacitor is isolated from the first resistor by a diode.

11. The impulse current suppression circuit according to claim 1, wherein, The shunt module includes a switching semiconductor device, and the switching semiconductor device is a thyristor, a triode or a field effect transistor.

12. The impulse current suppression circuit according to claim 11, wherein, The shunt module further includes a relay or an optocoupler. The switching semiconductor device is coupled to the relay or the optocoupler and is configured to control the on and off of the relay or the optocoupler.

13. The impulse current suppression circuit according to claim 1, wherein, The current limiting module includes at least one thermistor or a fixed value resistor.

14. The impulse current suppression circuit according to claim 1, wherein, The current limiting module, the shunt module and / or the delay trigger module are coupled to the DC output terminal of the rectification module.

15. A leakage protection device, comprising: The inrush current suppression circuit according to any one of claims 1-14.

16. An electrical connection device, comprising: A housing; And The leakage protection device according to claim 15, and the leakage protection device is accommodated in the housing.

17. An electrical appliance, comprising: A load device; And The electrical connection device according to claim 16, which is coupled to the load device for supplying power to the load device.

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