Power amplifier

Abstract

The embodiment of the present disclosure provides a power amplifier. The power amplifier comprises: an amplification module having at least one amplification unit, configured to receive a radio frequency input signal and output an amplified signal; and an adjustment module coupled with the amplification module, wherein the adjustment module is configured to output an adjustment signal based on the radio frequency input signal, and the adjustment signal is superimposed with the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier.

Description

TECHNICAL FIELD

[0001] The embodiment of the present disclosure relates to the technical field of circuit, in particular to a power amplifier. BACKGROUND

[0002] The radio frequency power amplifier (PA) is an important component of the radio frequency circuit in the electronic device, which is responsible for amplifying the power of the radio frequency signal to be transmitted and realizing the communication with the base station or WiFi hotspot.

[0003] When the working environment of the power amplifier changes, the gain of the power amplifier will change. For example, when working in high and low temperature states, the circuit device parameters in the power amplifier will change with the temperature, which will cause the gain of the power amplifier to decrease at high temperature and to increase at low temperature. When the gain of the power amplifier changes, the stability of the power amplifier will be affected, and it is difficult to meet the demand of the industry index. SUMMARY

[0004] Therefore, the embodiment of the present disclosure provides a power amplifier.

[0005] The technical solution of the present disclosure is implemented as follows:

[0006] The embodiment of the present disclosure provides a power amplifier, which comprises:

[0007] An amplification module having at least one amplification unit, configured to receive a radio frequency input signal and output an amplified signal;

[0008] An adjustment module coupled to the amplification module, configured to output an adjustment signal based on the radio frequency input signal, and superimpose the adjustment signal with the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier.

[0009] In some embodiments, the signal at the input end of the adjustment module has the same phase as the signal at the input end of the amplification module, and the signal at the output end of the adjustment module has the opposite phase to the signal at the output end of the amplification module, so that the amplitude of the first output signal is smaller than the amplitude of the amplified signal.

[0010] In some embodiments, the power amplifier further comprises an input module configured to receive a radio frequency input signal and output a first signal having a phase difference through a first output end and a second output end of the input module based on the radio frequency input signal;

[0011] The amplification module comprises a first amplification unit and a second amplification unit, and the first amplification unit and the second amplification unit are connected to the first output end and the second output end respectively and output a first amplified signal and a second amplified signal;

[0012] The adjusting module is connected with the first output end and / or the second output end, so that the adjusting signal is superimposed with the first amplified signal and / or the second amplified signal.

[0013] In some embodiments, the adjusting module comprises a first adjusting unit and a second adjusting unit, the first adjusting unit is connected with the first output end, and outputs a first adjusting signal based on the first signal; the second adjusting unit is connected with the second output end, and outputs a second adjusting signal based on the first signal.

[0014] The first adjusting signal is superimposed with the first amplified signal or the second amplified signal.

[0015] The second adjusting signal is superimposed with the second amplified signal or the first amplified signal.

[0016] In some embodiments, the first adjusting signal, the second adjusting signal and the corresponding superimposed amplified signal have a phase difference.

[0017] In some embodiments, the first adjusting signal, the second adjusting signal and the corresponding superimposed amplified signal are in opposite phase.

[0018] In some embodiments, the first signal input by the adjusting module and the adjusting signal output by the adjusting module are in opposite phase.

[0019] In some embodiments, the first amplifying unit comprises a first transistor, a control end of the first transistor is connected with the first output end, a first end of the first transistor is the output end of the first amplifying unit, and a second end is grounded.

[0020] The second amplifying unit comprises a second transistor, a control end of the second transistor is connected with the second output end, a first end of the second transistor is the output end of the second amplifying unit, and a second end is grounded.

[0021] The adjusting module comprises a third transistor and a fourth transistor, a control end of the third transistor is connected with the first output end, and a control end of the fourth transistor is connected with the second output end.

[0022] In some embodiments, a second end of the third transistor is connected with the output end of the first amplifying unit, a second end of the fourth transistor is connected with the output end of the second amplifying unit, and a first end of the third transistor and a first end of the fourth transistor are connected with a power supply voltage.

[0023] In some embodiments, a first end of the third transistor is connected to an output end of the second amplification unit, and a first end of the fourth transistor is connected to an output end of the first amplification unit; and a second end of the third transistor and a second end of the fourth transistor are grounded.

[0024] In some embodiments, the adjusting module further comprises a phase adjusting unit, so that the adjusting signal and the amplification signal have a phase difference.

[0025] In some embodiments, via the phase adjusting unit, a control end of the third transistor is connected to the first output end, and a control end of the fourth transistor is connected to the second output end; a first end of the third transistor is connected to an output end of the first amplification unit, and a first end of the fourth transistor is connected to an output end of the second amplification unit.

[0026] Alternatively, via the phase adjusting unit, a first end of the third transistor is connected to an output end of the first amplification unit, and a first end of the fourth transistor is connected to an output end of the second amplification unit.

[0027] The embodiments of the present disclosure provide a power amplifier, comprising: an amplification module having at least one amplification unit, configured to receive a radio frequency input signal and output an amplification signal; and an adjusting module coupled to the amplification module, configured to output an adjusting signal based on the radio frequency input signal, and superimpose the adjusting signal with the amplification signal to obtain a first output signal, so as to reduce the gain of the power amplifier. In the embodiments of the present disclosure, by arranging the adjusting module in the power amplifier, and superimposing the adjusting signal output by the adjusting module with the amplification signal, a first output signal different from the amplification signal is obtained, so that the gain of the power amplifier is adjusted. Moreover, while realizing the gain adjustment, the balance of other indicators (linearity, efficiency, etc.) of the power amplifier is realized. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 FIG. 1 is a circuit diagram of a power amplifier in an example;

[0029] Figure 2 FIG. 2 is a circuit diagram of a first power amplifier provided by the embodiments of the present disclosure;

[0030] Figure 3 FIG. 3 is a circuit diagram of a second power amplifier provided by the embodiments of the present disclosure;

[0031] Figure 4 FIG. 4 is a circuit diagram of a third power amplifier provided by the embodiments of the present disclosure;

[0032] Figure 5 FIG. 5 is a circuit diagram of a fourth power amplifier provided by the embodiments of the present disclosure;

[0033] Figure 6 A fifth circuit diagram of a power amplifier is provided for the embodiments of the present disclosure. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present disclosure will be clearly and completely described in combination with the embodiments of the present disclosure and the drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present disclosure.

[0035] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid obscuring the present disclosure, some technical features known in the art are not described; that is, not all features of the actual embodiments are described here, and well-known functions and structures are not described in detail.

[0036] In the drawings, the size of layers, regions, elements and their relative sizes can be exaggerated for clarity. The same reference signs represent the same elements throughout.

[0037] It should be understood that when an element or layer is referred to as being "on", "adjacent", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer, or an intervening element or layer can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected to", or "directly coupled to" another element or layer, then there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the first element, component, region, layer or section discussed below can be represented as a second element, component, region, layer or section without departing from the teachings of the present disclosure. When the second element, component, region, layer or section is discussed, it does not mean that the first element, component, region, layer or section necessarily exists.

[0038] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or

[0039] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0040] For a thorough understanding of the present disclosure, reference should be made to the following detailed description together with the accompanying drawings, in which:

[0041] In actual use, the power amplifier needs to meet the gain requirements of high and low temperature. Because in high temperature environment, the gain of the power amplifier will decrease; in low temperature environment, the gain of the power amplifier will increase. In order to reduce the gain difference of the power amplifier at high and low temperatures, it is necessary to design a gain-variable power amplifier. At the same time, because the stability and burning of the power amplifier are directly related to the gain, specifically, the higher the gain of the power amplifier, the worse the stability, and the more likely to burn. Therefore, in order to further improve the performance of the power amplifier, it is necessary to design a gain-variable power amplifier.

[0042] Figure 1 For an example of the circuit diagram of the power amplifier. As Figure 1As shown, the circuit of the power amplifier 100 includes a first balun 101, a transistor Q', a transistor Q", and a second balun 102. The first balun 101 is configured to receive a radio frequency input signal and output a differential signal. The transistor Q' and the transistor Q" are configured to amplify the differential signal output by the first balun 101. The second balun 102 is configured to combine the differential signal output by the transistor Q' and the transistor Q" to output a radio frequency output signal.

[0043] In the prior art, the gain of the power amplifier 100 can only be adjusted by the bias circuit of the transistor Q' and the transistor Q". However, this will cause the linearity and efficiency of the power amplifier 100 to deteriorate. Therefore, Figure 1 The power amplifier 100 shown in the prior art is difficult to achieve a balance between the linearity and the efficiency while adjusting the gain in actual use.

[0044] Therefore, the embodiments of the present disclosure provide a gain-variable power amplifier which can achieve a balance between the gain, the linearity, and the efficiency in actual use.

[0045] Figure 2 A first circuit diagram of a power amplifier is provided in the embodiments of the present disclosure. As shown in the first circuit diagram of the power amplifier, Figure 2 The embodiments of the present disclosure provide a power amplifier 200, which includes an amplification module 202 having at least one amplification unit configured to receive a radio frequency input signal and output an amplified signal, and an adjustment module 203 coupled to the amplification module 202. The adjustment module 203 is configured to output an adjustment signal based on the radio frequency input signal, and the adjustment signal is superimposed with the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier 200.

[0046] As shown in the first circuit diagram of the power amplifier, Figure 2 In some embodiments of the present disclosure, the power amplifier 200 includes a non-push-pull amplifier. The amplification module 202 of the non-push-pull amplifier includes one amplification unit, i.e., a first amplification unit 207. The first amplification unit 207 is configured to receive a radio frequency input signal and output an amplified signal. The adjustment module 203 of the non-push-pull amplifier includes one adjustment unit, i.e., a first adjustment unit 208. The first adjustment unit 208 further includes a phase adjustment structure 204 for adjusting the phase of the radio frequency input signal received by the first adjustment unit 208. The phase adjustment structure 204 is configured to adjust the phase of the radio frequency input signal received by the first adjustment unit 208, so that the first adjustment unit 208 outputs an adjustment signal having a phase different from that of the amplified signal.

[0047] In some embodiments, the first amplification unit 207 includes a first transistor Q1, the first adjustment unit includes a third transistor Q3 and a phase modulation structure 204. The control terminal 209 of the first transistor Q1 is an input terminal of the first amplification unit 207, the first terminal 210 of the first transistor Q1 is an output terminal of the first amplification unit 207, and the second terminal 211 of the first transistor Q1 is grounded. The control terminal 212 of the third transistor Q3 is an input terminal of the first adjustment unit 208, the first terminal 213 of the third transistor Q3 is an output terminal of the first adjustment unit 208, and the second terminal 214 of the third transistor Q3 is grounded.

[0048] In the embodiments of the present disclosure, the control terminal 212 of the third transistor Q3 is connected with the output terminal of the phase modulation structure 204. The phase modulation structure 204 adjusts the phase of the received radio frequency input signal and inputs the adjusted signal to the third transistor Q3. The third transistor Q3 outputs an adjustment signal according to the signal output by the phase modulation structure 204. The output terminal of the amplification module 202 is coupled with the output terminal of the adjustment module 203. In this way, the amplified signal output by the output terminal of the amplification module 202 and the adjustment signal output by the output terminal of the adjustment module 203 are superimposed to generate a first output signal different from the amplified signal and the adjustment signal.

[0049] In some embodiments, the phase modulation structure 204 includes a phase shifter, an inverter, a power divider, etc.

[0050] In some embodiments, the signal at the input terminal of the adjustment module 203 has the same phase as the signal at the input terminal of the amplification module 202, and the signal at the output terminal of the adjustment module 203 has an opposite phase to the signal at the output terminal of the amplification module 202, so that the amplitude of the first output signal is smaller than the amplitude of the amplified signal.

[0051] Here, it can be understood that, since the first output signal is obtained by superimposing the adjustment signal output by the adjustment module 203 and the amplified signal output by the amplification module 202, and the adjustment signal and the amplified signal have opposite phases. Therefore, the amplitude of the first output signal is smaller than the amplitude of the amplified signal, and the gain of the power amplifier 200 is reduced.

[0052] In the embodiments of the present disclosure, the power amplifier 200 further includes an output module 215. In some embodiments, the output module 215 includes a balun, which is used to convert the first output signal into a radio frequency output signal. As shown in Figure 2 The output module 215 includes an input terminal and an output terminal, which are an input terminal 216 and an output terminal 217, respectively. The input terminal 216 is connected with the first terminal 210 of the first transistor Q1, and the output terminal 217 is coupled with a radio frequency output terminal RFOUT and used to output a radio frequency output signal.

[0053] Figure 3 A second circuit diagram of a power amplifier is provided in the embodiments of the present disclosure. As shown inFigure 3 As shown, the power amplifier 300 is a differential circuit, comprising an amplification module 302, an adjustment module 303, and an output module 315. Furthermore, the power amplifier 300 also includes an input module 301 for receiving radio frequency (RF) input signals and outputting a first signal with a phase difference through a first output terminal 305 and a second output terminal 306 based on the RF input signals. The amplification module 302 includes a first amplification unit 207 and a second amplification unit 307, which are respectively connected to the first output terminal 305 and the second output terminal 306, and output a first amplified signal and a second amplified signal, respectively. The adjustment module 303 is connected to the first output terminal 305 and / or the second output terminal 306 to superimpose the adjustment signal with the first amplified signal and / or the second amplified signal.

[0054] In this embodiment of the disclosure, the input module 301 is used to convert the radio frequency input signal received by the power amplifier 300 from single-ended transmission to differential transmission. For example... Figure 3 As shown, the input module 301 includes one input terminal and two output terminals, namely a first input terminal 304, a first output terminal 305, and a second output terminal 306. The first input terminal 304 is coupled to the radio frequency input terminal RFIN and is used to receive radio frequency input signals. The first output terminal 305 and the second output terminal 306 respectively output first signals with a phase difference based on the radio frequency input signals.

[0055] In some embodiments, the first signal includes differential signals with opposite phases and the same amplitude. In other words, the two signals output by the first output terminal 305 and the second output terminal 306 of the input module 301 have a phase difference of 180 degrees.

[0056] like Figure 3 As shown, the amplification module 302 includes two amplification units: a first amplification unit 207 and a second amplification unit 307. The first amplification unit 207 is connected to the first output terminal 305 and is used to output a first amplified signal based on the first signal. The second amplification unit 307 is connected to the second output terminal 306 and is used to output a second amplified signal based on the first signal.

[0057] In some embodiments, such as Figure 3As shown, the adjusting module 303 includes a first adjusting unit 208 and a second adjusting unit 308, the first adjusting unit 208 is connected with the first output end 305, the first adjusting unit 208 can output a first adjusting signal based on the first signal; the second adjusting unit 308 is connected with the second output end 306, the second adjusting unit 308 can output a second adjusting signal based on the first signal. In the embodiment of the present disclosure, the first adjusting signal is superimposed with the first amplification signal or the second amplification signal; the second adjusting signal is superimposed with the second amplification signal or the first amplification signal. Figure 3 In some embodiments, the first adjusting signal is superimposed with the second amplification signal, and the second adjusting signal is superimposed with the first amplification signal.

[0058] In some embodiments, the first adjusting signal, the second adjusting signal and the corresponding superimposed amplification signal have a phase difference.

[0059] As shown in the figure, Figure 3 the first adjusting signal is superimposed with the second amplification signal, and the second adjusting signal is superimposed with the first amplification signal. At this time, the first adjusting signal and the second amplification signal have a phase difference, and the second adjusting signal and the first amplification signal have a phase difference.

[0060] In some embodiments, the first adjusting signal, the second adjusting signal and the corresponding superimposed amplification signal have opposite phases.

[0061] As shown in the figure, Figure 3 the first adjusting signal and the second amplification signal have opposite phases, and the second adjusting signal and the first amplification signal have opposite phases.

[0062] In some embodiments, the first signal input by the adjusting module and the adjusting signal output by the adjusting module have opposite phases.

[0063] As shown in the figure, Figure 3 the phase of the first signal input by the first adjusting unit 208 is opposite to the phase of the first adjusting signal output by the first adjusting unit 208, and the phase of the first signal input by the second adjusting unit 308 is opposite to the phase of the second adjusting signal output by the second adjusting unit 308.

[0064] In some embodiments, the first amplification unit includes a first transistor, the control end of the first transistor is connected with the first output end, the first end of the first transistor is the output end of the first amplification unit, and the second end is grounded; the second amplification unit includes a second transistor, the control end of the second transistor is connected with the second output end, the first end of the second transistor is the output end of the second amplification unit, and the second end is grounded; the adjusting module includes a third transistor and a fourth transistor, the control end of the third transistor is connected with the first output end, and the control end of the fourth transistor is connected with the second output end.

[0065] As shown in the figure, Figure 1As shown, the first amplification unit 207 in the amplification module 302 includes a first transistor Q1. The control terminal 209 of the first transistor Q1 is connected with the first output terminal 305 of the input module 301, for receiving the first signal. The first transistor Q1 is configured to amplify the received first signal and output the amplified signal from the first terminal 210 thereof. Here, the amplified signal output by the first transistor Q1 is referred to as an amplified signal, and more specifically, as a first amplified signal. The second terminal 211 of the first transistor Q1 is grounded. The second amplification unit 307 in the amplification module 302 includes a second transistor Q2. The control terminal 309 of the second transistor Q2 is connected with the second output terminal 306 of the input module 301, for receiving the first signal. The second transistor Q2 is configured to amplify the received first signal and output the amplified signal from the first terminal 310 thereof. Here, the amplified signal output by the second transistor Q2 is referred to as an amplified signal, and more specifically, as a second amplified signal. The second terminal 311 of the second transistor Q2 is grounded.

[0066] It should be noted that the first amplification unit 207 and the second amplification unit 307 have the same structure. When the first signal is a differential signal, the first amplified signal and the second amplified signal output by the first amplification unit 207 and the second amplification unit 307, respectively, are differential signals.

[0067] The adjustment module 303 includes a first adjustment unit 208 and a second adjustment unit 308. The first adjustment unit 208 includes a third transistor Q3. The control terminal 212 of the third transistor Q3 is connected with the first output terminal 305 of the input module 301, for receiving the first signal. The third transistor Q3 is configured to output an adjustment signal from the first terminal 213 thereof according to the received first signal. Here, the adjustment signal is referred to as a first adjustment signal. The first terminal 213 of the third transistor Q3 is connected with the output terminal of the second amplification unit, and the second terminal 214 of the third transistor Q3 is grounded. The second adjustment unit 308 includes a fourth transistor Q4. The control terminal 312 of the fourth transistor Q4 is connected with the second output terminal 306 of the input module 301, for receiving the first signal. The fourth transistor Q4 is configured to output an adjustment signal from the first terminal 313 thereof according to the received first signal. Here, the adjustment signal is referred to as a second adjustment signal. The first terminal 313 of the fourth transistor Q4 is connected with the output terminal of the first amplification unit, and the second terminal 314 of the fourth transistor Q4 is grounded.

[0068] The adjustment module 303 is coupled to the amplification module 302. Specifically, the first terminal 213 of the third transistor Q3 is connected to the first terminal 310 of the second transistor Q2, and the first terminal 313 of the fourth transistor Q4 is connected to the first terminal 210 of the first transistor Q1. Thus, the first amplified signal and the corresponding second adjustment signal can be superimposed to obtain the first output signal, and the second amplified signal and the corresponding first adjustment signal can be superimposed to obtain the first output signal. In other words, the first adjustment unit 208 adjusts the amplitude of the output signal of the power amplifier 300, and the second adjustment unit 308 adjusts the amplitude of the output signal of the power amplifier 300.

[0069] In some embodiments, the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 comprise heterojunction bipolar transistors (HBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). The control terminal of each transistor (including the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4) can be its base or gate, its first terminal can be its collector or drain, and its second terminal can be its emitter or source. The first transistor Q1 and the second transistor Q2 have the same structure, and the third transistor Q3 and the fourth transistor Q4 have the same structure.

[0070] In this embodiment of the disclosure, compared to Figure 3 The power amplifier 100 shown, Figure 1 The power amplifier 300 in this embodiment incorporates an additional adjustment module 303, and the introduction of this adjustment module 303 does not substantially degrade the linearity and efficiency of the power amplifier 300. Therefore, the power amplifier 300 provided in this embodiment can balance linearity and efficiency while adjusting the gain. Furthermore, compared to... Figure 3 , Figure 4 The power amplifier 300 offers greater design freedom and better performance.

[0071] In some embodiments, the second terminal of the third transistor is connected to the output terminal of the first amplification unit, the second terminal of the fourth transistor is connected to the output terminal of the second amplification unit, and the first terminals of the third transistor and the fourth transistor are connected to the power supply voltage.

[0072] Figure 4 A circuit diagram of a third power amplifier 400 provided in an embodiment of this disclosure. (See diagram below.) Figure 3 As shown, the power amplifier 400 includes an input module 301, an amplification module 302, an adjustment module 403, and an output module 315. The input module 301, amplification module 302, and output module 315 can be referenced from... Figure 5, which will not be described here. The adjustment module 403 includes a first adjustment unit 208 and a second adjustment unit 308. The first adjustment unit 208 includes a third transistor Q3, the control end 212 of the third transistor Q3 is connected with the first output end 305 of the input module 301, for receiving the first signal. The third transistor Q3 is configured to output a first adjustment signal from the second end 214 according to the received first signal. The first end 213 of the third transistor Q3 is connected with a power voltage end, and the power voltage end is configured to provide a power voltage V CC . The second adjustment unit 308 includes a fourth transistor Q4, the control end 312 of the fourth transistor Q4 is connected with the second output end 306 of the input module 301, for receiving the first signal. The fourth transistor Q4 is configured to output a second adjustment signal from the second end 314 according to the received first signal. The first end 313 of the fourth transistor Q4 is connected with the power voltage end. The second end 214 of the third transistor Q3 is connected with the first end 210 of the first transistor Q1, and the second end 314 of the fourth transistor Q4 is connected with the first end 310 of the second transistor Q2. In this way, the first amplified signal and the corresponding first adjustment signal can be superimposed to obtain the first output signal, and the second amplified signal and the corresponding second adjustment signal can be superimposed to obtain the first output signal. It should be noted that when the first signal is a differential signal, the two adjustment signals output by the adjustment module 403 based on the first signal are also differential signals.

[0073] In some embodiments, the adjustment module further includes a phase adjustment unit, so that the adjustment signal has a phase difference with the amplified signal.

[0074] Figure 5 A fourth circuit diagram of a power amplifier is provided for the embodiments of the present disclosure. As shown in Figure 3 , the power amplifier 500 includes an input module 301, an amplification module 302, an adjustment module 503, and an output module 315. The input module 301, the amplification module 302, and the output module 315 can be referred to Figure 6The first adjusting unit 504 includes a third transistor Q3 and a first phase adjusting unit 506, and the control terminal 212 of the third transistor Q3 is coupled with the first output terminal 305 through the first phase adjusting unit 506. The second adjusting unit 505 includes a fourth transistor Q4 and a second phase adjusting unit 507, and the control terminal 312 of the fourth transistor Q4 is coupled with the second output terminal 306 through the second phase adjusting unit 507. The first terminal 213 of the third transistor Q3 and the first terminal 210 of the first transistor Q1 are coupled, the first terminal 313 of the fourth transistor Q4 and the first terminal 310 of the second transistor Q2 are coupled, and the second terminal 214 of the third transistor Q3 and the second terminal 314 of the fourth transistor Q4 are grounded. Here, the first phase adjusting unit 506 and the second phase adjusting unit 507 are configured to receive and adjust the first signal transmitted in a differential mode, and output a second signal transmitted in a differential mode. The third transistor Q3 is configured to output a first adjusting signal from the first terminal 213 according to the received second signal, and the fourth transistor Q4 is configured to output a second adjusting signal from the first terminal 313 according to the received second signal. In the embodiment of the present disclosure, the adjustment of the first signal by the first phase adjusting unit 506 and the second phase adjusting unit 507 includes the adjustment of the phase of the first signal, for example, the inversion of the first signal.

[0075] In the embodiment of the present disclosure, the first phase adjusting unit 506 and the second phase adjusting unit 507 include an inverter, a phase shifter or a power divider.

[0076] Figure 6 A fifth circuit diagram of a power amplifier is provided in the embodiment of the present disclosure. As shown in Figure 3 The power amplifier 600 includes an input module 301, an amplification module 302, an adjusting module 603 and an output module 315. Among them, the input module 301, the amplification module 302 and the output module 315 can refer to the input module 301, the amplification module 302 and the output module 315 of the first power amplifier circuit diagram provided in the embodiment of the present disclosure. Figure 3The details are omitted here. The adjustment module 603 includes a first adjustment unit 604 and a second adjustment unit 605. The first adjustment unit 604 includes a third transistor Q3 and a first phase adjustment unit 506. The first terminal 213 of the third transistor Q3 is coupled to the output terminal of the first amplification unit 207 via the first phase adjustment unit 506. The second adjustment unit 605 includes a fourth transistor Q4 and a second phase adjustment unit 507. The first terminal 313 of the fourth transistor Q4 is coupled to the output terminal of the second amplification unit 307 via the second phase adjustment unit 507. The control terminal 212 of the third transistor Q3 is coupled to the first output terminal 305, and the control terminal 312 of the fourth transistor Q4 is coupled to the second output terminal 306. The second terminals 214 of the third transistor Q3 and the second terminal 314 of the fourth transistor Q4 are grounded. Here, the third transistor Q3 and the fourth transistor Q4 are used to receive the first differentially transmitted signal and output the second differentially transmitted signal. The first phase adjustment unit 506 is used to adjust the phase of the received second signal and output a first adjustment signal, and the second phase adjustment unit 507 is used to adjust the phase of the received second signal and output a second adjustment signal. In this embodiment of the present disclosure, the adjustment of the second signal by the first phase adjustment unit 506 and the second phase adjustment unit 507 includes the adjustment of the phase of the second signal, for example, inverting the phase of the second signal.

[0077] In some embodiments, the amplification module is further configured to receive a first bias signal; the amplification module outputs an amplified signal based on the first bias signal and a first signal; the adjustment module is further configured to receive a second bias signal, the magnitude of which varies with the ambient temperature; the adjustment module outputs an adjustment signal whose amplitude varies with the ambient temperature based on the second bias signal and the first signal. In some embodiments, the second bias signal is greater than the first bias signal.

[0078] refer to Figure 3 The control terminal 209 of the first transistor Q1 and the control terminal 309 of the second transistor Q2 are also used to receive the first bias signal. Figure 3 (Not shown in the image). The first transistor Q1 can output a first amplified signal based on a first bias signal and a first signal, where the first bias signal is used to adjust the swing of the first amplified signal. The second transistor Q2 can output a second amplified signal based on the first bias signal and the first signal, where the first bias signal is used to adjust the swing of the second amplified signal. The control terminals 212 of the third transistor Q3 and the fourth transistor Q4 are also used to receive the second bias signal (…). ​ (Not shown in the diagram). The third transistor Q3 can output a first adjustment signal based on a second bias signal and a first signal, whereby the second bias signal is used to adjust the swing of the first adjustment signal. The fourth transistor Q4 can output a second adjustment signal based on a second bias signal and a first signal, whereby the second bias signal is used to adjust the swing of the second adjustment signal.

[0079] Here, the first bias signal and the second bias signal can be provided by an external bias circuit, and can be current signals or voltage signals.

[0080] In the embodiment of the present disclosure, during use of the power amplifier 300, the size of the first bias signal remains unchanged. Here, since the size of the first bias signal does not change, the indicators such as the linearity and efficiency of the power amplifier 300 will not be affected.

[0081] It should be noted that, in a normal temperature environment, if the size of the first bias signal remains unchanged, the swing of the first amplified signal output by the first transistor Q1 and the swing of the second amplified signal output by the second transistor Q2 remain unchanged. However, when the external environment temperature decreases, if the size of the first bias signal remains unchanged, the swing of the first amplified signal output by the first transistor Q1 and the swing of the second amplified signal output by the second transistor Q2 both increase. And the more the external environment temperature decreases, the more the swing of the amplified signal increases. Here, it can be understood that, in the case where the power amplifier does not include an adjustment module, if the swing of the amplified signal increases, the gain of the power amplifier will also increase.

[0082] In the embodiment of the present disclosure, the size of the second bias signal changes with the change of the external environment temperature. Specifically, the lower the external environment temperature, the larger the second bias signal; the higher the external environment temperature, the smaller the second bias signal. Here, since the size of the second bias signal changes with the change of the external environment temperature, at different temperatures, different second bias signals can be used to control the conduction or turn-off of the third transistor Q3 and the fourth transistor Q4. And in the case where the second bias signal controls the conduction of the third transistor Q3 and the fourth transistor Q4, according to different second bias signals, the size of the swing of the first adjustment signal output by the third transistor Q3 and the swing of the second adjustment signal output by the fourth transistor Q4 can also be controlled.

[0083] In a specific embodiment, when the external environment temperature decreases more than the normal temperature, the swing of the first adjustment signal output by the third transistor Q3 is larger, and the swing of the second adjustment signal output by the fourth transistor Q4 is also larger. So that the swing of the first output signal obtained by superimposing the second amplified signal and the corresponding first adjustment signal is smaller, and the swing of the first output signal obtained by superimposing the first amplified signal and the corresponding second adjustment signal is also smaller. In this way, the gain of the power amplifier is greatly reduced.

[0084] In another specific embodiment, when the external environment temperature decreases less than the normal temperature, the swing of the first adjusting signal output by the third transistor Q3 is small, and the swing of the second adjusting signal output by the fourth transistor Q4 is also small. The swing of the first output signal obtained by superimposing the second amplification signal and the corresponding first adjusting signal is large, and the swing of the first output signal obtained by superimposing the first amplification signal and the corresponding second adjusting signal is also large. In this way, the gain of the power amplifier is reduced.

[0085] Here, the part of the gain that is reduced can compensate for the gain increment caused by the swing of the amplification signal rising due to the decrease of the environment temperature. That is, the actual gain of the power amplifier after gain adjustment can be flexibly controlled within a certain threshold range, thereby reducing the difference in gain at different temperatures.

[0086] In the embodiments of the present disclosure, the size of the first bias signal can be smaller than the size of the second bias signal. For example, the size of the second bias signal can be 1 to 2 times the size of the first bias signal, so that the gain of the third transistor is 0 to 3 dB higher than the gain of the second transistor.

[0087] Generally, the first transistor Q1 and the second transistor Q2 in the amplification module can be designed in AB class or B class to balance the linearity and efficiency of the power amplifier. In the embodiments of the present disclosure, the third transistor Q3 and the fourth transistor Q4 in the adjusting module are designed in A class, so that the connected bias signals of the third transistor Q3 and the fourth transistor Q4 are higher than those of the first transistor Q1 and the second transistor Q2. In this way, on the one hand, the reduction of the larger gain can be realized, and on the other hand, the third transistor Q3 and the fourth transistor Q4 can realize complementation with the first transistor Q1 and the second transistor Q2, thereby making the power amplifier obtain better performance.

[0088] It should be noted that the gain-variable power amplifier provided in the embodiments of the present disclosure can be applied to the application scenario in which the external environment temperature is low (lower than the normal temperature). The gain of the power amplifier can be flexibly adjusted according to the environment temperature and always stabilized within a certain threshold range, thereby improving the performance of the amplifier.

[0089] The embodiment of the present disclosure provides a power amplifier, comprising: an amplification module having at least one amplification unit, configured to receive a radio frequency input signal and output an amplified signal; and an adjustment module coupled to the amplification module, configured to output an adjustment signal based on the radio frequency input signal, and superimpose the adjustment signal with the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier. In the embodiment of the present disclosure, the adjustment module is arranged in the power amplifier, and the adjustment signal output by the adjustment module is superimposed with the amplified signal to obtain the first output signal different from the amplified signal, so that the gain of the power amplifier is adjusted. Moreover, while the gain is adjustable, the balance of other indicators (linearity, efficiency, etc.) of the power amplifier is realized.

[0090] It should be understood that every technical feature mentioned in the specification refers to a specific feature of the embodiment, which is included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that the size of the sequence number of each process in various embodiments of the present disclosure does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The sequence number of the above-mentioned embodiments of the present disclosure is only for description, not representing the advantages and disadvantages of the embodiments.

[0091] The above description is only the preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. Any equivalent structural transformation made according to the disclosure content of the present disclosure, or direct / indirect application in other related technical fields is included in the patent protection scope of the present disclosure.

Claims

1. A power amplifier, characterized by, The power amplifier comprises: an input module configured to receive a radio frequency input signal and output a first signal with a phase difference through a first output end and a second output end of the input module based on the radio frequency input signal; an amplification module comprising a first amplification unit and a second amplification unit, the first amplification unit and the second amplification unit being connected to the first output end and the second output end respectively and outputting a first amplified signal and a second amplified signal; a regulation module coupled to the amplification module, the regulation module being connected to the first output end and / or the second output end, the regulation module outputting a regulation signal based on the first signal, and the first amplified signal and / or the second amplified signal being superimposed to obtain a first output signal to reduce the gain of the power amplifier; wherein the regulation module is further configured to receive a second bias signal, the second bias signal changing in size with the change of an external environment temperature, and the regulation module outputting a regulation signal with a magnitude changing with the external environment temperature based on the second bias signal and the first signal.

2. The power amplifier of claim 1, wherein, The signal at the input end of the regulation module has the same phase as the signal at the input end of the amplification module, and the signal at the output end of the regulation module has an opposite phase to the signal at the output end of the amplification module, so that the magnitude of the first output signal is smaller than the magnitude of the amplified signal.

3. The power amplifier of claim 1, wherein, The regulation module comprises a first regulation unit and a second regulation unit, the first regulation unit being connected to the first output end and outputting a first regulation signal based on the first signal, and the second regulation unit being connected to the second output end and outputting a second regulation signal based on the first signal. The first regulation signal is superimposed with the first amplified signal or the second amplified signal. The second regulation signal is superimposed with the second amplified signal or the first amplified signal.

4. The power amplifier of claim 3, wherein, The first regulation signal and the second regulation signal have a phase difference with the corresponding superimposed amplified signal.

5. The power amplifier of claim 3, wherein, The first regulation signal and the second regulation signal have an opposite phase to the corresponding superimposed amplified signal.

6. The power amplifier of claim 1, wherein, The first signal input to the regulation module has an opposite phase to the regulation signal output by the regulation module.

7. The power amplifier of claim 1, wherein: the first amplification unit comprises a first transistor, a control end of the first transistor being connected to the first output end, a first end of the first transistor being the output end of the first amplification unit, and a second end of the first transistor being grounded; the second amplification unit comprises a second transistor, a control end of the second transistor being connected to the second output end, a first end of the second transistor being the output end of the second amplification unit, and a second end of the second transistor being grounded; the regulation module comprises a third transistor and a fourth transistor, a control end of the third transistor being connected to the first output end, and a control end of the fourth transistor being connected to the second output end.

8. The power amplifier of claim 7, wherein, a second end of the third transistor is connected to the output end of the first amplification unit, a second end of the fourth transistor is connected to the output end of the second amplification unit, and a first end of the third transistor and a first end of the fourth transistor are connected to a power supply voltage.

9. The power amplifier of claim 7, wherein, The first end of the third transistor is connected with the output end of the second amplification unit, and the first end of the fourth transistor is connected with the output end of the first amplification unit; the second end of the third transistor and the second end of the fourth transistor are grounded.

10. The power amplifier of claim 7, wherein, The adjusting module further comprises a phase adjusting unit, so that the adjusting signal and the amplification signal have a phase difference.

11. The power amplifier of claim 10, wherein, Through the phase adjusting unit, the control end of the third transistor is connected with the first output end, and the control end of the fourth transistor is connected with the second output end; the first end of the third transistor is connected with the output end of the first amplification unit, and the first end of the fourth transistor is connected with the output end of the second amplification unit. Alternatively, through the phase adjusting unit, the first end of the third transistor is connected with the output end of the first amplification unit, and the first end of the fourth transistor is connected with the output end of the second amplification unit.

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