A frequency response adjustment method for a multifunctional sound calibrator
The MCU generates discrete sinusoidal signals and combines the coordinated adjustment of the timer and digital-to-analog converter, the problem of multi-functional acoustic calibrator in multi-frequency point and sound pressure level adjustment is solved, and high-precision, stable frequency and amplitude control is achieved to meet the multi-frequency point calibration needs of acoustic instruments.
Patent Information
- Application Number
- CN202510773581.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-11
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2045-06-11
AI Technical Summary
The existing multifunctional acoustic calibrators can only adjust the amplitude at one or two frequency points, and cannot meet the multi-frequency calibration requirements. Adjusting multiple sound pressure levels requires complex algorithms and circuits, which is difficult to meet the calibration requirements of different types of acoustic instruments.
Discrete sinusoidal signals are generated through the MCU, the frequency is adjusted using the timer, and the signal amplitude is coordinated by the digital-to-analog converter. The 12-bit high-precision DAC and the MCU are coordinated to achieve flexible frequency and amplitude adjustment, and the signal stability is ensured by combining the timer automatic reload function.
It realizes flexible and adjustable frequency generation, with a frequency deviation of less than 0.7%, supports 20dB sound pressure level range adjustment, ensuring that the frequency output of the sound calibrator meets the requirements of high-precision metering, and improving the stability and reliability of the sound calibrator.
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Figure CN120282084B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of acoustic measuring instruments, and in particular to a frequency response adjustment method for a multifunctional sound calibrator. Background Art
[0002] With the continuous development of acoustic technology and the expansion of its application areas, the requirements for the accuracy and reliability of acoustic measurement instruments are becoming increasingly stringent. Multifunctional sound calibrators, as one of the most important tools in the field of acoustic measurement, can generate one or more constant sound pressures at one or more frequency points, providing a precise benchmark for calibrating measurement microphones, sound level meters, and various acoustic measurement instruments. This ensures that these instruments accurately reflect the actual sound parameters, such as sound pressure level and frequency, in actual measurements. This is crucial for acoustic research and applications.
[0003] However, most existing sound calibrators have only one or two frequency points and can only adjust one or two amplitudes. Furthermore, different types of acoustic instruments often require different calibration frequencies, and some require calibration at multiple frequencies. However, due to performance, algorithm complexity, and frequency accuracy issues, existing multi-function sound calibrators mostly only have one or two frequency points and cannot meet the demand for multiple frequencies. Furthermore, to calibrate the response of acoustic instruments at different sound pressure levels, the sound calibrator needs to be able to emit sound pressures of different amplitudes. However, adjusting multiple sound pressure levels often requires more complex algorithms and circuits. Therefore, how to solve these problems is urgently needed. Summary of the Invention
[0004] In response to the above technical problems, the technical solution adopted by the present invention is a method for adjusting the frequency response of a multifunctional sound calibrator, comprising the following steps:
[0005] S01, generate discrete sinusoidal signal data through MCU, and control DAC to convert the data into analog signal output;
[0006] S02, amplifying the analog signal output by the DAC through a power amplifier to adjust the frequency response of the sound calibrator;
[0007] S03, adjusting the signal output frequency by the internal timer of the MCU, including:
[0008] S31, configure the TIM clock inside the MCU, and the timer clock is divided by the AHB bus clock inside the MCU, and its frequency is determined by the system clock after being divided by the AHB prescaler and the APB prescaler;
[0009] S32, setting the prescaler and counter inside the timer, and enabling the timer to periodically trigger an update event through the automatic reload function;
[0010] S04. Coordinately adjust the signal amplitude through two digital-to-analog converters, where the two digital-to-analog converters include digital-to-analog converter No. 1 and digital-to-analog converter No. 2, and the output end of digital-to-analog converter No. 1 is connected to the input end of digital-to-analog converter No. 2, wherein:
[0011] The output end of the digital-to-analog converter No. 1 is connected to the input end of the digital-to-analog converter No. 2, the digital-to-analog converter No. 1 is used for reference frequency response calibration, and the digital-to-analog converter No. 2 is used for dynamically adjusting the output amplitude;
[0012] The control ends of the digital-to-analog converter No. 1 and the digital-to-analog converter No. 2 are both connected to the MCU, and the MCU adjusts the proportion coefficients of the two.
[0013] Preferably, the timer clock is derived from the frequency division of the AHB bus clock inside the MCU, and the calculation method includes:
[0014] When the APB prescaler division coefficient = 1,
[0015] ;
[0016] in, Represents the timer clock, Represents the AHB bus clock inside the MCU, Represents the division coefficient of the APB prescaler;
[0017] When the APB prescaler division coefficient ≠ 1,
[0018] *2;
[0019] in, Represents the MCU internal system clock, Represents the division coefficient of the AHB prescaler;
[0020] The AHB bus clock inside the MCU is obtained by dividing the system clock through the AHB prescaler. The calculation method includes:
[0021] When the APB prescaler division coefficient = 1,
[0022] ;
[0023] in, Represents the MCU internal system clock, Represents the division coefficient of the AHB prescaler;
[0024] When the APB prescaler division coefficient ≠ 1
[0025] ;
[0026] in, Represents the division coefficient of the timer's internal prescaler, Represents the count value of the timer's internal counter.
[0027] Preferably, the step S32 of enabling the timer to periodically trigger an update event through the automatic reload function includes:
[0028] S321: Configure a specific TIM trigger time. Each timer can further divide the timer clock frequency to obtain its own clock frequency.
[0029] S322, configure the timer to count up mode, enable the timer update event, set the counter, and when the timer is used, the timer will start counting from zero and increment according to its own clock frequency. When the count value is equal to the preset counter, the timer update event will be triggered;
[0030] The timer triggering time for the above-mentioned timer update event is:
[0031] .
[0032] Preferably, the calculation formula of the signal output frequency in step S03 is:
[0033] signal_output_fre= = ;
[0034] Among them, signal_output_fre represents the signal output frequency, and n represents the number of points per cycle of the signal;
[0035] Where n is the number of points per cycle of the discrete sine signal, and the deviation of the signal output frequency satisfies
[0036] *100%≤0.7%.
[0037] Preferably, the generation of the discrete sinusoidal signal data includes:
[0038] S50, generate sine signal data with amplitude A, ranging from -A A;
[0039] S51 increases the data by 2048 and converts it to 0 4095 is a positive integer to adapt to the input range of the DAC;
[0040] The maximum value of the amplitude A does not exceed 2047.
[0041] Preferably, the adjustment of the signal amplitude in step S04 includes:
[0042] S41. Setting an initial duty factor of the digital-to-analog converter No. 2 according to the target sound pressure level adjustment range to ensure that its maximum adjustment range covers the sound pressure level change requirement;
[0043] S42, measuring the current output sound pressure level with a sound level meter, and adjusting the duty factor of the digital-to-analog converter No. 1 so that the sound pressure level reaches a reference value, wherein the reference value is 94 dB;
[0044] S43 , after fixing the duty cycle of the digital-to-analog converter No. 1 , dynamically adjust the duty cycle of the digital-to-analog converter No. 2 through the MCU to adjust the output amplitude.
[0045] Preferably, the initial duty ratio setting of the digital-to-analog converter No. 2 in step S41 includes:
[0046] S411, according to the target sound pressure level adjustment range ≥ 20dB, determine that the maximum proportion coefficient of the digital-to-analog converter No. 2 does not exceed ;
[0047] S412: Control the initial coefficient of the digital-to-analog converter No. 2 through the MCU.
[0048] Preferably, the MCU output signal amplitude is calculated according to the following formula:
[0049] VOUT= *k;
[0050] Where k is the internal parameter of the DAC that can be controlled by the MCU, and VIN is the input signal amplitude.
[0051] A frequency response adjustment circuit for a multifunctional sound calibrator, used to implement the frequency response adjustment method for a multifunctional sound calibrator described in the above scheme, characterized in that it includes an MCU, a DAC, a power amplifier, a display module, a serial port module, and a Bluetooth module, wherein:
[0052] The MCU is used to output a signal to the DAC and control the output signal amplitude of the DAC. The DAC processes the received signal according to the instruction sent by the MCU and then outputs it;
[0053] The input end of the power amplifier is connected to the output end of the DAC, and is used to amplify the output signal to adjust the frequency response of the sound calibrator;
[0054] The display module is connected to the MCU via an SPI interface to display the output signal frequency and amplitude;
[0055] The serial port module is used to connect to a computer to read and control the frequency and amplitude of the signal;
[0056] The Bluetooth module is used to connect to a mobile phone to read and control the frequency and amplitude of the signal.
[0057] Preferably, the display module is an OLED screen.
[0058] The present invention has at least the following beneficial effects:
[0059] 1. Flexible and adjustable frequency generation is achieved through precise frequency division configuration of the MCU's internal timer and cyclic output of discrete sinusoidal signal data. The system calculates the output frequency based on the frequency division factor, count value, and number of points per cycle. The frequency deviation is less than 0.7%, ensuring that the sound calibrator's frequency output meets high-precision measurement requirements.
[0060] 2. A design separates reference frequency response adjustment (DAC 1) from amplitude adjustment (DAC 2). Once the reference frequency response stabilizes, amplitude adjustment can be quickly achieved by adjusting the scaling factor of DAC 2. Through the coordinated control of a 12-bit high-precision DAC and an MCU, it supports a 20dB sound pressure level adjustment range, balancing adjustment accuracy with ease of operation and avoiding stability issues caused by signal attenuation.
[0061] 3. Based on the timer automatic reload function and complete cycle signal output design, it ensures that the signal has no phase deviation and discontinuity problems, improves the stability and reliability of the sound calibrator output, and meets the application requirements of long-term continuous operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0063] Figure 1 A circuit diagram provided for embodiment 1 of the present invention;
[0064] Figure 2 This is a flow chart of an internal timer provided in Example 1 of the present invention;
[0065] Figure 3 This is the amplitude adjustment circuit provided in the first embodiment of the present invention. DETAILED DESCRIPTION
[0066] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.
[0067] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way are interchangeable where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0068] Example 1:
[0069] A frequency response adjustment method for a multifunctional sound calibrator, such as Figure 2 As shown, the following steps are included:
[0070] S01, generates discrete sinusoidal signal data through MCU (microcontroller unit) and controls DAC (digital-to-analog converter) to convert the data into analog signal output;
[0071] S02, amplifying the analog signal output by the DAC through a power amplifier to adjust the frequency response of the sound calibrator;
[0072] Specifically, the aforementioned frequency adjustment is primarily achieved through the MCU's internal timer. A complete cycle signal data is generated within the MCU, and the internal DAC is used to trigger the timer to cyclically output the complete cycle signal. By adjusting the timer trigger time and the number of signal points per cycle, the signal output frequency can be flexibly adjusted. Because the generated signal is a complete cycle, the output signal will not have phase deviations or signal discontinuities.
[0073] When configuring the clock of the MCU internal timer TIM:
[0074] The timer clock is derived from the MCU's internal AHB bus clock and is calculated using the following methods:
[0075] When the APB prescaler division coefficient = 1,
[0076] ;
[0077] in, Represents the timer clock, Represents the AHB bus clock inside the MCU, Represents the division coefficient of the APB prescaler;
[0078] When the APB prescaler division coefficient ≠ 1,
[0079] *2;
[0080] The MCU's internal AHB bus clock is obtained by dividing the system clock by the AHB prescaler. The calculation method includes:
[0081] When the APB prescaler division coefficient = 1,
[0082] ;
[0083] in, Represents the MCU internal system clock, Represents the division coefficient of the AHB prescaler;
[0084] When the APB prescaler division coefficient ≠ 1
[0085] .
[0086] For example, when the system clock SYSCLK is 100MHz, if the AHB prescaler division factor is equal to 1 and the APB prescaler division factor is equal to 1, then = =100MHz. If the AHB prescaler division factor is equal to 1 and the APB prescaler division factor is equal to 2, then = =100MHz.
[0087] After configuring the timer's clock source through the above steps, configure the specific timer trigger time through the following steps:
[0088] S03, adjust the signal output frequency through the MCU internal timer, including:
[0089] S31, configure the clock of the timer inside the MCU, and the timer is divided by the AHB bus clock inside the MCU, and its frequency is determined by the system clock after being divided by the AHB prescaler and the APB prescaler;
[0090] S32, setting the prescaler and counter inside the timer, and enabling the timer to periodically trigger an update event through the automatic reload function;
[0091] Specifically, the above step S32 uses the automatic reload function to enable the timer to periodically trigger the update event, including:
[0092] S321, configure a specific timer trigger time, each timer can divide the timer clock frequency again to obtain its own clock frequency;
[0093] S322, configure the timer to count up mode, enable the timer update event, set the counter, and after the timer is enabled, the timer will start counting from zero and increment according to its own clock frequency. When the count value is equal to the preset counter, the timer update event will be triggered;
[0094] The timer triggering time for the above-mentioned timer update event is:
[0095] ;
[0096] in, Represents the division coefficient of the timer's internal prescaler and the count value of the timer's internal counter.
[0097] Furthermore, the calculation formula of the signal output frequency in step S03 is:
[0098] signal_output_fre= = ;
[0099] Among them, signal_output_fre represents the signal output frequency, and n represents the number of points per cycle of the signal;
[0100] Where n is the number of points per cycle of the discrete sine signal, and the deviation of the signal output frequency satisfies
[0101] *100%≤0.7%.
[0102] The generation of the above-mentioned discrete sinusoidal signal data includes:
[0103] S50, generate sine signal data with amplitude A, ranging from -A A;
[0104] S51, increase the data by 2048 and convert it to 0 4095 is a positive integer to adapt to the input range of the DAC;
[0105] The maximum value of the amplitude A does not exceed 2047.
[0106] For example, if the timer clock is 100MHz and you need to output a 1kHz signal, you can set the timer internal prescaler division coefficient to 10 and the counter to 100. At this time, the timer trigger time = = =100kHz, and then generate a discrete sine signal data with 100 points per cycle. The output signal frequency at this time is = = = 1kHz.
[0107] However, the above method cannot accurately obtain all the required frequency points, especially when the required output frequency is not an integer. For example, the timer clock is configured to be 100MHz, but a 501.19Hz signal is required to be output. In this case, the output signal frequency signal_output_fre = It can be seen that = = ≈399050.26, but the internal frequency division coefficient of the timer, the count value CK_CNT, and the number of points per cycle n of the signal can only be integers, so there will be frequency deviation. If the internal prescaler frequency division coefficient of the timer is set to 1, the count value is 1608, and n is 124, then the output signal frequency = ≈501.52Hz, at this time there is *100% = *100% ≈ 0.07% frequency deviation. According to the "JJG 176-2022 Sound Calibrator Verification Procedure", the acceptable tolerance for the frequency of LS-level sound calibrators is 0.7%. Therefore, the frequency output by this method is within the acceptable range. Therefore, it can be applied to the frequency adjustment of the sound calibrator to achieve multi-frequency signal output.
[0108] S04. Coordinately adjust the signal amplitude through digital-to-analog converter No. 1 and digital-to-analog converter No. 2, wherein:
[0109] The output end of the digital-to-analog converter No. 1 is connected to the input end of the digital-to-analog converter No. 2. The digital-to-analog converter No. 1 is used for reference frequency response calibration, and the digital-to-analog converter No. 2 is used for dynamic adjustment of output amplitude.
[0110] The control terminals of the digital-to-analog converter No. 1 and the digital-to-analog converter No. 2 are both connected to the MCU, and the MCU adjusts the proportion coefficients of the two.
[0111] Furthermore, the adjustment of the signal amplitude in step S04 includes:
[0112] S41. Setting an initial scaling factor of digital-to-analog converter No. 2 according to the target sound pressure level adjustment range to ensure that its maximum adjustment range covers the sound pressure level variation requirement;
[0113] S42. Measure the current output sound pressure level using a sound level meter and adjust the scaling factor of digital-to-analog converter No. 1 so that the sound pressure level reaches a reference value, which is 94 dB.
[0114] S43. After fixing the ratio coefficient of digital-to-analog converter No. 1, dynamically adjust the ratio coefficient of digital-to-analog converter No. 2 through the MCU to adjust the output amplitude.
[0115] Next, the initial duty cycle setting of the DAC No. 2 in step S41 includes:
[0116] S411, according to the target sound pressure level adjustment range ≥ 20dB, determine the maximum duty factor of digital-to-analog converter No. 2 not to exceed ;
[0117] S412. Control the initial coefficient of digital-to-analog converter No. 2 through the MCU.
[0118] Furthermore, the MCU output signal amplitude is calculated according to the following formula:
[0119] VOUT= *k;
[0120] Where k is the internal parameter of the DAC that can be controlled by the MCU, and VIN is the input signal amplitude.
[0121] In the above implementation, the amplitude adjustment is mainly achieved through the MCU and two DACs, such as Figure 3 As shown in the figure, one DAC is used for reference frequency response adjustment, and the other DAC is used for amplitude adjustment. This can not only increase the accuracy of frequency response adjustment, but also facilitate the adjustment of signal amplitude while maintaining an accurate and stable reference frequency response. A DAC device with adjustable output signal amplitude is selected. For example, if the adjustable accuracy is 12 bits and the 12-bit data range is 0~4095, the output amplitude is , k is the internal parameter of the DAC controllable by the MCU, and VIN is the input signal amplitude. This allows the output signal amplitude to be easily adjusted through the MCU. Connect the control and input terminals of DAC 1 to the MCU, connect the control terminal of DAC 2 to the MCU, and connect the output terminal of DAC 1 to the input terminal of DAC 2.
[0122] First, before adjusting the frequency response through DAC No. 1, you need to configure the output duty factor of DAC No. 2 and the output signal amplitude of the MCU. For the initial duty factor of DAC No. 2, you need to determine the required adjustment amplitude range. For example, for a multi-function sound calibrator, the required adjustment sound pressure level range is 20dB. According to the acoustic formula △Lp=20*log10( ), and △Lp = 20, it can be seen that the sound pressure P2 is 10 times the sound pressure P1. In order to meet the 10-fold amplitude adjustment, when the maximum adjustable coefficient of DAC is 4095, the initial coefficient of digital-to-analog converter No. 2 cannot exceed =409.5, otherwise it will not meet the requirement of 10 times amplitude adjustment. As for the output signal amplitude of MCU1, because the output signal of DAC is a proportion of the input signal, it will not exceed the input signal at most. Therefore, the output signal of MCU1 cannot be too small, otherwise the signal after two attenuations will be too small and may be unstable and distorted. The output signal amplitude of MCU1 internal DAC can be set when generating discrete sinusoidal signal data. For example, if the accuracy of the internal DAC is 12 bits, the internal DAC can set the data range to 0~4095. Under normal circumstances, the internal DAC reference voltage of MCU is 3.3V, and the amplitude represented by each value is ≈0.8mV. Since the sine signal contains positive and negative parts, but the internal DAC cannot be set to a negative value and must be an integer, the set sine signal amplitude A cannot exceed =2047.5, which is less than or equal to 2047. In this way, after generating the sine signal data, the data can be increased by 2048 as a whole. In this way, the generated data are all positive and will not exceed the DAC setting range. For example, if the amplitude A is set to 1024, the generated sine data is between -1024 and 1024, and then it is increased by 2048 as a whole. At this time, the data range is 1024~3072, and the output signal amplitude is *3.3V≈0.825V.
[0123] Frequency response adjustment is then performed using DAC #1. For example, a multi-function sound calibrator often uses 94dB as a benchmark. Since the scaling factor of DAC #2 and the MCU's output signal amplitude are both known values, only the scaling factor of DAC #1 needs to be adjusted. To determine the current output sound pressure level, a calibrated sound level meter, measuring amplifier, or other device can be used. Connect the corresponding microphone to the calibrator's sound output port to measure the current sound pressure level. Based on the measured sound pressure level, the scaling factor of DAC #1 is adjusted to achieve a result of 94dB. The scaling factors of DAC #1 and DAC #2 are recorded at this point. These are the parameters required for the MCU's current amplitude parameters, based on a 94dB benchmark. The output amplitude can then be adjusted to maintain the scaling factor of DAC #1 unchanged, and the scaling factor of DAC #2 can be adjusted proportionally, thus achieving flexible output amplitude adjustment.
[0124] In summary, Example 1 realizes flexible and adjustable frequency generation through the precise frequency division configuration of the MCU internal timer and the cyclic output of discrete sinusoidal signal data. The system calculates the output frequency based on the frequency division coefficient, count value and number of points per cycle, and the frequency deviation is less than 0.7%, to ensure that the frequency output of the sound calibrator meets the high-precision measurement requirements. Then, a design is adopted to separate the reference frequency response adjustment from the amplitude adjustment. After the reference frequency response is stable, it is only necessary to adjust the No. 2 ratio coefficient of the digital-to-analog converter to achieve rapid amplitude adjustment. Through the coordinated control of the 12-bit high-precision DAC and MCU, it supports 20dB sound pressure level range adjustment, taking into account both adjustment accuracy and operational convenience, and avoiding stability problems caused by signal attenuation. Secondly, based on the timer automatic reload function and the complete cycle signal output design, it ensures that the signal has no phase deviation and discontinuity problems, improves the stability and reliability of the sound calibrator output, and meets the application requirements of long-term continuous work.
[0125] Example 2:
[0126] Combine Figure 1 As shown, this embodiment aims to provide a circuit applied to the frequency response adjustment method of the multifunctional sound calibrator, which includes an MCU, a DAC, a power amplifier, a display module, a serial port module and a Bluetooth module, wherein:
[0127] The MCU is used to output signals to the DAC and control the output signal amplitude of the DAC. The DAC processes the received signal according to the instructions sent by the MCU and then outputs it;
[0128] The input end of the power amplifier is connected to the output end of the DAC and is used to amplify the output signal to adjust the frequency response of the sound calibrator;
[0129] The display module (OLED screen) is connected to the MCU via the SPI interface to display the output signal frequency and amplitude;
[0130] The serial port module is used to connect to the computer to read and control the frequency and amplitude of the signal;
[0131] The Bluetooth module is used to connect with the mobile phone to read and control the frequency and amplitude of the signal.
[0132] In summary, the serial port module interacts with the computer, while the Bluetooth module interacts with the mobile phone. Through the relevant protocols, the computer and mobile phone can be used to quickly and conveniently operate the MCU, facilitating the rapid reading and setting of required parameters such as signal frequency and amplitude. During operation, the circuit configures the timer trigger time and generates discrete sinusoidal signal data based on the required output frequency. The initial scaling factor of DAC 2 is then configured based on the required amplitude adjustment range. Finally, the scaling factor of DAC 1 is adjusted using external measuring instruments to ensure that the output sound pressure level reaches the baseline sound pressure level.
[0133] Secondly, by integrating an OLED display module (SPI interface), a serial port module, and a Bluetooth module, it supports computer-side command control and mobile phone-side wireless parameter setting, enabling real-time display and dynamic adjustment of parameters such as frequency and amplitude. The low power consumption of the OLED screen, combined with the optimized configuration of the MCU, further reduces system energy consumption and extends device battery life, making it suitable for a variety of scenarios such as laboratory and field calibration.
[0134] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware using a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the above-described method embodiments. Any reference to memory, storage, database, or other media used in the various embodiments provided herein may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct RAMbus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM).
[0135] Those skilled in the art will clearly understand that for the sake of convenience and brevity in description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0136] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as a preferred embodiment as above, it is not intended to limit the present invention. Any technician familiar with the present profession can make some changes or modifications to equivalent embodiments of the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.
Claims
1. A method for adjusting the frequency response of a multifunctional sound calibrator, characterized in that: The following steps are involved: S01, generate discrete sinusoidal signal data through MCU, and control DAC to convert the data into analog signal output; S02, amplifying the analog signal output by the DAC through a power amplifier to adjust the frequency response of the sound calibrator; S03, adjusting the signal output frequency by the internal timer of the MCU, including: S31, configure the clock of the timer inside the MCU, and the timer clock is divided by the AHB bus clock inside the MCU, and its frequency is determined by the system clock after being divided by the AHB prescaler and the APB prescaler; S32, setting the prescaler and counter inside the timer, and enabling the timer to periodically trigger an update event through the automatic reload function; S04. Coordinately adjust the signal amplitude through two digital-to-analog converters, where the two digital-to-analog converters include digital-to-analog converter No. 1 and digital-to-analog converter No. 2, and the output end of digital-to-analog converter No. 1 is connected to the input end of digital-to-analog converter No. 2, wherein: The digital-to-analog converter No. 1 is used for reference frequency response calibration, and the digital-to-analog converter No. 2 is used for dynamic adjustment of output amplitude; The control terminals of the digital-to-analog converter No. 1 and the digital-to-analog converter No. 2 are both connected to the MCU, and the MCU adjusts the proportion coefficients of the two. The calculation formula of the signal output frequency in step S03 is: ; Among them, signal_output_fre represents the signal output frequency, n represents the number of points per cycle of the signal, Represents the timer clock, Represents the division coefficient of the timer's internal prescaler, Represents the count value of the timer's internal counter; Where n is the number of points per cycle of the discrete sine signal, and the deviation of the signal output frequency satisfies 。 2. The frequency response adjustment method for a multifunctional sound calibrator according to claim 1, characterized in that: The timer clock is derived from the internal AHB bus clock of the MCU, and the calculation method includes: When the APB prescaler division coefficient = 1, ; in, Represents the AHB bus clock inside the MCU, Represents the division coefficient of the APB prescaler; When the APB prescaler division coefficient ≠ 1, ; The AHB bus clock inside the MCU is obtained by dividing the system clock through the AHB prescaler. The calculation method includes: When the APB prescaler division coefficient = 1, ; in, Represents the MCU internal system clock, Represents the division coefficient of the AHB prescaler; When the APB prescaler division coefficient ≠ 1 。 3. The frequency response adjustment method for a multifunctional sound calibrator according to claim 2, characterized in that: The step S32 of enabling the timer to periodically trigger an update event through the automatic reload function includes: S321: Configure a specific timer trigger time. Each timer can obtain its own clock frequency by further dividing the timer clock frequency. S322, configure the timer to count up mode, enable the timer update event, set the counter, and when the timer is used, the timer will start counting from zero and increment according to its own clock frequency. When the count value is equal to the preset counter, the timer update event will be triggered; The timer triggering time for the above-mentioned timer update event is: 。 4. The frequency response adjustment method for a multifunctional sound calibrator according to claim 1, characterized in that: The generation of the discrete sinusoidal signal data comprises: S50, generate sinusoidal signal data with amplitude A, ranging from ; S51 increases the data by 2048 as a whole and converts it into A positive integer to adapt to the input range of the DAC; The maximum value of the amplitude A does not exceed 2047.
5. The frequency response adjustment method for a multifunctional sound calibrator according to claim 1, characterized in that: The adjustment of the signal amplitude in step S04 includes: S41. Setting an initial duty factor of the digital-to-analog converter No. 2 according to the target sound pressure level adjustment range to ensure that its maximum adjustment range covers the sound pressure level change requirement; S42, measuring the current output sound pressure level with a sound level meter, and adjusting the duty factor of the digital-to-analog converter No. 1 so that the sound pressure level reaches a reference value, wherein the reference value is 94 dB; S43 , after fixing the duty cycle of the digital-to-analog converter No. 1 , dynamically adjust the duty cycle of the digital-to-analog converter No. 2 through the MCU to adjust the output amplitude.
6. The frequency response adjustment method for a multifunctional sound calibrator according to claim 5, characterized in that: The initial duty ratio setting of the digital-to-analog converter No. 2 in step S41 includes: S411, according to the target sound pressure level adjustment range ≥ 20dB, determine that the maximum ratio coefficient of the digital-to-analog converter No. 2 does not exceed ; S412: Control the initial coefficient of the digital-to-analog converter No. 2 through the MCU.
7. The frequency response adjustment method for a multifunctional sound calibrator according to claim 6, characterized in that: The MCU output signal amplitude is calculated according to the following formula: ; Where k is the internal parameter of the DAC that can be controlled by the MCU, and VIN is the input signal amplitude.
8. A frequency response adjustment circuit for a multifunctional sound calibrator, used to implement the frequency response adjustment method for a multifunctional sound calibrator according to any one of claims 1 to 7, characterized in that: It includes MCU, DAC, power amplifier, display module, serial port module and Bluetooth module, among which: The MCU is used to output a signal to the DAC and control the output signal amplitude of the DAC. The DAC processes the received signal according to the instruction sent by the MCU and then outputs it; The input end of the power amplifier is connected to the output end of the DAC, and is used to amplify the output signal to adjust the frequency response of the sound calibrator; The display module is connected to the MCU via an SPI interface to display the output signal frequency and amplitude; The serial port module is used to connect to a computer to read and control the frequency and amplitude of the signal; The Bluetooth module is used to connect to a mobile phone to read and control the frequency and amplitude of the signal.
9. The frequency response adjustment circuit for a multifunctional sound calibrator according to claim 8, characterized in that: The display module is an OLED screen.
Citation Information
Patent Citations
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