Solar cell and solar cell module

Abstract

The invention relates to the photovoltaic field, and provides a solar cell and a solar cell module, and the solar cell comprises a substrate which comprises a front surface and a back surface; the first doping layer and the second doping layer are located on the side, away from the front face, of the back face of the substrate and arranged in a staggered mode in the thickness direction of the substrate, and the doping types of the first doping layer and the second doping layer are different; the conducting layer comprises a first conducting part and a second conducting part, the first conducting part is located on the side, away from the substrate, of the first doping layer, the second conducting part is located on the side, away from the substrate, of the second doping layer, and the first conducting part and the second conducting part are different in thickness; the back reflection layer is located on the side, away from the substrate, of the conductive layer, and the gap between the first conductive part and the second conductive part is filled with part of the back reflection layer; the first electrode is positioned on one side, deviating from the first doping layer, of the first conductive part and is electrically connected with the first conductive part; the second electrode is located on the side, away from the second doping layer, of the second conductive part and electrically connected with the second conductive part.

Description

Technical Field

[0001] This application relates to the field of photovoltaics, and particularly to a solar cell and a solar cell module. Background Art

[0002] A transparent conductive oxide (TCO) film is usually deposited on the front or back of a solar cell and directly covers the doped layer. Because of its good electrical conductivity and light transmittance, it can achieve functions such as collecting and transporting charges and improving light utilization efficiency.

[0003] In a back contact (BC) solar cell, the transparent conductive oxide film is deposited on the back of the cell and covers the doped layer on the back of the cell to transport the photo-generated carriers in the doped layer. At the same time, it can also serve as a back reflector to reflect the light incident from the front of the solar cell and propagating inside it to the back of the solar cell back into the interior of the solar cell for reuse, thereby improving the light utilization efficiency and further improving the photoelectric conversion efficiency of the solar cell. However, the current transparent conductive oxide film has problems of high cost and less than ideal optical management.

[0004] The above information disclosed in the background art section is only used to enhance the understanding of the background art of the technology described in this article. Therefore, the background art may contain certain information that is not prior art known to those skilled in the art in this country. Summary of the Invention

[0005] The main object of this application is to provide a solar cell to solve the problems of high cost and less than ideal optical management in the design of the transparent conductive oxide film in existing solar cells.

[0006] To achieve the above object, the present application provides a solar cell, which includes: a substrate, the substrate including a front surface and a back surface; a first doping layer and a second doping layer, located on a side of the back surface of the substrate away from the front surface, the first doping layer and the second doping layer being arranged offset in the thickness direction of the substrate, and the doping types of the first doping layer and the second doping layer being different; a conductive layer, the conductive layer including a first conductive portion and a second conductive portion, the first conductive portion being located on a side of the first doping layer away from the substrate, the second conductive portion being located on a side of the second doping layer away from the substrate, and the thicknesses of the first conductive portion and the second conductive portion being different; a back reflection layer, located on a side of the conductive layer away from the substrate, and part of the back reflection layer being filled in the space between the first conductive portion and the second conductive portion; a first electrode, located on a side of the first conductive portion away from the first doping layer and electrically connected to the first conductive portion; and a second electrode, located on a side of the second conductive portion away from the second doping layer and electrically connected to the second conductive portion.

[0007] Optionally, the material of the conductive layer includes at least one of the following: indium tin oxide, indium tungsten oxide, indium cobalt oxide, tin oxide, aluminum-doped zinc oxide.

[0008] Optionally, the conductive layer includes at least one indium-containing conductive layer and at least one indium-free conductive layer arranged in a stacked manner.

[0009] Optionally, the mass percentage of indium element in the conductive layer is less than or equal to 50%.

[0010] Optionally, the total thickness of the at least one indium-free conductive layer is greater than or equal to the total thickness of the at least one indium-containing conductive layer.

[0011] Optionally, the total thickness of the at least one indium-free conductive layer is greater than or equal to 10 nm and less than or equal to 60 nm, and the total thickness of the at least one indium-containing conductive layer is greater than or equal to 10 nm and less than or equal to 40 nm.

[0012] Optionally, the back surface of the substrate includes a textured region and a non-textured region, the first doping layer is located in the non-textured region, the second doping layer is located in the textured region, and the thickness of the first conductive portion is greater than the thickness of the second conductive portion.

[0013] Optionally, the ratio of the thickness of the first conductive portion to the thickness of the second conductive portion is greater than or equal to 1.2 and less than or equal to 1.7.

[0014] Optionally, the first doping layer is an N-type doped polysilicon layer, and the second doping layer is a P-type doped amorphous silicon layer.

[0015] Optionally, the thickness of the back reflection layer is greater than the thickness of the conductive layer.

[0016] Optionally, the thickness of the back reflection layer is greater than or equal to 15 nm and less than or equal to 115 nm.

[0017] Optionally, the material of the back reflection layer includes at least one of the following: silicon nitride, silicon oxide, silicon oxynitride.

[0018] Optionally, the back reflection layer includes a silicon nitride layer and a silicon oxide layer stacked in sequence along the direction away from the substrate; or, the back reflection layer includes a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer stacked in sequence along the direction away from the substrate.

[0019] Optionally, the thickness of the silicon nitride layer is greater than the thicknesses of other film layers in the back reflection layer.

[0020] On the other hand, this application also provides a solar cell module, and the solar cell module includes a plurality of the above-mentioned solar cells.

[0021] The technical solutions provided by the embodiments of this application have at least the following advantages:

[0022] The present application provides a solar cell and a solar cell module. The solar cell includes: a substrate, which includes a front surface and a back surface; a first doping layer and a second doping layer, which are located on the side of the back surface of the substrate facing away from the front surface, and the first doping layer and the second doping layer are arranged in a staggered manner in the thickness direction of the substrate, and the doping types of the first doping layer and the second doping layer are different; a conductive layer, which includes a first conductive part and a second conductive part, the first conductive part is located on the side of the first doping layer facing away from the substrate, and the second conductive part is located on the side of the second doping layer facing away from the substrate, and the thicknesses of the first conductive part and the second conductive part are different; a back reflection layer, which is located on the side of the conductive layer facing away from the substrate, and a part of the back reflection layer is filled in the space between the first conductive part and the second conductive part; a first electrode, which is located on the side of the first conductive part facing away from the first doping layer and is electrically connected to the first conductive part; a second electrode, which is located on the side of the second conductive part facing away from the second doping layer and is electrically connected to the second conductive part. In the present application, a back reflection layer is provided on the side of the conductive layer facing away from the substrate. By using the back reflection layer to undertake part of the back reflection function, the superposition of the conductive layer and the back reflection layer can improve the optical management ability of the solar cell, reflect more light that has not been utilized by the substrate back into the interior of the substrate, increase the probability of light being utilized, and thereby improve the photoelectric conversion efficiency of the solar cell. Moreover, a part of the back reflection layer is filled in the space between the first conductive part and the second conductive part, which can reduce the escape of light in this part of the area, further increase the amount of back-reflected light, and improve the utilization rate of light. And, by setting the back reflection layer to undertake the back reflection function, the thickness design of the conductive layer can be designed to be as thin as possible on the premise of meeting the conductive function requirements without having to consider the back reflection requirements too much, as long as its thickness meets the conductive performance requirements and undertakes part of the back reflection function. The thinner design of the conductive layer can, on the one hand, reduce the design difficulty of the solar cell, and on the other hand, can also reduce the usage amount of the material of the conductive layer, save production costs. In addition, a thinner conductive layer can also reduce the absorption of light of a specific wavelength (such as long-wave infrared light), reduce light loss, and is beneficial to improving the utilization rate of light. Since the thicknesses of the first conductive part and the second conductive part are different, the thicknesses of the first conductive part and the second conductive part can be adaptively designed according to the difference in the charge carrier collection ability of the doping layer, so as to optimize the charge carrier collection efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] One or more embodiments are exemplarily illustrated by the figures in the corresponding drawings. These exemplary illustrations do not constitute a limitation on the embodiments, unless otherwise stated, and the figures in the drawings do not constitute a scale limitation; in order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the following described drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0024] Figure 1 A schematic structural diagram of a solar cell provided according to an embodiment of the present application;

[0025] Figure 2 Another schematic structural diagram of a solar cell provided according to an embodiment of the present application;

[0026] Figure 3 Another schematic structural diagram of a solar cell provided according to an embodiment of the present application;

[0027] Figure 4 Another schematic structural diagram of a solar cell provided according to an embodiment of the present application;

[0028] Figure 5 Another schematic structural diagram of a solar cell provided according to an embodiment of the present application.

[0029] Among them, the above-mentioned drawings include the following reference numerals:

[0030] 10. Substrate; 21. First doping layer; 22. Second doping layer; 30. Conductive layer; 31. First conductive part; 32. Second conductive part; 301. First conductive layer; 302. Second conductive layer; 40. Back reflection layer; 51. First electrode; 52. Second electrode; 60. Front passivation layer; 70. Front antireflection layer; 80. Tunneling oxide layer; 90. Back passivation layer. Detailed implementation manners

[0031] As can be seen from the background art, in the prior art, there are problems of relatively high cost and less than ideal optical management in the design of the transparent conductive oxide film (TCO) in a solar cell.

[0032] Specifically, in the prior art, only a transparent conductive oxide film is provided on the back of the solar cell to undertake the conductive function and a certain back reflection function. Among them, the conductive function means that the transparent conductive oxide film collects the charge carriers of the doping layer and conducts them to the electrode, and the back reflection function means that the transparent conductive oxide film reflects the light passing through the substrate to the side where the substrate is located so that this part of the light can be reused.

[0033] To simultaneously meet the requirements for electrical conductivity and anti-reflection performance, in conventional solar cells, the transparent oxide conductive film usually needs to be set to a relatively large thickness. And the conventional transparent oxide conductive film material usually uses indium tin oxide (ITO), in which the content of indium (In) is not less than 90%. The relatively large thickness and the high indium content result in a relatively high cost of the conventional transparent oxide conductive film, thus leading to a relatively high production cost of the solar cell, which is not conducive to mass production. Moreover, the refractive index of ITO (usually 3.5 - 4.0) is close to that of the substrate (usually a silicon substrate with a refractive index of about 3.4), and the conventional transparent oxide conductive film also has the problem of unsatisfactory anti-reflection effect.

[0034] To solve the above problems, embodiments of the present application provide a solar cell, and the technical solutions in the embodiments of the present invention will be clearly and completely described below.

[0035] In the description of the embodiments of the present application, technical terms such as "first" and "second" are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity, specific order or primary-secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality" is more than two, unless otherwise clearly and specifically defined.

[0036] Referring to "embodiments" herein means that specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears at various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0037] In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: the existence of A, the simultaneous existence of A and B, and the existence of B. In addition, the character " / " in this article generally represents an "or" relationship between the front and rear associated objects.

[0038] In the description of the embodiments of the present application, the term "a plurality" refers to more than two (including two). Similarly, "a plurality of groups" refers to more than two groups (including two groups), and "a plurality of pieces" refers to more than two pieces (including two pieces).

[0039] In the description of the embodiments of the present application, the orientation or positional relationship indicated by technical terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of the present application.

[0040] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "install", "connect", "couple", "fix", etc. should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to specific circumstances.

[0041] In the drawings corresponding to the embodiments of the present application, for better understanding and convenience of description, the thickness and area of the layer are enlarged. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component can be "directly" on the surface of the other component, or there can be a third component between the two components. On the contrary, when describing a component on the surface of another component or when another component is formed or provided on the surface of a component, it means that there is no third component between the two components. In addition, when describing a component "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor on a partial edge of the entire surface.

[0042] In the description of the embodiments of the present application, when a certain component "includes" another component, unless otherwise stated, other components are not excluded, and other components may further be included. In addition, when a component such as a layer, film, region, or plate is referred to as "on / located on" another component, it can be "directly on" the other component (that is, located on the surface of the other component and there is no other component between the two), or there can be another component between them. In addition, when a layer, film, region, plate, etc. component is "directly located on" another component, or when a layer, film, region, plate, etc. component is located on the surface of another component, it means that there is no other component between them.

[0043] The terms used in the description of the various embodiments herein are for the purpose of describing particular embodiments only and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the part" is also intended to include the plural form unless the context clearly indicates otherwise. Among them, the components include components such as layers, films, regions, or plates.

[0044] The following will elaborate on the various embodiments of the present application in conjunction with the accompanying drawings. However, those of ordinary skill in the art can understand that in the various embodiments of the present application, many technical details are provided to help readers better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can still be implemented.

[0045] Figure 1 A schematic structural diagram of a solar cell provided according to an embodiment of the present application. As Figure 1 shown, the solar cell in the embodiment of the present application is a back contact (BC) solar cell. The solar cell includes a substrate 10, a first doping layer 21, a second doping layer 22, a conductive layer 30, a back reflection layer 40, a first electrode 51, and a second electrode 52, specifically as follows:

[0046] The substrate 10 can be an N-type doped substrate or a P-type doped substrate. The material of the substrate 10 includes but is not limited to being one of monocrystalline silicon (c-Si), polycrystalline silicon (poly-Si), amorphous silicon (a-Si), etc., and is not limited herein. The substrate 10 includes a front side and a back side. Among them, the front side of the substrate 10 is arranged to face the light source (the sun), and the above-mentioned conductive layer 30, back reflection layer 40, first electrode 51, and second electrode 52, etc. are arranged on one side of the back side of the substrate 10, so as to minimize the shielding of the direct light on the front side and improve the utilization rate of the direct light on the front side.

[0047] The first doping layer 21 and the second doping layer 22 are located on the side of the back side of the substrate 10 facing away from the front side. Among them, the doping types of the first doping layer 21 and the second doping layer 22 are different. Optionally, the first doping layer 21 can be a P-type doping layer, and the second doping layer 22 can be an N-type doping layer, or the first doping layer 21 can be an N-type doping layer, and the second doping layer 22 can be a P-type doping layer, and is not limited herein.

[0048] Exemplarily, the substrate 10 may be an N-type doped single-crystalline silicon (c-Si) substrate, and its doping elements include, but are not limited to, at least one of phosphorus (P), antimony (Sb), and arsenic (As). The N-type doped layer may be a polysilicon doped layer, and its doping element includes, but is not limited to, phosphorus (P). The P-type doped layer may be an amorphous silicon doped layer, and its doping elements include, but are not limited to, at least one of boron (B), aluminum (Al), and gallium (Ga). By combining the high conductivity of the N-type polysilicon doped layer and the better passivation ability of the P-type amorphous silicon doped layer in the embodiments of the present application, the carrier transport can be balanced, and the photoelectric conversion efficiency of the solar cell can be improved.

[0049] The first doped layer 21 and the second doped layer 22 may be arranged in a staggered manner in the thickness direction of the substrate 10, so as to effectively isolate the doped layers with different doping types, reduce the recombination probability of electrons and holes at the interface, and be beneficial to improving the open-circuit voltage and fill factor of the solar cell. It should be understood that Figure 1 In [the figure], there may be a partial contact between the first doped layer 21 and the second doped layer 22, which is caused by the process error in the manufacturing process. The area of the contact region between the two is small and does not affect the normal use of the solar cell.

[0050] The conductive layer 30 is located on the side of the first doped layer 21 and the second doped layer 22 away from the substrate 10, and the conductive layer 30 includes a first conductive part 31 and a second conductive part 32. Among them, the first conductive part 31 is located on the side of the first doped layer 21 away from the substrate 10, the second conductive part 32 is located on the side of the second doped layer 22 away from the substrate 10, and there is a gap between the first conductive part 31 and the second conductive part 32, so that the charge carriers in the first doped layer 21 and the charge carriers in the second doped layer 22 can be respectively collected to the first conductive part 31 and the second conductive part 32, avoiding charge leakage caused by the direct connection of the first doped layer 21 and the second doped layer 22 through a conductive material.

[0051] If the thicknesses of the first conductive part 31 and the second conductive part 32 are different, the thicknesses of the first conductive part 31 and the second conductive part 32 can be adaptively designed according to the difference in the charge carrier collection ability of the doped layer, so as to optimize the charge carrier collection efficiency.

[0052] Optionally, if the first doping layer 21 has a relatively stronger ability to collect charge carriers, while the second doping layer 22 has a relatively weaker ability to collect charge carriers, the first conductive part 31 can be designed to be thicker to reduce resistance and accelerate the carrier transmission rate. Relatively, the thickness of the second conductive part 32 can be designed to be thinner to save the transparent conductive material required for the second conductive part 32 while ensuring that its conductivity meets the requirements. Conversely, if the first doping layer 21 has a relatively weaker ability to collect charge carriers, while the second doping layer 22 has a relatively stronger ability to collect charge carriers, the second conductive part 32 can be designed to be thicker to reduce resistance and accelerate the electron transmission rate. Relatively, the thickness of the first conductive part 31 can be designed to be thinner to save the transparent conductive material required for the first conductive part 31 while ensuring that its conductivity meets the requirements.

[0053] The back reflection layer 40 is located on the side of the conductive layer 30 away from the substrate 10, and can be used to reflect the light incident from the front of the substrate 10 and passing through the substrate 10 to the back of the substrate 10 back into the substrate 10, thereby increasing the residence time and path length of the light in the substrate 10, improving the absorption probability of the light, and further improving the photoelectric conversion efficiency of the solar cell.

[0054] Part of the back reflection layer 40 is filled in the gap between the first conductive part 31 and the second conductive part 32, which can enhance the light capture ability of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell. Specifically, there is a gap between the first conductive part 31 and the second conductive part 32, which will cause some areas of the doping layer or the substrate not to be covered by the conductive layer. Figure 1 For example, if there is a gap between the first conductive part 31 and the second conductive part 32, then some areas of the second doping layer 22 are not covered by the conductive layer 30. Due to the gap between the first conductive part 31 and the second conductive part 32, at the part where the second doping layer 22 is covered by the conductive layer 30, when the back reflection layer 40 is not provided, the light incident through the substrate 10 to the gap between the first conductive part 31 and the second conductive part 32 will escape from this area, resulting in that part of the light incident into the substrate 10 not being effectively utilized. By filling the back reflection layer 40 in the gap between the first conductive part 31 and the second conductive part 32 in the embodiments of the present application, the light escape at the gap between the first conductive part 31 and the second conductive part 32 can be reduced, so that the light incident into this area can also be reflected back into the substrate 10 for utilization, which is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0055] Among them, the spacing distance between the first conductive portion 31 and the second conductive portion 32 can be 10 μm to 160 μm. Exemplarily, it can be 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm or any other value within the above range. Setting the spacing between the first conductive portion 31 and the second conductive portion 32 within the above range can effectively isolate the first conductive portion 31 and the second conductive portion 32 and prevent leakage between the two. It should be understood that the spacing distance between the first conductive portion 31 and the second conductive portion 32 is the spacing distance in their arrangement direction, and their arrangement direction is perpendicular to the thickness direction of the substrate 10.

[0056] The first electrode 51 is located on the side of the first conductive portion 31 away from the first doped layer 21 and is electrically connected to the first conductive portion 31, so that the first electrode 51 can transfer the charge carriers collected by the first conductive portion 31 to the external circuit. The second electrode 52 is located on the side of the second conductive portion 32 away from the second doped layer 22 and is electrically connected to the second conductive portion 32, so that the second electrode 52 can transfer the charge carriers collected by the second conductive portion 32 to the external circuit.

[0057] In the embodiment of the present application, by providing a back reflection layer 40 on the side of the conductive layer 30 away from the substrate 10, and using the back reflection layer 40 to undertake part of the back reflection function, the superposition of the conductive layer 30 and the back reflection layer 40 can improve the optical management ability of the solar cell, reflect more light that is not utilized by the substrate 10 back into the interior of the substrate 10, increase the probability of light being utilized, and thus improve the photoelectric conversion efficiency of the solar cell. Moreover, part of the back reflection layer 40 fills the space between the first conductive portion 31 and the second conductive portion 32, which can reduce the light escaping from this part of the region, further increase the amount of back-reflected light, and improve the utilization rate of light.

[0058] Moreover, since the back reflection layer 40 is provided to undertake the back reflection function, in the embodiments of the present application, the thickness design of the conductive layer 30 can, on the premise of meeting the requirements of the conductive function, not need to consider the requirements of back reflection too much. Instead, the conductive layer 30 can be designed as thin as possible, so that its thickness meets the requirements of the conductive performance and undertakes a part of the back reflection function. The thinning design of the conductive layer 30 can, on the one hand, reduce the design difficulty of the solar cell. On the other hand, it can also reduce the usage amount of the material of the conductive layer 30, save the production cost. In addition, a thinner conductive layer 30 can also reduce the absorption of light of a specific wavelength (such as long-wave infrared light), reduce the loss of light, and is beneficial to improving the utilization rate of light. On the premise of the overall thinning of the thickness of the conductive layer 30, the embodiments of the present application also set the first conductive part 31 and the second conductive part 32 in the conductive layer 30 to different thicknesses to meet the requirements of different types of doping layers for the conductive capabilities of their corresponding conductive parts and improve the conductivity uniformity of the battery.

[0059] In the embodiments of the present application, the thickness of the conductive layer 30 can be greater than or equal to 20 nm and less than or equal to 85 nm. Optionally, the thickness of the conductive layer 30 can be greater than or equal to 20 nm and less than or equal to 50 nm. Exemplarily, the thickness of the conductive layer 30 includes but is not limited to 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm or any other value within the above range. By setting the thickness of the conductive layer 30 within the above thickness range, while saving the transparent conductive material, the resistance of the conductive layer 30 can be within a suitable range to avoid affecting the normal transmission of charge carriers inside the battery.

[0060] It should be understood that since the thicknesses of the first conductive part 31 and the second conductive part 32 in the conductive layer 30 are different, in the embodiments of the present application, the larger one of the thicknesses of the first conductive part 31 and the second conductive part 32 is used to represent the thickness of the above-mentioned conductive layer 30. The setting of the thickness of the conductive layer 30 within the above thickness range means that the thicknesses of both the first conductive part 31 and the second conductive part 32 are set within the above thickness range.

[0061] In some embodiments of the present application, the material used for the conductive layer 30 may include at least one of the following: indium tin oxide (ITO), indium wolfram oxide (IWO), indium cobalt oxide (ICO), stannic oxide (SnOx), aluminium-doped zinc oxide (AZO). The above materials have high light transmittance in the visible light spectrum range and good electrical conductivity at the same time, and can achieve efficient current transmission without blocking visible light, so that light can enter the area where the back surface of the solar cell is not blocked by other structures, such as scattered light, diffuse reflected light, and light reflected from the ground, etc. In some scenarios, such as when the solar cell is installed in scenarios with a relatively high reflectivity such as grassland, snowfield or reflective panel, the overall light input of the solar cell can be increased, and the power and bifaciality of the solar cell output can be improved.

[0062] Optionally, in some embodiments of the present application, the conductive layer 30 may adopt a transparent conductive oxide material containing indium element, including but not limited to one or more of the above indium tin oxide (ITO), indium wolfram oxide (IWO), indium cobalt oxide (ICO), etc. And when the conductive layer 30 adopts a material containing indium element, the mass percentage of indium element (In) is less than or equal to 50%. Compared with the conventional transparent oxide conductive film (ITO film with indium element content greater than 90%), the content of indium element in the conductive layer 30 in the embodiments of the present application is less. In this way, even when the thickness of the conductive layer 30 is the same as that of the conventional transparent oxide conductive film, the cost of the conductive layer 30 in the embodiments of the present application can be lower. If the above thinning design is adopted for the conductive layer 30, the cost of the conductive layer 30 can be reduced to a greater extent while ensuring that the electrical conductivity of the conductive layer 30 meets the product requirements.

[0063] In still other embodiments of the present application, the conductive layer 30 may also adopt a transparent conductive oxide material without indium element, including but not limited to one or more of the above stannic oxide (SnOx) and aluminium-doped zinc oxide (AZO). The conductive layer 30 does not contain indium element (In) with a relatively high cost, which also helps to reduce the cost of the conductive layer 30.

[0064] Figure 2 Another structural schematic diagram of a solar cell provided according to an embodiment of the present application is shown in Figure 2As shown, the conductive layer 30 may include a first conductive layer 301 and a second conductive layer 302 arranged in a stack. The first conductive layer 301 may be an indium-containing conductive layer or an indium-free conductive layer, and the second conductive layer 302 may be an indium-containing conductive layer or an indium-free conductive layer. It can be understood that in practical applications, the conductive layer 30 may further include more stacks, that is, the conductive layer 30 may include at least one indium-containing conductive layer and at least one indium-free conductive layer.

[0065] Among them, when the conductive layer 30 includes both an indium-containing conductive layer and an indium-free conductive layer at the same time, the total thickness of the indium-containing conductive layer may be greater than or equal to 10 nm and less than or equal to 40 nm. Exemplarily, the total thickness of the indium-containing conductive layer may be 10 nm, 20 nm, 30 nm, 40 nm or any other value within the above range. The total thickness of the indium-free conductive layer may be greater than or equal to 10 nm and less than or equal to 60 nm. Exemplarily, the total thickness of the indium-free conductive layer may be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm or any other value within the above range. By setting the thicknesses of the indium-containing conductive layer and the indium-free conductive layer within the above ranges, while ensuring that the conductivity of the conductive layer 30 meets the requirements, the amount of indium-containing material in the conductive layer 30 can be reduced and the amount of indium-free material in the conductive layer 30 can be increased, thereby controlling the cost.

[0066] In some embodiments of the present application, the conductive layer 30 may include an indium-containing conductive layer and an indium-free conductive layer. The thickness of the indium-free conductive layer may be greater than or equal to the thickness of the indium-containing conductive layer, so as to use as much indium-free material as possible on the premise of meeting the requirements of conductive performance, thereby reducing the cost of the conductive layer 30.

[0067] Exemplarily, the conductive layer 30 may include an ITO layer (indium-containing conductive layer) and a SnOx layer (indium-free conductive layer) arranged in a stack, and the SnOx layer is located on the side of the ITO layer away from the substrate 10. The stack of a 20-nm ITO layer and a 20-nm SnOx layer can achieve a conductive effect and an antireflection effect similar to those of a 40-nm ITO layer, but the cost of the conductive layer 30 can be reduced.

[0068] In some embodiments of the present application, the conductive layer 30 may include multiple indium-containing conductive layers or multiple indium-free conductive layers. The total thickness of each indium-free conductive layer may be greater than or equal to the total thickness of each indium-containing conductive layer, so that as much indium-free material as possible is used to reduce the cost of the conductive layer 30 while meeting the requirements for conductive performance. Exemplarily, the conductive layer 30 may include an ITO layer (indium-containing conductive layer), an AZO layer (indium-free conductive layer), and an ITO layer (indium-containing conductive layer) that are sequentially stacked. Stacking a 10-nm ITO layer, a 20-nm AZO layer, and a 10-nm ITO layer can achieve a conductive effect and a back reflection effect similar to those of a 40-nm ITO layer, but can reduce the cost of the conductive layer 30.

[0069] In some embodiments of the present application, the film layer with a higher refractive index in at least one indium-containing conductive layer and at least one indium-free conductive layer may be disposed closer to the substrate 10 and stacked on the back surface of the substrate 10 in the order of decreasing refractive index, so as to increase the probability of reflecting light back to the doped layer and the substrate 10, thereby improving the photoelectric conversion efficiency of the solar cell.

[0070] It should be understood that Figure 2 This may correspond to the case where an indium-containing conductive layer is disposed on the first doped layer 21 and an indium-containing conductive layer and an indium-free conductive layer are stacked on the second doped layer 22. In practical applications, an indium-containing conductive layer and an indium-free conductive layer may also be stacked on the first doped layer 21 and an indium-containing conductive layer may be disposed on the second doped layer 22, which can be specifically designed according to the conductive requirements of the corresponding doped layer. Alternatively, an indium-containing conductive layer and an indium-free conductive layer may also be stacked on both the first doped layer 21 and the second doped layer 22 at the same time to improve the consistency of the film layers in the conductive layer 30 and reduce the process difficulty.

[0071] It should also be understood that in the present application, the thickness difference between the first conductive portion 31 and the second conductive portion 32 in the conductive layer 30 may be caused by the different number of film layers constituting the two, or may be achieved by adjusting the process steps, which is not limited herein.

[0072] Figure 3 It is a schematic structural diagram of another solar cell provided according to an embodiment of the present application.

[0073] Such as Figure 3As shown, the back surface of the substrate 10 may include a matte area and a non-matte area. The first doping layer 21 is located in the non-matte area, the first conductive portion 31 is deposited on the surface of the first doping layer 21, the second doping layer 22 is located in the matte area, and the second conductive portion 32 is deposited on the surface of the second doping layer 22. It can be understood that the non-matte area here is a surface that is flatter than the matte area and is close to a plane. Then, when depositing the transparent conductive material, affected by the flatness of the deposition surface, under the same process parameters, the thickness of the first conductive portion 31 deposited on the surface of the first doping layer 21 in the non-matte area is greater than the thickness of the second conductive portion 32 deposited on the surface of the second doping layer 22 in the matte area.

[0074] Taking Figure 3 the first doping layer 21 as an N-type doping layer and the second doping layer 22 as a P-type doping layer as an example, the thickness of the first conductive portion 31 can be 1.2 to 1.7 times the thickness of the second conductive portion 32. The thickness difference between the two is determined by the actual process parameters. Optionally, the thickness of the first conductive portion 31 can be greater than or equal to 24 nm and less than or equal to 85 nm, and the thickness of the second conductive portion 32 can be greater than or equal to 20 nm and less than or equal to 50 nm. By making the thicknesses of the first conductive portion 31 and the second conductive portion 32 within the above thickness range, compared with the design where the thickness of the transparent oxide conductive film on the N-type doping layer in a conventional solar cell is 90 nm to 110 nm and the thickness on the P-type doping layer is 65 nm to 80 nm, in the embodiments of the present application, the thicknesses of the first conductive portion 31 and the second conductive portion 32 are significantly reduced, thereby significantly saving the material of the conductive layer 30 and reducing the production cost. Moreover, by setting the thicknesses of the first conductive portion 31 and the second conductive portion 32 within the above thickness range, the sheet resistance of the first conductive portion 31 can reach no greater than 70 Ω / sq, and the sheet resistance of the second conductive portion 32 can reach no greater than 80 Ω / sq, meeting the design requirements that the sheet resistance of the conductive portion on the N-type doping layer is no greater than 100 Ω / sq and the sheet resistance of the conductive portion on the P-type doping layer is no greater than 120 Ω / sq.

[0075] In the present application, the material used for the back reflection layer 40 may include at least one of the following: silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy). Among them, silicon nitride (SiNx) has a high refractive index and a low absorption coefficient, enabling it to effectively reflect light, especially long-wave light (such as infrared light). Although silicon oxide (SiOx) and silicon oxynitride (SiOxNy) have a low refractive index, through a multi-layer structure design, the reflectivity of a specific wavelength can be improved by using the optical interference effect.

[0076] In a solar cell, the light that can pass through the substrate 10 to reach its back surface is usually infrared light with a relatively long wavelength. By forming the back reflection layer 40 with the above materials, this part of the light can be reflected into the substrate 10, thereby increasing the probability of this part of the light being reused, reducing light loss, and improving the photoelectric conversion efficiency of the solar cell. Moreover, the cost of the materials for the back reflection layer 40 is lower than that of the transparent conductive oxide materials. Using the above materials to form the back reflection layer 40 to undertake the back reflection function and reducing the thickness of the conductive layer 30 formed by the transparent conductive oxide materials can reduce the production cost. In addition, the materials of the above back reflection layer 40 are insulating materials, which can be filled between the first conductive part 31 and the second conductive part 32 to isolate the two, ensuring that no short-circuit phenomenon occurs between the two, and at the same time strengthening the passivation level of the back surface of the substrate 10 and improving the reliability of the solar cell.

[0077] Generally, the refractive index of silicon nitride (SiNx) can be 2.0 - 3.5, the refractive index of silicon oxide (SiOx) can be 1.4 - 1.6, and the refractive index of silicon oxynitride (SiOxNy) can be 1.6 - 2.5. By setting one or more layers of the above materials in the back reflection layer 40 and combining them in a set order, the back reflection performance of the solar cell can be optimized. The number of film layers, the materials, thicknesses, and arrangement order of each film layer in the back reflection layer 40 can be designed according to actual requirements.

[0078] In the embodiments of the present application, the overall thickness of the back reflection layer 40 can be greater than or equal to 15 nm and less than or equal to 115 nm. Optionally, the thickness of the back reflection layer 40 includes but is not limited to 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 100 nm, 105 nm, 110 nm, 115 nm or any other value within the above range. By designing the thickness of the back reflection layer 40 within the above range, the reflectivity of the back surface of the cell to light can be improved while controlling the cost of the back reflection layer 40.

[0079] In some embodiments of the present application, the thickness of the back reflection layer 40 can be greater than the thickness of the conductive layer 30, so that the back reflection layer 40 undertakes as much back reflection function as possible, thereby enabling the conductive layer 30 to be thinned as much as possible on the premise of meeting the conductive performance requirements, and further reducing the cost of the conductive layer 30.

[0080] In some embodiments of the present application, the back reflection layer 40 may include a silicon nitride layer and a silicon oxide layer stacked in sequence along a direction gradually away from the substrate 10. That is, the silicon nitride layer is located on the side of the conductive layer 30 facing away from the substrate 10, and the silicon oxide layer is located on the side of the silicon nitride layer facing away from the conductive layer 30. The silicon nitride layer with a relatively high refractive index is located on the relatively inner side of the back reflection layer 40, so that the silicon nitride layer can effectively reflect long-wave infrared light, improve the utilization rate of the incident light on the front of the battery, and indirectly promote the collection of charge carriers by reducing surface recombination and improving the surface passivation quality. The silicon oxide layer with a relatively low refractive index is located on the relatively outer side of the back reflection layer 40, and at least part of the light transmitted by the silicon nitride layer can be totally reflected back into the substrate 10 at the interface between the silicon nitride layer and the silicon oxide layer, and at the same time, the incident amount of the back light can be increased, thereby further improving the utilization rate of the light.

[0081] Among them, the thickness of the silicon nitride layer with a relatively high refractive index can be greater than the thickness of the silicon oxide layer with a relatively low refractive index. Designing the thickness of the silicon nitride to be large enough can increase its reflection of light as much as possible, improve the back reflectivity, and thus improve the utilization rate of light. The design of the thinner silicon oxide layer can reduce the use of the material of the back reflection layer 40 and reduce the production cost on the premise of ensuring the optical management ability of the back reflection layer 40.

[0082] When the back reflection layer 40 includes a silicon nitride layer and a silicon oxide layer, the thickness of the silicon nitride layer can be 30 nm to 80 nm, and exemplary values can be 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm or any other value within the above range. The thickness of the silicon oxide layer can be 20 nm to 60 nm, and exemplary values can be 20 nm, 30 nm, 40 nm, 50 nm, 60 nm or any other value within the above range. In a possible implementation manner, the back reflection layer 40 may include a 60-nm silicon nitride layer and a 30-nm silicon oxide layer stacked in sequence. By setting the thicknesses of the silicon nitride layer and the silicon oxide layer within the above range in the embodiments of the present application, light can be effectively trapped, the utilization rate of the incident light can be improved, and further the photoelectric conversion efficiency of the solar cell can be enhanced.

[0083] In practical applications, the number of the silicon nitride layer, the silicon oxide layer and the silicon oxynitride layer in the back reflection layer 40 can be one or more, and they are arranged in a set manner. For example, they can be arranged in the direction gradually away from the substrate 10 in the order of decreasing refractive index to meet the requirements of different solar cell products for the back reflection ability.

[0084] In still other embodiments of the present application, the back reflection layer 40 may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer that are sequentially stacked in a direction gradually away from the substrate 10. That is, the silicon nitride layer is located on the side closest to the substrate 10, the silicon oxynitride layer is located on the side of the silicon nitride layer facing away from the substrate 10, and the silicon oxide layer is located on the side of the silicon nitride layer facing away from the silicon nitride layer. The refractive indices of the three gradually decrease in the direction gradually away from the substrate 10. Through the above combination, the back reflection ability of the battery can be improved to a large extent by utilizing the total reflection effect of light, and at the same time, the incident amount of light on the back surface can be increased to a large extent, thereby improving the optical management ability and bifaciality of the solar cell.

[0085] Among them, the thickness of the silicon nitride layer with a relatively high refractive index can be greater than the thicknesses of the silicon oxynitride and silicon oxide layers with relatively low refractive indices. Designing the thickness of the silicon nitride with a relatively high refractive index to be large enough can increase its reflection of light as much as possible and improve the back reflectivity. The design of the relatively thin silicon oxynitride and silicon oxide layers can reduce the use of materials for the back reflection layer 40 and lower the production cost while ensuring the optical management ability of the back reflection layer 40.

[0086] When the back reflection layer 40 includes a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer that are sequentially stacked, the thickness of the silicon nitride layer can be 30 nm to 60 nm, and exemplary values can be 30 nm, 40 nm, 50 nm, 60 nm, or any other value within the above range. The thickness of the silicon oxynitride layer can be 10 nm to 40 nm, and exemplary values can be 10 nm, 20 nm, 30 nm, 40 nm, or any other value within the above range. The thickness of the silicon oxide layer can be 10 nm to 40 nm, and exemplary values can be 10 nm, 20 nm, 30 nm, 40 nm, or any other value within the above range. In a possible implementation manner, the back reflection layer 40 may include a 50-nm silicon nitride layer, a 30-nm silicon oxynitride layer, and a 10-nm silicon oxide layer that are sequentially stacked. By setting the thicknesses of the silicon nitride layer, the silicon oxide layer, and the silicon oxynitride layer within the above ranges in the embodiments of the present application, light can be effectively trapped, the utilization rate of incident light can be increased, and further the photoelectric conversion efficiency of the solar cell can be improved.

[0087] In addition, as Figure 1 、 Figure 2 and Figure 3As shown, in the above embodiments, the front surface of the substrate 10 may be a matte structure to increase the light incident on the front surface of the battery. Structures such as a front passivation layer 60 and a front antireflection layer 70 may also be provided on the front surface of the substrate 10. Optionally, the material of the front passivation layer 60 may include, but is not limited to, at least one of aluminum oxide (AlOx), silicon oxide (SiOx), and intrinsic amorphous silicon (a-Si:H(i)), etc., which can be used to improve the passivation performance of the front surface of the battery, reduce surface recombination, and thus improve the battery efficiency. The material of the front antireflection layer 70 may include, but is not limited to, at least one of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy), etc., which is used to reduce the light reflection on the front surface of the battery, increase the incidence and absorption of light, and thus improve the photoelectric conversion efficiency of the solar cell.

[0088] Figure 4 FIG. 4 is a schematic structural diagram of another solar cell provided according to an embodiment of the present application.

[0089] As Figure 4 shown, a tunneling oxide layer 80 may also be included between the first doping layer 21 (N-type doping layer) and the substrate 10 (N-type doped substrate). The tunneling oxide layer 80 may be made of silicon oxide (SiOx). The tunneling oxide layer 80 provides a tunneling barrier for electrons, enabling electrons to pass through the tunneling oxide layer 80 to reach the substrate 10 by means of quantum tunneling. This helps to optimize the charge transport and improve the charge collection efficiency. Moreover, the tunneling oxide layer 80 can also reduce surface recombination and improve the lifetime of charge carriers through passivation.

[0090] A back passivation layer 90 may also be included between the second doping layer 22 (P-type doping layer) and the substrate 10 (N-type doped substrate). The back passivation layer 90 may be made of intrinsic amorphous silicon (a-Si:H(i)), which has excellent surface passivation performance, can reduce the surface recombination at the interface between the second doping layer 22 (P-type doping layer) and the substrate 10 (N-type doped substrate), thus improving the lifetime of charge carriers. At the same time, it can also serve as a transport medium for electrons and holes, promoting the separation and directional movement of the two near the PN junction and improving the charge collection efficiency.

[0091] Figure 5 FIG. 5 is a schematic structural diagram of another solar cell provided according to an embodiment of the present application. As Figure 5 shown, for the structure in which the back surface of the substrate 10 includes a matte region and a non-matte region, a tunneling oxide layer 80 may also be provided between the first doping layer 21 and the substrate, and a back passivation layer 90 may be provided between the second doping layer 22 and the substrate 10, and it can achieve similar technical effects as the Figure 4 embodiment shown, which will not be elaborated here.

[0092] According to the same concept, the present application also provides a solar cell assembly, which is formed by connecting a plurality of solar cells provided in any of the above embodiments, and the connection mode can be series connection, parallel connection or a combination of series connection and parallel connection, which is not limited here. By providing a back reflection layer in the solar cell, the utilization rate of the incident light by each solar cell is improved, thereby improving the efficiency of the solar cell assembly.

[0093] The solar cell module may also include an encapsulation film and a cover plate. The encapsulation film covers the surface of the cell module to isolate the solar cell from the external environment and prevent water vapor and oxygen from corroding the solar cell, thereby improving the reliability of the module and extending its service life. The encapsulation film may include but is not limited to ethylene-vinyl acetate copolymer (EVA) film, polyolefin elastomer (POE) film, etc. The cover plate is located on the surface of the encapsulation film away from the solar cell module, and can be used to protect its internal structure and improve reliability. The cover plate may be made of materials such as glass with greater hardness and better light transmittance, so as to provide protection for the solar cell module while allowing as much light as possible to enter the solar cell for use.

[0094] According to the same concept, the present application also provides a method for preparing a solar cell, which may specifically include the following steps:

[0095] Step S01, pre-treating the substrate 10. Optionally, the substrate 10 may be a silicon wafer, and step S01 may include cleaning and polishing the silicon wafer, wherein chemical solvents (such as acid, alkali, organic solvent, etc.) or physical methods such as ultrasonic and radio frequency (RF) cleaning may be used to remove dust, grease, metal pollutants and other impurities on the surface of the silicon wafer to ensure the quality of the subsequent deposition process, and chemical mechanical polishing (CMP) technology may be used to level the surface of the silicon wafer and reduce the surface roughness through the action of abrasive liquid and abrasive disk, thereby providing a smooth substrate 10 for the subsequent preparation process.

[0096] Step S02: Form a tunnel oxide layer 80 on the back side of the silicon wafer. Optionally, the tunnel oxide layer 80 may be formed in a predetermined region of the silicon wafer by thermal oxidation or chemical vapor deposition (CVD) process.

[0097] Step S03: Form a first doped layer 21 on the tunneling oxide layer 80. Optionally, processes such as Plasma-Enhanced Chemical Vapor Deposition (PECVD) or Low Pressure Chemical Vapor Deposition (LPCVD) can be used to deposit a polysilicon layer on the back surface of the substrate 10, and an N-type dopant is introduced during the deposition process to form the first doped layer 21 (N-type doped layer).

[0098] In step S03, phosphosilicate glass (PSG) is formed on both the front and back surfaces of the substrate 10. Then, a photoresist and a mask can be used to define the pattern of the second doped layer 22 (P-type doped layer) through the exposure and development processes. Next, the PSG on the pattern of the second doped layer 22 can be removed using a wet etching process (such as using an HF solution). The PSG on the front surface can also be removed using the same method, but the PSG on the pattern of the first doped layer 21 is retained.

[0099] Step S04: Texturing. Optionally, chemical or physical methods can be used for double-sided texturing to form a textured surface in the area where the PSG was removed in the previous step. After completing this step, the front surface of the substrate 10 is textured. Since the first doped layer 21 is covered with PSG, the back surface of the substrate 10 includes a textured area and a non-textured area. The textured area corresponds to the pattern of the second doped layer 22 mentioned above, and the non-textured area corresponds to the pattern of the first doped layer 21 mentioned above. The PSG on the first doped layer 21 can be removed after texturing.

[0100] Step S05: Form a front passivation layer 60 on the front surface of the substrate 10. Optionally, aluminum oxide (AlOx), silicon oxide (SiOx), or intrinsic amorphous silicon (a-Si:H(i)) can be deposited on the front surface of the substrate 10 using PECVD or CVD processes as the front passivation layer 60.

[0101] Step S06: Form a front antireflection layer 70 on the front passivation layer 60. Optionally, at least one layer of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy), etc. can be deposited above the front passivation layer 60 using PECVD processes to form the front antireflection layer 70.

[0102] Step S07: Annealing. Optionally, a high-temperature annealing process can be carried out to improve the quality of passivation, reduce surface recombination, and improve the efficiency of the battery.

[0103] Step S08, backside wrap plating removal. Optionally, a chain device can be used to remove the backside wrap plating metal, avoiding short circuits caused by metal contact and improving the reliability of the battery.

[0104] Step S09, re-cleaning. Optionally, the silicon wafer can be cleaned again using the same method as in Step S01 to remove all residual chemicals and impurities and prepare for subsequent process steps.

[0105] Step S10, forming a backside passivation layer 90 on the backside of the substrate 10. Optionally, an intrinsic amorphous silicon (a-Si:H(i)) can be deposited as a passivation layer on the backside of the substrate 10 using PECVD technology under low-temperature conditions (less than 250 °C) to improve the surface passivation effect and reduce the influence of thermal stress on the material.

[0106] Step S11, forming a second doped layer 22 on the backside passivation layer 90. Optionally, an amorphous silicon layer can be deposited and P-type dopants can be introduced to form a P-type doped amorphous silicon layer using PECVD technology under low-temperature conditions (less than 250 °C), and then the P-type doped amorphous silicon layer on the first doped layer 21 can be removed using laser or wet etching technology to form the pattern of the second doped layer 22, and at this time the first doped layer 21 is exposed.

[0107] Step S12, forming a conductive layer 30 on the first doped layer 21 and the second doped layer 22. Optionally, one or more layers of indium tin oxide (ITO), indium wolfram oxide (IWO), indium cobalt oxide (ICO), stannic oxide (SnOx), or aluminium-doped zinc oxide (AZO) can be deposited using physical vapor deposition (PVD) or PECVD technology, and then patterned using laser or wet etching technology to form the conductive layer 30. The conductive layer 30 includes a first conductive portion 31 and a second conductive portion 32. Among them, the first conductive portion 31 is located on the first doped layer 21, the second conductive portion is located on the second doped layer 22, and there is a gap between the first conductive portion 31 and the second conductive portion 32.

[0108] Step S13, forming a first electrode 51 and a second electrode 52. Optionally, metals such as silver (Ag), copper (Cu), or aluminum (Al) can be deposited on the structure on the backside of the substrate 10 and patterned to form the first electrode 51 in contact with the first doped layer 21 and the second electrode 52 in contact with the second doped layer 22.

[0109] Step S14: Form a back reflection layer 40 on the conductive layer 30. Optionally, at least one layer of silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiOxNy) can be deposited by PECVD process under low temperature conditions (less than 250 °C) to form the back reflection layer 40.

[0110] Step S15: Light injection. Optionally, this step changes the properties of the substrate material through light illumination conditions, injects photons to activate the semiconductor surface, and improves the passivation effect of the material.

[0111] After completing the above steps S01 to S15, a solar cell as shown in Figure 2 can be formed. It can be understood that if a solar cell as shown in Figure 1 or Figure 3 is to be formed, it can be achieved by adjusting the sequence of the texturing process in the overall process flow. For example, texturing can be performed first, and only the front side of the substrate 10 is textured, and then the preparation of each film layer structure on the back side of the substrate 10 is carried out. The embodiments of the present invention will not be elaborated here.

[0112] The above are only the preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0113] Those of ordinary skill in the art can understand that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes can be made in form and details without departing from the spirit and scope of the present application. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application should be determined by the scope defined by the claims.

Claims

1. A solar cell, characterized in that, The solar cell includes: a substrate, the substrate including a front side and a back side; a first doping layer and a second doping layer, located on a side of the back side of the substrate facing away from the front side, the first doping layer and the second doping layer being arranged offset in the thickness direction of the substrate, and the first doping layer and the second doping layer having different doping types; a conductive layer, the conductive layer including a first conductive portion and a second conductive portion, the first conductive portion being located on a side of the first doping layer facing away from the substrate, the second conductive portion being located on a side of the second doping layer facing away from the substrate, and the first conductive portion and the second conductive portion having different thicknesses; a back reflection layer, located on a side of the conductive layer facing away from the substrate, and a part of the back reflection layer being filled in the gap between the first conductive portion and the second conductive portion; a first electrode, located on a side of the first conductive portion facing away from the first doping layer and electrically connected to the first conductive portion; a second electrode, located on a side of the second conductive portion facing away from the second doping layer and electrically connected to the second conductive portion.

2. The solar cell according to claim 1, wherein, The material of the conductive layer includes at least one of the following: indium tin oxide, indium tungsten oxide, indium cobalt oxide, tin oxide, aluminum-doped zinc oxide.

3. The solar cell according to claim 2, wherein The conductive layer includes at least one indium-containing conductive layer and at least one indium-free conductive layer arranged in a stacked manner.

4. The solar cell according to claim 3, characterized in that, The mass percentage of indium element in the indium-containing conductive layer is less than or equal to 50%.

5. The solar cell according to claim 4, characterized in that, The total thickness of the at least one indium-free conductive layer is greater than or equal to the total thickness of the at least one indium-containing conductive layer.

6. The solar cell according to claim 5, characterized in that, The total thickness of the at least one indium-free conductive layer is greater than or equal to 10 nm and less than or equal to 60 nm, and the total thickness of the at least one indium-containing conductive layer is greater than or equal to 10 nm and less than or equal to 40 nm.

7. The solar cell according to claim 1, wherein The back side of the substrate includes a matte region and a non-matte region, the first doping layer is located in the non-matte region, the second doping layer is located in the matte region, and the thickness of the first conductive portion is greater than the thickness of the second conductive portion.

8. The solar cell according to claim 7, characterized in that, The ratio of the thickness of the first conductive portion to the thickness of the second conductive portion is greater than or equal to 1.2 and less than or equal to 1.

7.

9. The solar cell according to claim 7, characterized in that, The first doping layer is an N-type doped polysilicon layer, and the second doping layer is a P-type doped amorphous silicon layer.

10. The solar cell according to claim 1, characterized in that, The thickness of the back reflection layer is greater than the thickness of the conductive layer.

11. The solar cell according to claim 1, wherein The thickness of the back reflection layer is greater than or equal to 15 nm and less than or equal to 115 nm.

12. The solar cell according to claim 1, wherein, The material of the back reflection layer includes at least one of the following: silicon nitride, silicon oxide, silicon oxynitride.

13. The solar cell according to claim 8, characterized in that, The back reflection layer includes a silicon nitride layer and a silicon oxide layer arranged in a stacked manner in a direction away from the substrate; or, the back reflection layer includes a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer arranged in a stacked manner in a direction away from the substrate.

14. The solar cell according to claim 13, characterized in that, The thickness of the silicon nitride layer is greater than the thicknesses of other film layers in the back reflection layer.

15. A solar cell module, characterized in that, The solar cell module includes a plurality of solar cells as described in any one of claims 1 to 14.

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