Semiconductor device and chip integrating light sensing, photon-generated carrier storage and calculation
By introducing potential well layer and bias voltage control into the PN junction diode, the integration of light perception, storage and computing is achieved, solving the problem of single functions of existing devices, simplifying the structure and supporting large-scale production and full-spectral work.
Patent Information
- Application Number
- CN202510493024.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-18
- Publication Date
- 2025-07-08
AI Technical Summary
Existing semiconductor devices based on PN junctions have single functions, making it difficult to achieve diversified needs for photo perception, photogenerated carrier storage and computing. Existing solutions often lead to complex device structures, increased costs or difficulty in mass production.
A potential well layer is introduced into the PN junction diode, and the capture and release of photogenerated carriers on the potential well layer is used to realize the photo perception, storage and calculation functions. By applying a bias voltage on the electrode, the storage and reading of photogenerated carriers is controlled, and combined with the III-V semiconductor material and the CMOS process, the multifunctional integration of photogenerated carriers on a single device is achieved.
It realizes the integration of photo perception, photogenerated carrier storage and computing, simplifies the device structure, reduces manufacturing difficulty and cost, and has large-scale production capacity to support work within the full spectrum range.
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Figure CN120282708A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and particularly to a semiconductor device and a chip that integrate light collection sensing, photo-generated carrier storage, and computing based on a PN junction diode structure. Background Art
[0002] The semiconductor PN junction is a key building block for electronic and optoelectronic devices (including rectifiers, light-emitting diodes, lasers, photodiodes, and solar cells, etc.). However, the operating principles of these PN junction-based devices must follow strict semiconductor physical laws, such as unidirectional current flow, which invariably limit them to single-functional devices and cannot meet the diverse requirements for establishing complex electronic and optoelectronic systems.
[0003] To address the lack of versatility caused by this fundamental limitation, existing solutions are mainly divided into two types. One is to design new structures and new materials to expand the functions of PN junction-based devices. For example, integrating a third "junction" (also called "terminal") monolithically with a two-terminal PN junction device, or adopting ferroelectric or two-dimensional material systems to control the movement and transport of carriers, thereby expanding their functions. However, this approach often complicates the device structure, bringing unnecessary costs and manufacturing difficulties; the other approach simply interconnects PN diodes with other electronic components to form a multi-functional circuit. For example, in a CMOS sensor, there are transistors around each photodiode to complete image sensing, storage, and processing functions. Although this method effectively expands the system functions, it introduces significant hardware complexity and increases the chip size and power consumption. Summary of the Invention
[0004] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a semiconductor device and a chip that integrate light collection sensing, photo-generated carrier storage, and computing.
[0005] To achieve the above object, the technical solution of the present disclosure is as follows:
[0006] In an embodiment of the present disclosure, a semiconductor device integrating light sensing, photocarrier storage, and computing is provided, including: a substrate, a PN junction diode, and an electrode; the PN junction diode includes an N-type semiconductor material layer, a potential well layer, and a P-type semiconductor material layer; the electrode is fabricated on the N-type semiconductor material layer and the P-type semiconductor material layer, wherein: when the PN junction diode senses the irradiation of a target light, photocarriers are generated, a part of the photocarriers can be trapped by the potential well layer, and the other part directly generates a photocurrent that can be detected by an external circuit, realizing the preliminary sensing of the target light; the photocarriers trapped by the potential well layer under the condition of target light irradiation are retained in the potential well layer after the target light irradiation stops, realizing the storage of photocarriers in the PN junction diode, thereby realizing the writing and storage of the optical parameter information carried by the target light in the PN junction diode; when there is no light illumination on the PN junction diode, by applying a set bias voltage on the electrode, the photocarriers trapped by the potential well layer can be gradually released, thereby generating a current and being read out by the external circuit, realizing the reading of the photocarriers stored in the PN junction diode, and further obtaining the optical parameter information carried by the target light; during the process of storage and reading of the trapped photocarriers, the magnitude of the read current is related to the set bias voltage applied on the PN junction diode and the number of photocarriers trapped by the potential well layer, and the number of photocarriers trapped by the potential well layer is related to the optical parameter information of the target light. Therefore, the magnitude of the finally read current reflects the total output current amplitude of the PN junction diode under the combined action of the target light and the set bias voltage. Thus, through the physical processes of generation, storage, and reading of photocarriers inside the PN junction diode, the whole process of light sensing, photocarrier storage, and optoelectronic fusion computing of a single semiconductor device under the combined action of an external bias voltage and a target light is realized.
[0007] According to an embodiment of the present disclosure, under the action of continuous or intermittent target light irradiation, the photocarriers generated by the PN junction diode flow through the potential well layer to the N-type semiconductor material layer or the P-type semiconductor material layer respectively under the action of the built-in electric field of the PN junction diode, generating a photocurrent; some photocarriers will be temporarily trapped by the potential well layer. When a set bias voltage is applied to the PN junction diode, the photocarriers trapped by the potential well layer will be released, and the photocurrent increases; under continuous light illumination, the photocurrent continuously increases, generating a continuous photoconductivity phenomenon.
[0008] According to an embodiment of the present disclosure, the optical parameter information includes light intensity, light wavelength, light polarization, and light phase. The magnitude of the read current is proportional to the light intensity and illumination time of the target light when the photocarriers are generated and trapped by the potential well layer, and is also related to the light wavelength, light polarization, and light phase information.
[0009] According to an embodiment of the present disclosure, the bandgap of the potential well layer material is greater than the bandgap of the N-type semiconductor material layer and / or the P-type semiconductor material layer; the doping concentration of the potential well layer material is greater than or equal to the N-type doping concentration of the N-type semiconductor material layer, or the doping concentration of the potential well layer material is greater than or equal to the P-type doping concentration of the P-type semiconductor material layer, so that an electron potential well or a hole potential barrier is formed in the potential well layer.
[0010] According to an embodiment of the present disclosure, the materials for preparing the PN junction diode are selected from binary, ternary or quaternary metal nitrides of Ga, Al, In, or binary, ternary or quaternary metal phosphides of Ga, Al, In, or binary, ternary or quaternary metal arsenides of Ga, Al, In, or binary, ternary or quaternary metal antimonides of Ga, Al, In.
[0011] According to an embodiment of the present disclosure, the materials for preparing the substrate are selected from semiconductors, low-dimensional materials or quartz glass including graphene, sapphire, silicon, germanium, silicon carbide, gallium oxide, boron nitride, diamond, aluminum nitride, gallium nitride, gallium arsenide, and indium phosphide, or substrate materials having transparency characteristics within the spectral range from deep ultraviolet light to infrared light; the substrate can be conductive or non-conductive.
[0012] According to an embodiment of the present disclosure, the thickness of each layer structure of the semiconductor device is between 0.1 nm and 5 μm; the positions of the P-type semiconductor material layer and the N-type semiconductor material layer can be interchanged, and the PN junction diode may further include a structural layer that helps to realize the capture and storage of carriers, and the structural layer includes a composition grading layer, a multi-quantum well structure, and a tunneling junction; the cross-sectional area of the semiconductor device is 1 nm 2 -1000 mm 2 , and the cross-sectional shape includes: circular, rectangular, regular polygon or irregular shape.
[0013] According to an embodiment of the present disclosure, the PN junction diode can be in the form of a thin film structure, a nanorod and a nanorod array structure, or a nanowire and a nanowire array structure.
[0014] According to an embodiment of the present disclosure, under different illuminations and / or different set bias voltages, the functions of light sensing, photo-generated carrier storage writing, reading or calculation of the target light can be realized by a single semiconductor device.
[0015] According to an embodiment of the present disclosure, there is also provided a chip integrated in an array form based on the semiconductor device described in any one of the above. The control method of the semiconductor device array is that each semiconductor device unit is individually controlled by an external circuit, or multiple semiconductor device units are controlled in a parallel, series, or series-parallel combination manner; such that each semiconductor device unit of the semiconductor device array serves as a pixel point, and under the control of a set bias voltage, it performs light sensing, photo-generated carrier storage, and optoelectronic fusion calculation processing on the target light, realizing an integrated chip integrating sensing, storage, and calculation. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, the above and other objects, features, and advantages of the present disclosure will become more apparent. In the drawings:
[0017] Figure 1 It is a schematic structural diagram of a semiconductor device integrating light sensing, photo-generated carrier storage, and calculation according to an embodiment of the present disclosure.
[0018] Figure 2 It is a schematic diagram of the energy band and performance of a semiconductor device integrating light sensing, photo-generated carrier storage, and calculation according to an embodiment of the present disclosure.
[0019] Figure 3 It is a schematic diagram of the working principle of a semiconductor device integrating light sensing, photo-generated carrier storage, and calculation according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0020] The present disclosure provides a semiconductor device and a chip integrating light sensing, photo-generated carrier storage, and calculation, realizing the functions of light signal sensing, photo-generated carrier data storage, calculation, and information storage on a single PN junction diode device (which can be simply referred to as sensing, storage, and calculation), and being compatible with the current silicon-based semiconductor process flow, and being a sensing, storage, and calculation integrated chip that can be monolithically integrated and mass-produced.
[0021] In the prior art, the following technical methods are generally used to realize sensing, storage, and calculation:
[0022] (1) Realize the integration of sensing, storage, and calculation through the integration of discrete devices. This technology usually uses independent traditional photodetectors and memristors integrated together to realize "near-sensing calculation". The photodetector independently detects the optical signal, and then transmits the detected signal to the memristor for storage and finally for calculation. The disadvantages include:
[0023] Complex structure: Since multiple independent components are required to separately realize sensing, storage, and calculation, such devices usually require different materials for heteroepitaxy, with complex structures and processes. Energy consumption and speed are limited: Since the functions of sensing, storage, and calculation are actually still realized based on discrete devices, data transmission still needs to be carried out between various components, resulting in transmission losses and delays.
[0024] (2) Achieving integrated sensing, storage, and computing through the stacking of two-dimensional materials. Utilizing the unique properties of two-dimensional materials, by laminating material layers with different functions to form van der Waals contacts, the integration of sensing, storage, and computing functions is realized. Disadvantages include:
[0025] Manufacturing difficulty: It is difficult to precisely control the arrangement and stacking of two-dimensional materials, and the materials are prone to influencing each other.
[0026] Stability and consistency: It is difficult to control the stability of two-dimensional materials and their consistency in large-scale production. There are challenges in realizing samples with uniform and reliable properties.
[0027] Limited large-scale production capacity: The manufacturing process of two-dimensional materials is complex and it is difficult to produce them on a large scale.
[0028] (3) Achieving integrated sensing, storage, and computing through an optoelectronic memristor array. Utilizing new materials with optoelectronic response and memristive functions (usually based on defects and vacancies) to realize an integrated sensing, storage, and computing device with both sensing and storage functions. Disadvantages include:
[0029] Material system: Materials with such properties often emerge newly. The materials are complex and expensive, and the related processes are difficult. It is difficult to be compatible with existing material systems;
[0030] Stability and consistency: Since the mechanism of such materials is usually based on defects and vacancies within the material, and the formation of defects and vacancies is random, there are challenges in the stability and consistency of device performance;
[0031] Manufacturing process: The emerging material system is not easily compatible with existing processes, and there are challenges in large-scale production.
[0032] Related representative research works include:
[0033] 1) Near-sensor computing with heterogeneous integration of an optoelectronic detector and a memristor (Lee, D., Park, M., Baek, Y. et al. In-sensor image memorization and encoding via optical neurons for bio-stimulus domain reduction toward visual cognitive processing. Nature Communications 13, 5223 (2022).).
[0034] Principle: By integrating hafnium oxide memristors and InGaAs photodiodes one-to-one, the photodiodes are used to convert the detected optical signal into an electrical signal, which is then transmitted to the memristor for storage and calculation.
[0035] Disadvantages: (1) The integration of hafnium oxide memristors and InGaAs photodiodes is still essentially the integration of discrete devices, which increases the data transmission process and improves the system complexity; (2) The introduction of multiple materials will inevitably increase the device fabrication cost and difficulty, and heteroepitaxy of materials is difficult.
[0036] 2) Integrated sensing, storage, and computing device based on two-dimensional materials (Zha, Jiajia, et al. "Electronic / optoelectronic memory device enabled by tellurium‐based 2D van der Waals heterostructure for in‐sensor reservoir computing at the optical communication band." Advanced Materials 35.20 (2023): 2211598.).
[0037] Principle: An optoelectronic memory device is realized using a tellurium-based 2D van der Waals (vdW) heterostructure, where the tellurium layer serves as the light-responsive layer and the ferroelectric two-dimensional material serves as the storage layer.
[0038] Disadvantages: (1) Poor material uniformity and reproducibility, and difficult to mass-produce in arrays: Currently, the preparation methods of two-dimensional materials (such as CVD, mechanical exfoliation) may lead to poor material uniformity, such as uneven thickness, grain boundary defects, uneven doping, etc. (2) Gate control is required for device storage and reading, and the structure is complex: Due to the simple energy band structure of two-dimensional material heterojunctions, this device requires an additional third-terminal gate terminal to control the storage and computing functions, and the structure is complex.
[0039] 3) Integrated sensing, storage, and computing device based on optoelectronic memristors (Zhu, R., Liang, H., Liu, S. et al. Non-volatile optoelectronic memory based on a photosensitive dielectric. Nature Communications 14, 5396 (2023).).
[0040] Principle: An optoelectronic memory device is realized using a novel photosensitive dielectric material, where the novel photosensitive dielectric serves as both the photosensitive layer and the dielectric storage layer.
[0041] Disadvantages: (1) The new photosensitive dielectric material is complex: The growth process of the new material is relatively complex, and large-scale production is limited. (2) Gate control devices are required for storage and reading, and the structure is complex: Since the dielectric layer requires multiple terminals such as gates for storage control, the device structure is relatively complex. (3) The sensing wavelength is limited: Since the dielectric layer requires specific materials to be realized, the photosensitive wavelength of the device is limited. For example, this work is based on gallium oxide and can only detect deep ultraviolet light, so the application scenarios are limited.
[0042] Explanation of related terms: Electron / hole potential well: A region with a lower / higher electric potential energy. Due to the higher / lower electric potential outside the region, electrons / holes are confined within this region. Integration of sensing, storage, and computing: Integration of sensing, storage, and computing is a computing architecture that integrates sensing, storage, and computing functions. Its purpose is to reduce data transmission, improve energy efficiency, and real-time processing capabilities. By directly performing computing and storage at the data source, the integration of sensing, storage, and computing can significantly reduce latency and energy consumption, and is particularly suitable for fields such as the Internet of Things, intelligent sensors, and edge computing.
[0043] In order to overcome the above-mentioned challenges at the device and system levels in the process of seeking multifunctional diodes or diode integrated circuits, it is urgently necessary to endow ordinary PN junction diodes with multiple functions (function integration that combines sensing, storage, and computing functions) so that while working in a two-terminal mode (i.e., a two-electrode mode: one positive electrode and one negative electrode) in the simplest semiconductor structure of the PN junction diode, the manufacturing process of the device and the chip can be simplified and be compatible with the traditional silicon-based CMOS integrated circuit preparation process.
[0044] To make the purpose, technical solution, and advantages of the present disclosure clearer and more understandable, the following further elaborates on the present disclosure in detail with reference to specific embodiments and the accompanying drawings.
[0045] In an embodiment of the present disclosure, a semiconductor device integrating sensing, storage, and computing is provided. As Figure 1 shown, the semiconductor device includes: a substrate 1, a PN junction diode, and electrodes (a first electrode 5 and a second electrode 6); the PN junction diode includes:
[0046] An N-type semiconductor material layer 2, prepared on the substrate 1;
[0047] A potential well layer 3, prepared on the N-type semiconductor material layer 2; and
[0048] A P-type semiconductor material layer 4, prepared on the potential well layer 3;
[0049] Among them, when the PN junction diode senses the irradiation of the target light, photogenerated carriers are generated. Part of the photogenerated carriers can be captured by the potential well layer, and the other part directly generates a photocurrent that can be detected by an external circuit, realizing the preliminary sensing of the target light.
[0050] The photo-generated carriers trapped by the potential well layer 3 under the target light irradiation conditions are retained in the potential well layer after the target light irradiation stops, realizing the storage of photo-generated carriers in the PN junction diode, and thus realizing the writing and storage of the optical parameter information carried by the target light in the PN junction diode; in the case where there is no light irradiation on the PN junction diode, by applying a set bias voltage to the electrode, the photo-generated carriers trapped by the potential well layer 3 can be gradually released, thereby generating a current and being read out by an external circuit, realizing the readout of the photo-generated carriers stored in the PN junction diode, and further obtaining the optical parameter information carried by the target light;
[0051] During the process of storage and readout of the trapped photo-generated carriers, the magnitude of the readout current is related to the set bias voltage applied to the PN junction diode and the number of photo-generated carriers trapped by the potential well layer, and the number of photo-generated carriers trapped by the potential well layer 3 is related to the optical parameter information of the target light. Therefore, the magnitude of the finally readout current reflects the total output current amplitude of the PN junction diode under the combined action of the target light and the set bias voltage. Thus, through the physical processes of generation, storage, and readout of photo-generated carriers inside the PN junction diode, the whole process of optical perception, photo-generated carrier storage, and optoelectronic fusion calculation of a single semiconductor device under the combined action of an external bias voltage and a target light is realized.
[0052] Under the action of continuous or intermittent target light irradiation, the photo-generated carriers generated by the PN junction diode flow through the potential well layer to the N-type semiconductor material layer or the P-type semiconductor material layer respectively under the action of the built-in electric field of the PN junction diode, generating a photo-generated current; part of the photo-generated carriers will be temporarily trapped by the potential well layer. When a set bias voltage is applied to the PN junction diode, the photo-generated carriers trapped by the potential well layer will be released, and the photo-generated current increases; and under continuous light irradiation, the photo-generated current continuously increases, generating a continuous photoconductivity phenomenon.
[0053] According to the embodiments of the present disclosure, the optical parameter information includes light intensity, light wavelength, light polarization, and light phase. The magnitude of the readout current is proportional to the light intensity and the illumination time of the target light when the current photo-generated carriers are generated and trapped by the potential well layer, and is also related to the light wavelength, light polarization, and light phase information.
[0054] According to the embodiments of the present disclosure, under the drive of different light irradiations and / or different set bias voltages, the functions of optical perception, writing, readout, or calculation of photo-generated carrier storage of a target light can be realized by a single semiconductor device.
[0055] According to the embodiments of the present disclosure, the above semiconductor device realizes sensing, storage, or computing functions through a single semiconductor device under different illuminations and / or different bias drives. The thicknesses of the respective layers in the semiconductor device are not limited, and the potential well layer may also be an electron potential well or a hole potential well. As long as it can store photo-generated electrons (carriers), the multifunctional effects of the above semiconductor device can be achieved.
[0056] According to the embodiments of the present disclosure, the bandgap width of the potential well layer material is greater than the bandgap width of the N-type semiconductor material layer and / or the P-type semiconductor material layer; the doping concentration of the potential well layer material is greater than or equal to the N-type doping concentration of the N-type semiconductor material layer, or the doping concentration of the potential well layer material is greater than or equal to the P-type doping concentration of the P-type semiconductor material layer, so that the potential well layer forms an electron potential well or a hole barrier. It should be noted that during the actual operation of the device, the doping concentration of the potential well material layer can also be adjusted according to the requirements of the target function, including from undoped to highly doped, to achieve the response ability to the target light, including precise control of the response range, response speed, and responsivity.
[0057] The preparation materials of the PN junction diode are selected from binary, ternary, or quaternary metal nitrides of Ga, Al, In, or binary, ternary, or quaternary metal phosphides of Ga, Al, In, or binary, ternary, or quaternary metal arsenides of Ga, Al, In, or binary, ternary, or quaternary metal antimonides of Ga, Al, In. The preparation materials of the substrate are selected from semiconductors, low-dimensional materials, or quartz glass including graphene, sapphire, silicon, germanium, silicon carbide, gallium oxide, boron nitride, diamond, aluminum nitride, gallium nitride, gallium arsenide, and indium phosphide, or substrate materials having transparent characteristics within the spectral range from deep ultraviolet light to infrared light; the substrate can be conductive or non-conductive. It should be noted that the light absorption performance can be changed by changing the component distribution and component composition form of each layer of material in the PN diode. Specifically, during the epitaxial growth of the material, along the epitaxial direction, by gradually changing the components of the material, the materials with different components correspond to absorbing the wavelength range corresponding to the material, generating a certain amount of photo-generated electron-hole pairs (i.e., photo-generated carriers), and finally realizing the photo-generated current for a specific target light. Such as Figure 1As shown, for example, an n-type doped GaN layer can be grown successively on a silicon substrate 1, then an AlGaN layer with a higher concentration of n-type doping is grown, and then a p-type doped GaN layer is grown. The electron potential well formed by the AlGaN layer with a higher concentration of n-type doping and the two GaN layers is the reason for realizing the integrated sensing, storage, and computing with bias control in this example. It should be noted that the epitaxial structure of the semiconductor device is not limited to this. As long as a semiconductor layer with a higher N doping concentration is inserted into the PN junction to form an electron potential well, or a semiconductor layer with a higher P doping concentration is inserted to form a hole potential well, or in the case of inserting undoped or lightly doped layers, the device can achieve the functions and effects of this semiconductor device.
[0058] The thickness of each layer structure in the above semiconductor device is between 0.1 nm and 5 μm; the positions of the p-type semiconductor material layer and the n-type semiconductor material layer can be interchanged, and the PN junction diode can also include a structural layer that helps to achieve the capture and storage of carriers. The structural layer includes a compositionally graded layer, a multiple quantum well structure, and a tunneling junction.
[0059] Each layer of material in the above semiconductor device is selected from materials with fixed composition, compositionally graded materials, materials with stepwise compositional changes, or materials with non-linear increase or decrease in composition corresponding to the same group of materials.
[0060] The cross-sectional area of the semiconductor device is 1 nm 2 -1000 mm 2 , and the cross-sectional shape includes: circular, rectangular, regular polygon, or irregular shape.
[0061] According to an embodiment of the present disclosure, the P doping concentration of the potential well layer is higher than the doping concentration of the p-type semiconductor material layer. Actually, the doping concentration of the potential well material layer can also be adjusted according to actual conditions, including from undoped to highly doped, to achieve precise control of the response range, response speed, and responsivity of the target light.
[0062] According to an embodiment of the present disclosure, the PN junction diode can be in the form of a thin film structure, a nanowire and nanowire array structure, or a nanocolumn and nanocolumn array structure.
[0063] When preparing the above semiconductor device that integrates light collection, photogenerated carrier storage, and computing, the preparation method includes:
[0064] (1) Epitaxially grow a PN junction diode in the form of a thin film.
[0065] It should be noted that the PN junction diode can be in the form of a thin film, or in the form of a nanocolumn and nanocolumn array structure, or in the form of a nanowire and nanowire array structure; the PN junction diode includes: an N-type semiconductor material layer 2 prepared on the substrate 1; a potential well layer 3 prepared on the N-type semiconductor material layer 2; and a P-type semiconductor material layer 4 prepared on the potential well layer 3;
[0066] (2) Etch the PN junction diode obtained in step (1) using photolithography and dry etching processes to expose the surface of the N-type semiconductor material layer 2.
[0067] (3) Fabricate a first electrode 5 on the surface of the exposed N-type semiconductor material layer 2 of the product obtained in step (2) through photolithography, evaporation, and annealing processes. The preparation materials of the first electrode 5 are selected from Ti / Al / Ti / Au multi-metals, Ti / Au multi-metals, Ti / Al / Ni / Au multi-metals, Cr / Au multi-metals, or Cr / Al / Ti / Au multi-metals.
[0068] (4) Fabricate a second electrode 6 on the surface of the exposed P-type semiconductor material layer 4 of the product obtained in step (3) through photolithography, evaporation, and annealing processes. The preparation materials of the second electrode 6 are selected from Ni / Au multi-metals, Ti / Au multi-metals, or ITO conductive thin films.
[0069] Changes in the etching mesa size of the semiconductor device, electrode pattern design, and epitaxial structure do not affect the technical effects.
[0070] Another aspect of the present disclosure provides a chip integrated in an array form based on the above-mentioned semiconductor device. The control method of the semiconductor device array is that each semiconductor device unit is individually controlled by an external circuit, or multiple semiconductor device units are controlled in a parallel, series, or series-parallel combination manner; so that each semiconductor device unit of the semiconductor device array serves as a pixel point, and under the control of a set bias voltage, it performs light perception, photo-generated carrier storage, and optoelectronic fusion calculation processing on the target light, realizing an integrated chip integrating sensing, storage, and calculation. As shown in combination Figure 3 Each unit of the semiconductor device array is used as a pixel to sense the incident light, and after denoising the sensed data in the semiconductor device, a target light perception image is obtained, and the weights are stored by the storage function of the semiconductor device to form a node array of an artificial neural network to classify the perception image.
[0071] The semiconductor device and chip integrating light perception, photo-generated carrier storage, and calculation based on the PN junction diode structure of the present disclosure can achieve a full spectral range (deep ultraviolet - infrared) working range, or any spectral working range within this spectral range.
[0072] The epitaxial structure with an electron potential well or a hole potential well can be a P-N-N junction, P-P-N, P-N-P, N-P-N, etc., as long as it has a band structure with an electron or hole potential well and can control the storage and release of carriers in the potential well through a bias voltage. The P-type semiconductor layer, N-type semiconductor layer, and potential well layer can include compositionally graded layers, multiple quantum well structures, tunneling junctions, and other structures that help achieve carrier capture and storage.
[0073] The semiconductor device and chip integrating light collection sensing, photo-generated carrier storage, and computing based on the PN junction diode structure of the present disclosure do not depend on specific materials, and arsenides, III-V, and II-VI group compound semiconductors can all realize this structure.
[0074] Figure 2 Shows the energy band diagram and test performance of the semiconductor device. Combining Figure 2 As shown, the principle of the semiconductor device and chip integrating sensing, storage, and computing at both ends of the PN junction diode assisted by an electron potential well of the present disclosure is introduced: when the semiconductor device operates under zero bias voltage with 265nm light illumination, due to the built-in electric field between the p-type semiconductor material layer (such as p-GaN) and the potential well layer (high-concentration n-AlGaN), photo-generated electrons and holes can be separated without applying an external voltage to the device. The electrons flow through the N-type semiconductor material layer (n-GaN), and the holes flow to p-GaN, forming the basic "sensing" function, as Figure 2 shown in part (I) of Figure 2 ; at the same time, the potential well causes a part of the photo-generated electrons to be temporarily confined (captured) in the high-concentration n-AlGaN section. When a bias voltage is applied to the semiconductor device, the electrons stored in the electron potential well are released, causing the photocurrent of the device to continuously increase under the bias voltage and generating a continuous photoconductivity phenomenon for light illumination, which can form a "computing" function (such as noise reduction of a photosensitive image, recognition of the trajectory of a moving object), as Figure 2 shown in part (II) of Figure 3 ; finally, after light illumination for a period of time, even if the light illumination stops, the electrons captured in the electron potential well will still exist and can be released and read out under a bias voltage, forming a "storage" function, Figure 3 shown in part (III) of Figure 3 shown in part (III). At the same time, the electron potential well can also be replaced by a hole potential well to store holes, and the same device functions can also be realized. Finally, as Figure 3 shown, each device of the semiconductor device array is used as a pixel to sense the illumination light acting on the semiconductor device array, and the sensed data (the sensed image with noise, Figure 3 the sensed image of "package" in Figure 3As shown, in the artificial neural network node array formed by the semiconductor device array, each semiconductor device represents a node. The weight of the node is regulated by the intensity and / or time of the incident light, and is represented by the number of photo-generated electrons or holes stored in the potential well layer. The weighted operation of the node is achieved by applying a bias voltage to the device. The applied voltage represents the input value before weighting, and the read current value is the output value after weighting. The greater the applied voltage (representing a larger input), or the longer the light intensity and time (more photo-generated electrons or holes are stored, and the higher the weight), the greater the output current (the greater the output after the weighted operation). Specifically, this artificial neural network uses a hardware device array to implement the mathematical operations in software. The operation of input value * weight = output value is achieved by input voltage * light intensity or time = output current.
[0075] The present disclosure proposes a PN junction diode structure assisted by an electron (or hole) potential well to implement a semiconductor device that integrates the functions of light sensing, storage, and calculation for the target irradiated light. Through this semiconductor device and chip, image detection, noise reduction, and classification can be achieved. For example, an n-type AlGaN layer is inserted into a gallium nitride PN junction to form an electron potential well. This enables the device to store and release electrons under bias voltage control in addition to the unidirectional conduction characteristic of the traditional PN junction, thus realizing the functions of storage and calculation. Finally, the integration of light sensing, storage, and calculation is achieved on the same semiconductor device through bias voltage control. When the PN junction diode operates under zero bias voltage under 265nm light illumination, due to the built-in electric field between the p-GaN and n-AlGaN segments, photo-generated electrons and holes can be separated without applying an external voltage to the device. Electrons flow to n-GaN, and holes flow to p-GaN, forming the basic "sensing" function. At the same time, the electron potential well causes a part of the photo-generated electrons to be temporarily confined (trapped) in the AlGaN segment. When a bias voltage is applied to the diode, the electrons stored in the electron potential well are released, causing the photocurrent of the device to continuously increase under the bias voltage and generating a continuous photoconductivity phenomenon for the light illumination, forming the "calculation" function; finally, after illuminating for a period of time, even if the illumination stops, the electrons trapped in the electron potential well will still exist and can be released and read out under the bias voltage, forming the "storage" function. At the same time, the electron potential well can also be replaced by a hole potential well to store holes and achieve the same device functions. Finally, each device in the device array is used as a pixel to sense the input image, and the sensed data is denoised within the same device, and then the device array is used to form the node array of the artificial neural network to classify the input picture. The realization of this integrated light sensing, storage, and calculation PN junction device lays a foundation for high-efficiency and low-cost edge image processing.
[0076] The semiconductor device and chip of the present disclosure that integrate light sensing, photo-generated carrier storage, and calculation have the following beneficial effects:
[0077] 1. Simplification of the integrated sensing, storage, and computing device: This integrated sensing, storage, and computing device based on electron or hole potential wells relies on different voltage drives to achieve switching between different functions of sensing, storage, and computing on the same device. There is no need to integrate device components with different functions. Therefore, a single semiconductor device can complete the functions of integrated sensing, storage, and computing. At the same time, since the semiconductor device of the present disclosure generates electron or hole potential wells based on the energy band mechanism rather than material defects, only a two-terminal PN junction device is required to complete the functions of integrated sensing, storage, and computing, without a complex device structure and complex material system.
[0078] 2. High response efficiency: The "sensing" function of this integrated sensing, storage, and computing device based on electron or hole potential wells is essentially generated by photo-generated carriers generated by the PN junction. Therefore, the photo-response efficiency under the sensing function can be guaranteed to be at a relatively high level.
[0079] 3. Miniaturization of the integrated sensing, storage, and computing device: Instead of integrating discrete sensing, storage, and computing elements, multiple functions are integrated on a single device through a vertical energy band structure, greatly reducing the system volume. At the same time, since the device realizes its functions through a vertical structure, theoretically, within the range allowed by semiconductor processes, integrated sensing, storage, and computing devices of any size from 1 nm 2 - 1000 mm 2 can be realized.
[0080] 4. Array and large-scale production of the integrated sensing, storage, and computing device: Based on a silicon substrate epitaxial structure, it is compatible with CMOS circuits. At the same time, it is manufactured using standard III-V semiconductor processes, has the ability for large-scale production and integration, and a ten-by-ten array product demonstration has been carried out.
[0081] 5. Realization of a full-spectrum integrated sensing, storage, and computing chip: Only an energy band structure epitaxy with electron or hole potential wells needs to be formed. Therefore, a III-V semiconductor material system (the response wavelength range corresponding to the bandgap width of this material system covers ultraviolet to infrared) can be used. For example, a spectral range of 10 - 10000 nm can be realized, or full-spectrum sensing imaging from ultraviolet to infrared can be realized.
[0082] So far, the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It should be noted that in the accompanying drawings or the main text of the specification, the implementation manners that are not depicted or described are all forms known to those of ordinary skill in the art and have not been described in detail. In addition, the definitions of the above elements and methods are not limited to the specific structures, shapes, or manners mentioned in the embodiments, and those of ordinary skill in the art can make simple changes or substitutions to them.
[0083] In this document, unless otherwise specified, the so-called feature A "or" (or) or "and / or" (and / or) feature B means that A exists alone, B exists alone, or A and B exist simultaneously; the so-called feature A "and" (and) or "and" (and) or "and" (and) feature B means that A and B exist simultaneously; the so-called "including", "containing", "having", "comprising" means including but not limited to this.
[0084] In addition, in this document, terms such as "upper", "lower", "left", "right", "front", "rear", or "between" are only used to describe the relative positions between multiple components, and in the interpretation can be extended to include cases of translation, rotation, or mirroring. In addition, in this document, unless otherwise specified, the statement that "one component is on another component" or a similar statement does not necessarily mean that the component contacts the other component.
[0085] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to those listed above, and can be changed or rearranged according to the required design. And the above embodiments can be used in combination with each other or in combination with other embodiments based on considerations of design and reliability, that is, the technical features in different embodiments can be freely combined to form more embodiments.
[0086] The specific embodiments described above further elaborate on the purpose, technical solutions, and beneficial effects of the present disclosure. It should be understood that the above are only specific embodiments of the present disclosure and are not used to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.
Claims
1. A semiconductor device integrating light sensing, photo-generated carrier storage, and computing, comprising: Substrate, PN junction diode, electrode; The PN junction diode includes an N-type semiconductor material layer, a potential well layer, and a P-type semiconductor material layer; The electrodes are prepared on the N-type semiconductor material layer and the P-type semiconductor material layer, where: When the PN junction diode senses the irradiation of the target light, photo-generated carriers are generated. Part of the photo-generated carriers can be captured by the potential well layer, and the other part directly generates a photo-generated current that can be detected by an external circuit, realizing the preliminary perception of the target light; The photo-generated carriers captured by the potential well layer under the condition of target light irradiation are retained in the potential well layer after the target light irradiation stops, realizing the storage of photo-generated carriers in the PN junction diode, and thus realizing the writing and storage of the optical parameter information carried by the target light in the PN junction diode; When there is no light irradiation on the PN junction diode, by applying a set bias voltage on the electrodes, the photo-generated carriers captured by the potential well layer can be gradually released, thereby generating a current and being read out by an external circuit, realizing the readout of the photo-generated carriers stored in the PN junction diode, and further obtaining the optical parameter information carried by the target light; During the process of storage and readout of the captured photo-generated carriers, the magnitude of the read current is related to the set bias voltage applied to the PN junction diode and the number of photo-generated carriers captured by the potential well layer, and the number of photo-generated carriers captured by the potential well layer is related to the optical parameter information of the target light. Therefore, the magnitude of the finally read current reflects the total output current amplitude of the PN junction diode under the combined action of the target light and the set bias voltage. Thus, through the physical processes of generation, storage, and readout of photo-generated carriers inside the PN junction diode, the entire process of optical perception, photo-generated carrier storage, and optoelectronic fusion calculation of a single semiconductor device under the combined action of an external bias voltage and target light is realized.
2. The semiconductor device according to claim 1, under the action of continuous or intermittent target light irradiation, the photo-generated carriers generated by the PN junction diode flow through the potential well layer to the N-type semiconductor material layer or the P-type semiconductor material layer respectively under the action of the built-in electric field of the PN junction diode, generating a photo-generated current; part of the photo-generated carriers will be temporarily captured by the potential well layer. When a set bias voltage is applied to the PN junction diode, the photo-generated carriers captured by the potential well layer will be released, and the photo-generated current increases; and under continuous light irradiation, the photo-generated current continuously increases, generating a continuous photoconductivity phenomenon.
3. The semiconductor device according to claim 1, the optical parameter information includes light intensity, light wavelength, light polarization, and light phase. The magnitude of the read current is proportional to the light intensity and illumination time of the target light when the photo-generated carriers are generated and captured by the potential well layer, and is also related to the light wavelength, light polarization, and light phase information.
4. The semiconductor device according to claim 1, wherein the bandgap of the potential well layer material is greater than the bandgap of the N-type semiconductor material layer and / or the P-type semiconductor material layer; the doping concentration of the potential well layer material is greater than or equal to the N-type doping concentration of the N-type semiconductor material layer, or the doping concentration of the potential well layer material is greater than or equal to the P-type doping concentration of the P-type semiconductor material layer, so that an electron potential well or a hole potential barrier is formed in the potential well layer.
5. The semiconductor device according to claim 1, wherein the material for preparing the PN junction diode is selected from binary, ternary or quaternary metal nitrides of Ga, Al, In, or binary, ternary or quaternary metal phosphides of Ga, Al, In, or binary, ternary or quaternary metal arsenides of Ga, Al, In, or binary, ternary or quaternary metal antimonides of Ga, Al, In.
6. The semiconductor device according to claim 1, wherein the material for preparing the substrate is selected from semiconductors, low-dimensional materials or quartz glass including graphene, sapphire, silicon, germanium, silicon carbide, gallium oxide, boron nitride, diamond, aluminum nitride, gallium nitride, gallium arsenide, and indium phosphide, or a substrate material having transparency characteristics in the spectral range from deep ultraviolet light to infrared light; the substrate can be conductive or non-conductive.
7. The semiconductor device according to claim 1, wherein the thickness of each layer structure is between 0.1 nm and 5 μm; the positions of the P-type semiconductor material layer and the N-type semiconductor material layer can be interchanged, and the PN junction diode may further include a structural layer that helps to achieve the capture and storage of carriers, and the structural layer includes a composition grading layer, a multiple quantum well structure, and a tunneling junction; The cross-sectional area of the semiconductor device is 1 nm 2 -1000 mm 2 , and the cross-sectional shape includes: Circular, rectangular, regular polygon or irregular shape.
8. The semiconductor device according to claim 1, wherein the PN junction diode can be in the form of a thin film structure, a nanocolumn and a nanocolumn array structure, or a nanowire and a nanowire array structure.
9. The semiconductor device according to claim 1, under different illuminations and / or different set bias voltages, the functions of light sensing, photo-generated carrier storage writing, reading or calculation of the target light can be realized by a single semiconductor device.
10. A chip integrated in an array form based on the semiconductor device according to any one of claims 1-9, wherein the control mode of the semiconductor device array is that each semiconductor device unit is individually controlled by an external circuit, or multiple semiconductor device units are controlled in a parallel, series, or series-parallel combination manner; so that each semiconductor device unit of the semiconductor device array serves as a pixel point, and under the control of a set bias voltage, light sensing, photo-generated carrier storage and optoelectronic fusion calculation processing of the target light are performed to realize an integrated chip integrating sensing, storage and calculation.